Files
Work/Src/Gen4_R-Car_Trace32/2_Trunk/permcxa1xx.per
2026-06-16 12:20:14 +09:00

75677 lines
4.9 MiB

; --------------------------------------------------------------------------------
; @Title: MCXA1xx On-Chip Peripherals
; @Props: Released
; @Author: KRZ
; @Changelog: 2025-02-13 KRZ
; @Manufacturer: NXP - NXP Semiconductors
; @Doc: Generated (TRACE32, build: 176904.), based on:
; MCXA132.xml, MCXA133.xml, MCXA142.xml, MCXA143.xml,
; MCXA144.xml, MCXA145.xml, MCXA146.xml, MCXA152.xml,
; MCXA153.xml, MCXA154.xml, MCXA155.xml, MCXA156.xml
; @Core: Cortex-M33F
; @Chip: MCXA132*, MCXA133*, MCXA142*, MCXA143*,
; MCXA144*, MCXA145*, MCXA146*, MCXA152*,
; MCXA153*, MCXA154*, MCXA155*, MCXA156*
; @Copyright: (C) 1989-2025 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; Copyright 2016-2024 NXP
; SPDX-License-Identifier: BSD-3-Clause
; --------------------------------------------------------------------------------
; $Id: permcxa1xx.per 19037 2025-02-13 10:44:56Z kwisniewski $
AUTOINDENT.ON CENTER TREE
ENUMDELIMITER ","
base ad:0x0
tree.close "Core Registers (Cortex-M33F)"
AUTOINDENT.PUSH
AUTOINDENT.OFF
tree "System Control"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 12.
group.long 0x08++0x03
line.long 0x00 "ACTLR,Auxiliary Control Register"
bitfld.long 0x00 29. " EXTEXCLALL ,Allows external exclusive operations to be used in a configuration with no MPU" "No,Yes"
bitfld.long 0x00 12. " DISITMATBFLUSH ,Disables ITM and DWT ATB flush" "No,Yes"
bitfld.long 0x00 10. " FPEXCODIS ,Disables FPU exception outputs" "No,Yes"
textline " "
bitfld.long 0x00 9. " DISOOFP ,Disables floating-point" "No,Yes"
bitfld.long 0x00 2. " DISFOLD ,Disables dual-issue functionality" "No,Yes"
bitfld.long 0x00 0. " DISMCYCINT ,Disables interruption of multi-cycle" "No,Yes"
group.long 0x0C++0x0F
line.long 0x00 "CPPWR,Coprocessor Power Control Register"
bitfld.long 0x00 21. " SUS10 ,State unknown Secure only" "Both states,Secure only"
bitfld.long 0x00 20. " SU10 ,This bit indicates and allows modification of whether the state associated with the floating point unit is permitted to become UNKNOWN" "Not permitted,Permitted"
bitfld.long 0x00 15. " SUS7 ,State unknown Secure only" "Both states,Secure only"
textline " "
bitfld.long 0x00 14. " SU7 ,This bit indicates and allows modification of whether the state associated with the coprocessor 7 is permitted to become UNKNOWN" "Not permitted,Permitted"
bitfld.long 0x00 13. " SUS6 ,State unknown Secure only" "Both states,Secure only"
bitfld.long 0x00 12. " SU6 ,This bit indicates and allows modification of whether the state associated with the coprocessor 6 is permitted to become UNKNOWN" "Not permitted,Permitted"
textline " "
bitfld.long 0x00 11. " SUS5 ,State unknown Secure only" "Both states,Secure only"
bitfld.long 0x00 10. " SU5 ,This bit indicates and allows modification of whether the state associated with the coprocessor 5 is permitted to become UNKNOWN" "Not permitted,Permitted"
bitfld.long 0x00 9. " SUS4 ,State unknown Secure only" "Both states,Secure only"
textline " "
bitfld.long 0x00 8. " SU4 ,This bit indicates and allows modification of whether the state associated with the coprocessor 4 is permitted to become UNKNOWN" "Not permitted,Permitted"
bitfld.long 0x00 7. " SUS3 ,State unknown Secure only" "Both states,Secure only"
bitfld.long 0x00 6. " SU3 ,This bit indicates and allows modification of whether the state associated with the coprocessor 3 is permitted to become UNKNOWN" "Not permitted,Permitted"
textline " "
bitfld.long 0x00 5. " SUS2 ,State unknown Secure only" "Both states,Secure only"
bitfld.long 0x00 4. " SU2 ,This bit indicates and allows modification of whether the state associated with the coprocessor 2 is permitted to become UNKNOWN" "Not permitted,Permitted"
bitfld.long 0x00 3. " SUS1 ,State unknown Secure only" "Both states,Secure only"
textline " "
bitfld.long 0x00 2. " SU1 ,This bit indicates and allows modification of whether the state associated with the coprocessor 1 is permitted to become UNKNOWN" "Not permitted,Permitted"
bitfld.long 0x00 1. " SUS0 ,State unknown Secure only" "Both states,Secure only"
bitfld.long 0x00 0. " SU0 ,This bit indicates and allows modification of whether the state associated with the coprocessor 0 is permitted to become UNKNOWN" "Not permitted,Permitted"
line.long 0x04 "SYST_CSR,SysTick Control and Status Register"
rbitfld.long 0x04 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted"
bitfld.long 0x04 2. " CLKSOURCE ,SysTick clock source" "External,Core"
bitfld.long 0x04 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick"
textline " "
bitfld.long 0x04 0. " ENABLE ,Counter Enable" "Disabled,Enabled"
line.long 0x08 "SYST_RVR,SysTick Reload Value Register"
hexmask.long.tbyte 0x08 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0"
line.long 0x0C "SYST_CVR,SysTick Current Value Register"
hexmask.long.tbyte 0x0C 0.--23. 1. " CURRENT ,Current counter value"
rgroup.long 0x1C++0x03
line.long 0x00 "SYST_CALIB,SysTick Calibration value Register"
bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented"
bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing"
rgroup.long 0xD00++0x03
line.long 0x00 "CPUID,CPUID Base Register"
abitfld.long 0x00 24.--31. " IMPLEMENTER ,Implementer code that Arm has assigned" "0x41=Arm Limited"
bitfld.long 0x00 20.--23. " VARIANT ,Variant number to distinguish between different product variants or major revisions of the product" "r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,r13,r14,r15"
bitfld.long 0x00 16.--19. " ARCHITECTURE ,Indicates the architecture version" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv8-M w/ Main Extension"
newline
abitfld.long 0x00 4.--15. " PARTNO ,Indicates part number" "0xD21=Cortex-M33"
bitfld.long 0x00 0.--3. " REVISION ,Revision number to distinguish between different patches of the product" "p0,p1,p2,p3,p4,p5,p6,p7,p8,p9,p10,p11,p12,p13,p14,p15"
group.long 0xD04++0x23
line.long 0x00 "ICSR,Interrupt Control and State Register"
setclrfld.long 0x00 31. 0x00 31. 0x00 30. " PENDNMISET , On writes allows the NMI exception to be set as pending. On reads indicates whether the NMI exception is pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x00 27. " PENDSVSET , On writes allows the PendSV exception for the selected Security state to be set as pending. On reads indicates whether the PendSV for the selected Security state exception is pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x00 25. " PENDSTSET ,On writes, sets the SysTick exception as pending. On reads, indicates the current state of the exception" "Not pending,Pending"
textline " "
bitfld.long 0x00 24. " STTNS ,Controls whether in a single SysTick implementation the SysTick is Secure or Non-secure" "Secure,Non-secure"
rbitfld.long 0x00 23. " ISRPREEMPT ,Indicates whether a pending exception will be serviced on exit from debug halt state" "Disabled,Enabled"
rbitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt, generated by the NVIC, is pending" "Not pending,Pending"
textline " "
hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,The exception number of the highest priority pending and enabled interrupt"
rbitfld.long 0x00 11. " RETTOBASE ,Indicates whether there is an active exception other than the exception indicated by the current value of the IPSR" "Present,Absent"
hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception"
line.long 0x04 "VTOR,Vector Table Offset Register"
hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Bits[31:7] of the vector table address"
line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register"
hexmask.long.word 0x08 16.--31. 1. " VECTKEYSTAT ,Vector Key"
rbitfld.long 0x08 15. " ENDIANNESS ,Indicates the memory system endianness" "Little endian,Big endian"
bitfld.long 0x08 14. " PRIS ,Prioritize Secure exceptions" "Disabled,Enabled"
textline " "
bitfld.long 0x08 13. " BFHFNMINS ,BusFault BusFault HardFault and NMI Non-secure enable" "Disabled,Enabled"
bitfld.long 0x08 8.--10. " PRIGROUP ,Priority grouping. Group priority field bits/Subpriority field bits" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
bitfld.long 0x08 3. " SYSRESETREQS ,System reset request Secure only" "Both states,Secure only"
textline " "
bitfld.long 0x08 2. " SYSRESETREQ ,System reset request" "Not requested,Requested"
bitfld.long 0x08 1. " VECTCLRACTIVE ,Writing 1 to this bit clears all active state information for fixed and configurable exceptions" "No effect,Clear"
line.long 0x0C "SCR,System Control Register"
bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
bitfld.long 0x0C 3. " SLEEPDEEPS ,Controls whether the SLEEPDEEP bit is only accessible from the secure state" "Both states,Secure only"
bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
textline " "
bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
line.long 0x10 "CCR,Configuration and Control Register"
bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled"
bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled"
bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled"
textline " "
bitfld.long 0x10 10. " STKOFHFNMIGN ,Controls the effect of a stack limit violation while executing at a requested priority less than 0" "Not ignored,Ignored"
bitfld.long 0x10 8. " BFHFNMIGN ,Determines the effect of precise busfaults on handlers running at a requested priority less than 0" "Not ignored,Ignored"
bitfld.long 0x10 4. " DIV_0_TRP ,Controls the trap on divide by 0" "Disabled,Enabled"
textline " "
bitfld.long 0x10 3. " UNALIGN_TRP ,Controls the trapping of unaligned word or halfword accesses" "Disabled,Enabled"
bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Disabled,Enabled"
line.long 0x14 "SHPR1,System Handler Priority Register 1"
hexmask.long.byte 0x14 24.--31. 1. " PRI_7 ,Priority of system handler 7, SecureFault"
hexmask.long.byte 0x14 16.--23. 1. " PRI_6 ,Priority of system handler 6, UsageFault"
hexmask.long.byte 0x14 8.--15. 1. " PRI_5 ,Priority of system handler 5, BusFault"
textline " "
hexmask.long.byte 0x14 0.--7. 1. " PRI_4 ,Priority of system handler 4, MemManage"
line.long 0x18 "SHPR2,System Handler Priority Register 2"
hexmask.long.byte 0x18 24.--31. 1. " PRI_11 ,Priority of system handler 11, SVCall"
line.long 0x1C "SHPR3,System Handler Priority Register 3"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_15 ,Priority of system handler 15, SysTick"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_14 ,Priority of system handler 14, PendSV"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_12 ,Priority of system handler 12, DebugMonitor"
line.long 0x20 "SHCSR,System Handler Control and State Register"
bitfld.long 0x20 21. " HARDFAULTPENDED ,HardFault exception status" "Not pending,Pending"
bitfld.long 0x20 20. " SECUREFAULTPENDED ,SecureFault exception status" "Not pending,Pending"
bitfld.long 0x20 19. " SECUREFAULTENA ,SecureFault exception enable" "Disabled,Enabled"
textline " "
bitfld.long 0x20 18. " USGFAULTENA ,UsageFault exception enable" "Disabled,Enabled"
bitfld.long 0x20 17. " BUSFAULTENA ,BusFault exception enable" "Disabled,Enabled"
bitfld.long 0x20 16. " MEMFAULTENA ,MemManage exception enable" "Disabled,Enabled"
textline " "
bitfld.long 0x20 15. " SVCALLPENDED ,SVCall exception status" "Not pending,Pending"
bitfld.long 0x20 14. " BUSFAULTPENDED ,BusFault exception status" "Not pending,Pending"
bitfld.long 0x20 13. " MEMFAULTPENDED ,MemManage exception status" "Not pending,Pending"
textline " "
bitfld.long 0x20 12. " USGFAULTPENDED ,UsageFault exception status" "Not pending,Pending"
bitfld.long 0x20 11. " SYSTICKACT ,SysTick exception status" "Not active,Active"
bitfld.long 0x20 10. " PENDSVACT ,PendSV exception status" "Not active,Active"
textline " "
bitfld.long 0x20 8. " MONITORACT ,Monitor exception status" "Not active,Active"
bitfld.long 0x20 7. " SVCALLACT ,SVCall exception status" "Not active,Active"
bitfld.long 0x20 5. " NMIACT ,NMI exception status" "Not active,Active"
textline " "
bitfld.long 0x20 4. " SECUREFAULTACT ,SecureFault exception status" "Not active,Active"
bitfld.long 0x20 3. " USGFAULTACT ,UsageFault exception status" "Not active,Active"
bitfld.long 0x20 2. " HARDFAULTACT ,HardFault exception status for the selected Security state" "Not active,Active"
textline " "
bitfld.long 0x20 1. " BUSFAULTACT ,BusFault exception status" "Not active,Active"
bitfld.long 0x20 0. " MEMFAULTACT ,MemManage exception status" "Not active,Active"
group.byte 0xD28++0x1
line.byte 0x00 "MMFSR,MemManage Status Register"
bitfld.byte 0x00 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid"
bitfld.byte 0x00 5. " MLSPERR ,A MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred"
bitfld.byte 0x00 4. " MSTKERR ,Stacking Access Violations" "Not occurred,Occurred"
textline " "
bitfld.byte 0x00 3. " MUNSTKERR ,Unstacking Access Violations" "Not occurred,Occurred"
bitfld.byte 0x00 1. " DACCVIOL ,Data Access Violation" "Not occurred,Occurred"
bitfld.byte 0x00 0. " IACCVIOL ,Instruction Access Violation" "Not occurred,Occurred"
line.byte 0x01 "BFSR,Bus Fault Status Register"
bitfld.byte 0x01 7. " BFARVALID ,Address Valid Flag" "Not valid,Valid"
bitfld.byte 0x01 5. " LSPERR ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred"
bitfld.byte 0x01 4. " STKERR ,Derived bus fault (exception entry)" "Not occurred,Occurred"
textline " "
bitfld.byte 0x01 3. " UNSTKERR ,Derived bus fault (exception return)" "Not occurred,Occurred"
bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise data access error" "Not occurred,Occurred"
bitfld.byte 0x01 1. " PRECISERR ,Precise data access error" "Not occurred,Occurred"
textline " "
bitfld.byte 0x01 0. " IBUSERR ,Bus fault on an instruction prefetch" "Not occurred,Occurred"
group.word 0xD2A++0x1
line.word 0x00 "UFSR,Usage Fault Status Register"
eventfld.word 0x00 9. " DIVBYZERO ,Divide by zero error" "No error,Error"
eventfld.word 0x00 8. " UNALIGNED ,Unaligned access error" "No error,Error"
eventfld.word 0x00 4. " STKOF ,Stack overflow error" "No error,Error"
textline " "
eventfld.word 0x00 3. " NOCP ,A coprocessor access error" "No error,Error"
eventfld.word 0x00 2. " INVPC ,An integrity check error" "No error,Error"
eventfld.word 0x00 1. " INVSTATE , Invalid Combination of EPSR and Instruction" "No error,Error"
textline " "
eventfld.word 0x00 0. " UNDEFINSTR ,Undefined instruction error" "No error,Error"
group.long 0xD2C++0x03
line.long 0x00 "HFSR,HardFault Status Register"
bitfld.long 0x00 31. " DEBUGEVT ,Indicates when a Debug event has occurred" "Not occurred,Occurred"
bitfld.long 0x00 30. " FORCED ,Indicates that a fault with configurable priority has been escalated to a HardFault exception" "Not occurred,Occurred"
bitfld.long 0x00 1. " VECTTBL ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred"
group.long 0xD34++0x0B
line.long 0x00 "MMFAR,MemManage Fault Address Register"
line.long 0x04 "BFAR,BusFault Address Register"
line.long 0x08 "AFSR,Auxiliary Fault Status Register"
group.long 0xD88++0x03
line.long 0x00 "CPACR,Coprocessor Access Control Register"
bitfld.long 0x00 20.--21. " CP10 ,Access privileges for coprocessor 10" "Denied,Privileged,,Full"
bitfld.long 0x00 14.--15. " CP7 ,Access privileges for coprocessor 7" "Denied,Privileged,,Full"
textline " "
bitfld.long 0x00 12.--13. " CP6 ,Access privileges for coprocessor 6" "Denied,Privileged,,Full"
bitfld.long 0x00 10.--11. " CP5 ,Access privileges for coprocessor 5" "Denied,Privileged,,Full"
bitfld.long 0x00 8.--9. " CP4 ,Access privileges for coprocessor 4" "Denied,Privileged,,Full"
textline " "
bitfld.long 0x00 6.--7. " CP3 ,Access privileges for coprocessor 3" "Denied,Privileged,,Full"
bitfld.long 0x00 4.--5. " CP2 ,Access privileges for coprocessor 2" "Denied,Privileged,,Full"
bitfld.long 0x00 2.--3. " CP1 ,Access privileges for coprocessor 1" "Denied,Privileged,,Full"
textline " "
bitfld.long 0x00 0.--1. " CP0 ,Access privileges for coprocessor 0" "Denied,Privileged,,Full"
if PER.ADDRESS.isSECUREEX(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD48)
group.long 0xD8C++0x03
line.long 0x00 "NSACR,Non-Secure Access Control Register"
bitfld.long 0x00 11. " CP11 ,Enables Non-secure access to coprocessor CP11" "Disabled,Enabled"
bitfld.long 0x00 10. " CP10 ,Enables Non-secure access to coprocessor CP10" "Disabled,Enabled"
bitfld.long 0x00 7. " CP7 ,Enables Non-secure access to coprocessor CP7" "Disabled,Enabled"
textline " "
bitfld.long 0x00 6. " CP6 ,Enables Non-secure access to coprocessor CP6" "Disabled,Enabled"
bitfld.long 0x00 5. " CP5 ,Enables Non-secure access to coprocessor CP5" "Disabled,Enabled"
bitfld.long 0x00 4. " CP4 ,Enables Non-secure access to coprocessor CP4" "Disabled,Enabled"
textline " "
bitfld.long 0x00 3. " CP3 ,Enables Non-secure access to coprocessor CP3" "Disabled,Enabled"
bitfld.long 0x00 2. " CP2 ,Enables Non-secure access to coprocessor CP2" "Disabled,Enabled"
bitfld.long 0x00 1. " CP1 ,Enables Non-secure access to coprocessor CP1" "Disabled,Enabled"
textline " "
bitfld.long 0x00 0. " CP0 ,Enables Non-secure access to coprocessor CP0" "Disabled,Enabled"
else
hgroup.long 0xD8C++0x03
hide.long 0x00 "NSACR,Non-Secure Access Control Register (not accessible)"
endif
wgroup.long 0xF00++0x03
line.long 0x00 "STIR,Software Triggered Interrupt Register"
hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be pended"
tree "Memory System"
width 10.
rgroup.long 0xD78++0x03
line.long 0x00 "CLIDR,Cache Level ID Register"
bitfld.long 0x00 30.--31. " ICB ,Inner cache boundary" "Not disclosed,L1 cache highest,L2 cache highest,L3 cache highest"
bitfld.long 0x00 27.--29. " LOU ,LOUU" "Level 1,Level 2,?..."
bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Level 1,Level 2,?..."
textline " "
bitfld.long 0x00 18.--20. " CL7 ,Cache type field level 7" "No cache,Instr. only,Data only,Data and Instr.,Unified cache,?..."
bitfld.long 0x00 15.--17. " CL6 ,Cache type field level 6" "No cache,?..."
bitfld.long 0x00 12.--14. " CL5 ,Cache type field level 5" "No cache,?..."
textline " "
bitfld.long 0x00 9.--11. " CL4 ,Cache type field level 4" "No cache,?..."
bitfld.long 0x00 6.--8. " CL3 ,Cache type field level 3" "No cache,?..."
bitfld.long 0x00 3.--5. " CL2 ,Cache type field level 2" "No cache,?..."
textline " "
bitfld.long 0x00 0.--2. " CL1 ,Cache type field level 1" "No cache,Instr. only,Data only,Data and Instr.,?..."
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD7C)&0xE0000000)==0x80000000)
rgroup.long 0xD7C++0x03
line.long 0x00 "CTR,Cache Type Register"
bitfld.long 0x00 29.--31. " FORMAT ,Indicates the implemented CTR format" "No Cache,,,,Cache,?..."
bitfld.long 0x00 24.--27. " CWG ,Cache Write-back Granule" "0,1,2,3,4,5,6,7,8,9,?..."
bitfld.long 0x00 20.--23. " ERG ,Exclusives Reservation Granule" "0,1,2,3,4,5,6,7,8,9,?..."
textline " "
bitfld.long 0x00 16.--19. " DMINLINE ,Log 2 of the number of words in the smallest cache line of all the data caches and unified caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. " IMINLINE ,Log 2 of the number of words in the smallest cache line of all the instruction caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
rgroup.long 0xD7C++0x03
line.long 0x00 "CTR,Cache Type Register"
bitfld.long 0x00 29.--31. " FORMAT ,Indicates the implemented CTR format" "No Cache,,,,Cache,?..."
endif
rgroup.long 0xD80++0x03
line.long 0x00 "CCSIDR,Cache Size ID Register"
bitfld.long 0x00 31. " WT ,Indicates support available for Write-Through" "Not supported,Supported"
bitfld.long 0x00 30. " WB ,Indicates support available for Write-Back" "Not supported,Supported"
bitfld.long 0x00 29. " RA ,Indicates support available for read allocation" "Not supported,Supported"
textline " "
bitfld.long 0x00 28. " WA ,Indicates support available for write allocation" "Not supported,Supported"
hexmask.long.word 0x00 13.--27. 1. " NUMSETS ,Indicates the number of sets as (number of sets) - 1"
hexmask.long.word 0x00 3.--12. 1. " ASSOCIATIVITY ,Indicates the number of ways as (number of ways) - 1"
textline " "
bitfld.long 0x00 0.--2. " LINESIZE ,Indicates the number of words in each cache line" "4,8,16,32,64,128,256,512"
group.long 0xD84++0x03
line.long 0x00 "CSSELR,Cache Size Selection Register"
bitfld.long 0x00 1.--3. " LEVEL ,Identifies which cache level to select" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,?..."
bitfld.long 0x00 0. " IND ,Identifies instruction or data cache to use" "Data/Unified,Instruction"
wgroup.long 0xF50++0x03
line.long 0x00 "ICIALLU,I-Cache Invalidate All to PoU"
wgroup.long 0xF58++0x23
line.long 0x00 "ICIMVAU,I-Cache Invalidate by MVA to PoU"
line.long 0x04 "DCIMVAC,D-Cache Invalidate by MVA to PoC"
line.long 0x08 "DCISW,D-Cache Invalidate by Set-Way"
hexmask.long 0x08 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on"
bitfld.long 0x08 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8"
line.long 0x0C "DCCMVAU,D-Cache Clean by MVA to PoU"
line.long 0x10 "DCCMVAC,D-Cache Clean by MVA to PoC"
line.long 0x14 "DCCSW,D-Cache Clean by Set-Way"
hexmask.long 0x14 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on"
bitfld.long 0x14 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8"
line.long 0x18 "DCCIMVAC,D-Cache Clean and Invalidate by MVA to PoC"
line.long 0x1C "DCCISW,D-Cache Clean and Invalidate by Set-Way"
hexmask.long 0x1C 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on"
bitfld.long 0x1C 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8"
line.long 0x20 "BPIALL,Branch Predictor Invalidate All"
tree.end
tree "Feature Registers"
width 10.
rgroup.long 0xD40++0x0B
line.long 0x00 "ID_PFR0,Processor Feature Register 0"
bitfld.long 0x00 4.--7. " STATE1 ,T32 instruction set support" ",,,Supported,?..."
bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..."
line.long 0x04 "ID_PFR1,Processor Feature Register 1"
bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..."
bitfld.long 0x04 4.--7. " SECURITY ,Security support" "Not implemented,Implemented,?..."
line.long 0x08 "ID_DFR0,Debug Feature Register 0"
bitfld.long 0x08 20.--23. " MPROFDBG ,M-profile debug. Indicates the supported M-profile debug architecture" "Not supported,ARMv8-M Debug architecture,?..."
rgroup.long 0xD4C++0x03
line.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
rgroup.long 0xD50++0x03
line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,Supported,?..."
bitfld.long 0x00 16.--19. " TCM ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..."
bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "1 level,2 levels,?..."
textline " "
bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,HW coherency,,,,,,,,,,,,,,Ignored"
bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,,PMSAv8,?..."
rgroup.long 0xD54++0x03
line.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
rgroup.long 0xD58++0x03
line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..."
rgroup.long 0xD5C++0x03
line.long 0x00 "ID_MMFR3,Memory Model Feature Register 3"
bitfld.long 0x00 8.--11. " BPMAINT ,Indicates the supported branch predictor maintenance" "Not supported,Supported,?..."
bitfld.long 0x00 4.--7. " CMAINTSW ,Indicates the supported cache maintenance operations by set/way" "Not supported,Supported,?..."
bitfld.long 0x00 0.--3. " CMAINTVA ,Indicates the supported cache maintenance operations by virtual-address" "Not supported,Supported,?..."
rgroup.long 0xD60++0x03
line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0"
bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..."
bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..."
bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,Supported,?..."
textline " "
bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..."
bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..."
bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..."
rgroup.long 0xD64++0x03
line.long 0x00 "ID_ISAR1,Instruction Set Attributes Register 1"
bitfld.long 0x00 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..."
bitfld.long 0x00 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..."
bitfld.long 0x00 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..."
textline " "
bitfld.long 0x00 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Basic,Extended,?..."
rgroup.long 0xD68++0x03
line.long 0x00 "ID_ISAR2,Instruction Set Attributes Register 2"
bitfld.long 0x00 28.--31. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..."
bitfld.long 0x00 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..."
bitfld.long 0x00 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,SMULL/SMLAL,,SMULL/SMLAL/DSP,?..."
textline " "
bitfld.long 0x00 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MUL,MUL/MLA/MLS,?..."
bitfld.long 0x00 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..."
bitfld.long 0x00 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..."
textline " "
bitfld.long 0x00 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,,Load-acquire/Store-release/Exclusive,?..."
rgroup.long 0xD6C++0x03
line.long 0x00 "ID_ISAR3,Instruction Set Attributes Register 3"
bitfld.long 0x00 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..."
bitfld.long 0x00 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..."
bitfld.long 0x00 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..."
textline " "
bitfld.long 0x00 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,?..."
bitfld.long 0x00 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..."
bitfld.long 0x00 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Extended,?..."
textline " "
bitfld.long 0x00 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB/Q-bit,?..."
rgroup.long 0xD70++0x03
line.long 0x00 "ID_ISAR4,Instruction Set Attributes Register 4"
bitfld.long 0x00 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,CPS/MRS/MSR,?..."
bitfld.long 0x00 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" ",,,Supported,?..."
bitfld.long 0x00 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,,,DMB/DSB/ISB,?..."
textline " "
bitfld.long 0x00 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..."
bitfld.long 0x00 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,,,Load/store,?..."
bitfld.long 0x00 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,?..."
tree.end
tree "CoreSight Identification Registers"
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 11.
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xFBC))&0x100000)==0x100000)
rgroup.long 0xFBC++0x03
line.long 0x00 "DDEVARCH,SCS CoreSight Device Architecture Register"
hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect"
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part"
else
rgroup.long 0xFBC++0x03
line.long 0x00 "DDEVARCH,SCS CoreSight Device Architecture Register"
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
endif
rgroup.long 0xFE0++0x0F
line.long 0x00 "DPIDR0,Peripheral ID0"
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
line.long 0x04 "DPIDR1,Peripheral ID1"
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
line.long 0x08 "DPIDR2,Peripheral ID2"
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
line.long 0x0c "DPIDR3,Peripheral ID3"
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
rgroup.long 0xFD0++0x03
line.long 0x00 "PID4,Peripheral Identification Register 4"
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
rgroup.long 0xFF0++0x0F
line.long 0x00 "DCIDR0,Component ID0 (Preamble)"
hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble"
line.long 0x04 "DCIDR1,Component ID1"
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class"
line.long 0x08 "DCIDR2,Component ID2"
hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble"
line.long 0x0c "DCIDR3,Component ID3"
hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble"
tree.end
width 0xB
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
tree "Memory Protection Unit (MPU)"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 15.
rgroup.long 0xD90++0x03
line.long 0x00 "MPU_TYPE,MPU Type Register"
bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,?..."
group.long 0xD94++0x03
line.long 0x00 "MPU_CTRL,MPU Control Register"
bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
group.long 0xD98++0x03
line.long 0x00 "MPU_RNR,MPU Region Number Register"
hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
tree.close "MPU regions"
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
group.long 0xD9C++0x03 "Region 0"
saveout 0xD98 %l 0x0
line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x0
line.long 0x00 "MPU_RLAR0,MPU Region Attribute and Size Register 0"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
saveout 0xD98 %l 0x0
hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x0
hide.long 0x00 "MPU_RLAR0,MPU Region Attribute and Size Register 0"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
group.long 0xD9C++0x03 "Region 1"
saveout 0xD98 %l 0x1
line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x1
line.long 0x00 "MPU_RLAR1,MPU Region Attribute and Size Register 1"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
saveout 0xD98 %l 0x1
hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x1
hide.long 0x00 "MPU_RLAR1,MPU Region Attribute and Size Register 1"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
group.long 0xD9C++0x03 "Region 2"
saveout 0xD98 %l 0x2
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x2
line.long 0x00 "MPU_RLAR2,MPU Region Attribute and Size Register 2"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
saveout 0xD98 %l 0x2
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x2
hide.long 0x00 "MPU_RLAR2,MPU Region Attribute and Size Register 2"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
group.long 0xD9C++0x03 "Region 3"
saveout 0xD98 %l 0x3
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x3
line.long 0x00 "MPU_RLAR3,MPU Region Attribute and Size Register 3"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
saveout 0xD98 %l 0x3
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x3
hide.long 0x00 "MPU_RLAR3,MPU Region Attribute and Size Register 3"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
group.long 0xD9C++0x03 "Region 4"
saveout 0xD98 %l 0x4
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x4
line.long 0x00 "MPU_RLAR4,MPU Region Attribute and Size Register 4"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
saveout 0xD98 %l 0x4
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x4
hide.long 0x00 "MPU_RLAR4,MPU Region Attribute and Size Register 4"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
group.long 0xD9C++0x03 "Region 5"
saveout 0xD98 %l 0x5
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x5
line.long 0x00 "MPU_RLAR5,MPU Region Attribute and Size Register 5"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
saveout 0xD98 %l 0x5
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x5
hide.long 0x00 "MPU_RLAR5,MPU Region Attribute and Size Register 5"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
group.long 0xD9C++0x03 "Region 6"
saveout 0xD98 %l 0x6
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x6
line.long 0x00 "MPU_RLAR6,MPU Region Attribute and Size Register 6"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
saveout 0xD98 %l 0x6
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x6
hide.long 0x00 "MPU_RLAR6,MPU Region Attribute and Size Register 6"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
group.long 0xD9C++0x03 "Region 7"
saveout 0xD98 %l 0x7
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x7
line.long 0x00 "MPU_RLAR7,MPU Region Attribute and Size Register 7"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
saveout 0xD98 %l 0x7
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x7
hide.long 0x00 "MPU_RLAR7,MPU Region Attribute and Size Register 7"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8
group.long 0xD9C++0x03 "Region 8"
saveout 0xD98 %l 0x8
line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x8
line.long 0x00 "MPU_RLAR8,MPU Region Attribute and Size Register 8"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 8 (not implemented)"
saveout 0xD98 %l 0x8
hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x8
hide.long 0x00 "MPU_RLAR8,MPU Region Attribute and Size Register 8"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9
group.long 0xD9C++0x03 "Region 9"
saveout 0xD98 %l 0x9
line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x9
line.long 0x00 "MPU_RLAR9,MPU Region Attribute and Size Register 9"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 9 (not implemented)"
saveout 0xD98 %l 0x9
hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x9
hide.long 0x00 "MPU_RLAR9,MPU Region Attribute and Size Register 9"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA
group.long 0xD9C++0x03 "Region 10"
saveout 0xD98 %l 0xA
line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xA
line.long 0x00 "MPU_RLAR10,MPU Region Attribute and Size Register 10"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 10 (not implemented)"
saveout 0xD98 %l 0xA
hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xA
hide.long 0x00 "MPU_RLAR10,MPU Region Attribute and Size Register 10"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB
group.long 0xD9C++0x03 "Region 11"
saveout 0xD98 %l 0xB
line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xB
line.long 0x00 "MPU_RLAR11,MPU Region Attribute and Size Register 11"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 11 (not implemented)"
saveout 0xD98 %l 0xB
hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xB
hide.long 0x00 "MPU_RLAR11,MPU Region Attribute and Size Register 11"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC
group.long 0xD9C++0x03 "Region 12"
saveout 0xD98 %l 0xC
line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xC
line.long 0x00 "MPU_RLAR12,MPU Region Attribute and Size Register 12"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 12 (not implemented)"
saveout 0xD98 %l 0xC
hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xC
hide.long 0x00 "MPU_RLAR12,MPU Region Attribute and Size Register 12"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD
group.long 0xD9C++0x03 "Region 13"
saveout 0xD98 %l 0xD
line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xD
line.long 0x00 "MPU_RLAR13,MPU Region Attribute and Size Register 13"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 13 (not implemented)"
saveout 0xD98 %l 0xD
hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xD
hide.long 0x00 "MPU_RLAR13,MPU Region Attribute and Size Register 13"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE
group.long 0xD9C++0x03 "Region 14"
saveout 0xD98 %l 0xE
line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xE
line.long 0x00 "MPU_RLAR14,MPU Region Attribute and Size Register 14"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 14 (not implemented)"
saveout 0xD98 %l 0xE
hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xE
hide.long 0x00 "MPU_RLAR14,MPU Region Attribute and Size Register 14"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF
group.long 0xD9C++0x03 "Region 15"
saveout 0xD98 %l 0xF
line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xF
line.long 0x00 "MPU_RLAR15,MPU Region Attribute and Size Register 15"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 15 (not implemented)"
saveout 0xD98 %l 0xF
hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xF
hide.long 0x00 "MPU_RLAR15,MPU Region Attribute and Size Register 15"
endif
tree.end
newline
group.long 0xDC0++0x07
line.long 0x00 "MPU_MAIR0,MPU Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. " ATTR3H ,Attribute 3 High. Outer memory attributes for MPU regions with an AttrIndex of 3" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x00 24.--27. " ATTR3L ,Attribute 3 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 3 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
newline
bitfld.long 0x00 20.--23. " ATTR2H ,Attribute 2 High. Outer memory attributes for MPU regions with an AttrIndex of 2" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x00 16.--19. " ATTR2L ,Attribute 2 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 2 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
newline
bitfld.long 0x00 12.--15. " ATTR1H ,Attribute 1 High. Outer memory attributes for MPU regions with an AttrIndex of 1" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x00 8.--11. " ATTR1L ,Attribute 1 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 1 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
newline
bitfld.long 0x00 4.--7. " ATTR0H ,Attribute 0 High. Outer memory attributes for MPU regions with an AttrIndex of 0" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x00 0.--3. " ATTR0L ,Attribute 0 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 0 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
line.long 0x04 "MPU_MAIR1,MPU Memory Attribute Indirection Register 1"
bitfld.long 0x04 28.--31. " ATTR7H ,Attribute 7 High. Outer memory attributes for MPU regions with an AttrIndex of 7" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x04 24.--27. " ATTR7L ,Attribute 7 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 7 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
newline
bitfld.long 0x04 20.--23. " ATTR6H ,Attribute 6 High. Outer memory attributes for MPU regions with an AttrIndex of 6" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x04 16.--19. " ATTR6L ,Attribute 6 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 6 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
newline
bitfld.long 0x04 12.--15. " ATTR5H ,Attribute 5 High. Outer memory attributes for MPU regions with an AttrIndex of 5" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x04 8.--11. " ATTR5L ,Attribute 5 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 5 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
newline
bitfld.long 0x04 4.--7. " ATTR4H ,Attribute 4 High. Outer memory attributes for MPU regions with an AttrIndex of 4" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x04 0.--3. " ATTR4L ,Attribute 4 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 4 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
width 0x0B
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
tree "Security Attribution Unit (SAU)"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 15.
group.long 0xDD0++0x03
line.long 0x00 "SAU_CTRL,SAU Control Register"
bitfld.long 0x00 1. " ALLNS ,When SAU_CTRL.ENABLE is 0 this bit controls if the memory is marked as Non-secure or Secure" "Secure,Non-Secure"
bitfld.long 0x00 0. " ENABLE ,Enables the SAU" "Disabled,Enabled"
rgroup.long 0xDD4++0x03
line.long 0x00 "SAU_TYPE,SAU Type Register"
bitfld.long 0x00 0.--7. " SREGION ,The number of implemented SAU regions" "0,1,2,3,4,5,6,7,8,?..."
group.long 0xDD8++0x03
line.long 0x00 "SAU_RNR,SAU Region Number Register"
hexmask.long.byte 0x00 0.--7. 1. " SAU_RNR ,Indicates the SAU region accessed by SAU_RBAR and SAU_RLAR"
tree.close "SAU regions"
if PER.ADDRESS.isSECUREEX(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD0)
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x0
group.long 0xDDC++0x03 "Region 0"
saveout 0xDD8 %l 0x0
line.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x0
line.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 0 (not implemented)"
saveout 0xDD8 %l 0x0
hide.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x0
hide.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x1
group.long 0xDDC++0x03 "Region 1"
saveout 0xDD8 %l 0x1
line.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x1
line.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 1 (not implemented)"
saveout 0xDD8 %l 0x1
hide.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x1
hide.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x2
group.long 0xDDC++0x03 "Region 2"
saveout 0xDD8 %l 0x2
line.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x2
line.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 2 (not implemented)"
saveout 0xDD8 %l 0x2
hide.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x2
hide.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x3
group.long 0xDDC++0x03 "Region 3"
saveout 0xDD8 %l 0x3
line.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x3
line.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 3 (not implemented)"
saveout 0xDD8 %l 0x3
hide.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x3
hide.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x4
group.long 0xDDC++0x03 "Region 4"
saveout 0xDD8 %l 0x4
line.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x4
line.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 4 (not implemented)"
saveout 0xDD8 %l 0x4
hide.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x4
hide.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x5
group.long 0xDDC++0x03 "Region 5"
saveout 0xDD8 %l 0x5
line.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x5
line.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 5 (not implemented)"
saveout 0xDD8 %l 0x5
hide.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x5
hide.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x6
group.long 0xDDC++0x03 "Region 6"
saveout 0xDD8 %l 0x6
line.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x6
line.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 6 (not implemented)"
saveout 0xDD8 %l 0x6
hide.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x6
hide.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x7
group.long 0xDDC++0x03 "Region 7"
saveout 0xDD8 %l 0x7
line.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x7
line.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 7 (not implemented)"
saveout 0xDD8 %l 0x7
hide.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x7
hide.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7"
endif
else
hgroup.long 0xDDC++0x03 "Region 0 (not accessible)"
saveout 0xDD8 %l 0x0
hide.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x0
hide.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0"
hgroup.long 0xDDC++0x03 "Region 1 (not accessible)"
saveout 0xDD8 %l 0x1
hide.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x1
hide.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1"
hgroup.long 0xDDC++0x03 "Region 2 (not accessible)"
saveout 0xDD8 %l 0x2
hide.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x2
hide.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2"
hgroup.long 0xDDC++0x03 "Region 3 (not accessible)"
saveout 0xDD8 %l 0x3
hide.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x3
hide.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3"
hgroup.long 0xDDC++0x03 "Region 4 (not accessible)"
saveout 0xDD8 %l 0x4
hide.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x4
hide.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4"
hgroup.long 0xDDC++0x03 "Region 5 (not accessible)"
saveout 0xDD8 %l 0x5
hide.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x5
hide.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5"
hgroup.long 0xDDC++0x03 "Region 6 (not accessible)"
saveout 0xDD8 %l 0x6
hide.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x6
hide.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6"
hgroup.long 0xDDC++0x03 "Region 7 (not accessible)"
saveout 0xDD8 %l 0x7
hide.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x7
hide.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7"
endif
tree.end
group.long 0xDE4++0x03
line.long 0x00 "SFSR,Secure Fault Status Register"
bitfld.long 0x00 7. " LSERR ,Lazy state error flag" "Not occurred,Occurred"
bitfld.long 0x00 6. " SFARVALID ,Secure fault address valid" "Not valid,Valid"
bitfld.long 0x00 5. " LSPERR ,Lazy state preservation error flag" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 4. " INVTRAN ,Invalid transition flag" "Not occurred,Occurred"
bitfld.long 0x00 3. " AUVIOL ,Attribution unit violation flag" "Not occurred,Occurred"
bitfld.long 0x00 2. " INVER ,Invalid exception return flag" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 1. " INVIS ,Invalid integrity signature flag" "Not occurred,Occurred"
bitfld.long 0x00 0. " INVEP ,Invalid entry point" "Not occurred,Occurred"
group.long 0xDE8++0x03
line.long 0x00 "SFAR,Secure Fault Address Register"
width 0x0B
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
tree "Nested Vectored Interrupt Controller (NVIC)"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 6.
group.long 0x04++0x03
line.long 0x00 "ICTR,Interrupt Controller Type Register"
bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,0-64,0-96,0-128,0-160,0-192,0-224,0-255,0-287,0-319,0-351,0-383,0-415,0-447,0-479,0-511"
width 24.
tree "Interrupt Enable Registers"
group.long 0x100++0x03
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
group.long 0x104++0x03
line.long 0x00 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x104++0x03
hide.long 0x00 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
group.long 0x108++0x03
line.long 0x00 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x108++0x03
hide.long 0x00 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
group.long 0x10C++0x03
line.long 0x00 "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x10C++0x03
hide.long 0x00 "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
group.long 0x110++0x03
line.long 0x00 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x110++0x03
hide.long 0x00 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
group.long 0x114++0x03
line.long 0x00 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x114++0x03
hide.long 0x00 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
group.long 0x118++0x03
line.long 0x00 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x118++0x03
hide.long 0x00 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
group.long 0x11C++0x03
line.long 0x00 "IRQ224_255_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA255 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA254 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA253 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA252 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA251 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA250 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA249 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA248 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA247 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA246 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA245 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA244 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA243 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA242 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA241 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA240 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x11C++0x03
hide.long 0x00 "IRQ224_255_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
group.long 0x120++0x03
line.long 0x00 "IRQ256_287_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA287 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA286 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA285 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA284 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA283 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA282 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA281 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA280 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA279 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA278 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA277 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA276 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA275 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA274 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA273 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA272 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA271 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA270 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA269 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA268 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA267 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA266 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA265 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA264 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA263 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA262 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA261 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA260 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA259 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA258 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA257 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA256 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x120++0x03
hide.long 0x00 "IRQ256_287_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
group.long 0x124++0x03
line.long 0x00 "IRQ288_319_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA319 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA318 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA317 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA316 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA315 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA314 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA313 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA312 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA311 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA310 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA309 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA308 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA307 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA306 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA305 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA304 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA303 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA302 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA301 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA300 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA299 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA298 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA297 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA296 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA295 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA294 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA293 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA292 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA291 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA290 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA289 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA288 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x124++0x03
hide.long 0x00 "IRQ288_319_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
group.long 0x128++0x03
line.long 0x00 "IRQ320_351_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA351 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA350 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA349 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA348 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA347 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA346 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA345 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA344 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA343 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA342 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA341 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA340 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA339 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA338 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA337 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA336 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA335 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA334 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA333 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA332 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA331 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA330 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA329 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA328 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA327 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA326 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA325 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA324 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA323 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA322 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA321 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA320 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x128++0x03
hide.long 0x00 "IRQ320_351_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
group.long 0x12C++0x03
line.long 0x00 "IRQ352_383_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA383 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA382 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA381 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA380 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA379 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA378 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA377 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA376 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA375 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA374 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA373 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA372 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA371 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA370 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA369 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA368 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA367 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA366 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA365 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA364 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA363 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA362 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA361 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA360 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA359 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA358 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA357 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA356 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA355 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA354 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA353 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA352 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x12C++0x03
hide.long 0x00 "IRQ352_383_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
group.long 0x130++0x03
line.long 0x00 "IRQ384_415_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA415 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA414 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA413 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA412 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA411 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA410 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA409 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA408 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA407 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA406 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA405 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA404 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA403 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA402 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA401 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA400 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA399 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA398 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA397 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA396 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA395 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA394 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA393 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA392 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA391 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA390 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA389 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA388 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA387 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA386 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA385 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA384 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x130++0x03
hide.long 0x00 "IRQ384_415_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
group.long 0x134++0x03
line.long 0x00 "IRQ416_447_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA447 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA446 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA445 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA444 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA443 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA442 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA441 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA440 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA439 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA438 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA437 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA436 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA435 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA434 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA433 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA432 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA431 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA430 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA429 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA428 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA427 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA426 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA425 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA424 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA423 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA422 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA421 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA420 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA419 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA418 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA417 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA416 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x134++0x03
hide.long 0x00 "IRQ416_447_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
group.long 0x138++0x03
line.long 0x00 "IRQ448_479_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA479 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA478 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA477 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA476 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA475 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA474 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA473 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA472 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA471 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA470 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA469 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA468 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA467 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA466 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA465 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA464 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA463 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA462 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA461 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA460 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA459 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA458 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA457 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA456 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA455 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA454 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA453 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA452 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA451 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA450 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA449 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA448 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x138++0x03
hide.long 0x00 "IRQ448_479_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0F)
group.long 0x13C++0x03
line.long 0x00 "IRQ480_511_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA511 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA510 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA509 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA508 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA507 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA506 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA505 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA504 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA503 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA502 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA501 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA500 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA499 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA498 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA497 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA496 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA495 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA494 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA493 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA492 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA491 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA490 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA489 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA488 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA487 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA486 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA485 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA484 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA483 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA482 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA481 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA480 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x13C++0x03
hide.long 0x00 "IRQ480_511_EN_SET/CLR,Interrupt Enable Register"
endif
tree.end
width 24.
tree "Interrupt Pending Registers"
group.long 0x200++0x03
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
group.long 0x204++0x03
line.long 0x00 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x204++0x03
hide.long 0x00 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
group.long 0x208++0x03
line.long 0x00 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x208++0x03
hide.long 0x00 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
group.long 0x20C++0x03
line.long 0x00 "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x20C++0x03
hide.long 0x00 "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
group.long 0x210++0x03
line.long 0x00 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x210++0x03
hide.long 0x00 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
group.long 0x214++0x03
line.long 0x00 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x214++0x03
hide.long 0x00 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
group.long 0x218++0x03
line.long 0x00 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x218++0x03
hide.long 0x00 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
group.long 0x21C++0x03
line.long 0x00 "IRQ224_255_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN255 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN254 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN253 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN252 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN251 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN250 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN249 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN248 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN247 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN246 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN245 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN244 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN243 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN242 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN241 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN240 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x21C++0x03
hide.long 0x00 "IRQ224_255_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
group.long 0x220++0x03
line.long 0x00 "IRQ256_287_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN287 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN286 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN285 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN284 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN283 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN282 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN281 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN280 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN279 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN278 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN277 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN276 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN275 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN274 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN273 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN272 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN271 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN270 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN269 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN268 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN267 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN266 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN265 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN264 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN263 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN262 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN261 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN260 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN259 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN258 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN257 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN256 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x220++0x03
hide.long 0x00 "IRQ256_287_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
group.long 0x224++0x03
line.long 0x00 "IRQ288_319_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN319 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN318 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN317 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN316 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN315 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN314 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN313 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN312 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN311 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN310 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN309 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN308 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN307 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN306 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN305 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN304 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN303 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN302 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN301 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN300 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN299 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN298 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN297 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN296 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN295 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN294 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN293 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN292 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN291 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN290 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN289 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN288 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x224++0x03
hide.long 0x00 "IRQ288_319_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
group.long 0x228++0x03
line.long 0x00 "IRQ320_351_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN351 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN350 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN349 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN348 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN347 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN346 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN345 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN344 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN343 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN342 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN341 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN340 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN339 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN338 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN337 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN336 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN335 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN334 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN333 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN332 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN331 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN330 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN329 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN328 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN327 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN326 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN325 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN324 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN323 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN322 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN321 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN320 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x228++0x03
hide.long 0x00 "IRQ320_351_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
group.long 0x22C++0x03
line.long 0x00 "IRQ352_383_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN383 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN382 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN381 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN380 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN379 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN378 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN377 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN376 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN375 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN374 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN373 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN372 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN371 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN370 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN369 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN368 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN367 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN366 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN365 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN364 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN363 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN362 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN361 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN360 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN359 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN358 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN357 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN356 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN355 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN354 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN353 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN352 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x22C++0x03
hide.long 0x00 "IRQ352_383_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
group.long 0x230++0x03
line.long 0x00 "IRQ384_415_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN415 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN414 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN413 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN412 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN411 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN410 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN409 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN408 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN407 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN406 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN405 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN404 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN403 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN402 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN401 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN400 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN399 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN398 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN397 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN396 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN395 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN394 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN393 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN392 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN391 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN390 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN389 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN388 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN387 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN386 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN385 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN384 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x230++0x03
hide.long 0x00 "IRQ384_415_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
group.long 0x234++0x03
line.long 0x00 "IRQ416_447_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN447 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN446 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN445 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN444 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN443 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN442 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN441 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN440 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN439 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN438 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN437 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN436 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN435 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN434 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN433 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN432 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN431 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN430 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN429 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN428 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN427 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN426 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN425 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN424 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN423 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN422 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN421 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN420 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN419 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN418 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN417 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN416 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x234++0x03
hide.long 0x00 "IRQ416_447_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
group.long 0x238++0x03
line.long 0x00 "IRQ448_479_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN479 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN478 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN477 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN476 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN475 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN474 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN473 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN472 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN471 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN470 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN469 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN468 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN467 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN466 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN465 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN464 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN463 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN462 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN461 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN460 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN459 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN458 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN457 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN456 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN455 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN454 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN453 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN452 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN451 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN450 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN449 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN448 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x238++0x03
hide.long 0x00 "IRQ448_479_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0F)
group.long 0x23C++0x03
line.long 0x00 "IRQ480_511_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN511 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN510 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN509 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN508 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN507 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN506 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN505 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN504 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN503 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN502 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN501 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN500 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN499 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN498 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN497 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN496 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN495 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN494 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN493 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN492 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN491 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN490 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN489 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN488 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN487 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN486 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN485 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN484 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN483 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN482 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN481 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN480 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x23C++0x03
hide.long 0x00 "IRQ480_511_PEN_SET/CLR,Interrupt Pending Register"
endif
tree.end
width 11.
tree "Interrupt Active Bit Registers"
rgroup.long 0x300++0x03
line.long 0x00 "ACTIVE0,Active Bit Register 0"
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
rgroup.long 0x304++0x03
line.long 0x00 "ACTIVE1,Active Bit Register 1"
bitfld.long 0x00 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x304++0x03
hide.long 0x00 "ACTIVE1,Active Bit Register 1"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
rgroup.long 0x308++0x03
line.long 0x00 "ACTIVE2,Active Bit Register 2"
bitfld.long 0x00 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x308++0x03
hide.long 0x00 "ACTIVE2,Active Bit Register 2"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
rgroup.long 0x30C++0x03
line.long 0x00 "ACTIVE3,Active Bit Register 3"
bitfld.long 0x00 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x30C++0x03
hide.long 0x00 "ACTIVE3,Active Bit Register 3"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
rgroup.long 0x310++0x03
line.long 0x00 "ACTIVE4,Active Bit Register 4"
bitfld.long 0x00 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x310++0x03
hide.long 0x00 "ACTIVE4,Active Bit Register 4"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
rgroup.long 0x314++0x03
line.long 0x00 "ACTIVE5,Active Bit Register 5"
bitfld.long 0x00 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x314++0x03
hide.long 0x00 "ACTIVE5,Active Bit Register 5"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
rgroup.long 0x318++0x03
line.long 0x00 "ACTIVE6,Active Bit Register 6"
bitfld.long 0x00 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x318++0x03
hide.long 0x00 "ACTIVE6,Active Bit Register 6"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
rgroup.long 0x31C++0x03
line.long 0x00 "ACTIVE7,Active Bit Register 7"
bitfld.long 0x00 31. " ACTIVE255 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE254 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE253 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE252 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE251 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE250 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE249 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE248 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE247 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE246 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE245 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE244 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE243 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE242 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE241 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE240 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x31C++0x03
hide.long 0x00 "ACTIVE7,Active Bit Register 7"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
rgroup.long 0x320++0x03
line.long 0x00 "ACTIVE8,Active Bit Register 8"
bitfld.long 0x00 31. " ACTIVE287 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE286 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE285 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE284 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE283 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE282 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE281 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE280 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE279 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE278 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE277 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE276 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE275 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE274 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE273 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE272 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE271 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE270 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE269 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE268 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE267 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE266 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE265 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE264 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE263 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE262 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE261 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE260 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE259 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE258 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE257 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE256 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x320++0x03
hide.long 0x00 "ACTIVE8,Active Bit Register 8"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
rgroup.long 0x324++0x03
line.long 0x00 "ACTIVE9,Active Bit Register 9"
bitfld.long 0x00 31. " ACTIVE319 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE318 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE317 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE316 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE315 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE314 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE313 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE312 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE311 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE310 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE309 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE308 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE307 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE306 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE305 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE304 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE303 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE302 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE301 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE300 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE299 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE298 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE297 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE296 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE295 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE294 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE293 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE292 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE291 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE290 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE289 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE288 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x324++0x03
hide.long 0x00 "ACTIVE9,Active Bit Register 9"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
rgroup.long 0x328++0x03
line.long 0x00 "ACTIVE10,Active Bit Register 10"
bitfld.long 0x00 31. " ACTIVE351 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE350 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE349 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE348 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE347 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE346 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE345 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE344 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE343 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE342 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE341 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE340 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE339 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE338 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE337 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE336 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE335 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE334 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE333 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE332 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE331 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE330 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE329 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE328 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE327 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE326 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE325 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE324 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE323 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE322 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE321 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE320 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x328++0x03
hide.long 0x00 "ACTIVE10,Active Bit Register 10"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
rgroup.long 0x32C++0x03
line.long 0x00 "ACTIVE11,Active Bit Register 11"
bitfld.long 0x00 31. " ACTIVE383 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE382 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE381 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE380 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE379 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE378 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE377 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE376 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE375 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE374 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE373 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE372 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE371 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE370 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE369 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE368 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE367 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE366 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE365 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE364 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE363 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE362 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE361 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE360 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE359 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE358 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE357 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE356 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE355 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE354 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE353 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE352 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x32C++0x03
hide.long 0x00 "ACTIVE11,Active Bit Register 11"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
rgroup.long 0x330++0x03
line.long 0x00 "ACTIVE12,Active Bit Register 12"
bitfld.long 0x00 31. " ACTIVE415 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE414 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE413 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE412 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE411 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE410 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE409 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE408 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE407 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE406 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE405 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE404 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE403 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE402 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE401 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE400 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE399 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE398 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE397 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE396 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE395 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE394 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE393 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE392 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE391 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE390 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE389 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE388 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE387 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE386 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE385 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE384 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x330++0x03
hide.long 0x00 "ACTIVE12,Active Bit Register 12"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
rgroup.long 0x334++0x03
line.long 0x00 "ACTIVE13,Active Bit Register 13"
bitfld.long 0x00 31. " ACTIVE447 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE446 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE445 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE444 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE443 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE442 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE441 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE440 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE439 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE438 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE437 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE436 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE435 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE434 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE433 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE432 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE431 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE430 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE429 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE428 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE427 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE426 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE425 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE424 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE423 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE422 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE421 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE420 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE419 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE418 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE417 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE416 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x334++0x03
hide.long 0x00 "ACTIVE13,Active Bit Register 13"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
rgroup.long 0x338++0x03
line.long 0x00 "ACTIVE14,Active Bit Register 14"
bitfld.long 0x00 31. " ACTIVE479 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE478 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE477 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE476 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE475 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE474 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE473 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE472 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE471 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE470 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE469 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE468 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE467 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE466 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE465 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE464 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE463 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE462 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE461 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE460 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE459 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE458 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE457 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE456 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE455 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE454 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE453 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE452 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE451 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE450 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE449 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE448 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x338++0x03
hide.long 0x00 "ACTIVE14,Active Bit Register 14"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0F)
rgroup.long 0x33C++0x03
line.long 0x00 "ACTIVE15,Active Bit Register 15"
bitfld.long 0x00 31. " ACTIVE511 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE510 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE509 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE508 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE507 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE506 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE505 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE504 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE503 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE502 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE501 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE500 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE499 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE498 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE497 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE496 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE495 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE494 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE493 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE492 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE491 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE490 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE489 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE488 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE487 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE486 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE485 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE484 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE483 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE482 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE481 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE480 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x33C++0x03
hide.long 0x00 "ACTIVE15,Active Bit Register 15"
endif
tree.end
width 13.
tree "Interrupt Target Non-Secure Registers"
group.long 0x380++0x03
line.long 0x00 "NVIC_ITNS0,Interrupt Target Non-Secure Register 0"
bitfld.long 0x00 31. " ITNS31 ,Interrupt Targets Non-secure 31" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS30 ,Interrupt Targets Non-secure 30" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS29 ,Interrupt Targets Non-secure 29" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS28 ,Interrupt Targets Non-secure 28" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS27 ,Interrupt Targets Non-secure 27" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS26 ,Interrupt Targets Non-secure 26" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS25 ,Interrupt Targets Non-secure 25" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS24 ,Interrupt Targets Non-secure 24" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS23 ,Interrupt Targets Non-secure 23" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS22 ,Interrupt Targets Non-secure 22" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS21 ,Interrupt Targets Non-secure 21" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS20 ,Interrupt Targets Non-secure 20" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS19 ,Interrupt Targets Non-secure 19" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS18 ,Interrupt Targets Non-secure 18" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS17 ,Interrupt Targets Non-secure 17" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS16 ,Interrupt Targets Non-secure 16" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS15 ,Interrupt Targets Non-secure 15" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS14 ,Interrupt Targets Non-secure 14" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS13 ,Interrupt Targets Non-secure 13" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS12 ,Interrupt Targets Non-secure 12" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS11 ,Interrupt Targets Non-secure 11" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS10 ,Interrupt Targets Non-secure 10" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS9 ,Interrupt Targets Non-secure 9" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS8 ,Interrupt Targets Non-secure 8" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS7 ,Interrupt Targets Non-secure 7" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS6 ,Interrupt Targets Non-secure 6" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS5 ,Interrupt Targets Non-secure 5" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS4 ,Interrupt Targets Non-secure 4" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS3 ,Interrupt Targets Non-secure 3" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS2 ,Interrupt Targets Non-secure 2" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS1 ,Interrupt Targets Non-secure 1" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS0 ,Interrupt Targets Non-secure 0" "Secure,Non-secure"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
group.long 0x384++0x03
line.long 0x00 "NVIC_ITNS1,Interrupt Target Non-Secure Register 1"
bitfld.long 0x00 31. " ITNS63 ,Interrupt Targets Non-secure 63" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS62 ,Interrupt Targets Non-secure 62" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS61 ,Interrupt Targets Non-secure 61" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS60 ,Interrupt Targets Non-secure 60" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS59 ,Interrupt Targets Non-secure 59" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS58 ,Interrupt Targets Non-secure 58" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS57 ,Interrupt Targets Non-secure 57" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS56 ,Interrupt Targets Non-secure 56" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS55 ,Interrupt Targets Non-secure 55" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS54 ,Interrupt Targets Non-secure 54" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS53 ,Interrupt Targets Non-secure 53" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS52 ,Interrupt Targets Non-secure 52" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS51 ,Interrupt Targets Non-secure 51" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS50 ,Interrupt Targets Non-secure 50" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS49 ,Interrupt Targets Non-secure 49" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS48 ,Interrupt Targets Non-secure 48" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS47 ,Interrupt Targets Non-secure 47" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS46 ,Interrupt Targets Non-secure 46" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS45 ,Interrupt Targets Non-secure 45" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS44 ,Interrupt Targets Non-secure 44" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS43 ,Interrupt Targets Non-secure 43" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS42 ,Interrupt Targets Non-secure 42" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS41 ,Interrupt Targets Non-secure 41" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS40 ,Interrupt Targets Non-secure 40" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS39 ,Interrupt Targets Non-secure 39" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS38 ,Interrupt Targets Non-secure 38" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS37 ,Interrupt Targets Non-secure 37" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS36 ,Interrupt Targets Non-secure 36" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS35 ,Interrupt Targets Non-secure 35" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS34 ,Interrupt Targets Non-secure 34" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS33 ,Interrupt Targets Non-secure 33" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS32 ,Interrupt Targets Non-secure 32" "Secure,Non-secure"
else
hgroup.long 0x384++0x03
hide.long 0x00 "NVIC_ITNS1,Interrupt Target Non-Secure Register 1"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
group.long 0x388++0x03
line.long 0x00 "NVIC_ITNS2,Interrupt Target Non-Secure Register 2"
bitfld.long 0x00 31. " ITNS95 ,Interrupt Targets Non-secure 95" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS94 ,Interrupt Targets Non-secure 94" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS93 ,Interrupt Targets Non-secure 93" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS92 ,Interrupt Targets Non-secure 92" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS91 ,Interrupt Targets Non-secure 91" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS90 ,Interrupt Targets Non-secure 90" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS89 ,Interrupt Targets Non-secure 89" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS88 ,Interrupt Targets Non-secure 88" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS87 ,Interrupt Targets Non-secure 87" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS86 ,Interrupt Targets Non-secure 86" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS85 ,Interrupt Targets Non-secure 85" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS84 ,Interrupt Targets Non-secure 84" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS83 ,Interrupt Targets Non-secure 83" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS82 ,Interrupt Targets Non-secure 82" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS81 ,Interrupt Targets Non-secure 81" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS80 ,Interrupt Targets Non-secure 80" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS79 ,Interrupt Targets Non-secure 79" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS78 ,Interrupt Targets Non-secure 78" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS77 ,Interrupt Targets Non-secure 77" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS76 ,Interrupt Targets Non-secure 76" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS75 ,Interrupt Targets Non-secure 75" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS74 ,Interrupt Targets Non-secure 74" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS73 ,Interrupt Targets Non-secure 73" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS72 ,Interrupt Targets Non-secure 72" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS71 ,Interrupt Targets Non-secure 71" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS70 ,Interrupt Targets Non-secure 70" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS69 ,Interrupt Targets Non-secure 69" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS68 ,Interrupt Targets Non-secure 68" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS67 ,Interrupt Targets Non-secure 67" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS66 ,Interrupt Targets Non-secure 66" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS65 ,Interrupt Targets Non-secure 65" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS64 ,Interrupt Targets Non-secure 64" "Secure,Non-secure"
else
hgroup.long 0x388++0x03
hide.long 0x00 "NVIC_ITNS2,Interrupt Target Non-Secure Register 2"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
group.long 0x38C++0x03
line.long 0x00 "NVIC_ITNS3,Interrupt Target Non-Secure Register 3"
bitfld.long 0x00 31. " ITNS127 ,Interrupt Targets Non-secure 127" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS126 ,Interrupt Targets Non-secure 126" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS125 ,Interrupt Targets Non-secure 125" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS124 ,Interrupt Targets Non-secure 124" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS123 ,Interrupt Targets Non-secure 123" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS122 ,Interrupt Targets Non-secure 122" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS121 ,Interrupt Targets Non-secure 121" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS120 ,Interrupt Targets Non-secure 120" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS119 ,Interrupt Targets Non-secure 119" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS118 ,Interrupt Targets Non-secure 118" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS117 ,Interrupt Targets Non-secure 117" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS116 ,Interrupt Targets Non-secure 116" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS115 ,Interrupt Targets Non-secure 115" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS114 ,Interrupt Targets Non-secure 114" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS113 ,Interrupt Targets Non-secure 113" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS112 ,Interrupt Targets Non-secure 112" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS111 ,Interrupt Targets Non-secure 111" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS110 ,Interrupt Targets Non-secure 110" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS109 ,Interrupt Targets Non-secure 109" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS108 ,Interrupt Targets Non-secure 108" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS107 ,Interrupt Targets Non-secure 107" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS106 ,Interrupt Targets Non-secure 106" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS105 ,Interrupt Targets Non-secure 105" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS104 ,Interrupt Targets Non-secure 104" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS103 ,Interrupt Targets Non-secure 103" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS102 ,Interrupt Targets Non-secure 102" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS101 ,Interrupt Targets Non-secure 101" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS100 ,Interrupt Targets Non-secure 100" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS99 ,Interrupt Targets Non-secure 99" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS98 ,Interrupt Targets Non-secure 98" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS97 ,Interrupt Targets Non-secure 97" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS96 ,Interrupt Targets Non-secure 96" "Secure,Non-secure"
else
hgroup.long 0x38C++0x03
hide.long 0x00 "NVIC_ITNS3,Interrupt Target Non-Secure Register 3"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
group.long 0x390++0x03
line.long 0x00 "NVIC_ITNS4,Interrupt Target Non-Secure Register 4"
bitfld.long 0x00 31. " ITNS159 ,Interrupt Targets Non-secure 159" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS158 ,Interrupt Targets Non-secure 158" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS157 ,Interrupt Targets Non-secure 157" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS156 ,Interrupt Targets Non-secure 156" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS155 ,Interrupt Targets Non-secure 155" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS154 ,Interrupt Targets Non-secure 154" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS153 ,Interrupt Targets Non-secure 153" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS152 ,Interrupt Targets Non-secure 152" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS151 ,Interrupt Targets Non-secure 151" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS150 ,Interrupt Targets Non-secure 150" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS149 ,Interrupt Targets Non-secure 149" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS148 ,Interrupt Targets Non-secure 148" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS147 ,Interrupt Targets Non-secure 147" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS146 ,Interrupt Targets Non-secure 146" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS145 ,Interrupt Targets Non-secure 145" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS144 ,Interrupt Targets Non-secure 144" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS143 ,Interrupt Targets Non-secure 143" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS142 ,Interrupt Targets Non-secure 142" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS141 ,Interrupt Targets Non-secure 141" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS140 ,Interrupt Targets Non-secure 140" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS139 ,Interrupt Targets Non-secure 139" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS138 ,Interrupt Targets Non-secure 138" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS137 ,Interrupt Targets Non-secure 137" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS136 ,Interrupt Targets Non-secure 136" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS135 ,Interrupt Targets Non-secure 135" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS134 ,Interrupt Targets Non-secure 134" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS133 ,Interrupt Targets Non-secure 133" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS132 ,Interrupt Targets Non-secure 132" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS131 ,Interrupt Targets Non-secure 131" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS130 ,Interrupt Targets Non-secure 130" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS129 ,Interrupt Targets Non-secure 129" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS128 ,Interrupt Targets Non-secure 128" "Secure,Non-secure"
else
hgroup.long 0x390++0x03
hide.long 0x00 "NVIC_ITNS4,Interrupt Target Non-Secure Register 4"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
group.long 0x394++0x03
line.long 0x00 "NVIC_ITNS5,Interrupt Target Non-Secure Register 5"
bitfld.long 0x00 31. " ITNS191 ,Interrupt Targets Non-secure 191" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS190 ,Interrupt Targets Non-secure 190" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS189 ,Interrupt Targets Non-secure 189" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS188 ,Interrupt Targets Non-secure 188" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS187 ,Interrupt Targets Non-secure 187" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS186 ,Interrupt Targets Non-secure 186" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS185 ,Interrupt Targets Non-secure 185" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS184 ,Interrupt Targets Non-secure 184" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS183 ,Interrupt Targets Non-secure 183" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS182 ,Interrupt Targets Non-secure 182" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS181 ,Interrupt Targets Non-secure 181" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS180 ,Interrupt Targets Non-secure 180" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS179 ,Interrupt Targets Non-secure 179" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS178 ,Interrupt Targets Non-secure 178" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS177 ,Interrupt Targets Non-secure 177" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS176 ,Interrupt Targets Non-secure 176" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS175 ,Interrupt Targets Non-secure 175" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS174 ,Interrupt Targets Non-secure 174" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS173 ,Interrupt Targets Non-secure 173" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS172 ,Interrupt Targets Non-secure 172" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS171 ,Interrupt Targets Non-secure 171" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS170 ,Interrupt Targets Non-secure 170" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS169 ,Interrupt Targets Non-secure 169" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS168 ,Interrupt Targets Non-secure 168" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS167 ,Interrupt Targets Non-secure 167" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS166 ,Interrupt Targets Non-secure 166" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS165 ,Interrupt Targets Non-secure 165" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS164 ,Interrupt Targets Non-secure 164" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS163 ,Interrupt Targets Non-secure 163" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS162 ,Interrupt Targets Non-secure 162" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS161 ,Interrupt Targets Non-secure 161" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS160 ,Interrupt Targets Non-secure 160" "Secure,Non-secure"
else
hgroup.long 0x394++0x03
hide.long 0x00 "NVIC_ITNS5,Interrupt Target Non-Secure Register 5"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
group.long 0x398++0x03
line.long 0x00 "NVIC_ITNS6,Interrupt Target Non-Secure Register 6"
bitfld.long 0x00 31. " ITNS223 ,Interrupt Targets Non-secure 223" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS222 ,Interrupt Targets Non-secure 222" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS221 ,Interrupt Targets Non-secure 221" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS220 ,Interrupt Targets Non-secure 220" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS219 ,Interrupt Targets Non-secure 219" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS218 ,Interrupt Targets Non-secure 218" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS217 ,Interrupt Targets Non-secure 217" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS216 ,Interrupt Targets Non-secure 216" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS215 ,Interrupt Targets Non-secure 215" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS214 ,Interrupt Targets Non-secure 214" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS213 ,Interrupt Targets Non-secure 213" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS212 ,Interrupt Targets Non-secure 212" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS211 ,Interrupt Targets Non-secure 211" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS210 ,Interrupt Targets Non-secure 210" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS209 ,Interrupt Targets Non-secure 209" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS208 ,Interrupt Targets Non-secure 208" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS207 ,Interrupt Targets Non-secure 207" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS206 ,Interrupt Targets Non-secure 206" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS205 ,Interrupt Targets Non-secure 205" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS204 ,Interrupt Targets Non-secure 204" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS203 ,Interrupt Targets Non-secure 203" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS202 ,Interrupt Targets Non-secure 202" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS201 ,Interrupt Targets Non-secure 201" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS200 ,Interrupt Targets Non-secure 200" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS199 ,Interrupt Targets Non-secure 199" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS198 ,Interrupt Targets Non-secure 198" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS197 ,Interrupt Targets Non-secure 197" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS196 ,Interrupt Targets Non-secure 196" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS195 ,Interrupt Targets Non-secure 195" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS194 ,Interrupt Targets Non-secure 194" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS193 ,Interrupt Targets Non-secure 193" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS192 ,Interrupt Targets Non-secure 192" "Secure,Non-secure"
else
hgroup.long 0x398++0x03
hide.long 0x00 "NVIC_ITNS6,Interrupt Target Non-Secure Register 6"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
group.long 0x39C++0x03
line.long 0x00 "NVIC_ITNS7,Interrupt Target Non-Secure Register 7"
bitfld.long 0x00 31. " ITNS255 ,Interrupt Targets Non-secure 255" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS254 ,Interrupt Targets Non-secure 254" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS253 ,Interrupt Targets Non-secure 253" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS252 ,Interrupt Targets Non-secure 252" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS251 ,Interrupt Targets Non-secure 251" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS250 ,Interrupt Targets Non-secure 250" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS249 ,Interrupt Targets Non-secure 249" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS248 ,Interrupt Targets Non-secure 248" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS247 ,Interrupt Targets Non-secure 247" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS246 ,Interrupt Targets Non-secure 246" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS245 ,Interrupt Targets Non-secure 245" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS244 ,Interrupt Targets Non-secure 244" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS243 ,Interrupt Targets Non-secure 243" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS242 ,Interrupt Targets Non-secure 242" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS241 ,Interrupt Targets Non-secure 241" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS240 ,Interrupt Targets Non-secure 240" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS239 ,Interrupt Targets Non-secure 239" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS238 ,Interrupt Targets Non-secure 238" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS237 ,Interrupt Targets Non-secure 237" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS236 ,Interrupt Targets Non-secure 236" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS235 ,Interrupt Targets Non-secure 235" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS234 ,Interrupt Targets Non-secure 234" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS233 ,Interrupt Targets Non-secure 233" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS232 ,Interrupt Targets Non-secure 232" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS231 ,Interrupt Targets Non-secure 231" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS230 ,Interrupt Targets Non-secure 230" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS229 ,Interrupt Targets Non-secure 229" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS228 ,Interrupt Targets Non-secure 228" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS227 ,Interrupt Targets Non-secure 227" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS226 ,Interrupt Targets Non-secure 226" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS225 ,Interrupt Targets Non-secure 225" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS224 ,Interrupt Targets Non-secure 224" "Secure,Non-secure"
else
hgroup.long 0x39C++0x03
hide.long 0x00 "NVIC_ITNS7,Interrupt Target Non-Secure Register 7"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
group.long 0x3A0++0x03
line.long 0x00 "NVIC_ITNS8,Interrupt Target Non-Secure Register 8"
bitfld.long 0x00 31. " ITNS287 ,Interrupt Targets Non-secure 287" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS286 ,Interrupt Targets Non-secure 286" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS285 ,Interrupt Targets Non-secure 285" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS284 ,Interrupt Targets Non-secure 284" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS283 ,Interrupt Targets Non-secure 283" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS282 ,Interrupt Targets Non-secure 282" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS281 ,Interrupt Targets Non-secure 281" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS280 ,Interrupt Targets Non-secure 280" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS279 ,Interrupt Targets Non-secure 279" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS278 ,Interrupt Targets Non-secure 278" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS277 ,Interrupt Targets Non-secure 277" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS276 ,Interrupt Targets Non-secure 276" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS275 ,Interrupt Targets Non-secure 275" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS274 ,Interrupt Targets Non-secure 274" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS273 ,Interrupt Targets Non-secure 273" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS272 ,Interrupt Targets Non-secure 272" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS271 ,Interrupt Targets Non-secure 271" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS270 ,Interrupt Targets Non-secure 270" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS269 ,Interrupt Targets Non-secure 269" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS268 ,Interrupt Targets Non-secure 268" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS267 ,Interrupt Targets Non-secure 267" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS266 ,Interrupt Targets Non-secure 266" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS265 ,Interrupt Targets Non-secure 265" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS264 ,Interrupt Targets Non-secure 264" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS263 ,Interrupt Targets Non-secure 263" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS262 ,Interrupt Targets Non-secure 262" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS261 ,Interrupt Targets Non-secure 261" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS260 ,Interrupt Targets Non-secure 260" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS259 ,Interrupt Targets Non-secure 259" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS258 ,Interrupt Targets Non-secure 258" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS257 ,Interrupt Targets Non-secure 257" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS256 ,Interrupt Targets Non-secure 256" "Secure,Non-secure"
else
hgroup.long 0x3A0++0x03
hide.long 0x00 "NVIC_ITNS8,Interrupt Target Non-Secure Register 8"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
group.long 0x3A4++0x03
line.long 0x00 "NVIC_ITNS9,Interrupt Target Non-Secure Register 9"
bitfld.long 0x00 31. " ITNS319 ,Interrupt Targets Non-secure 319" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS318 ,Interrupt Targets Non-secure 318" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS317 ,Interrupt Targets Non-secure 317" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS316 ,Interrupt Targets Non-secure 316" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS315 ,Interrupt Targets Non-secure 315" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS314 ,Interrupt Targets Non-secure 314" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS313 ,Interrupt Targets Non-secure 313" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS312 ,Interrupt Targets Non-secure 312" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS311 ,Interrupt Targets Non-secure 311" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS310 ,Interrupt Targets Non-secure 310" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS309 ,Interrupt Targets Non-secure 309" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS308 ,Interrupt Targets Non-secure 308" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS307 ,Interrupt Targets Non-secure 307" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS306 ,Interrupt Targets Non-secure 306" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS305 ,Interrupt Targets Non-secure 305" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS304 ,Interrupt Targets Non-secure 304" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS303 ,Interrupt Targets Non-secure 303" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS302 ,Interrupt Targets Non-secure 302" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS301 ,Interrupt Targets Non-secure 301" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS300 ,Interrupt Targets Non-secure 300" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS299 ,Interrupt Targets Non-secure 299" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS298 ,Interrupt Targets Non-secure 298" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS297 ,Interrupt Targets Non-secure 297" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS296 ,Interrupt Targets Non-secure 296" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS295 ,Interrupt Targets Non-secure 295" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS294 ,Interrupt Targets Non-secure 294" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS293 ,Interrupt Targets Non-secure 293" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS292 ,Interrupt Targets Non-secure 292" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS291 ,Interrupt Targets Non-secure 291" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS290 ,Interrupt Targets Non-secure 290" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS289 ,Interrupt Targets Non-secure 289" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS288 ,Interrupt Targets Non-secure 288" "Secure,Non-secure"
else
hgroup.long 0x3A4++0x03
hide.long 0x00 "NVIC_ITNS9,Interrupt Target Non-Secure Register 9"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
group.long 0x3A8++0x03
line.long 0x00 "NVIC_ITNS10,Interrupt Target Non-Secure Register 10"
bitfld.long 0x00 31. " ITNS351 ,Interrupt Targets Non-secure 351" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS350 ,Interrupt Targets Non-secure 350" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS349 ,Interrupt Targets Non-secure 349" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS348 ,Interrupt Targets Non-secure 348" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS347 ,Interrupt Targets Non-secure 347" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS346 ,Interrupt Targets Non-secure 346" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS345 ,Interrupt Targets Non-secure 345" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS344 ,Interrupt Targets Non-secure 344" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS343 ,Interrupt Targets Non-secure 343" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS342 ,Interrupt Targets Non-secure 342" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS341 ,Interrupt Targets Non-secure 341" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS340 ,Interrupt Targets Non-secure 340" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS339 ,Interrupt Targets Non-secure 339" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS338 ,Interrupt Targets Non-secure 338" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS337 ,Interrupt Targets Non-secure 337" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS336 ,Interrupt Targets Non-secure 336" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS335 ,Interrupt Targets Non-secure 335" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS334 ,Interrupt Targets Non-secure 334" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS333 ,Interrupt Targets Non-secure 333" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS332 ,Interrupt Targets Non-secure 332" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS331 ,Interrupt Targets Non-secure 331" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS330 ,Interrupt Targets Non-secure 330" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS329 ,Interrupt Targets Non-secure 329" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS328 ,Interrupt Targets Non-secure 328" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS327 ,Interrupt Targets Non-secure 327" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS326 ,Interrupt Targets Non-secure 326" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS325 ,Interrupt Targets Non-secure 325" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS324 ,Interrupt Targets Non-secure 324" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS323 ,Interrupt Targets Non-secure 323" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS322 ,Interrupt Targets Non-secure 322" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS321 ,Interrupt Targets Non-secure 321" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS320 ,Interrupt Targets Non-secure 320" "Secure,Non-secure"
else
hgroup.long 0x3A8++0x03
hide.long 0x00 "NVIC_ITNS10,Interrupt Target Non-Secure Register 10"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
group.long 0x3AC++0x03
line.long 0x00 "NVIC_ITNS11,Interrupt Target Non-Secure Register 11"
bitfld.long 0x00 31. " ITNS383 ,Interrupt Targets Non-secure 383" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS382 ,Interrupt Targets Non-secure 382" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS381 ,Interrupt Targets Non-secure 381" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS380 ,Interrupt Targets Non-secure 380" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS379 ,Interrupt Targets Non-secure 379" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS378 ,Interrupt Targets Non-secure 378" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS377 ,Interrupt Targets Non-secure 377" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS376 ,Interrupt Targets Non-secure 376" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS375 ,Interrupt Targets Non-secure 375" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS374 ,Interrupt Targets Non-secure 374" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS373 ,Interrupt Targets Non-secure 373" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS372 ,Interrupt Targets Non-secure 372" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS371 ,Interrupt Targets Non-secure 371" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS370 ,Interrupt Targets Non-secure 370" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS369 ,Interrupt Targets Non-secure 369" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS368 ,Interrupt Targets Non-secure 368" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS367 ,Interrupt Targets Non-secure 367" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS366 ,Interrupt Targets Non-secure 366" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS365 ,Interrupt Targets Non-secure 365" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS364 ,Interrupt Targets Non-secure 364" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS363 ,Interrupt Targets Non-secure 363" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS362 ,Interrupt Targets Non-secure 362" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS361 ,Interrupt Targets Non-secure 361" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS360 ,Interrupt Targets Non-secure 360" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS359 ,Interrupt Targets Non-secure 359" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS358 ,Interrupt Targets Non-secure 358" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS357 ,Interrupt Targets Non-secure 357" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS356 ,Interrupt Targets Non-secure 356" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS355 ,Interrupt Targets Non-secure 355" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS354 ,Interrupt Targets Non-secure 354" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS353 ,Interrupt Targets Non-secure 353" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS352 ,Interrupt Targets Non-secure 352" "Secure,Non-secure"
else
hgroup.long 0x3AC++0x03
hide.long 0x00 "NVIC_ITNS11,Interrupt Target Non-Secure Register 11"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
group.long 0x3B0++0x03
line.long 0x00 "NVIC_ITNS12,Interrupt Target Non-Secure Register 12"
bitfld.long 0x00 31. " ITNS415 ,Interrupt Targets Non-secure 415" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS414 ,Interrupt Targets Non-secure 414" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS413 ,Interrupt Targets Non-secure 413" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS412 ,Interrupt Targets Non-secure 412" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS411 ,Interrupt Targets Non-secure 411" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS410 ,Interrupt Targets Non-secure 410" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS409 ,Interrupt Targets Non-secure 409" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS408 ,Interrupt Targets Non-secure 408" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS407 ,Interrupt Targets Non-secure 407" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS406 ,Interrupt Targets Non-secure 406" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS405 ,Interrupt Targets Non-secure 405" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS404 ,Interrupt Targets Non-secure 404" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS403 ,Interrupt Targets Non-secure 403" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS402 ,Interrupt Targets Non-secure 402" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS401 ,Interrupt Targets Non-secure 401" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS400 ,Interrupt Targets Non-secure 400" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS399 ,Interrupt Targets Non-secure 399" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS398 ,Interrupt Targets Non-secure 398" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS397 ,Interrupt Targets Non-secure 397" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS396 ,Interrupt Targets Non-secure 396" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS395 ,Interrupt Targets Non-secure 395" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS394 ,Interrupt Targets Non-secure 394" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS393 ,Interrupt Targets Non-secure 393" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS392 ,Interrupt Targets Non-secure 392" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS391 ,Interrupt Targets Non-secure 391" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS390 ,Interrupt Targets Non-secure 390" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS389 ,Interrupt Targets Non-secure 389" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS388 ,Interrupt Targets Non-secure 388" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS387 ,Interrupt Targets Non-secure 387" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS386 ,Interrupt Targets Non-secure 386" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS385 ,Interrupt Targets Non-secure 385" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS384 ,Interrupt Targets Non-secure 384" "Secure,Non-secure"
else
hgroup.long 0x3B0++0x03
hide.long 0x00 "NVIC_ITNS12,Interrupt Target Non-Secure Register 12"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
group.long 0x3B4++0x03
line.long 0x00 "NVIC_ITNS13,Interrupt Target Non-Secure Register 13"
bitfld.long 0x00 31. " ITNS447 ,Interrupt Targets Non-secure 447" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS446 ,Interrupt Targets Non-secure 446" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS445 ,Interrupt Targets Non-secure 445" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS444 ,Interrupt Targets Non-secure 444" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS443 ,Interrupt Targets Non-secure 443" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS442 ,Interrupt Targets Non-secure 442" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS441 ,Interrupt Targets Non-secure 441" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS440 ,Interrupt Targets Non-secure 440" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS439 ,Interrupt Targets Non-secure 439" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS438 ,Interrupt Targets Non-secure 438" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS437 ,Interrupt Targets Non-secure 437" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS436 ,Interrupt Targets Non-secure 436" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS435 ,Interrupt Targets Non-secure 435" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS434 ,Interrupt Targets Non-secure 434" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS433 ,Interrupt Targets Non-secure 433" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS432 ,Interrupt Targets Non-secure 432" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS431 ,Interrupt Targets Non-secure 431" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS430 ,Interrupt Targets Non-secure 430" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS429 ,Interrupt Targets Non-secure 429" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS428 ,Interrupt Targets Non-secure 428" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS427 ,Interrupt Targets Non-secure 427" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS426 ,Interrupt Targets Non-secure 426" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS425 ,Interrupt Targets Non-secure 425" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS424 ,Interrupt Targets Non-secure 424" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS423 ,Interrupt Targets Non-secure 423" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS422 ,Interrupt Targets Non-secure 422" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS421 ,Interrupt Targets Non-secure 421" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS420 ,Interrupt Targets Non-secure 420" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS419 ,Interrupt Targets Non-secure 419" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS418 ,Interrupt Targets Non-secure 418" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS417 ,Interrupt Targets Non-secure 417" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS416 ,Interrupt Targets Non-secure 416" "Secure,Non-secure"
else
hgroup.long 0x3B4++0x03
hide.long 0x00 "NVIC_ITNS13,Interrupt Target Non-Secure Register 13"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
group.long 0x3B8++0x03
line.long 0x00 "NVIC_ITNS14,Interrupt Target Non-Secure Register 14"
bitfld.long 0x00 31. " ITNS479 ,Interrupt Targets Non-secure 479" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS478 ,Interrupt Targets Non-secure 478" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS477 ,Interrupt Targets Non-secure 477" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS476 ,Interrupt Targets Non-secure 476" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS475 ,Interrupt Targets Non-secure 475" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS474 ,Interrupt Targets Non-secure 474" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS473 ,Interrupt Targets Non-secure 473" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS472 ,Interrupt Targets Non-secure 472" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS471 ,Interrupt Targets Non-secure 471" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS470 ,Interrupt Targets Non-secure 470" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS469 ,Interrupt Targets Non-secure 469" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS468 ,Interrupt Targets Non-secure 468" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS467 ,Interrupt Targets Non-secure 467" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS466 ,Interrupt Targets Non-secure 466" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS465 ,Interrupt Targets Non-secure 465" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS464 ,Interrupt Targets Non-secure 464" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS463 ,Interrupt Targets Non-secure 463" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS462 ,Interrupt Targets Non-secure 462" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS461 ,Interrupt Targets Non-secure 461" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS460 ,Interrupt Targets Non-secure 460" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS459 ,Interrupt Targets Non-secure 459" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS458 ,Interrupt Targets Non-secure 458" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS457 ,Interrupt Targets Non-secure 457" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS456 ,Interrupt Targets Non-secure 456" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS455 ,Interrupt Targets Non-secure 455" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS454 ,Interrupt Targets Non-secure 454" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS453 ,Interrupt Targets Non-secure 453" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS452 ,Interrupt Targets Non-secure 452" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS451 ,Interrupt Targets Non-secure 451" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS450 ,Interrupt Targets Non-secure 450" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS449 ,Interrupt Targets Non-secure 449" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS448 ,Interrupt Targets Non-secure 448" "Secure,Non-secure"
else
hgroup.long 0x3B8++0x03
hide.long 0x00 "NVIC_ITNS14,Interrupt Target Non-Secure Register 14"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x0F)
group.long 0x3BC++0x03
line.long 0x00 "NVIC_ITNS15,Interrupt Target Non-Secure Register 15"
bitfld.long 0x00 31. " ITNS511 ,Interrupt Targets Non-secure 511" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS510 ,Interrupt Targets Non-secure 510" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS509 ,Interrupt Targets Non-secure 509" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS508 ,Interrupt Targets Non-secure 508" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS507 ,Interrupt Targets Non-secure 507" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS506 ,Interrupt Targets Non-secure 506" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS505 ,Interrupt Targets Non-secure 505" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS504 ,Interrupt Targets Non-secure 504" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS503 ,Interrupt Targets Non-secure 503" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS502 ,Interrupt Targets Non-secure 502" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS501 ,Interrupt Targets Non-secure 501" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS500 ,Interrupt Targets Non-secure 500" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS499 ,Interrupt Targets Non-secure 499" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS498 ,Interrupt Targets Non-secure 498" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS497 ,Interrupt Targets Non-secure 497" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS496 ,Interrupt Targets Non-secure 496" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS495 ,Interrupt Targets Non-secure 495" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS494 ,Interrupt Targets Non-secure 494" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS493 ,Interrupt Targets Non-secure 493" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS492 ,Interrupt Targets Non-secure 492" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS491 ,Interrupt Targets Non-secure 491" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS490 ,Interrupt Targets Non-secure 490" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS489 ,Interrupt Targets Non-secure 489" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS488 ,Interrupt Targets Non-secure 488" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS487 ,Interrupt Targets Non-secure 487" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS486 ,Interrupt Targets Non-secure 486" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS485 ,Interrupt Targets Non-secure 485" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS484 ,Interrupt Targets Non-secure 484" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS483 ,Interrupt Targets Non-secure 483" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS482 ,Interrupt Targets Non-secure 482" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS481 ,Interrupt Targets Non-secure 481" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS480 ,Interrupt Targets Non-secure 480" "Secure,Non-secure"
else
hgroup.long 0x3BC++0x03
hide.long 0x00 "NVIC_ITNS15,Interrupt Target Non-Secure Register 15"
endif
tree.end
tree "Interrupt Priority Registers"
group.long 0x400++0x1F
line.long 0x0 "IPR0,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
line.long 0x4 "IPR1,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
line.long 0x8 "IPR2,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
line.long 0xC "IPR3,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
line.long 0x10 "IPR4,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
line.long 0x14 "IPR5,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
line.long 0x18 "IPR6,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
line.long 0x1C "IPR7,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
group.long 0x420++0x1F
line.long 0x0 "IPR8,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
line.long 0x4 "IPR9,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
line.long 0x8 "IPR10,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
line.long 0xC "IPR11,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
line.long 0x10 "IPR12,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
line.long 0x14 "IPR13,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
line.long 0x18 "IPR14,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
line.long 0x1C "IPR15,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
else
hgroup.long 0x420++0x1F
hide.long 0x0 "IPR8,Interrupt Priority Register"
hide.long 0x4 "IPR9,Interrupt Priority Register"
hide.long 0x8 "IPR10,Interrupt Priority Register"
hide.long 0xC "IPR11,Interrupt Priority Register"
hide.long 0x10 "IPR12,Interrupt Priority Register"
hide.long 0x14 "IPR13,Interrupt Priority Register"
hide.long 0x18 "IPR14,Interrupt Priority Register"
hide.long 0x1C "IPR15,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
group.long 0x440++0x1F
line.long 0x0 "IPR16,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
line.long 0x4 "IPR17,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
line.long 0x8 "IPR18,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
line.long 0xC "IPR19,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
line.long 0x10 "IPR20,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
line.long 0x14 "IPR21,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
line.long 0x18 "IPR22,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
line.long 0x1C "IPR23,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
else
hgroup.long 0x440++0x1F
hide.long 0x0 "IPR16,Interrupt Priority Register"
hide.long 0x4 "IPR17,Interrupt Priority Register"
hide.long 0x8 "IPR18,Interrupt Priority Register"
hide.long 0xC "IPR19,Interrupt Priority Register"
hide.long 0x10 "IPR20,Interrupt Priority Register"
hide.long 0x14 "IPR21,Interrupt Priority Register"
hide.long 0x18 "IPR22,Interrupt Priority Register"
hide.long 0x1C "IPR23,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
group.long 0x460++0x1F
line.long 0x0 "IPR24,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
line.long 0x4 "IPR25,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
line.long 0x8 "IPR26,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
line.long 0xC "IPR27,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
line.long 0x10 "IPR28,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
line.long 0x14 "IPR29,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
line.long 0x18 "IPR30,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
line.long 0x1C "IPR31,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
else
hgroup.long 0x460++0x1F
hide.long 0x0 "IPR24,Interrupt Priority Register"
hide.long 0x4 "IPR25,Interrupt Priority Register"
hide.long 0x8 "IPR26,Interrupt Priority Register"
hide.long 0xC "IPR27,Interrupt Priority Register"
hide.long 0x10 "IPR28,Interrupt Priority Register"
hide.long 0x14 "IPR29,Interrupt Priority Register"
hide.long 0x18 "IPR30,Interrupt Priority Register"
hide.long 0x1C "IPR31,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
group.long 0x480++0x1F
line.long 0x0 "IPR32,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
line.long 0x4 "IPR33,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
line.long 0x8 "IPR34,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
line.long 0xC "IPR35,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
line.long 0x10 "IPR36,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
line.long 0x14 "IPR37,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
line.long 0x18 "IPR38,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
line.long 0x1C "IPR39,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
else
hgroup.long 0x480++0x1F
hide.long 0x0 "IPR32,Interrupt Priority Register"
hide.long 0x4 "IPR33,Interrupt Priority Register"
hide.long 0x8 "IPR34,Interrupt Priority Register"
hide.long 0xC "IPR35,Interrupt Priority Register"
hide.long 0x10 "IPR36,Interrupt Priority Register"
hide.long 0x14 "IPR37,Interrupt Priority Register"
hide.long 0x18 "IPR38,Interrupt Priority Register"
hide.long 0x1C "IPR39,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
group.long 0x4A0++0x1F
line.long 0x0 "IPR40,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
line.long 0x4 "IPR41,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
line.long 0x8 "IPR42,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
line.long 0xC "IPR43,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
line.long 0x10 "IPR44,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
line.long 0x14 "IPR45,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
line.long 0x18 "IPR46,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
line.long 0x1C "IPR47,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
else
hgroup.long 0x4A0++0x1F
hide.long 0x0 "IPR40,Interrupt Priority Register"
hide.long 0x4 "IPR41,Interrupt Priority Register"
hide.long 0x8 "IPR42,Interrupt Priority Register"
hide.long 0xC "IPR43,Interrupt Priority Register"
hide.long 0x10 "IPR44,Interrupt Priority Register"
hide.long 0x14 "IPR45,Interrupt Priority Register"
hide.long 0x18 "IPR46,Interrupt Priority Register"
hide.long 0x1C "IPR47,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
group.long 0x4C0++0x1F
line.long 0x0 "IPR48,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
line.long 0x4 "IPR49,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
line.long 0x8 "IPR50,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
line.long 0xC "IPR51,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
line.long 0x10 "IPR52,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
line.long 0x14 "IPR53,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
line.long 0x18 "IPR54,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
line.long 0x1C "IPR55,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
else
hgroup.long 0x4C0++0x1F
hide.long 0x0 "IPR48,Interrupt Priority Register"
hide.long 0x4 "IPR49,Interrupt Priority Register"
hide.long 0x8 "IPR50,Interrupt Priority Register"
hide.long 0xC "IPR51,Interrupt Priority Register"
hide.long 0x10 "IPR52,Interrupt Priority Register"
hide.long 0x14 "IPR53,Interrupt Priority Register"
hide.long 0x18 "IPR54,Interrupt Priority Register"
hide.long 0x1C "IPR55,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
group.long 0x4E0++0x1F
line.long 0x0 "IPR56,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority"
line.long 0x4 "IPR57,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority"
line.long 0x8 "IPR58,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority"
line.long 0xC "IPR59,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority"
line.long 0x10 "IPR60,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_243 ,Interrupt 243 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_242 ,Interrupt 242 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_241 ,Interrupt 241 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_240 ,Interrupt 240 Priority"
line.long 0x14 "IPR61,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_247 ,Interrupt 247 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_246 ,Interrupt 246 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_245 ,Interrupt 245 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_244 ,Interrupt 244 Priority"
line.long 0x18 "IPR62,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_251 ,Interrupt 251 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_250 ,Interrupt 250 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_249 ,Interrupt 249 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_248 ,Interrupt 248 Priority"
line.long 0x1C "IPR63,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_255 ,Interrupt 255 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_254 ,Interrupt 254 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_253 ,Interrupt 253 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_252 ,Interrupt 252 Priority"
else
hgroup.long 0x4E0++0x1F
hide.long 0x0 "IPR56,Interrupt Priority Register"
hide.long 0x4 "IPR57,Interrupt Priority Register"
hide.long 0x8 "IPR58,Interrupt Priority Register"
hide.long 0xC "IPR59,Interrupt Priority Register"
hide.long 0x10 "IPR60,Interrupt Priority Register"
hide.long 0x14 "IPR61,Interrupt Priority Register"
hide.long 0x18 "IPR62,Interrupt Priority Register"
hide.long 0x1C "IPR63,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
group.long 0x500++0x1F
line.long 0x0 "IPR64,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_259 ,Interrupt 259 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_258 ,Interrupt 258 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_257 ,Interrupt 257 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_256 ,Interrupt 256 Priority"
line.long 0x4 "IPR65,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_263 ,Interrupt 263 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_262 ,Interrupt 262 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_261 ,Interrupt 261 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_260 ,Interrupt 260 Priority"
line.long 0x8 "IPR66,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_267 ,Interrupt 267 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_266 ,Interrupt 266 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_265 ,Interrupt 265 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_264 ,Interrupt 264 Priority"
line.long 0xC "IPR67,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_271 ,Interrupt 271 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_270 ,Interrupt 270 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_269 ,Interrupt 269 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_268 ,Interrupt 268 Priority"
line.long 0x10 "IPR68,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_275 ,Interrupt 275 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_274 ,Interrupt 274 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_273 ,Interrupt 273 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_272 ,Interrupt 272 Priority"
line.long 0x14 "IPR69,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_279 ,Interrupt 279 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_278 ,Interrupt 278 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_277 ,Interrupt 277 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_276 ,Interrupt 276 Priority"
line.long 0x18 "IPR70,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_283 ,Interrupt 283 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_282 ,Interrupt 282 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_281 ,Interrupt 281 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_280 ,Interrupt 280 Priority"
line.long 0x1C "IPR71,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_287 ,Interrupt 287 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_286 ,Interrupt 286 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_285 ,Interrupt 285 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_284 ,Interrupt 284 Priority"
else
hgroup.long 0x500++0x1F
hide.long 0x0 "IPR64,Interrupt Priority Register"
hide.long 0x4 "IPR65,Interrupt Priority Register"
hide.long 0x8 "IPR66,Interrupt Priority Register"
hide.long 0xC "IPR67,Interrupt Priority Register"
hide.long 0x10 "IPR68,Interrupt Priority Register"
hide.long 0x14 "IPR69,Interrupt Priority Register"
hide.long 0x18 "IPR70,Interrupt Priority Register"
hide.long 0x1C "IPR71,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
group.long 0x520++0x1F
line.long 0x0 "IPR72,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_291 ,Interrupt 291 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_290 ,Interrupt 290 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_289 ,Interrupt 289 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_288 ,Interrupt 288 Priority"
line.long 0x4 "IPR73,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_295 ,Interrupt 295 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_294 ,Interrupt 294 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_293 ,Interrupt 293 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_292 ,Interrupt 292 Priority"
line.long 0x8 "IPR74,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_299 ,Interrupt 299 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_298 ,Interrupt 298 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_297 ,Interrupt 297 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_296 ,Interrupt 296 Priority"
line.long 0xC "IPR75,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_303 ,Interrupt 303 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_302 ,Interrupt 302 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_301 ,Interrupt 301 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_300 ,Interrupt 300 Priority"
line.long 0x10 "IPR76,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_307 ,Interrupt 307 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_306 ,Interrupt 306 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_305 ,Interrupt 305 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_304 ,Interrupt 304 Priority"
line.long 0x14 "IPR77,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_311 ,Interrupt 311 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_310 ,Interrupt 310 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_309 ,Interrupt 309 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_308 ,Interrupt 308 Priority"
line.long 0x18 "IPR78,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_315 ,Interrupt 315 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_314 ,Interrupt 314 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_313 ,Interrupt 313 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_312 ,Interrupt 312 Priority"
line.long 0x1C "IPR79,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_319 ,Interrupt 319 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_318 ,Interrupt 318 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_317 ,Interrupt 317 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_316 ,Interrupt 316 Priority"
else
hgroup.long 0x520++0x1F
hide.long 0x0 "IPR72,Interrupt Priority Register"
hide.long 0x4 "IPR73,Interrupt Priority Register"
hide.long 0x8 "IPR74,Interrupt Priority Register"
hide.long 0xC "IPR75,Interrupt Priority Register"
hide.long 0x10 "IPR76,Interrupt Priority Register"
hide.long 0x14 "IPR77,Interrupt Priority Register"
hide.long 0x18 "IPR78,Interrupt Priority Register"
hide.long 0x1C "IPR79,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
group.long 0x540++0x1F
line.long 0x0 "IPR80,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_323 ,Interrupt 323 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_322 ,Interrupt 322 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_321 ,Interrupt 321 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_320 ,Interrupt 320 Priority"
line.long 0x4 "IPR81,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_327 ,Interrupt 327 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_326 ,Interrupt 326 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_325 ,Interrupt 325 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_324 ,Interrupt 324 Priority"
line.long 0x8 "IPR82,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_331 ,Interrupt 331 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_330 ,Interrupt 330 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_329 ,Interrupt 329 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_328 ,Interrupt 328 Priority"
line.long 0xC "IPR83,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_335 ,Interrupt 335 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_334 ,Interrupt 334 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_333 ,Interrupt 333 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_332 ,Interrupt 332 Priority"
line.long 0x10 "IPR84,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_339 ,Interrupt 339 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_338 ,Interrupt 338 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_337 ,Interrupt 337 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_336 ,Interrupt 336 Priority"
line.long 0x14 "IPR85,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_343 ,Interrupt 343 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_342 ,Interrupt 342 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_341 ,Interrupt 341 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_340 ,Interrupt 340 Priority"
line.long 0x18 "IPR86,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_347 ,Interrupt 347 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_346 ,Interrupt 346 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_345 ,Interrupt 345 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_344 ,Interrupt 344 Priority"
line.long 0x1C "IPR87,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_351 ,Interrupt 351 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_350 ,Interrupt 350 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_349 ,Interrupt 349 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_348 ,Interrupt 348 Priority"
else
hgroup.long 0x540++0x1F
hide.long 0x0 "IPR80,Interrupt Priority Register"
hide.long 0x4 "IPR81,Interrupt Priority Register"
hide.long 0x8 "IPR82,Interrupt Priority Register"
hide.long 0xC "IPR83,Interrupt Priority Register"
hide.long 0x10 "IPR84,Interrupt Priority Register"
hide.long 0x14 "IPR85,Interrupt Priority Register"
hide.long 0x18 "IPR86,Interrupt Priority Register"
hide.long 0x1C "IPR87,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
group.long 0x560++0x1F
line.long 0x0 "IPR88,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_355 ,Interrupt 355 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_354 ,Interrupt 354 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_353 ,Interrupt 353 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_352 ,Interrupt 352 Priority"
line.long 0x4 "IPR89,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_359 ,Interrupt 359 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_358 ,Interrupt 358 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_357 ,Interrupt 357 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_356 ,Interrupt 356 Priority"
line.long 0x8 "IPR90,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_363 ,Interrupt 363 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_362 ,Interrupt 362 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_361 ,Interrupt 361 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_360 ,Interrupt 360 Priority"
line.long 0xC "IPR91,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_367 ,Interrupt 367 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_366 ,Interrupt 366 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_365 ,Interrupt 365 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_364 ,Interrupt 364 Priority"
line.long 0x10 "IPR92,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_371 ,Interrupt 371 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_370 ,Interrupt 370 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_369 ,Interrupt 369 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_368 ,Interrupt 368 Priority"
line.long 0x14 "IPR93,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_375 ,Interrupt 375 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_374 ,Interrupt 374 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_373 ,Interrupt 373 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_372 ,Interrupt 372 Priority"
line.long 0x18 "IPR94,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_379 ,Interrupt 379 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_378 ,Interrupt 378 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_377 ,Interrupt 377 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_376 ,Interrupt 376 Priority"
line.long 0x1C "IPR95,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_383 ,Interrupt 383 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_382 ,Interrupt 382 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_381 ,Interrupt 381 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_380 ,Interrupt 380 Priority"
else
hgroup.long 0x560++0x1F
hide.long 0x0 "IPR88,Interrupt Priority Register"
hide.long 0x4 "IPR89,Interrupt Priority Register"
hide.long 0x8 "IPR90,Interrupt Priority Register"
hide.long 0xC "IPR91,Interrupt Priority Register"
hide.long 0x10 "IPR92,Interrupt Priority Register"
hide.long 0x14 "IPR93,Interrupt Priority Register"
hide.long 0x18 "IPR94,Interrupt Priority Register"
hide.long 0x1C "IPR95,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
group.long 0x580++0x1F
line.long 0x0 "IPR96,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_387 ,Interrupt 387 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_386 ,Interrupt 386 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_385 ,Interrupt 385 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_384 ,Interrupt 384 Priority"
line.long 0x4 "IPR97,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_391 ,Interrupt 391 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_390 ,Interrupt 390 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_389 ,Interrupt 389 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_388 ,Interrupt 388 Priority"
line.long 0x8 "IPR98,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_395 ,Interrupt 395 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_394 ,Interrupt 394 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_393 ,Interrupt 393 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_392 ,Interrupt 392 Priority"
line.long 0xC "IPR99,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_399 ,Interrupt 399 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_398 ,Interrupt 398 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_397 ,Interrupt 397 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_396 ,Interrupt 396 Priority"
line.long 0x10 "IPR100,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_403 ,Interrupt 403 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_402 ,Interrupt 402 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_401 ,Interrupt 401 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_400 ,Interrupt 400 Priority"
line.long 0x14 "IPR101,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_407 ,Interrupt 407 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_406 ,Interrupt 406 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_405 ,Interrupt 405 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_404 ,Interrupt 404 Priority"
line.long 0x18 "IPR102,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_411 ,Interrupt 411 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_410 ,Interrupt 410 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_409 ,Interrupt 409 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_408 ,Interrupt 408 Priority"
line.long 0x1C "IPR103,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_415 ,Interrupt 415 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_414 ,Interrupt 414 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_413 ,Interrupt 413 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_412 ,Interrupt 412 Priority"
else
hgroup.long 0x580++0x1F
hide.long 0x0 "IPR96,Interrupt Priority Register"
hide.long 0x4 "IPR97,Interrupt Priority Register"
hide.long 0x8 "IPR98,Interrupt Priority Register"
hide.long 0xC "IPR99,Interrupt Priority Register"
hide.long 0x10 "IPR100,Interrupt Priority Register"
hide.long 0x14 "IPR101,Interrupt Priority Register"
hide.long 0x18 "IPR102,Interrupt Priority Register"
hide.long 0x1C "IPR103,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
group.long 0x5A0++0x1F
line.long 0x0 "IPR104,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_419 ,Interrupt 419 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_418 ,Interrupt 418 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_417 ,Interrupt 417 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_416 ,Interrupt 416 Priority"
line.long 0x4 "IPR105,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_423 ,Interrupt 423 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_422 ,Interrupt 422 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_421 ,Interrupt 421 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_420 ,Interrupt 420 Priority"
line.long 0x8 "IPR106,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_427 ,Interrupt 427 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_426 ,Interrupt 426 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_425 ,Interrupt 425 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_424 ,Interrupt 424 Priority"
line.long 0xC "IPR107,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_431 ,Interrupt 431 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_430 ,Interrupt 430 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_429 ,Interrupt 429 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_428 ,Interrupt 428 Priority"
line.long 0x10 "IPR108,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_435 ,Interrupt 435 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_434 ,Interrupt 434 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_433 ,Interrupt 433 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_432 ,Interrupt 432 Priority"
line.long 0x14 "IPR109,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_439 ,Interrupt 439 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_438 ,Interrupt 438 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_437 ,Interrupt 437 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_436 ,Interrupt 436 Priority"
line.long 0x18 "IPR110,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_443 ,Interrupt 443 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_442 ,Interrupt 442 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_441 ,Interrupt 441 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_440 ,Interrupt 440 Priority"
line.long 0x1C "IPR111,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_447 ,Interrupt 447 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_446 ,Interrupt 446 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_445 ,Interrupt 445 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_444 ,Interrupt 444 Priority"
else
hgroup.long 0x5A0++0x1F
hide.long 0x0 "IPR104,Interrupt Priority Register"
hide.long 0x4 "IPR105,Interrupt Priority Register"
hide.long 0x8 "IPR106,Interrupt Priority Register"
hide.long 0xC "IPR107,Interrupt Priority Register"
hide.long 0x10 "IPR108,Interrupt Priority Register"
hide.long 0x14 "IPR109,Interrupt Priority Register"
hide.long 0x18 "IPR110,Interrupt Priority Register"
hide.long 0x1C "IPR111,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
group.long 0x5C0++0x1F
line.long 0x0 "IPR112,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_451 ,Interrupt 451 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_450 ,Interrupt 450 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_449 ,Interrupt 449 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_448 ,Interrupt 448 Priority"
line.long 0x4 "IPR113,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_455 ,Interrupt 455 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_454 ,Interrupt 454 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_453 ,Interrupt 453 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_452 ,Interrupt 452 Priority"
line.long 0x8 "IPR114,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_459 ,Interrupt 459 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_458 ,Interrupt 458 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_457 ,Interrupt 457 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_456 ,Interrupt 456 Priority"
line.long 0xC "IPR115,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_463 ,Interrupt 463 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_462 ,Interrupt 462 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_461 ,Interrupt 461 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_460 ,Interrupt 460 Priority"
line.long 0x10 "IPR116,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_467 ,Interrupt 467 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_466 ,Interrupt 466 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_465 ,Interrupt 465 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_464 ,Interrupt 464 Priority"
line.long 0x14 "IPR117,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_471 ,Interrupt 471 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_470 ,Interrupt 470 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_469 ,Interrupt 469 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_468 ,Interrupt 468 Priority"
line.long 0x18 "IPR118,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_475 ,Interrupt 475 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_474 ,Interrupt 474 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_473 ,Interrupt 473 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_472 ,Interrupt 472 Priority"
line.long 0x1C "IPR119,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_479 ,Interrupt 479 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_478 ,Interrupt 478 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_477 ,Interrupt 477 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_476 ,Interrupt 476 Priority"
else
hgroup.long 0x5C0++0x1F
hide.long 0x0 "IPR112,Interrupt Priority Register"
hide.long 0x4 "IPR113,Interrupt Priority Register"
hide.long 0x8 "IPR114,Interrupt Priority Register"
hide.long 0xC "IPR115,Interrupt Priority Register"
hide.long 0x10 "IPR116,Interrupt Priority Register"
hide.long 0x14 "IPR117,Interrupt Priority Register"
hide.long 0x18 "IPR118,Interrupt Priority Register"
hide.long 0x1C "IPR119,Interrupt Priority Register"
endif
tree.end
width 0x0b
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
sif (CORENAME()=="CORTEXM33F")
tree "Floating-point Unit (FPU)"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 8.
group.long 0xF34++0x0B
line.long 0x00 "FPCCR,Floating-Point Context Control Register"
bitfld.long 0x00 31. " ASPEN ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled"
bitfld.long 0x00 30. " LSPEN ,Enables lazy context save of FP state" "Disabled,Enabled"
bitfld.long 0x00 29. " LSPENS ,This bit controls whether the LSPEN bit is writeable from the Non-secure state" "Writeable,Write ignored"
newline
bitfld.long 0x00 28. " CLRONRET ,Clear floating point caller saved registers on exception return" "Disabled,Enabled"
bitfld.long 0x00 27. " CLRONRETS ,Clear on return Secure only" "Both states,Secure only"
bitfld.long 0x00 26. " TS ,Treat as Secure" "Disabled,Enabled"
newline
bitfld.long 0x00 10. " UFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the UsageFault exception to pending" "Not able,Able"
bitfld.long 0x00 9. " SPLIMVIOL ,Indicates whether the FP context violates the stack pointer limit that was active when lazy state preservation was activated" "Low,High"
bitfld.long 0x00 8. " MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able"
newline
bitfld.long 0x00 7. " SFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the SecureFault exception to pending" "Not able,Able"
bitfld.long 0x00 6. " BFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able"
bitfld.long 0x00 5. " MMRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able"
newline
bitfld.long 0x00 4. " HFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able"
bitfld.long 0x00 3. " THREAD ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread"
bitfld.long 0x00 2. " S ,Indicates the FP context belongs to the specified security state" "Non-secure,Secure"
newline
bitfld.long 0x00 1. " USER ,Indicates the privilege level of the software executing" "Privileged,Unprivileged"
bitfld.long 0x00 0. " LSPACT ,Indicates whether Lazy preservation of the FP state is active" "Not active,Active"
line.long 0x04 "FPCAR,Floating-Point Context Address Register"
hexmask.long 0x04 3.--31. 0x8 " ADDRESS ,The location of the unpopulated floating-point register space allocated on an exception stack frame"
line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register"
bitfld.long 0x08 26. " AHP ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative"
bitfld.long 0x08 25. " DN ,Default value for FPSCR.DN" "NaN operands,Any operation"
bitfld.long 0x08 24. " FZ ,Default value for FPSCR.FZ" "No Flush mode,Flush mode"
newline
bitfld.long 0x08 22.--23. " RMODE ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero"
rgroup.long 0xF40++0x0B
line.long 0x00 "MVFR0,Media and FP Feature Register 0"
bitfld.long 0x00 28.--31. " FPRNDMOD ,Indicates the rounding modes supported by the FP floating-point hardware" ",All supported,?..."
bitfld.long 0x00 20.--23. " SQRROOT ,Indicates the hardware support for FP square root operations" ",Supported,?..."
bitfld.long 0x00 16.--19. " DIV ,Indicates the hardware support for FP divide operations" ",Supported,?..."
newline
bitfld.long 0x00 8.--11. " DBLPREC ,Indicates the hardware support for FP double_precision operations" "Not supported,,Supported,?..."
bitfld.long 0x00 4.--7. " SNGLPREC ,Indicates the hardware support for FP single-precision operations" ",,Supported,?..."
bitfld.long 0x00 0.--3. " A_SIMD ,Indicates the size of the FP register bank" ",Supported-16x64-bit,?..."
line.long 0x04 "MVFR1,Media and FP Feature Register 1"
bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" ",Supported,?..."
bitfld.long 0x04 24.--27. " FP_HPFP ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" ",Half-single,Half-single and half-double,?..."
newline
bitfld.long 0x04 4.--7. " D_NAN ,Indicates whether the FP hardware implementation supports only the Default NaN mode" ",NaN propagation,?..."
bitfld.long 0x04 0.--3. " FTZ_MODE ,Indicates whether the FP hardware implementation supports only the Flush-to-Zero mode of operation" ",Fully denormalized,?..."
line.long 0x08 "MVFR2,Media and FP Feature Register 2"
bitfld.long 0x08 4.--7. " VFP_MISC ,Indicates the hardware support for FP miscellaneous features" "Not supported,,,,Supported,?..."
width 0xB
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
endif
tree "Debug"
tree "Core Debug"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 13.
group.long 0xD30++0x03
line.long 0x00 "DFSR,Debug Fault Status Register"
eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated"
eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered"
eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated"
newline
eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated"
eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated"
newline
hgroup.long 0xDF0++0x03
hide.long 0x00 "DHCSR,Debug Halting Control and Status Register"
in
newline
wgroup.long 0xDF4++0x03
line.long 0x00 "DCRSR,Debug Core Register Selector Register"
bitfld.long 0x00 16. " REGWNR ,Specifies the access type for the transfer" "Read,Write"
hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register, special-purpose register or Floating-point extension register"
group.long 0xDF8++0x03
line.long 0x00 "DCRDR,Debug Core Register Data Register"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000)
group.long 0xDFC++0x03
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
bitfld.long 0x00 20. " SDME ,Indicates whether the DebugMonitor targets the Secure or the Non-secure state" "Non-secure,Secure"
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step"
newline
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
bitfld.long 0x00 11. " VC_SFERR ,SecureFault vector catch enable" "Disabled,Enabled"
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
newline
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled"
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled"
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled"
newline
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
else
group.long 0xDFC++0x03
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
bitfld.long 0x00 20. " SDME ,Indicates whether the DebugMonitor targets the Secure or the Non-secure state" "Non-secure,Secure"
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
newline
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
bitfld.long 0x00 11. " VC_SFERR ,SecureFault vector catch enable" "Disabled,Enabled"
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
newline
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled"
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled"
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled"
newline
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
endif
newline
group.long 0xE04++0x07
line.long 0x00 "DAUTHCTRL,Debug Authentication Control Register"
bitfld.long 0x00 3. " INTSPNIDEN ,Internal secure non-invasive debug enable" "Disabled,Enabled"
bitfld.long 0x00 2. " SPNIDENSEL ,Secure non-invasive debug enable select.Selects between DAUTHCTRL and the IMPLEMENTATION DEFINED external authentication interface for control of Secure non-invasive debug" "Ext. auth. interface,DAUTHCTRL.INTSPNIDEN"
bitfld.long 0x00 1. " INTSPIDEN ,Internal secure invasive debug enable" "Disabled,Enabled"
bitfld.long 0x00 0. " SPIDENSEL ,Secure invasive debug enable select. Selects between DAUTHCTRL and the IMPLEMENTATION DEFINED external authentication interface for control of Secure invasive debug" "Ext. auth. interface,DAUTHCTRL.INTSPIDEN"
line.long 0x04 "DSCSR,Debug Security Control and Status Register"
bitfld.long 0x04 16. " CDS ,This field indicates the current security state of the processor" "Non-secure,Secure"
bitfld.long 0x04 1. " SBRSEL ,Secure banked register select" "Non-secure,Secure"
bitfld.long 0x04 0. " SBRSELEN ,Secure banked register select enable" "Disabled,Enabled"
rgroup.long 0xFB8++0x03
line.long 0x00 "DAUTHSTATUS,Debug Authentication Status Register"
bitfld.long 0x00 7. " SNI ,Secure non-invasive debug implemented" ",Implemented"
bitfld.long 0x00 6. " SNE ,Secure non-invasive debug enabled" "0,1"
bitfld.long 0x00 5. " SI ,Secure invasive debug features implemented" ",Implemented"
bitfld.long 0x00 4. " SE ,Secure invasive debug enabled" "0,1"
newline
bitfld.long 0x00 3. " NSNI ,Non-secure non-invasive debug features implemented" ",Implemented"
bitfld.long 0x00 2. " NSNE ,Non-secure non-invasive debug enabled" "0,1"
bitfld.long 0x00 1. " NSI ,Non-secure invasive debug features implemented" ",Implemented"
bitfld.long 0x00 0. " NSE ,Non-secure invasive debug enabled" "0,1"
width 0x0B
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
tree "Flash Patch and Breakpoint Unit (FPB)"
sif COMPonent.AVAILABLE("FPB")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))
width 12.
group.long 0x00++0x03
line.long 0x00 "FP_CTRL,Flash Patch Control Register"
bitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Reserved,Version 2,?..."
rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,?..."
rbitfld.long 0x00 8.--11. " NUM_LIT ,Number of literal comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 1. " KEY ,Key Field" "Low,High"
bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled"
textline " "
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x04))&0x20000000)==0x20000000)
rgroup.long 0x04++0x03
line.long 0x00 "FP_REMAP,Flash Patch Remap Register"
bitfld.long 0x00 29. " RMPSPT ,Indicates whether the FPB unit supports Flash Patch remap" "Not supported,Supported"
hexmask.long 0x00 5.--28. 0x20 " REMAP ,Remap address"
else
rgroup.long 0x04++0x03
line.long 0x00 "FP_REMAP,Flash Patch Remap Register"
bitfld.long 0x00 29. " RMPSPT ,Indicates whether the FPB unit supports Flash Patch remap" "Not supported,Supported"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00)
group.long 0x8++0x03
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x8++0x03
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00)
group.long 0xC++0x03
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0xC++0x03
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00)
group.long 0x10++0x03
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x10++0x03
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00)
group.long 0x14++0x03
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x14++0x03
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x18))&0x01)==0x00)
group.long 0x18++0x03
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x18++0x03
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x1C))&0x01)==0x00)
group.long 0x1C++0x03
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x1C++0x03
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x20))&0x01)==0x00)
group.long 0x20++0x03
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x20++0x03
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x24))&0x01)==0x00)
group.long 0x24++0x03
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x24++0x03
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
tree "CoreSight Identification Registers"
width 12.
rgroup.long 0xFCC++0x03
line.long 0x00 "FP_DEVTYPE,FPB CoreSight Device Type Register"
hexmask.long.byte 0x00 4.--7. 1. " SUB ,Sub-type"
hexmask.long.byte 0x00 0.--3. 1. " MAJOR ,Major type"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xFBC))&0x100000)==0x100000)
rgroup.long 0xFBC++0x03
line.long 0x00 "FP_DEVARCH,FPB CoreSight Device Architecture Register"
hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect"
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part"
else
rgroup.long 0xFBC++0x03
line.long 0x00 "FP_DEVARCH,FPB CoreSight Device Architecture Register"
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
endif
rgroup.long 0xFE0++0x0F
line.long 0x00 "FP_PIDR0,Peripheral ID0"
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
line.long 0x04 "FP_PIDR1,Peripheral ID1"
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
line.long 0x08 "FP_PIDR2,Peripheral ID2"
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
line.long 0x0C "FP_PIDR3,Peripheral ID3"
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
rgroup.long 0xFD0++0x03
line.long 0x00 "FP_PIDR4,Peripheral Identification Register 4"
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
rgroup.long 0xFF0++0x0F
line.long 0x00 "FP_CIDR0,Component ID0 (Preamble)"
hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble"
line.long 0x04 "FP_CIDR1,Component ID1"
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class"
line.long 0x08 "FP_CIDR2,Component ID2"
hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble"
line.long 0x0c "FP_CIDR3,Component ID3"
hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble"
tree.end
width 0x0b
else
newline
textline "FPB component base address not specified"
newline
endif
tree.end
tree "Data Watchpoint and Trace Unit (DWT)"
sif COMPonent.AVAILABLE("DWT")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
width 16.
group.long 0x00++0x03
line.long 0x00 "DWT_CTRL,Control Register"
rbitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,?..."
rbitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported"
rbitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported"
textline " "
rbitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported"
bitfld.long 0x00 23. " CYCDISS ,Controls whether the cycle counter is prevented from incrementing while the PE is in Secure state" "No,Yes"
bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled"
textline " "
bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled"
bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled"
bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled"
textline " "
bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled"
bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled"
bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled"
textline " "
bitfld.long 0x00 12. " PCSAMPLENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled"
bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]"
bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]"
textline " "
bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled"
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)))&0x1000000)==0x0000000)
group.long 0x04++0x03
line.long 0x00 "DWT_CYCCNT,Cycle Count register"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)))&0x2000000)==0x0000000)
group.long 0x08++0x17
line.long 0x00 "DWT_CPICNT,CPI Count register"
hexmask.long.byte 0x00 0.--7. 1. " CPICNT ,Base instruction overhead counter"
line.long 0x04 "DWT_EXCCNT,Exception Overhead Count Register"
hexmask.long.byte 0x04 0.--7. 1. " EXCCNT ,The exception overhead counter"
line.long 0x08 "DWT_SLEEPCNT,Sleep Count Register"
hexmask.long.byte 0x08 0.--7. 1. " SLEEPCNT ,Sleep Counter"
line.long 0x10 "DWT_LSUCNT,LSU Count Register"
hexmask.long.byte 0x10 0.--7. 1. " LSUCNT ,Load-store overhead counter"
line.long 0x14 "DWT_FOLDCNT,Folded-instruction Count register"
hexmask.long.byte 0x14 0.--7. 1. " FOLDCNT ,Folded-instruction counter"
endif
rgroup.long 0x1C++0x03
line.long 0x00 "DWT_PCSR,Program Counter Sample register"
textline " "
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)==0x1)
group.long 0x20++0x03
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0x4)
group.long 0x20++0x03
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0xC)
group.long 0x20++0x03
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0xF)
group.long 0x20++0x03
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
else
group.long 0x20++0x03
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
endif
group.long (0x20+0x08)++0x03
line.long 0x00 "DWT_FUNCTION0,DWT Function Register 0"
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
textline " "
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved"
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)==0x1)
group.long 0x30++0x03
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0x4)
group.long 0x30++0x03
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0xC)
group.long 0x30++0x03
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0xF)
group.long 0x30++0x03
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
else
group.long 0x30++0x03
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
endif
group.long (0x30+0x08)++0x03
line.long 0x00 "DWT_FUNCTION1,DWT Function Register 1"
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
textline " "
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved"
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)==0x1)
group.long 0x40++0x03
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0x4)
group.long 0x40++0x03
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0xC)
group.long 0x40++0x03
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0xF)
group.long 0x40++0x03
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
else
group.long 0x40++0x03
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
endif
group.long (0x40+0x08)++0x03
line.long 0x00 "DWT_FUNCTION2,DWT Function Register 2"
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
textline " "
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved"
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)==0x1)
group.long 0x50++0x03
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0x4)
group.long 0x50++0x03
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0xC)
group.long 0x50++0x03
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0xF)
group.long 0x50++0x03
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
else
group.long 0x50++0x03
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
endif
group.long (0x50+0x08)++0x03
line.long 0x00 "DWT_FUNCTION3,DWT Function Register 3"
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
textline " "
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved"
tree "CoreSight Identification Registers"
width 13.
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xFBC))&0x100000)==0x100000)
rgroup.long 0xFBC++0x03
line.long 0x00 "DWT_DEVARCH,DWT CoreSight Device Architecture Register"
hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect"
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part"
else
rgroup.long 0xFBC++0x03
line.long 0x00 "DWT_DEVARCH,DWT CoreSight Device Architecture Register"
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
endif
rgroup.long 0xFCC++0x03
line.long 0x00 "DWT_DEVTYPE,Device Type Identifier register"
hexmask.long.byte 0x00 4.--7. 1. " SUB ,Sub-type"
hexmask.long.byte 0x00 0.--3. 1. " MAJOR ,Major type"
rgroup.long 0xFE0++0x0F
line.long 0x00 "DWT_PIDR0,Peripheral ID0"
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
line.long 0x04 "DWT_PIDR1,Peripheral ID1"
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
line.long 0x08 "DWT_PIDR2,Peripheral ID2"
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
line.long 0x0c "DWT_PIDR3,Peripheral ID3"
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
rgroup.long 0xFD0++0x03
line.long 0x00 "DWT_PIDR4,Peripheral Identification Register 4"
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
rgroup.long 0xFF0++0x0F
line.long 0x00 "DWT_CIDR0,Component ID0 (Preamble)"
hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble"
line.long 0x04 "DWT_CIDR1,Component ID1"
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class"
line.long 0x08 "DWT_CIDR2,Component ID2"
hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble"
line.long 0x0c "DWT_CIDR3,Component ID3"
hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble"
tree.end
width 0x0b
else
newline
textline "DWT component base address not specified"
newline
endif
tree.end
tree.end
AUTOINDENT.POP
tree.end
tree "AOI (AND/OR/Invert Module)"
base ad:0x0
tree "AOI0"
base ad:0x40089000
group.word 0x0++0xF
line.word 0x0 "BFCRT010,Boolean Function Term 0 and 1 Configuration for EVENT0"
bitfld.word 0x0 14.--15. "PT0_AC,Product Term 0 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x0 12.--13. "PT0_BC,Product Term 0 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x0 10.--11. "PT0_CC,Product Term 0 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x0 8.--9. "PT0_DC,Product Term 0 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0x0 6.--7. "PT1_AC,Product Term 1 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x0 4.--5. "PT1_BC,Product Term 1 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x0 2.--3. "PT1_CC,Product Term 1 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x0 0.--1. "PT1_DC,Product Term 1 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0x2 "BFCRT230,Boolean Function Term 2 and 3 Configuration for EVENT0"
bitfld.word 0x2 14.--15. "PT2_AC,Product Term 2 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x2 12.--13. "PT2_BC,Product Term 2 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x2 10.--11. "PT2_CC,Product Term 2 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x2 8.--9. "PT2_DC,Product Term 2 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0x2 6.--7. "PT3_AC,Product Term 3 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input to become 1"
bitfld.word 0x2 4.--5. "PT3_BC,Product Term 3 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x2 2.--3. "PT3_CC,Product Term 3 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x2 0.--1. "PT3_DC,Product Term 3 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0x4 "BFCRT011,Boolean Function Term 0 and 1 Configuration for EVENT1"
bitfld.word 0x4 14.--15. "PT0_AC,Product Term 0 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x4 12.--13. "PT0_BC,Product Term 0 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x4 10.--11. "PT0_CC,Product Term 0 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x4 8.--9. "PT0_DC,Product Term 0 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0x4 6.--7. "PT1_AC,Product Term 1 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x4 4.--5. "PT1_BC,Product Term 1 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x4 2.--3. "PT1_CC,Product Term 1 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x4 0.--1. "PT1_DC,Product Term 1 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0x6 "BFCRT231,Boolean Function Term 2 and 3 Configuration for EVENT1"
bitfld.word 0x6 14.--15. "PT2_AC,Product Term 2 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x6 12.--13. "PT2_BC,Product Term 2 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x6 10.--11. "PT2_CC,Product Term 2 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x6 8.--9. "PT2_DC,Product Term 2 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0x6 6.--7. "PT3_AC,Product Term 3 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input to become 1"
bitfld.word 0x6 4.--5. "PT3_BC,Product Term 3 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x6 2.--3. "PT3_CC,Product Term 3 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x6 0.--1. "PT3_DC,Product Term 3 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0x8 "BFCRT012,Boolean Function Term 0 and 1 Configuration for EVENT2"
bitfld.word 0x8 14.--15. "PT0_AC,Product Term 0 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x8 12.--13. "PT0_BC,Product Term 0 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x8 10.--11. "PT0_CC,Product Term 0 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x8 8.--9. "PT0_DC,Product Term 0 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0x8 6.--7. "PT1_AC,Product Term 1 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x8 4.--5. "PT1_BC,Product Term 1 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x8 2.--3. "PT1_CC,Product Term 1 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x8 0.--1. "PT1_DC,Product Term 1 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0xA "BFCRT232,Boolean Function Term 2 and 3 Configuration for EVENT2"
bitfld.word 0xA 14.--15. "PT2_AC,Product Term 2 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0xA 12.--13. "PT2_BC,Product Term 2 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xA 10.--11. "PT2_CC,Product Term 2 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xA 8.--9. "PT2_DC,Product Term 2 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0xA 6.--7. "PT3_AC,Product Term 3 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input to become 1"
bitfld.word 0xA 4.--5. "PT3_BC,Product Term 3 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xA 2.--3. "PT3_CC,Product Term 3 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xA 0.--1. "PT3_DC,Product Term 3 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0xC "BFCRT013,Boolean Function Term 0 and 1 Configuration for EVENT3"
bitfld.word 0xC 14.--15. "PT0_AC,Product Term 0 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0xC 12.--13. "PT0_BC,Product Term 0 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xC 10.--11. "PT0_CC,Product Term 0 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xC 8.--9. "PT0_DC,Product Term 0 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0xC 6.--7. "PT1_AC,Product Term 1 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0xC 4.--5. "PT1_BC,Product Term 1 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xC 2.--3. "PT1_CC,Product Term 1 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xC 0.--1. "PT1_DC,Product Term 1 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0xE "BFCRT233,Boolean Function Term 2 and 3 Configuration for EVENT3"
bitfld.word 0xE 14.--15. "PT2_AC,Product Term 2 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0xE 12.--13. "PT2_BC,Product Term 2 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xE 10.--11. "PT2_CC,Product Term 2 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xE 8.--9. "PT2_DC,Product Term 2 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0xE 6.--7. "PT3_AC,Product Term 3 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input to become 1"
bitfld.word 0xE 4.--5. "PT3_BC,Product Term 3 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xE 2.--3. "PT3_CC,Product Term 3 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xE 0.--1. "PT3_DC,Product Term 3 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
tree.end
sif (cpuis("MC?A144*"))
tree "AOI1"
base ad:0x40097000
group.word 0x0++0xF
line.word 0x0 "BFCRT010,Boolean Function Term 0 and 1 Configuration for EVENT0"
bitfld.word 0x0 14.--15. "PT0_AC,Product Term 0 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x0 12.--13. "PT0_BC,Product Term 0 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x0 10.--11. "PT0_CC,Product Term 0 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x0 8.--9. "PT0_DC,Product Term 0 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0x0 6.--7. "PT1_AC,Product Term 1 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x0 4.--5. "PT1_BC,Product Term 1 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x0 2.--3. "PT1_CC,Product Term 1 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x0 0.--1. "PT1_DC,Product Term 1 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0x2 "BFCRT230,Boolean Function Term 2 and 3 Configuration for EVENT0"
bitfld.word 0x2 14.--15. "PT2_AC,Product Term 2 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x2 12.--13. "PT2_BC,Product Term 2 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x2 10.--11. "PT2_CC,Product Term 2 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x2 8.--9. "PT2_DC,Product Term 2 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0x2 6.--7. "PT3_AC,Product Term 3 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input to become 1"
bitfld.word 0x2 4.--5. "PT3_BC,Product Term 3 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x2 2.--3. "PT3_CC,Product Term 3 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x2 0.--1. "PT3_DC,Product Term 3 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0x4 "BFCRT011,Boolean Function Term 0 and 1 Configuration for EVENT1"
bitfld.word 0x4 14.--15. "PT0_AC,Product Term 0 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x4 12.--13. "PT0_BC,Product Term 0 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x4 10.--11. "PT0_CC,Product Term 0 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x4 8.--9. "PT0_DC,Product Term 0 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0x4 6.--7. "PT1_AC,Product Term 1 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x4 4.--5. "PT1_BC,Product Term 1 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x4 2.--3. "PT1_CC,Product Term 1 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x4 0.--1. "PT1_DC,Product Term 1 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0x6 "BFCRT231,Boolean Function Term 2 and 3 Configuration for EVENT1"
bitfld.word 0x6 14.--15. "PT2_AC,Product Term 2 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x6 12.--13. "PT2_BC,Product Term 2 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x6 10.--11. "PT2_CC,Product Term 2 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x6 8.--9. "PT2_DC,Product Term 2 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0x6 6.--7. "PT3_AC,Product Term 3 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input to become 1"
bitfld.word 0x6 4.--5. "PT3_BC,Product Term 3 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x6 2.--3. "PT3_CC,Product Term 3 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x6 0.--1. "PT3_DC,Product Term 3 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0x8 "BFCRT012,Boolean Function Term 0 and 1 Configuration for EVENT2"
bitfld.word 0x8 14.--15. "PT0_AC,Product Term 0 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x8 12.--13. "PT0_BC,Product Term 0 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x8 10.--11. "PT0_CC,Product Term 0 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x8 8.--9. "PT0_DC,Product Term 0 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0x8 6.--7. "PT1_AC,Product Term 1 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x8 4.--5. "PT1_BC,Product Term 1 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x8 2.--3. "PT1_CC,Product Term 1 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x8 0.--1. "PT1_DC,Product Term 1 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0xA "BFCRT232,Boolean Function Term 2 and 3 Configuration for EVENT2"
bitfld.word 0xA 14.--15. "PT2_AC,Product Term 2 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0xA 12.--13. "PT2_BC,Product Term 2 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xA 10.--11. "PT2_CC,Product Term 2 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xA 8.--9. "PT2_DC,Product Term 2 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0xA 6.--7. "PT3_AC,Product Term 3 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input to become 1"
bitfld.word 0xA 4.--5. "PT3_BC,Product Term 3 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xA 2.--3. "PT3_CC,Product Term 3 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xA 0.--1. "PT3_DC,Product Term 3 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0xC "BFCRT013,Boolean Function Term 0 and 1 Configuration for EVENT3"
bitfld.word 0xC 14.--15. "PT0_AC,Product Term 0 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0xC 12.--13. "PT0_BC,Product Term 0 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xC 10.--11. "PT0_CC,Product Term 0 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xC 8.--9. "PT0_DC,Product Term 0 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0xC 6.--7. "PT1_AC,Product Term 1 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0xC 4.--5. "PT1_BC,Product Term 1 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xC 2.--3. "PT1_CC,Product Term 1 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xC 0.--1. "PT1_DC,Product Term 1 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0xE "BFCRT233,Boolean Function Term 2 and 3 Configuration for EVENT3"
bitfld.word 0xE 14.--15. "PT2_AC,Product Term 2 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0xE 12.--13. "PT2_BC,Product Term 2 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xE 10.--11. "PT2_CC,Product Term 2 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xE 8.--9. "PT2_DC,Product Term 2 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0xE 6.--7. "PT3_AC,Product Term 3 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input to become 1"
bitfld.word 0xE 4.--5. "PT3_BC,Product Term 3 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xE 2.--3. "PT3_CC,Product Term 3 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xE 0.--1. "PT3_DC,Product Term 3 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
tree.end
endif
sif (cpuis("MC?A145*"))
tree "AOI1"
base ad:0x40097000
group.word 0x0++0xF
line.word 0x0 "BFCRT010,Boolean Function Term 0 and 1 Configuration for EVENT0"
bitfld.word 0x0 14.--15. "PT0_AC,Product Term 0 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x0 12.--13. "PT0_BC,Product Term 0 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x0 10.--11. "PT0_CC,Product Term 0 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x0 8.--9. "PT0_DC,Product Term 0 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0x0 6.--7. "PT1_AC,Product Term 1 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x0 4.--5. "PT1_BC,Product Term 1 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x0 2.--3. "PT1_CC,Product Term 1 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x0 0.--1. "PT1_DC,Product Term 1 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0x2 "BFCRT230,Boolean Function Term 2 and 3 Configuration for EVENT0"
bitfld.word 0x2 14.--15. "PT2_AC,Product Term 2 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x2 12.--13. "PT2_BC,Product Term 2 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x2 10.--11. "PT2_CC,Product Term 2 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x2 8.--9. "PT2_DC,Product Term 2 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0x2 6.--7. "PT3_AC,Product Term 3 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input to become 1"
bitfld.word 0x2 4.--5. "PT3_BC,Product Term 3 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x2 2.--3. "PT3_CC,Product Term 3 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x2 0.--1. "PT3_DC,Product Term 3 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0x4 "BFCRT011,Boolean Function Term 0 and 1 Configuration for EVENT1"
bitfld.word 0x4 14.--15. "PT0_AC,Product Term 0 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x4 12.--13. "PT0_BC,Product Term 0 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x4 10.--11. "PT0_CC,Product Term 0 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x4 8.--9. "PT0_DC,Product Term 0 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0x4 6.--7. "PT1_AC,Product Term 1 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x4 4.--5. "PT1_BC,Product Term 1 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x4 2.--3. "PT1_CC,Product Term 1 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x4 0.--1. "PT1_DC,Product Term 1 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0x6 "BFCRT231,Boolean Function Term 2 and 3 Configuration for EVENT1"
bitfld.word 0x6 14.--15. "PT2_AC,Product Term 2 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x6 12.--13. "PT2_BC,Product Term 2 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x6 10.--11. "PT2_CC,Product Term 2 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x6 8.--9. "PT2_DC,Product Term 2 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0x6 6.--7. "PT3_AC,Product Term 3 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input to become 1"
bitfld.word 0x6 4.--5. "PT3_BC,Product Term 3 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x6 2.--3. "PT3_CC,Product Term 3 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x6 0.--1. "PT3_DC,Product Term 3 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0x8 "BFCRT012,Boolean Function Term 0 and 1 Configuration for EVENT2"
bitfld.word 0x8 14.--15. "PT0_AC,Product Term 0 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x8 12.--13. "PT0_BC,Product Term 0 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x8 10.--11. "PT0_CC,Product Term 0 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x8 8.--9. "PT0_DC,Product Term 0 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0x8 6.--7. "PT1_AC,Product Term 1 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x8 4.--5. "PT1_BC,Product Term 1 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x8 2.--3. "PT1_CC,Product Term 1 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x8 0.--1. "PT1_DC,Product Term 1 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0xA "BFCRT232,Boolean Function Term 2 and 3 Configuration for EVENT2"
bitfld.word 0xA 14.--15. "PT2_AC,Product Term 2 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0xA 12.--13. "PT2_BC,Product Term 2 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xA 10.--11. "PT2_CC,Product Term 2 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xA 8.--9. "PT2_DC,Product Term 2 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0xA 6.--7. "PT3_AC,Product Term 3 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input to become 1"
bitfld.word 0xA 4.--5. "PT3_BC,Product Term 3 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xA 2.--3. "PT3_CC,Product Term 3 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xA 0.--1. "PT3_DC,Product Term 3 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0xC "BFCRT013,Boolean Function Term 0 and 1 Configuration for EVENT3"
bitfld.word 0xC 14.--15. "PT0_AC,Product Term 0 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0xC 12.--13. "PT0_BC,Product Term 0 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xC 10.--11. "PT0_CC,Product Term 0 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xC 8.--9. "PT0_DC,Product Term 0 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0xC 6.--7. "PT1_AC,Product Term 1 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0xC 4.--5. "PT1_BC,Product Term 1 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xC 2.--3. "PT1_CC,Product Term 1 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xC 0.--1. "PT1_DC,Product Term 1 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0xE "BFCRT233,Boolean Function Term 2 and 3 Configuration for EVENT3"
bitfld.word 0xE 14.--15. "PT2_AC,Product Term 2 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0xE 12.--13. "PT2_BC,Product Term 2 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xE 10.--11. "PT2_CC,Product Term 2 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xE 8.--9. "PT2_DC,Product Term 2 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0xE 6.--7. "PT3_AC,Product Term 3 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input to become 1"
bitfld.word 0xE 4.--5. "PT3_BC,Product Term 3 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xE 2.--3. "PT3_CC,Product Term 3 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xE 0.--1. "PT3_DC,Product Term 3 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
tree.end
endif
sif (cpuis("MC?A146*"))
tree "AOI1"
base ad:0x40097000
group.word 0x0++0xF
line.word 0x0 "BFCRT010,Boolean Function Term 0 and 1 Configuration for EVENT0"
bitfld.word 0x0 14.--15. "PT0_AC,Product Term 0 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x0 12.--13. "PT0_BC,Product Term 0 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x0 10.--11. "PT0_CC,Product Term 0 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x0 8.--9. "PT0_DC,Product Term 0 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0x0 6.--7. "PT1_AC,Product Term 1 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x0 4.--5. "PT1_BC,Product Term 1 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x0 2.--3. "PT1_CC,Product Term 1 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x0 0.--1. "PT1_DC,Product Term 1 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0x2 "BFCRT230,Boolean Function Term 2 and 3 Configuration for EVENT0"
bitfld.word 0x2 14.--15. "PT2_AC,Product Term 2 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x2 12.--13. "PT2_BC,Product Term 2 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x2 10.--11. "PT2_CC,Product Term 2 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x2 8.--9. "PT2_DC,Product Term 2 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0x2 6.--7. "PT3_AC,Product Term 3 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input to become 1"
bitfld.word 0x2 4.--5. "PT3_BC,Product Term 3 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x2 2.--3. "PT3_CC,Product Term 3 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x2 0.--1. "PT3_DC,Product Term 3 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0x4 "BFCRT011,Boolean Function Term 0 and 1 Configuration for EVENT1"
bitfld.word 0x4 14.--15. "PT0_AC,Product Term 0 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x4 12.--13. "PT0_BC,Product Term 0 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x4 10.--11. "PT0_CC,Product Term 0 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x4 8.--9. "PT0_DC,Product Term 0 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0x4 6.--7. "PT1_AC,Product Term 1 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x4 4.--5. "PT1_BC,Product Term 1 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x4 2.--3. "PT1_CC,Product Term 1 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x4 0.--1. "PT1_DC,Product Term 1 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0x6 "BFCRT231,Boolean Function Term 2 and 3 Configuration for EVENT1"
bitfld.word 0x6 14.--15. "PT2_AC,Product Term 2 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x6 12.--13. "PT2_BC,Product Term 2 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x6 10.--11. "PT2_CC,Product Term 2 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x6 8.--9. "PT2_DC,Product Term 2 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0x6 6.--7. "PT3_AC,Product Term 3 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input to become 1"
bitfld.word 0x6 4.--5. "PT3_BC,Product Term 3 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x6 2.--3. "PT3_CC,Product Term 3 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x6 0.--1. "PT3_DC,Product Term 3 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0x8 "BFCRT012,Boolean Function Term 0 and 1 Configuration for EVENT2"
bitfld.word 0x8 14.--15. "PT0_AC,Product Term 0 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x8 12.--13. "PT0_BC,Product Term 0 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x8 10.--11. "PT0_CC,Product Term 0 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x8 8.--9. "PT0_DC,Product Term 0 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0x8 6.--7. "PT1_AC,Product Term 1 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x8 4.--5. "PT1_BC,Product Term 1 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x8 2.--3. "PT1_CC,Product Term 1 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x8 0.--1. "PT1_DC,Product Term 1 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0xA "BFCRT232,Boolean Function Term 2 and 3 Configuration for EVENT2"
bitfld.word 0xA 14.--15. "PT2_AC,Product Term 2 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0xA 12.--13. "PT2_BC,Product Term 2 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xA 10.--11. "PT2_CC,Product Term 2 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xA 8.--9. "PT2_DC,Product Term 2 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0xA 6.--7. "PT3_AC,Product Term 3 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input to become 1"
bitfld.word 0xA 4.--5. "PT3_BC,Product Term 3 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xA 2.--3. "PT3_CC,Product Term 3 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xA 0.--1. "PT3_DC,Product Term 3 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0xC "BFCRT013,Boolean Function Term 0 and 1 Configuration for EVENT3"
bitfld.word 0xC 14.--15. "PT0_AC,Product Term 0 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0xC 12.--13. "PT0_BC,Product Term 0 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xC 10.--11. "PT0_CC,Product Term 0 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xC 8.--9. "PT0_DC,Product Term 0 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0xC 6.--7. "PT1_AC,Product Term 1 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0xC 4.--5. "PT1_BC,Product Term 1 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xC 2.--3. "PT1_CC,Product Term 1 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xC 0.--1. "PT1_DC,Product Term 1 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0xE "BFCRT233,Boolean Function Term 2 and 3 Configuration for EVENT3"
bitfld.word 0xE 14.--15. "PT2_AC,Product Term 2 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0xE 12.--13. "PT2_BC,Product Term 2 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xE 10.--11. "PT2_CC,Product Term 2 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xE 8.--9. "PT2_DC,Product Term 2 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0xE 6.--7. "PT3_AC,Product Term 3 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input to become 1"
bitfld.word 0xE 4.--5. "PT3_BC,Product Term 3 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xE 2.--3. "PT3_CC,Product Term 3 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xE 0.--1. "PT3_DC,Product Term 3 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
tree.end
endif
sif (cpuis("MC?A154*"))
tree "AOI1"
base ad:0x40097000
group.word 0x0++0xF
line.word 0x0 "BFCRT010,Boolean Function Term 0 and 1 Configuration for EVENT0"
bitfld.word 0x0 14.--15. "PT0_AC,Product Term 0 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x0 12.--13. "PT0_BC,Product Term 0 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x0 10.--11. "PT0_CC,Product Term 0 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x0 8.--9. "PT0_DC,Product Term 0 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0x0 6.--7. "PT1_AC,Product Term 1 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x0 4.--5. "PT1_BC,Product Term 1 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x0 2.--3. "PT1_CC,Product Term 1 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x0 0.--1. "PT1_DC,Product Term 1 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0x2 "BFCRT230,Boolean Function Term 2 and 3 Configuration for EVENT0"
bitfld.word 0x2 14.--15. "PT2_AC,Product Term 2 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x2 12.--13. "PT2_BC,Product Term 2 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x2 10.--11. "PT2_CC,Product Term 2 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x2 8.--9. "PT2_DC,Product Term 2 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0x2 6.--7. "PT3_AC,Product Term 3 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input to become 1"
bitfld.word 0x2 4.--5. "PT3_BC,Product Term 3 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x2 2.--3. "PT3_CC,Product Term 3 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x2 0.--1. "PT3_DC,Product Term 3 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0x4 "BFCRT011,Boolean Function Term 0 and 1 Configuration for EVENT1"
bitfld.word 0x4 14.--15. "PT0_AC,Product Term 0 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x4 12.--13. "PT0_BC,Product Term 0 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x4 10.--11. "PT0_CC,Product Term 0 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x4 8.--9. "PT0_DC,Product Term 0 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0x4 6.--7. "PT1_AC,Product Term 1 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x4 4.--5. "PT1_BC,Product Term 1 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x4 2.--3. "PT1_CC,Product Term 1 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x4 0.--1. "PT1_DC,Product Term 1 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0x6 "BFCRT231,Boolean Function Term 2 and 3 Configuration for EVENT1"
bitfld.word 0x6 14.--15. "PT2_AC,Product Term 2 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x6 12.--13. "PT2_BC,Product Term 2 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x6 10.--11. "PT2_CC,Product Term 2 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x6 8.--9. "PT2_DC,Product Term 2 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0x6 6.--7. "PT3_AC,Product Term 3 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input to become 1"
bitfld.word 0x6 4.--5. "PT3_BC,Product Term 3 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x6 2.--3. "PT3_CC,Product Term 3 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x6 0.--1. "PT3_DC,Product Term 3 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0x8 "BFCRT012,Boolean Function Term 0 and 1 Configuration for EVENT2"
bitfld.word 0x8 14.--15. "PT0_AC,Product Term 0 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x8 12.--13. "PT0_BC,Product Term 0 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x8 10.--11. "PT0_CC,Product Term 0 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x8 8.--9. "PT0_DC,Product Term 0 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0x8 6.--7. "PT1_AC,Product Term 1 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x8 4.--5. "PT1_BC,Product Term 1 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x8 2.--3. "PT1_CC,Product Term 1 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x8 0.--1. "PT1_DC,Product Term 1 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0xA "BFCRT232,Boolean Function Term 2 and 3 Configuration for EVENT2"
bitfld.word 0xA 14.--15. "PT2_AC,Product Term 2 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0xA 12.--13. "PT2_BC,Product Term 2 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xA 10.--11. "PT2_CC,Product Term 2 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xA 8.--9. "PT2_DC,Product Term 2 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0xA 6.--7. "PT3_AC,Product Term 3 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input to become 1"
bitfld.word 0xA 4.--5. "PT3_BC,Product Term 3 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xA 2.--3. "PT3_CC,Product Term 3 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xA 0.--1. "PT3_DC,Product Term 3 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0xC "BFCRT013,Boolean Function Term 0 and 1 Configuration for EVENT3"
bitfld.word 0xC 14.--15. "PT0_AC,Product Term 0 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0xC 12.--13. "PT0_BC,Product Term 0 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xC 10.--11. "PT0_CC,Product Term 0 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xC 8.--9. "PT0_DC,Product Term 0 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0xC 6.--7. "PT1_AC,Product Term 1 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0xC 4.--5. "PT1_BC,Product Term 1 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xC 2.--3. "PT1_CC,Product Term 1 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xC 0.--1. "PT1_DC,Product Term 1 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0xE "BFCRT233,Boolean Function Term 2 and 3 Configuration for EVENT3"
bitfld.word 0xE 14.--15. "PT2_AC,Product Term 2 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0xE 12.--13. "PT2_BC,Product Term 2 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xE 10.--11. "PT2_CC,Product Term 2 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xE 8.--9. "PT2_DC,Product Term 2 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0xE 6.--7. "PT3_AC,Product Term 3 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input to become 1"
bitfld.word 0xE 4.--5. "PT3_BC,Product Term 3 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xE 2.--3. "PT3_CC,Product Term 3 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xE 0.--1. "PT3_DC,Product Term 3 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
tree.end
endif
sif (cpuis("MC?A155*"))
tree "AOI1"
base ad:0x40097000
group.word 0x0++0xF
line.word 0x0 "BFCRT010,Boolean Function Term 0 and 1 Configuration for EVENT0"
bitfld.word 0x0 14.--15. "PT0_AC,Product Term 0 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x0 12.--13. "PT0_BC,Product Term 0 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x0 10.--11. "PT0_CC,Product Term 0 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x0 8.--9. "PT0_DC,Product Term 0 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0x0 6.--7. "PT1_AC,Product Term 1 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x0 4.--5. "PT1_BC,Product Term 1 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x0 2.--3. "PT1_CC,Product Term 1 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x0 0.--1. "PT1_DC,Product Term 1 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0x2 "BFCRT230,Boolean Function Term 2 and 3 Configuration for EVENT0"
bitfld.word 0x2 14.--15. "PT2_AC,Product Term 2 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x2 12.--13. "PT2_BC,Product Term 2 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x2 10.--11. "PT2_CC,Product Term 2 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x2 8.--9. "PT2_DC,Product Term 2 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0x2 6.--7. "PT3_AC,Product Term 3 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input to become 1"
bitfld.word 0x2 4.--5. "PT3_BC,Product Term 3 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x2 2.--3. "PT3_CC,Product Term 3 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x2 0.--1. "PT3_DC,Product Term 3 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0x4 "BFCRT011,Boolean Function Term 0 and 1 Configuration for EVENT1"
bitfld.word 0x4 14.--15. "PT0_AC,Product Term 0 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x4 12.--13. "PT0_BC,Product Term 0 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x4 10.--11. "PT0_CC,Product Term 0 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x4 8.--9. "PT0_DC,Product Term 0 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0x4 6.--7. "PT1_AC,Product Term 1 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x4 4.--5. "PT1_BC,Product Term 1 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x4 2.--3. "PT1_CC,Product Term 1 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x4 0.--1. "PT1_DC,Product Term 1 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0x6 "BFCRT231,Boolean Function Term 2 and 3 Configuration for EVENT1"
bitfld.word 0x6 14.--15. "PT2_AC,Product Term 2 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x6 12.--13. "PT2_BC,Product Term 2 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x6 10.--11. "PT2_CC,Product Term 2 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x6 8.--9. "PT2_DC,Product Term 2 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0x6 6.--7. "PT3_AC,Product Term 3 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input to become 1"
bitfld.word 0x6 4.--5. "PT3_BC,Product Term 3 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x6 2.--3. "PT3_CC,Product Term 3 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x6 0.--1. "PT3_DC,Product Term 3 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0x8 "BFCRT012,Boolean Function Term 0 and 1 Configuration for EVENT2"
bitfld.word 0x8 14.--15. "PT0_AC,Product Term 0 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x8 12.--13. "PT0_BC,Product Term 0 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x8 10.--11. "PT0_CC,Product Term 0 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x8 8.--9. "PT0_DC,Product Term 0 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0x8 6.--7. "PT1_AC,Product Term 1 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x8 4.--5. "PT1_BC,Product Term 1 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x8 2.--3. "PT1_CC,Product Term 1 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x8 0.--1. "PT1_DC,Product Term 1 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0xA "BFCRT232,Boolean Function Term 2 and 3 Configuration for EVENT2"
bitfld.word 0xA 14.--15. "PT2_AC,Product Term 2 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0xA 12.--13. "PT2_BC,Product Term 2 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xA 10.--11. "PT2_CC,Product Term 2 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xA 8.--9. "PT2_DC,Product Term 2 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0xA 6.--7. "PT3_AC,Product Term 3 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input to become 1"
bitfld.word 0xA 4.--5. "PT3_BC,Product Term 3 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xA 2.--3. "PT3_CC,Product Term 3 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xA 0.--1. "PT3_DC,Product Term 3 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0xC "BFCRT013,Boolean Function Term 0 and 1 Configuration for EVENT3"
bitfld.word 0xC 14.--15. "PT0_AC,Product Term 0 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0xC 12.--13. "PT0_BC,Product Term 0 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xC 10.--11. "PT0_CC,Product Term 0 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xC 8.--9. "PT0_DC,Product Term 0 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0xC 6.--7. "PT1_AC,Product Term 1 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0xC 4.--5. "PT1_BC,Product Term 1 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xC 2.--3. "PT1_CC,Product Term 1 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xC 0.--1. "PT1_DC,Product Term 1 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0xE "BFCRT233,Boolean Function Term 2 and 3 Configuration for EVENT3"
bitfld.word 0xE 14.--15. "PT2_AC,Product Term 2 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0xE 12.--13. "PT2_BC,Product Term 2 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xE 10.--11. "PT2_CC,Product Term 2 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xE 8.--9. "PT2_DC,Product Term 2 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0xE 6.--7. "PT3_AC,Product Term 3 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input to become 1"
bitfld.word 0xE 4.--5. "PT3_BC,Product Term 3 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xE 2.--3. "PT3_CC,Product Term 3 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xE 0.--1. "PT3_DC,Product Term 3 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
tree.end
endif
sif (cpuis("MC?A156*"))
tree "AOI1"
base ad:0x40097000
group.word 0x0++0xF
line.word 0x0 "BFCRT010,Boolean Function Term 0 and 1 Configuration for EVENT0"
bitfld.word 0x0 14.--15. "PT0_AC,Product Term 0 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x0 12.--13. "PT0_BC,Product Term 0 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x0 10.--11. "PT0_CC,Product Term 0 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x0 8.--9. "PT0_DC,Product Term 0 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0x0 6.--7. "PT1_AC,Product Term 1 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x0 4.--5. "PT1_BC,Product Term 1 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x0 2.--3. "PT1_CC,Product Term 1 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x0 0.--1. "PT1_DC,Product Term 1 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0x2 "BFCRT230,Boolean Function Term 2 and 3 Configuration for EVENT0"
bitfld.word 0x2 14.--15. "PT2_AC,Product Term 2 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x2 12.--13. "PT2_BC,Product Term 2 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x2 10.--11. "PT2_CC,Product Term 2 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x2 8.--9. "PT2_DC,Product Term 2 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0x2 6.--7. "PT3_AC,Product Term 3 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input to become 1"
bitfld.word 0x2 4.--5. "PT3_BC,Product Term 3 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x2 2.--3. "PT3_CC,Product Term 3 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x2 0.--1. "PT3_DC,Product Term 3 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0x4 "BFCRT011,Boolean Function Term 0 and 1 Configuration for EVENT1"
bitfld.word 0x4 14.--15. "PT0_AC,Product Term 0 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x4 12.--13. "PT0_BC,Product Term 0 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x4 10.--11. "PT0_CC,Product Term 0 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x4 8.--9. "PT0_DC,Product Term 0 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0x4 6.--7. "PT1_AC,Product Term 1 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x4 4.--5. "PT1_BC,Product Term 1 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x4 2.--3. "PT1_CC,Product Term 1 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x4 0.--1. "PT1_DC,Product Term 1 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0x6 "BFCRT231,Boolean Function Term 2 and 3 Configuration for EVENT1"
bitfld.word 0x6 14.--15. "PT2_AC,Product Term 2 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x6 12.--13. "PT2_BC,Product Term 2 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x6 10.--11. "PT2_CC,Product Term 2 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x6 8.--9. "PT2_DC,Product Term 2 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0x6 6.--7. "PT3_AC,Product Term 3 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input to become 1"
bitfld.word 0x6 4.--5. "PT3_BC,Product Term 3 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x6 2.--3. "PT3_CC,Product Term 3 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x6 0.--1. "PT3_DC,Product Term 3 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0x8 "BFCRT012,Boolean Function Term 0 and 1 Configuration for EVENT2"
bitfld.word 0x8 14.--15. "PT0_AC,Product Term 0 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x8 12.--13. "PT0_BC,Product Term 0 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x8 10.--11. "PT0_CC,Product Term 0 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x8 8.--9. "PT0_DC,Product Term 0 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0x8 6.--7. "PT1_AC,Product Term 1 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0x8 4.--5. "PT1_BC,Product Term 1 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0x8 2.--3. "PT1_CC,Product Term 1 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0x8 0.--1. "PT1_DC,Product Term 1 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0xA "BFCRT232,Boolean Function Term 2 and 3 Configuration for EVENT2"
bitfld.word 0xA 14.--15. "PT2_AC,Product Term 2 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0xA 12.--13. "PT2_BC,Product Term 2 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xA 10.--11. "PT2_CC,Product Term 2 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xA 8.--9. "PT2_DC,Product Term 2 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0xA 6.--7. "PT3_AC,Product Term 3 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input to become 1"
bitfld.word 0xA 4.--5. "PT3_BC,Product Term 3 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xA 2.--3. "PT3_CC,Product Term 3 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xA 0.--1. "PT3_DC,Product Term 3 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0xC "BFCRT013,Boolean Function Term 0 and 1 Configuration for EVENT3"
bitfld.word 0xC 14.--15. "PT0_AC,Product Term 0 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0xC 12.--13. "PT0_BC,Product Term 0 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xC 10.--11. "PT0_CC,Product Term 0 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xC 8.--9. "PT0_DC,Product Term 0 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0xC 6.--7. "PT1_AC,Product Term 1 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0xC 4.--5. "PT1_BC,Product Term 1 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xC 2.--3. "PT1_CC,Product Term 1 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xC 0.--1. "PT1_DC,Product Term 1 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
line.word 0xE "BFCRT233,Boolean Function Term 2 and 3 Configuration for EVENT3"
bitfld.word 0xE 14.--15. "PT2_AC,Product Term 2 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input A to become 1"
bitfld.word 0xE 12.--13. "PT2_BC,Product Term 2 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xE 10.--11. "PT2_CC,Product Term 2 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xE 8.--9. "PT2_DC,Product Term 2 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
newline
bitfld.word 0xE 6.--7. "PT3_AC,Product Term 3 Input A Configuration" "0: Force input A to become 0,1: Pass input A,2: Complement input A,3: Force input to become 1"
bitfld.word 0xE 4.--5. "PT3_BC,Product Term 3 Input B Configuration" "0: Force input B to become 0,1: Pass input B,2: Complement input B,3: Force input B to become 1"
bitfld.word 0xE 2.--3. "PT3_CC,Product Term 3 Input C Configuration" "0: Force input C to become 0,1: Pass input C,2: Complement input C,3: Force input C to become 1"
bitfld.word 0xE 0.--1. "PT3_DC,Product Term 3 Input D Configuration" "0: Force input D to become 0,1: Pass input D,2: Complement input D,3: Force input D to become 1"
tree.end
endif
tree.end
sif (cpuis("MC?A144*")||cpuis("MC?A145*")||cpuis("MC?A146*")||cpuis("MC?A154*")||cpuis("MC?A155*")||cpuis("MC?A156*"))
tree "CAN (Controller Area Network)"
base ad:0x0
tree "CAN0"
base ad:0x400CC000
group.long 0x0++0xB
line.long 0x0 "MCR,Module Configuration"
bitfld.long 0x0 31. "MDIS,Module Disable" "0: Enable,1: Disable"
bitfld.long 0x0 30. "FRZ,Freeze Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x0 29. "RFEN,Legacy RX FIFO Enable" "0: Disable,1: Enable"
bitfld.long 0x0 28. "HALT,Halt FlexCAN" "0: No request,1: Enter Freeze mode if MCR[FRZ] = 1."
newline
rbitfld.long 0x0 27. "NOTRDY,FlexCAN Not Ready" "0: FlexCAN is in Normal mode Listen-Only mode or..,1: FlexCAN is in Disable mode Doze mode Stop mode.."
bitfld.long 0x0 26. "WAKMSK,Wake-up Interrupt Mask" "0: Disabled,1: Enabled"
newline
bitfld.long 0x0 25. "SOFTRST,Soft Reset" "0: No reset,1: Soft reset affects reset registers"
rbitfld.long 0x0 24. "FRZACK,Freeze Mode Acknowledge" "0: Not in Freeze mode prescaler running.,1: In Freeze mode prescaler stopped."
newline
bitfld.long 0x0 22. "SLFWAK,Self Wake-up" "0: Disable,1: Enable"
bitfld.long 0x0 21. "WRNEN,Warning Interrupt Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x0 20. "LPMACK,Low-Power Mode Acknowledge" "0: Not in a low-power mode,1: In a low-power mode"
bitfld.long 0x0 19. "WAKSRC,Wake-Up Source" "0: No filter applied,1: Filter applied"
newline
bitfld.long 0x0 18. "DOZE,Doze Mode Enable" "0: Disable,1: Enable"
bitfld.long 0x0 17. "SRXDIS,Self-Reception Disable" "0: Enable,1: Disable"
newline
bitfld.long 0x0 16. "IRMQ,Individual RX Masking and Queue Enable" "0: Disable,1: Enable"
bitfld.long 0x0 15. "DMA,DMA Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x0 14. "PNET_EN,Pretended Networking Enable" "0: Disable,1: Enable"
bitfld.long 0x0 13. "LPRIOEN,Local Priority Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x0 12. "AEN,Abort Enable" "0: Disabled,1: Enabled"
bitfld.long 0x0 11. "FDEN,CAN FD Operation Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x0 8.--9. "IDAM,ID Acceptance Mode" "0: Format A: One full ID (standard and extended)..,1: Format B: Two full standard IDs or two partial..,2: Format C: Four partial 8-bit standard IDs per ID..,3: Format D: All frames rejected."
hexmask.long.byte 0x0 0.--6. 1. "MAXMB,Number of the Last Message Buffer"
line.long 0x4 "CTRL1,Control 1"
hexmask.long.byte 0x4 24.--31. 1. "PRESDIV,Prescaler Division Factor"
bitfld.long 0x4 22.--23. "RJW,Resync Jump Width" "0,1,2,3"
newline
bitfld.long 0x4 19.--21. "PSEG1,Phase Segment 1" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 16.--18. "PSEG2,Phase Segment 2" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x4 15. "BOFFMSK,Bus Off Interrupt Mask" "0: Interrupt disabled,1: Interrupt enabled"
bitfld.long 0x4 14. "ERRMSK,Error Interrupt Mask" "0: Interrupt disabled,1: Interrupt enabled"
newline
bitfld.long 0x4 12. "LPB,Loopback Mode" "0: Disabled,1: Enabled"
bitfld.long 0x4 11. "TWRNMSK,TX Warning Interrupt Mask" "0: Disabled,1: Enabled"
newline
bitfld.long 0x4 10. "RWRNMSK,RX Warning Interrupt Mask" "0: Disabled,1: Enabled"
bitfld.long 0x4 7. "SMP,CAN Bit Sampling" "0: One sample is used to determine the bit value.,1: Three samples are used to determine the value of.."
newline
bitfld.long 0x4 6. "BOFFREC,Bus Off Recovery" "0: Enabled,1: Disabled"
bitfld.long 0x4 5. "TSYN,Timer Sync" "0: Disable,1: Enable"
newline
bitfld.long 0x4 4. "LBUF,Lowest Buffer Transmitted First" "0: Buffer with highest priority is transmitted first.,1: Lowest number buffer is transmitted first."
bitfld.long 0x4 3. "LOM,Listen-Only Mode" "0: Listen-Only mode is deactivated.,1: FlexCAN module operates in Listen-Only mode."
newline
bitfld.long 0x4 0.--2. "PROPSEG,Propagation Segment" "0,1,2,3,4,5,6,7"
line.long 0x8 "TIMER,Free-Running Timer"
hexmask.long.word 0x8 0.--15. 1. "TIMER,Timer Value"
group.long 0x10++0x13
line.long 0x0 "RXMGMASK,RX Message Buffers Global Mask"
hexmask.long 0x0 0.--31. 1. "MG,Global Mask for RX Message Buffers"
line.long 0x4 "RX14MASK,Receive 14 Mask"
hexmask.long 0x4 0.--31. 1. "RX14M,RX Buffer 14 Mask Bits"
line.long 0x8 "RX15MASK,Receive 15 Mask"
hexmask.long 0x8 0.--31. 1. "RX15M,RX Buffer 15 Mask Bits"
line.long 0xC "ECR,Error Counter"
hexmask.long.byte 0xC 24.--31. 1. "RXERRCNT_FAST,Receive Error Counter for Fast Bits"
hexmask.long.byte 0xC 16.--23. 1. "TXERRCNT_FAST,Transmit Error Counter for Fast Bits"
newline
hexmask.long.byte 0xC 8.--15. 1. "RXERRCNT,Receive Error Counter"
hexmask.long.byte 0xC 0.--7. 1. "TXERRCNT,Transmit Error Counter"
line.long 0x10 "ESR1,Error and Status 1"
rbitfld.long 0x10 31. "BIT1ERR_FAST,Fast Bit1 Error Flag" "0: No such occurrence.,1: At least one bit transmitted as recessive is.."
rbitfld.long 0x10 30. "BIT0ERR_FAST,Fast Bit0 Error Flag" "0: No such occurrence.,1: At least one bit transmitted as dominant is.."
newline
rbitfld.long 0x10 28. "CRCERR_FAST,Fast Cyclic Redundancy Check Error Flag" "0: No such occurrence.,1: A CRC error occurred since last read of this.."
rbitfld.long 0x10 27. "FRMERR_FAST,Fast Form Error Flag" "0: No such occurrence.,1: A form error occurred since last read of this.."
newline
rbitfld.long 0x10 26. "STFERR_FAST,Fast Stuffing Error Flag" "0: No such occurrence.,1: A stuffing error occurred since last read of.."
eventfld.long 0x10 21. "ERROVR,Error Overrun Flag" "0: No overrun,1: Overrun"
newline
eventfld.long 0x10 20. "ERRINT_FAST,Fast Error Interrupt Flag" "0: No such occurrence.,1: Error flag set in the data phase of CAN FD.."
eventfld.long 0x10 19. "BOFFDONEINT,Bus Off Done Interrupt Flag" "0: No such occurrence,1: FlexCAN module has completed Bus Off process."
newline
rbitfld.long 0x10 18. "SYNCH,CAN Synchronization Status Flag" "0: Not synchronized,1: Synchronized"
eventfld.long 0x10 17. "TWRNINT,TX Warning Interrupt Flag" "0: No such occurrence,1: TX error counter changed from less than 96 to.."
newline
eventfld.long 0x10 16. "RWRNINT,RX Warning Interrupt Flag" "0: No such occurrence,1: RX error counter changed from less than 96 to.."
rbitfld.long 0x10 15. "BIT1ERR,Bit1 Error Flag" "0: No such occurrence.,1: At least one bit sent as recessive is received.."
newline
rbitfld.long 0x10 14. "BIT0ERR,Bit0 Error Flag" "0: No such occurrence.,1: At least one bit sent as dominant is received as.."
rbitfld.long 0x10 13. "ACKERR,Acknowledge Error Flag" "0: No error,1: Error occurred since last read of this register."
newline
rbitfld.long 0x10 12. "CRCERR,Cyclic Redundancy Check Error Flag" "0: No error,1: Error occurred since last read of this register."
rbitfld.long 0x10 11. "FRMERR,Form Error Flag" "0: No error,1: Error occurred since last read of this register."
newline
rbitfld.long 0x10 10. "STFERR,Stuffing Error Flag" "0: No error,1: Error occurred since last read of this register."
rbitfld.long 0x10 9. "TXWRN,TX Error Warning Flag" "0: No such occurrence.,1: TXERRCNT is 96 or greater."
newline
rbitfld.long 0x10 8. "RXWRN,RX Error Warning Flag" "0: No such occurrence.,1: RXERRCNT is greater than or equal to 96."
rbitfld.long 0x10 7. "IDLE,Idle" "0: Not IDLE,1: IDLE"
newline
rbitfld.long 0x10 6. "TX,FlexCAN In Transmission" "0: Not transmitting,1: Transmitting"
rbitfld.long 0x10 4.--5. "FLTCONF,Fault Confinement State" "0: Bus Off,1: Error Passive,2: Bus Off,3: Bus Off"
newline
rbitfld.long 0x10 3. "RX,FlexCAN in Reception Flag" "0: Not receiving,1: Receiving"
eventfld.long 0x10 2. "BOFFINT,Bus Off Interrupt Flag" "0: No such occurrence.,1: FlexCAN module entered Bus Off state."
newline
eventfld.long 0x10 1. "ERRINT,Error Interrupt Flag" "0: No such occurrence.,1: Indicates setting of any error flag in the Error.."
eventfld.long 0x10 0. "WAKINT,Wake-up Interrupt Flag" "0: No such occurrence.,1: Indicates that a recessive-to-dominant.."
group.long 0x28++0x3
line.long 0x0 "IMASK1,Interrupt Masks 1"
hexmask.long 0x0 0.--31. 1. "BUF31TO0M,Buffer MBi Mask"
group.long 0x30++0x7
line.long 0x0 "IFLAG1,Interrupt Flags 1"
hexmask.long.tbyte 0x0 8.--31. 1. "BUF31TO8I,Buffer MBi Interrupt"
eventfld.long 0x0 7. "BUF7I,Buffer MB7 Interrupt or Legacy RX FIFO Overflow" "0: No occurrence of MB7 completing transmission or..,1: MB7 completed transmission or reception or FIFO.."
newline
eventfld.long 0x0 6. "BUF6I,Buffer MB6 Interrupt or Legacy RX FIFO Warning" "0: No occurrence of MB6 completing transmission or..,1: MB6 completed transmission or reception or FIFO.."
eventfld.long 0x0 5. "BUF5I,Buffer MB5 Interrupt or Frames available in Legacy RX FIFO" "0: No occurrence of completed transmission or..,1: MB5 completed transmission or reception or.."
newline
hexmask.long.byte 0x0 1.--4. 1. "BUF4TO1I,Buffer MBi Interrupt or Reserved"
eventfld.long 0x0 0. "BUF0I,Buffer MB0 Interrupt or Clear Legacy FIFO bit" "0: MB0 has no occurrence of successfully completed..,1: MB0 has successfully completed transmission or.."
line.long 0x4 "CTRL2,Control 2"
bitfld.long 0x4 31. "ERRMSK_FAST,Error Interrupt Mask for Errors Detected in the Data Phase of Fast CAN FD Frames" "0: Disable,1: Enable"
bitfld.long 0x4 30. "BOFFDONEMSK,Bus Off Done Interrupt Mask" "0: Disable,1: Enable"
newline
hexmask.long.byte 0x4 24.--27. 1. "RFFN,Number of Legacy Receive FIFO Filters"
hexmask.long.byte 0x4 19.--23. 1. "TASD,Transmission Arbitration Start Delay"
newline
bitfld.long 0x4 18. "MRP,Message Buffers Reception Priority" "0: Matching starts from Legacy RX FIFO or Enhanced..,1: Matching starts from message buffers and.."
bitfld.long 0x4 17. "RRS,Remote Request Storing" "0: Generated,1: Stored"
newline
bitfld.long 0x4 16. "EACEN,Entire Frame Arbitration Field Comparison Enable for RX Message Buffers" "0: Disable,1: Enable"
bitfld.long 0x4 14. "PREXCEN,Protocol Exception Enable" "0: Disabled,1: Enabled"
newline
bitfld.long 0x4 13. "BTE,Bit Timing Expansion Enable" "0: Disable,1: Enable"
bitfld.long 0x4 12. "ISOCANFDEN,ISO CAN FD Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x4 11. "EDFLTDIS,Edge Filter Disable" "0: Enabled,1: Disabled"
bitfld.long 0x4 1. "ASD,ACK Suppression Disable" "0: Enabled,1: Disabled"
newline
bitfld.long 0x4 0. "PES,Payload Byte and Bit Order Selection" "0: Big-endian,1: Little-endian"
rgroup.long 0x38++0x3
line.long 0x0 "ESR2,Error and Status 2"
hexmask.long.byte 0x0 16.--22. 1. "LPTM,Lowest Priority TX Message Buffer"
bitfld.long 0x0 14. "VPS,Valid Priority Status" "0: Invalid,1: Valid"
newline
bitfld.long 0x0 13. "IMB,Inactive Message Buffer" "0: Message buffer indicated by ESR2[LPTM] is not..,1: At least one message buffer is inactive."
rgroup.long 0x44++0x3
line.long 0x0 "CRCR,Cyclic Redundancy Check"
hexmask.long.byte 0x0 16.--22. 1. "MBCRC,CRC Message Buffer"
hexmask.long.word 0x0 0.--14. 1. "TXCRC,Transmitted CRC value"
group.long 0x48++0x3
line.long 0x0 "RXFGMASK,Legacy RX FIFO Global Mask"
hexmask.long 0x0 0.--31. 1. "FGM,Legacy RX FIFO Global Mask Bits"
rgroup.long 0x4C++0x3
line.long 0x0 "RXFIR,Legacy RX FIFO Information"
hexmask.long.word 0x0 0.--8. 1. "IDHIT,Identifier Acceptance Filter Hit Indicator"
group.long 0x50++0x3
line.long 0x0 "CBT,CAN Bit Timing"
bitfld.long 0x0 31. "BTF,Bit Timing Format Enable" "0: Disable,1: Enable"
hexmask.long.word 0x0 21.--30. 1. "EPRESDIV,Extended Prescaler Division Factor"
newline
hexmask.long.byte 0x0 16.--20. 1. "ERJW,Extended Resync Jump Width"
hexmask.long.byte 0x0 10.--15. 1. "EPROPSEG,Extended Propagation Segment"
newline
hexmask.long.byte 0x0 5.--9. 1. "EPSEG1,Extended Phase Segment 1"
hexmask.long.byte 0x0 0.--4. 1. "EPSEG2,Extended Phase Segment 2"
group.long 0x80++0x3
line.long 0x0 "CS0,Message Buffer 0 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x80++0x3
line.long 0x0 "MB0_16B_CS,Message Buffer 0 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x80++0x3
line.long 0x0 "MB0_32B_CS,Message Buffer 0 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x80++0x3
line.long 0x0 "MB0_64B_CS,Message Buffer 0 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x80++0x7
line.long 0x0 "MB0_8B_CS,Message Buffer 0 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
line.long 0x4 "ID0,Message Buffer 0 ID Register"
bitfld.long 0x4 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x4 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x84++0x3
line.long 0x0 "MB0_16B_ID,Message Buffer 0 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x84++0x3
line.long 0x0 "MB0_32B_ID,Message Buffer 0 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x84++0x3
line.long 0x0 "MB0_64B_ID,Message Buffer 0 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x84++0x7
line.long 0x0 "MB0_8B_ID,Message Buffer 0 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
line.long 0x4 "MB0_16B_WORD0,Message Buffer 0 WORD_16B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x88++0x3
line.long 0x0 "MB0_32B_WORD0,Message Buffer 0 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x88++0x3
line.long 0x0 "MB0_64B_WORD0,Message Buffer 0 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x88++0x3
line.long 0x0 "MB0_8B_WORD0,Message Buffer 0 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x88++0x7
line.long 0x0 "WORD00,Message Buffer 0 WORD0 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB0_16B_WORD1,Message Buffer 0 WORD_16B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x8C++0x3
line.long 0x0 "MB0_32B_WORD1,Message Buffer 0 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x8C++0x3
line.long 0x0 "MB0_64B_WORD1,Message Buffer 0 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x8C++0x3
line.long 0x0 "MB0_8B_WORD1,Message Buffer 0 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x8C++0x7
line.long 0x0 "WORD10,Message Buffer 0 WORD1 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
line.long 0x4 "CS1,Message Buffer 1 CS Register"
bitfld.long 0x4 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x4 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x4 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x4 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x4 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x4 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x4 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x4 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x4 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x90++0x3
line.long 0x0 "MB0_16B_WORD2,Message Buffer 0 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
group.long 0x90++0x3
line.long 0x0 "MB0_32B_WORD2,Message Buffer 0 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
group.long 0x90++0x3
line.long 0x0 "MB0_64B_WORD2,Message Buffer 0 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
group.long 0x90++0x7
line.long 0x0 "MB1_8B_CS,Message Buffer 1 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
line.long 0x4 "ID1,Message Buffer 1 ID Register"
bitfld.long 0x4 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x4 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x94++0x3
line.long 0x0 "MB0_16B_WORD3,Message Buffer 0 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
group.long 0x94++0x3
line.long 0x0 "MB0_32B_WORD3,Message Buffer 0 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
group.long 0x94++0x3
line.long 0x0 "MB0_64B_WORD3,Message Buffer 0 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
group.long 0x94++0x7
line.long 0x0 "MB1_8B_ID,Message Buffer 1 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
line.long 0x4 "MB0_32B_WORD4,Message Buffer 0 WORD_32B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_16,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_17,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_18,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_19,Data byte 0 of Rx/Tx frame."
group.long 0x98++0x3
line.long 0x0 "MB0_64B_WORD4,Message Buffer 0 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_16,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_17,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_18,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_19,Data byte 0 of Rx/Tx frame."
group.long 0x98++0x3
line.long 0x0 "MB1_16B_CS,Message Buffer 1 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x98++0x3
line.long 0x0 "MB1_8B_WORD0,Message Buffer 1 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x98++0x7
line.long 0x0 "WORD01,Message Buffer 1 WORD0 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB0_32B_WORD5,Message Buffer 0 WORD_32B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_20,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_21,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_22,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_23,Data byte 0 of Rx/Tx frame."
group.long 0x9C++0x3
line.long 0x0 "MB0_64B_WORD5,Message Buffer 0 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_20,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_21,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_22,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_23,Data byte 0 of Rx/Tx frame."
group.long 0x9C++0x3
line.long 0x0 "MB1_16B_ID,Message Buffer 1 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x9C++0x3
line.long 0x0 "MB1_8B_WORD1,Message Buffer 1 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x9C++0x7
line.long 0x0 "WORD11,Message Buffer 1 WORD1 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
line.long 0x4 "CS2,Message Buffer 2 CS Register"
bitfld.long 0x4 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x4 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x4 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x4 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x4 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x4 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x4 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x4 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x4 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0xA0++0x3
line.long 0x0 "MB0_32B_WORD6,Message Buffer 0 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_24,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_25,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_26,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_27,Data byte 0 of Rx/Tx frame."
group.long 0xA0++0x3
line.long 0x0 "MB0_64B_WORD6,Message Buffer 0 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_24,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_25,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_26,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_27,Data byte 0 of Rx/Tx frame."
group.long 0xA0++0x3
line.long 0x0 "MB1_16B_WORD0,Message Buffer 1 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0xA0++0x7
line.long 0x0 "MB2_8B_CS,Message Buffer 2 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
line.long 0x4 "ID2,Message Buffer 2 ID Register"
bitfld.long 0x4 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x4 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0xA4++0x3
line.long 0x0 "MB0_32B_WORD7,Message Buffer 0 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_28,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_29,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_30,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_31,Data byte 0 of Rx/Tx frame."
group.long 0xA4++0x3
line.long 0x0 "MB0_64B_WORD7,Message Buffer 0 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_28,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_29,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_30,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_31,Data byte 0 of Rx/Tx frame."
group.long 0xA4++0x3
line.long 0x0 "MB1_16B_WORD1,Message Buffer 1 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0xA4++0x7
line.long 0x0 "MB2_8B_ID,Message Buffer 2 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
line.long 0x4 "MB0_64B_WORD8,Message Buffer 0 WORD_64B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_32,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_33,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_34,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_35,Data byte 0 of Rx/Tx frame."
group.long 0xA8++0x3
line.long 0x0 "MB1_16B_WORD2,Message Buffer 1 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
group.long 0xA8++0x3
line.long 0x0 "MB1_32B_CS,Message Buffer 1 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0xA8++0x3
line.long 0x0 "MB2_8B_WORD0,Message Buffer 2 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0xA8++0x7
line.long 0x0 "WORD02,Message Buffer 2 WORD0 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB0_64B_WORD9,Message Buffer 0 WORD_64B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_36,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_37,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_38,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_39,Data byte 0 of Rx/Tx frame."
group.long 0xAC++0x3
line.long 0x0 "MB1_16B_WORD3,Message Buffer 1 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
group.long 0xAC++0x3
line.long 0x0 "MB1_32B_ID,Message Buffer 1 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0xAC++0x3
line.long 0x0 "MB2_8B_WORD1,Message Buffer 2 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0xAC++0x7
line.long 0x0 "WORD12,Message Buffer 2 WORD1 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
line.long 0x4 "CS3,Message Buffer 3 CS Register"
bitfld.long 0x4 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x4 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x4 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x4 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x4 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x4 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x4 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x4 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x4 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0xB0++0x3
line.long 0x0 "MB0_64B_WORD10,Message Buffer 0 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_40,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_41,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_42,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_43,Data byte 0 of Rx/Tx frame."
group.long 0xB0++0x3
line.long 0x0 "MB1_32B_WORD0,Message Buffer 1 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0xB0++0x3
line.long 0x0 "MB2_16B_CS,Message Buffer 2 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0xB0++0x7
line.long 0x0 "MB3_8B_CS,Message Buffer 3 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
line.long 0x4 "ID3,Message Buffer 3 ID Register"
bitfld.long 0x4 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x4 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0xB4++0x3
line.long 0x0 "MB0_64B_WORD11,Message Buffer 0 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_44,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_45,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_46,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_47,Data byte 0 of Rx/Tx frame."
group.long 0xB4++0x3
line.long 0x0 "MB1_32B_WORD1,Message Buffer 1 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0xB4++0x3
line.long 0x0 "MB2_16B_ID,Message Buffer 2 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0xB4++0x7
line.long 0x0 "MB3_8B_ID,Message Buffer 3 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
line.long 0x4 "MB0_64B_WORD12,Message Buffer 0 WORD_64B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_48,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_49,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_50,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_51,Data byte 0 of Rx/Tx frame."
group.long 0xB8++0x3
line.long 0x0 "MB1_32B_WORD2,Message Buffer 1 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
group.long 0xB8++0x3
line.long 0x0 "MB2_16B_WORD0,Message Buffer 2 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0xB8++0x3
line.long 0x0 "MB3_8B_WORD0,Message Buffer 3 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0xB8++0x7
line.long 0x0 "WORD03,Message Buffer 3 WORD0 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB0_64B_WORD13,Message Buffer 0 WORD_64B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_52,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_53,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_54,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_55,Data byte 0 of Rx/Tx frame."
group.long 0xBC++0x3
line.long 0x0 "MB1_32B_WORD3,Message Buffer 1 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
group.long 0xBC++0x3
line.long 0x0 "MB2_16B_WORD1,Message Buffer 2 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0xBC++0x3
line.long 0x0 "MB3_8B_WORD1,Message Buffer 3 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0xBC++0x7
line.long 0x0 "WORD13,Message Buffer 3 WORD1 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
line.long 0x4 "CS4,Message Buffer 4 CS Register"
bitfld.long 0x4 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x4 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x4 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x4 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x4 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x4 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x4 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x4 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x4 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0xC0++0x3
line.long 0x0 "MB0_64B_WORD14,Message Buffer 0 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_56,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_57,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_58,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_59,Data byte 0 of Rx/Tx frame."
group.long 0xC0++0x3
line.long 0x0 "MB1_32B_WORD4,Message Buffer 1 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_16,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_17,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_18,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_19,Data byte 0 of Rx/Tx frame."
group.long 0xC0++0x3
line.long 0x0 "MB2_16B_WORD2,Message Buffer 2 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
group.long 0xC0++0x7
line.long 0x0 "MB4_8B_CS,Message Buffer 4 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
line.long 0x4 "ID4,Message Buffer 4 ID Register"
bitfld.long 0x4 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x4 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0xC4++0x3
line.long 0x0 "MB0_64B_WORD15,Message Buffer 0 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_60,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_61,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_62,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_63,Data byte 0 of Rx/Tx frame."
group.long 0xC4++0x3
line.long 0x0 "MB1_32B_WORD5,Message Buffer 1 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_20,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_21,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_22,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_23,Data byte 0 of Rx/Tx frame."
group.long 0xC4++0x3
line.long 0x0 "MB2_16B_WORD3,Message Buffer 2 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
group.long 0xC4++0x7
line.long 0x0 "MB4_8B_ID,Message Buffer 4 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
line.long 0x4 "MB1_32B_WORD6,Message Buffer 1 WORD_32B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_24,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_25,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_26,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_27,Data byte 0 of Rx/Tx frame."
group.long 0xC8++0x3
line.long 0x0 "MB1_64B_CS,Message Buffer 1 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0xC8++0x3
line.long 0x0 "MB3_16B_CS,Message Buffer 3 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0xC8++0x3
line.long 0x0 "MB4_8B_WORD0,Message Buffer 4 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0xC8++0x7
line.long 0x0 "WORD04,Message Buffer 4 WORD0 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB1_32B_WORD7,Message Buffer 1 WORD_32B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_28,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_29,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_30,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_31,Data byte 0 of Rx/Tx frame."
group.long 0xCC++0x3
line.long 0x0 "MB1_64B_ID,Message Buffer 1 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0xCC++0x3
line.long 0x0 "MB3_16B_ID,Message Buffer 3 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0xCC++0x3
line.long 0x0 "MB4_8B_WORD1,Message Buffer 4 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0xCC++0x7
line.long 0x0 "WORD14,Message Buffer 4 WORD1 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
line.long 0x4 "CS5,Message Buffer 5 CS Register"
bitfld.long 0x4 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x4 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x4 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x4 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x4 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x4 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x4 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x4 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x4 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0xD0++0x3
line.long 0x0 "MB1_64B_WORD0,Message Buffer 1 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0xD0++0x3
line.long 0x0 "MB2_32B_CS,Message Buffer 2 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0xD0++0x3
line.long 0x0 "MB3_16B_WORD0,Message Buffer 3 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0xD0++0x7
line.long 0x0 "MB5_8B_CS,Message Buffer 5 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
line.long 0x4 "ID5,Message Buffer 5 ID Register"
bitfld.long 0x4 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x4 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0xD4++0x3
line.long 0x0 "MB1_64B_WORD1,Message Buffer 1 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0xD4++0x3
line.long 0x0 "MB2_32B_ID,Message Buffer 2 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0xD4++0x3
line.long 0x0 "MB3_16B_WORD1,Message Buffer 3 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0xD4++0x7
line.long 0x0 "MB5_8B_ID,Message Buffer 5 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
line.long 0x4 "MB1_64B_WORD2,Message Buffer 1 WORD_64B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
group.long 0xD8++0x3
line.long 0x0 "MB2_32B_WORD0,Message Buffer 2 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0xD8++0x3
line.long 0x0 "MB3_16B_WORD2,Message Buffer 3 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
group.long 0xD8++0x3
line.long 0x0 "MB5_8B_WORD0,Message Buffer 5 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0xD8++0x7
line.long 0x0 "WORD05,Message Buffer 5 WORD0 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB1_64B_WORD3,Message Buffer 1 WORD_64B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
group.long 0xDC++0x3
line.long 0x0 "MB2_32B_WORD1,Message Buffer 2 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0xDC++0x3
line.long 0x0 "MB3_16B_WORD3,Message Buffer 3 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
group.long 0xDC++0x3
line.long 0x0 "MB5_8B_WORD1,Message Buffer 5 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0xDC++0x7
line.long 0x0 "WORD15,Message Buffer 5 WORD1 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
line.long 0x4 "CS6,Message Buffer 6 CS Register"
bitfld.long 0x4 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x4 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x4 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x4 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x4 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x4 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x4 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x4 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x4 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0xE0++0x3
line.long 0x0 "MB1_64B_WORD4,Message Buffer 1 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_16,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_17,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_18,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_19,Data byte 0 of Rx/Tx frame."
group.long 0xE0++0x3
line.long 0x0 "MB2_32B_WORD2,Message Buffer 2 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
group.long 0xE0++0x3
line.long 0x0 "MB4_16B_CS,Message Buffer 4 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0xE0++0x7
line.long 0x0 "MB6_8B_CS,Message Buffer 6 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
line.long 0x4 "ID6,Message Buffer 6 ID Register"
bitfld.long 0x4 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x4 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0xE4++0x3
line.long 0x0 "MB1_64B_WORD5,Message Buffer 1 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_20,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_21,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_22,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_23,Data byte 0 of Rx/Tx frame."
group.long 0xE4++0x3
line.long 0x0 "MB2_32B_WORD3,Message Buffer 2 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
group.long 0xE4++0x3
line.long 0x0 "MB4_16B_ID,Message Buffer 4 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0xE4++0x7
line.long 0x0 "MB6_8B_ID,Message Buffer 6 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
line.long 0x4 "MB1_64B_WORD6,Message Buffer 1 WORD_64B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_24,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_25,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_26,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_27,Data byte 0 of Rx/Tx frame."
group.long 0xE8++0x3
line.long 0x0 "MB2_32B_WORD4,Message Buffer 2 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_16,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_17,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_18,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_19,Data byte 0 of Rx/Tx frame."
group.long 0xE8++0x3
line.long 0x0 "MB4_16B_WORD0,Message Buffer 4 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0xE8++0x3
line.long 0x0 "MB6_8B_WORD0,Message Buffer 6 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0xE8++0x7
line.long 0x0 "WORD06,Message Buffer 6 WORD0 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB1_64B_WORD7,Message Buffer 1 WORD_64B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_28,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_29,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_30,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_31,Data byte 0 of Rx/Tx frame."
group.long 0xEC++0x3
line.long 0x0 "MB2_32B_WORD5,Message Buffer 2 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_20,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_21,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_22,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_23,Data byte 0 of Rx/Tx frame."
group.long 0xEC++0x3
line.long 0x0 "MB4_16B_WORD1,Message Buffer 4 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0xEC++0x3
line.long 0x0 "MB6_8B_WORD1,Message Buffer 6 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0xEC++0x7
line.long 0x0 "WORD16,Message Buffer 6 WORD1 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
line.long 0x4 "CS7,Message Buffer 7 CS Register"
bitfld.long 0x4 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x4 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x4 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x4 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x4 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x4 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x4 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x4 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x4 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0xF0++0x3
line.long 0x0 "MB1_64B_WORD8,Message Buffer 1 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_32,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_33,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_34,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_35,Data byte 0 of Rx/Tx frame."
group.long 0xF0++0x3
line.long 0x0 "MB2_32B_WORD6,Message Buffer 2 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_24,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_25,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_26,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_27,Data byte 0 of Rx/Tx frame."
group.long 0xF0++0x3
line.long 0x0 "MB4_16B_WORD2,Message Buffer 4 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
group.long 0xF0++0x7
line.long 0x0 "MB7_8B_CS,Message Buffer 7 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
line.long 0x4 "ID7,Message Buffer 7 ID Register"
bitfld.long 0x4 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x4 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0xF4++0x3
line.long 0x0 "MB1_64B_WORD9,Message Buffer 1 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_36,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_37,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_38,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_39,Data byte 0 of Rx/Tx frame."
group.long 0xF4++0x3
line.long 0x0 "MB2_32B_WORD7,Message Buffer 2 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_28,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_29,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_30,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_31,Data byte 0 of Rx/Tx frame."
group.long 0xF4++0x3
line.long 0x0 "MB4_16B_WORD3,Message Buffer 4 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
group.long 0xF4++0x7
line.long 0x0 "MB7_8B_ID,Message Buffer 7 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
line.long 0x4 "MB1_64B_WORD10,Message Buffer 1 WORD_64B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_40,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_41,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_42,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_43,Data byte 0 of Rx/Tx frame."
group.long 0xF8++0x3
line.long 0x0 "MB3_32B_CS,Message Buffer 3 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0xF8++0x3
line.long 0x0 "MB5_16B_CS,Message Buffer 5 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0xF8++0x3
line.long 0x0 "MB7_8B_WORD0,Message Buffer 7 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0xF8++0x7
line.long 0x0 "WORD07,Message Buffer 7 WORD0 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB1_64B_WORD11,Message Buffer 1 WORD_64B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_44,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_45,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_46,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_47,Data byte 0 of Rx/Tx frame."
group.long 0xFC++0x3
line.long 0x0 "MB3_32B_ID,Message Buffer 3 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0xFC++0x3
line.long 0x0 "MB5_16B_ID,Message Buffer 5 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0xFC++0x3
line.long 0x0 "MB7_8B_WORD1,Message Buffer 7 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0xFC++0x7
line.long 0x0 "WORD17,Message Buffer 7 WORD1 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
line.long 0x4 "CS8,Message Buffer 8 CS Register"
bitfld.long 0x4 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x4 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x4 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x4 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x4 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x4 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x4 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x4 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x4 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x100++0x3
line.long 0x0 "MB1_64B_WORD12,Message Buffer 1 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_48,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_49,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_50,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_51,Data byte 0 of Rx/Tx frame."
group.long 0x100++0x3
line.long 0x0 "MB3_32B_WORD0,Message Buffer 3 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x100++0x3
line.long 0x0 "MB5_16B_WORD0,Message Buffer 5 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x100++0x7
line.long 0x0 "MB8_8B_CS,Message Buffer 8 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
line.long 0x4 "ID8,Message Buffer 8 ID Register"
bitfld.long 0x4 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x4 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x104++0x3
line.long 0x0 "MB1_64B_WORD13,Message Buffer 1 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_52,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_53,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_54,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_55,Data byte 0 of Rx/Tx frame."
group.long 0x104++0x3
line.long 0x0 "MB3_32B_WORD1,Message Buffer 3 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x104++0x3
line.long 0x0 "MB5_16B_WORD1,Message Buffer 5 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x104++0x7
line.long 0x0 "MB8_8B_ID,Message Buffer 8 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
line.long 0x4 "MB1_64B_WORD14,Message Buffer 1 WORD_64B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_56,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_57,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_58,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_59,Data byte 0 of Rx/Tx frame."
group.long 0x108++0x3
line.long 0x0 "MB3_32B_WORD2,Message Buffer 3 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
group.long 0x108++0x3
line.long 0x0 "MB5_16B_WORD2,Message Buffer 5 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
group.long 0x108++0x3
line.long 0x0 "MB8_8B_WORD0,Message Buffer 8 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x108++0x7
line.long 0x0 "WORD08,Message Buffer 8 WORD0 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB1_64B_WORD15,Message Buffer 1 WORD_64B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_60,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_61,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_62,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_63,Data byte 0 of Rx/Tx frame."
group.long 0x10C++0x3
line.long 0x0 "MB3_32B_WORD3,Message Buffer 3 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
group.long 0x10C++0x3
line.long 0x0 "MB5_16B_WORD3,Message Buffer 5 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
group.long 0x10C++0x3
line.long 0x0 "MB8_8B_WORD1,Message Buffer 8 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x10C++0x7
line.long 0x0 "WORD18,Message Buffer 8 WORD1 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
line.long 0x4 "CS9,Message Buffer 9 CS Register"
bitfld.long 0x4 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x4 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x4 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x4 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x4 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x4 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x4 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x4 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x4 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x110++0x3
line.long 0x0 "MB2_64B_CS,Message Buffer 2 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x110++0x3
line.long 0x0 "MB3_32B_WORD4,Message Buffer 3 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_16,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_17,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_18,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_19,Data byte 0 of Rx/Tx frame."
group.long 0x110++0x3
line.long 0x0 "MB6_16B_CS,Message Buffer 6 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x110++0x7
line.long 0x0 "MB9_8B_CS,Message Buffer 9 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
line.long 0x4 "ID9,Message Buffer 9 ID Register"
bitfld.long 0x4 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x4 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x114++0x3
line.long 0x0 "MB2_64B_ID,Message Buffer 2 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x114++0x3
line.long 0x0 "MB3_32B_WORD5,Message Buffer 3 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_20,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_21,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_22,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_23,Data byte 0 of Rx/Tx frame."
group.long 0x114++0x3
line.long 0x0 "MB6_16B_ID,Message Buffer 6 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x114++0x7
line.long 0x0 "MB9_8B_ID,Message Buffer 9 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
line.long 0x4 "MB2_64B_WORD0,Message Buffer 2 WORD_64B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x118++0x3
line.long 0x0 "MB3_32B_WORD6,Message Buffer 3 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_24,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_25,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_26,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_27,Data byte 0 of Rx/Tx frame."
group.long 0x118++0x3
line.long 0x0 "MB6_16B_WORD0,Message Buffer 6 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x118++0x3
line.long 0x0 "MB9_8B_WORD0,Message Buffer 9 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x118++0x7
line.long 0x0 "WORD09,Message Buffer 9 WORD0 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB2_64B_WORD1,Message Buffer 2 WORD_64B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x11C++0x3
line.long 0x0 "MB3_32B_WORD7,Message Buffer 3 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_28,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_29,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_30,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_31,Data byte 0 of Rx/Tx frame."
group.long 0x11C++0x3
line.long 0x0 "MB6_16B_WORD1,Message Buffer 6 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x11C++0x3
line.long 0x0 "MB9_8B_WORD1,Message Buffer 9 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x11C++0x7
line.long 0x0 "WORD19,Message Buffer 9 WORD1 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
line.long 0x4 "CS10,Message Buffer 10 CS Register"
bitfld.long 0x4 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x4 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x4 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x4 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x4 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x4 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x4 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x4 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x4 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x120++0x3
line.long 0x0 "MB10_8B_CS,Message Buffer 10 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x120++0x3
line.long 0x0 "MB2_64B_WORD2,Message Buffer 2 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
group.long 0x120++0x3
line.long 0x0 "MB4_32B_CS,Message Buffer 4 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x120++0x7
line.long 0x0 "MB6_16B_WORD2,Message Buffer 6 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
line.long 0x4 "ID10,Message Buffer 10 ID Register"
bitfld.long 0x4 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x4 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x124++0x3
line.long 0x0 "MB10_8B_ID,Message Buffer 10 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x124++0x3
line.long 0x0 "MB2_64B_WORD3,Message Buffer 2 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
group.long 0x124++0x3
line.long 0x0 "MB4_32B_ID,Message Buffer 4 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x124++0x7
line.long 0x0 "MB6_16B_WORD3,Message Buffer 6 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB10_8B_WORD0,Message Buffer 10 WORD_8B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x128++0x3
line.long 0x0 "MB2_64B_WORD4,Message Buffer 2 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_16,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_17,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_18,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_19,Data byte 0 of Rx/Tx frame."
group.long 0x128++0x3
line.long 0x0 "MB4_32B_WORD0,Message Buffer 4 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x128++0x3
line.long 0x0 "MB7_16B_CS,Message Buffer 7 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x128++0x7
line.long 0x0 "WORD010,Message Buffer 10 WORD0 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB10_8B_WORD1,Message Buffer 10 WORD_8B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x12C++0x3
line.long 0x0 "MB2_64B_WORD5,Message Buffer 2 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_20,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_21,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_22,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_23,Data byte 0 of Rx/Tx frame."
group.long 0x12C++0x3
line.long 0x0 "MB4_32B_WORD1,Message Buffer 4 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x12C++0x3
line.long 0x0 "MB7_16B_ID,Message Buffer 7 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x12C++0x7
line.long 0x0 "WORD110,Message Buffer 10 WORD1 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
line.long 0x4 "CS11,Message Buffer 11 CS Register"
bitfld.long 0x4 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x4 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x4 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x4 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x4 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x4 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x4 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x4 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x4 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x130++0x3
line.long 0x0 "MB11_8B_CS,Message Buffer 11 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x130++0x3
line.long 0x0 "MB2_64B_WORD6,Message Buffer 2 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_24,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_25,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_26,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_27,Data byte 0 of Rx/Tx frame."
group.long 0x130++0x3
line.long 0x0 "MB4_32B_WORD2,Message Buffer 4 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
group.long 0x130++0x7
line.long 0x0 "MB7_16B_WORD0,Message Buffer 7 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
line.long 0x4 "ID11,Message Buffer 11 ID Register"
bitfld.long 0x4 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x4 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x134++0x3
line.long 0x0 "MB11_8B_ID,Message Buffer 11 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x134++0x3
line.long 0x0 "MB2_64B_WORD7,Message Buffer 2 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_28,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_29,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_30,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_31,Data byte 0 of Rx/Tx frame."
group.long 0x134++0x3
line.long 0x0 "MB4_32B_WORD3,Message Buffer 4 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
group.long 0x134++0x7
line.long 0x0 "MB7_16B_WORD1,Message Buffer 7 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB11_8B_WORD0,Message Buffer 11 WORD_8B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x138++0x3
line.long 0x0 "MB2_64B_WORD8,Message Buffer 2 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_32,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_33,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_34,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_35,Data byte 0 of Rx/Tx frame."
group.long 0x138++0x3
line.long 0x0 "MB4_32B_WORD4,Message Buffer 4 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_16,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_17,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_18,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_19,Data byte 0 of Rx/Tx frame."
group.long 0x138++0x3
line.long 0x0 "MB7_16B_WORD2,Message Buffer 7 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
group.long 0x138++0x7
line.long 0x0 "WORD011,Message Buffer 11 WORD0 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB11_8B_WORD1,Message Buffer 11 WORD_8B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x13C++0x3
line.long 0x0 "MB2_64B_WORD9,Message Buffer 2 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_36,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_37,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_38,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_39,Data byte 0 of Rx/Tx frame."
group.long 0x13C++0x3
line.long 0x0 "MB4_32B_WORD5,Message Buffer 4 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_20,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_21,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_22,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_23,Data byte 0 of Rx/Tx frame."
group.long 0x13C++0x3
line.long 0x0 "MB7_16B_WORD3,Message Buffer 7 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
group.long 0x13C++0x7
line.long 0x0 "WORD111,Message Buffer 11 WORD1 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
line.long 0x4 "CS12,Message Buffer 12 CS Register"
bitfld.long 0x4 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x4 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x4 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x4 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x4 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x4 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x4 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x4 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x4 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x140++0x3
line.long 0x0 "MB12_8B_CS,Message Buffer 12 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x140++0x3
line.long 0x0 "MB2_64B_WORD10,Message Buffer 2 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_40,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_41,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_42,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_43,Data byte 0 of Rx/Tx frame."
group.long 0x140++0x3
line.long 0x0 "MB4_32B_WORD6,Message Buffer 4 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_24,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_25,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_26,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_27,Data byte 0 of Rx/Tx frame."
group.long 0x140++0x7
line.long 0x0 "MB8_16B_CS,Message Buffer 8 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
line.long 0x4 "ID12,Message Buffer 12 ID Register"
bitfld.long 0x4 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x4 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x144++0x3
line.long 0x0 "MB12_8B_ID,Message Buffer 12 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x144++0x3
line.long 0x0 "MB2_64B_WORD11,Message Buffer 2 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_44,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_45,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_46,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_47,Data byte 0 of Rx/Tx frame."
group.long 0x144++0x3
line.long 0x0 "MB4_32B_WORD7,Message Buffer 4 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_28,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_29,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_30,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_31,Data byte 0 of Rx/Tx frame."
group.long 0x144++0x7
line.long 0x0 "MB8_16B_ID,Message Buffer 8 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
line.long 0x4 "MB12_8B_WORD0,Message Buffer 12 WORD_8B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x148++0x3
line.long 0x0 "MB2_64B_WORD12,Message Buffer 2 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_48,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_49,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_50,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_51,Data byte 0 of Rx/Tx frame."
group.long 0x148++0x3
line.long 0x0 "MB5_32B_CS,Message Buffer 5 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x148++0x3
line.long 0x0 "MB8_16B_WORD0,Message Buffer 8 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x148++0x7
line.long 0x0 "WORD012,Message Buffer 12 WORD0 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB12_8B_WORD1,Message Buffer 12 WORD_8B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x14C++0x3
line.long 0x0 "MB2_64B_WORD13,Message Buffer 2 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_52,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_53,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_54,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_55,Data byte 0 of Rx/Tx frame."
group.long 0x14C++0x3
line.long 0x0 "MB5_32B_ID,Message Buffer 5 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x14C++0x3
line.long 0x0 "MB8_16B_WORD1,Message Buffer 8 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x14C++0x7
line.long 0x0 "WORD112,Message Buffer 12 WORD1 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
line.long 0x4 "CS13,Message Buffer 13 CS Register"
bitfld.long 0x4 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x4 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x4 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x4 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x4 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x4 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x4 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x4 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x4 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x150++0x3
line.long 0x0 "MB13_8B_CS,Message Buffer 13 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x150++0x3
line.long 0x0 "MB2_64B_WORD14,Message Buffer 2 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_56,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_57,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_58,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_59,Data byte 0 of Rx/Tx frame."
group.long 0x150++0x3
line.long 0x0 "MB5_32B_WORD0,Message Buffer 5 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x150++0x7
line.long 0x0 "MB8_16B_WORD2,Message Buffer 8 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
line.long 0x4 "ID13,Message Buffer 13 ID Register"
bitfld.long 0x4 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x4 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x154++0x3
line.long 0x0 "MB13_8B_ID,Message Buffer 13 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x154++0x3
line.long 0x0 "MB2_64B_WORD15,Message Buffer 2 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_60,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_61,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_62,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_63,Data byte 0 of Rx/Tx frame."
group.long 0x154++0x3
line.long 0x0 "MB5_32B_WORD1,Message Buffer 5 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x154++0x7
line.long 0x0 "MB8_16B_WORD3,Message Buffer 8 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB13_8B_WORD0,Message Buffer 13 WORD_8B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x158++0x3
line.long 0x0 "MB3_64B_CS,Message Buffer 3 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x158++0x3
line.long 0x0 "MB5_32B_WORD2,Message Buffer 5 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
group.long 0x158++0x3
line.long 0x0 "MB9_16B_CS,Message Buffer 9 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x158++0x7
line.long 0x0 "WORD013,Message Buffer 13 WORD0 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB13_8B_WORD1,Message Buffer 13 WORD_8B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x15C++0x3
line.long 0x0 "MB3_64B_ID,Message Buffer 3 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x15C++0x3
line.long 0x0 "MB5_32B_WORD3,Message Buffer 5 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
group.long 0x15C++0x3
line.long 0x0 "MB9_16B_ID,Message Buffer 9 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x15C++0x7
line.long 0x0 "WORD113,Message Buffer 13 WORD1 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
line.long 0x4 "CS14,Message Buffer 14 CS Register"
bitfld.long 0x4 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x4 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x4 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x4 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x4 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x4 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x4 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x4 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x4 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x160++0x3
line.long 0x0 "MB14_8B_CS,Message Buffer 14 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x160++0x3
line.long 0x0 "MB3_64B_WORD0,Message Buffer 3 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x160++0x3
line.long 0x0 "MB5_32B_WORD4,Message Buffer 5 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_16,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_17,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_18,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_19,Data byte 0 of Rx/Tx frame."
group.long 0x160++0x7
line.long 0x0 "MB9_16B_WORD0,Message Buffer 9 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
line.long 0x4 "ID14,Message Buffer 14 ID Register"
bitfld.long 0x4 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x4 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x164++0x3
line.long 0x0 "MB14_8B_ID,Message Buffer 14 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x164++0x3
line.long 0x0 "MB3_64B_WORD1,Message Buffer 3 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x164++0x3
line.long 0x0 "MB5_32B_WORD5,Message Buffer 5 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_20,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_21,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_22,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_23,Data byte 0 of Rx/Tx frame."
group.long 0x164++0x7
line.long 0x0 "MB9_16B_WORD1,Message Buffer 9 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB14_8B_WORD0,Message Buffer 14 WORD_8B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x168++0x3
line.long 0x0 "MB3_64B_WORD2,Message Buffer 3 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
group.long 0x168++0x3
line.long 0x0 "MB5_32B_WORD6,Message Buffer 5 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_24,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_25,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_26,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_27,Data byte 0 of Rx/Tx frame."
group.long 0x168++0x3
line.long 0x0 "MB9_16B_WORD2,Message Buffer 9 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
group.long 0x168++0x7
line.long 0x0 "WORD014,Message Buffer 14 WORD0 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB14_8B_WORD1,Message Buffer 14 WORD_8B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x16C++0x3
line.long 0x0 "MB3_64B_WORD3,Message Buffer 3 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
group.long 0x16C++0x3
line.long 0x0 "MB5_32B_WORD7,Message Buffer 5 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_28,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_29,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_30,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_31,Data byte 0 of Rx/Tx frame."
group.long 0x16C++0x3
line.long 0x0 "MB9_16B_WORD3,Message Buffer 9 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
group.long 0x16C++0x7
line.long 0x0 "WORD114,Message Buffer 14 WORD1 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
line.long 0x4 "CS15,Message Buffer 15 CS Register"
bitfld.long 0x4 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x4 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x4 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x4 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x4 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x4 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x4 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x4 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x4 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x170++0x3
line.long 0x0 "MB10_16B_CS,Message Buffer 10 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x170++0x3
line.long 0x0 "MB15_8B_CS,Message Buffer 15 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x170++0x3
line.long 0x0 "MB3_64B_WORD4,Message Buffer 3 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_16,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_17,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_18,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_19,Data byte 0 of Rx/Tx frame."
group.long 0x170++0x7
line.long 0x0 "MB6_32B_CS,Message Buffer 6 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
line.long 0x4 "ID15,Message Buffer 15 ID Register"
bitfld.long 0x4 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x4 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x174++0x3
line.long 0x0 "MB10_16B_ID,Message Buffer 10 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x174++0x3
line.long 0x0 "MB15_8B_ID,Message Buffer 15 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x174++0x3
line.long 0x0 "MB3_64B_WORD5,Message Buffer 3 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_20,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_21,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_22,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_23,Data byte 0 of Rx/Tx frame."
group.long 0x174++0x7
line.long 0x0 "MB6_32B_ID,Message Buffer 6 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
line.long 0x4 "MB10_16B_WORD0,Message Buffer 10 WORD_16B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x178++0x3
line.long 0x0 "MB15_8B_WORD0,Message Buffer 15 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x178++0x3
line.long 0x0 "MB3_64B_WORD6,Message Buffer 3 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_24,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_25,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_26,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_27,Data byte 0 of Rx/Tx frame."
group.long 0x178++0x3
line.long 0x0 "MB6_32B_WORD0,Message Buffer 6 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x178++0x7
line.long 0x0 "WORD015,Message Buffer 15 WORD0 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB10_16B_WORD1,Message Buffer 10 WORD_16B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x17C++0x3
line.long 0x0 "MB15_8B_WORD1,Message Buffer 15 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x17C++0x3
line.long 0x0 "MB3_64B_WORD7,Message Buffer 3 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_28,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_29,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_30,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_31,Data byte 0 of Rx/Tx frame."
group.long 0x17C++0x3
line.long 0x0 "MB6_32B_WORD1,Message Buffer 6 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x17C++0x7
line.long 0x0 "WORD115,Message Buffer 15 WORD1 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
line.long 0x4 "CS16,Message Buffer 16 CS Register"
bitfld.long 0x4 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x4 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x4 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x4 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x4 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x4 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x4 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x4 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x4 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x180++0x3
line.long 0x0 "MB10_16B_WORD2,Message Buffer 10 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
group.long 0x180++0x3
line.long 0x0 "MB16_8B_CS,Message Buffer 16 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x180++0x3
line.long 0x0 "MB3_64B_WORD8,Message Buffer 3 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_32,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_33,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_34,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_35,Data byte 0 of Rx/Tx frame."
group.long 0x180++0x7
line.long 0x0 "MB6_32B_WORD2,Message Buffer 6 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
line.long 0x4 "ID16,Message Buffer 16 ID Register"
bitfld.long 0x4 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x4 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x184++0x3
line.long 0x0 "MB10_16B_WORD3,Message Buffer 10 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
group.long 0x184++0x3
line.long 0x0 "MB16_8B_ID,Message Buffer 16 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x184++0x3
line.long 0x0 "MB3_64B_WORD9,Message Buffer 3 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_36,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_37,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_38,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_39,Data byte 0 of Rx/Tx frame."
group.long 0x184++0x7
line.long 0x0 "MB6_32B_WORD3,Message Buffer 6 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB11_16B_CS,Message Buffer 11 CS Register"
bitfld.long 0x4 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x4 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x4 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x4 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x4 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x4 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x4 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x4 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x4 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x188++0x3
line.long 0x0 "MB16_8B_WORD0,Message Buffer 16 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x188++0x3
line.long 0x0 "MB3_64B_WORD10,Message Buffer 3 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_40,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_41,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_42,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_43,Data byte 0 of Rx/Tx frame."
group.long 0x188++0x3
line.long 0x0 "MB6_32B_WORD4,Message Buffer 6 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_16,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_17,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_18,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_19,Data byte 0 of Rx/Tx frame."
group.long 0x188++0x7
line.long 0x0 "WORD016,Message Buffer 16 WORD0 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB11_16B_ID,Message Buffer 11 ID Register"
bitfld.long 0x4 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x4 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x18C++0x3
line.long 0x0 "MB16_8B_WORD1,Message Buffer 16 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x18C++0x3
line.long 0x0 "MB3_64B_WORD11,Message Buffer 3 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_44,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_45,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_46,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_47,Data byte 0 of Rx/Tx frame."
group.long 0x18C++0x3
line.long 0x0 "MB6_32B_WORD5,Message Buffer 6 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_20,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_21,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_22,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_23,Data byte 0 of Rx/Tx frame."
group.long 0x18C++0x7
line.long 0x0 "WORD116,Message Buffer 16 WORD1 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
line.long 0x4 "CS17,Message Buffer 17 CS Register"
bitfld.long 0x4 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x4 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x4 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x4 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x4 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x4 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x4 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x4 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x4 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x190++0x3
line.long 0x0 "MB11_16B_WORD0,Message Buffer 11 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x190++0x3
line.long 0x0 "MB17_8B_CS,Message Buffer 17 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x190++0x3
line.long 0x0 "MB3_64B_WORD12,Message Buffer 3 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_48,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_49,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_50,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_51,Data byte 0 of Rx/Tx frame."
group.long 0x190++0x7
line.long 0x0 "MB6_32B_WORD6,Message Buffer 6 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_24,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_25,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_26,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_27,Data byte 0 of Rx/Tx frame."
line.long 0x4 "ID17,Message Buffer 17 ID Register"
bitfld.long 0x4 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x4 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x194++0x3
line.long 0x0 "MB11_16B_WORD1,Message Buffer 11 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x194++0x3
line.long 0x0 "MB17_8B_ID,Message Buffer 17 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x194++0x3
line.long 0x0 "MB3_64B_WORD13,Message Buffer 3 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_52,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_53,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_54,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_55,Data byte 0 of Rx/Tx frame."
group.long 0x194++0x7
line.long 0x0 "MB6_32B_WORD7,Message Buffer 6 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_28,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_29,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_30,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_31,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB11_16B_WORD2,Message Buffer 11 WORD_16B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
group.long 0x198++0x3
line.long 0x0 "MB17_8B_WORD0,Message Buffer 17 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x198++0x3
line.long 0x0 "MB3_64B_WORD14,Message Buffer 3 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_56,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_57,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_58,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_59,Data byte 0 of Rx/Tx frame."
group.long 0x198++0x3
line.long 0x0 "MB7_32B_CS,Message Buffer 7 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x198++0x7
line.long 0x0 "WORD017,Message Buffer 17 WORD0 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB11_16B_WORD3,Message Buffer 11 WORD_16B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
group.long 0x19C++0x3
line.long 0x0 "MB17_8B_WORD1,Message Buffer 17 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x19C++0x3
line.long 0x0 "MB3_64B_WORD15,Message Buffer 3 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_60,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_61,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_62,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_63,Data byte 0 of Rx/Tx frame."
group.long 0x19C++0x3
line.long 0x0 "MB7_32B_ID,Message Buffer 7 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x19C++0x7
line.long 0x0 "WORD117,Message Buffer 17 WORD1 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
line.long 0x4 "CS18,Message Buffer 18 CS Register"
bitfld.long 0x4 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x4 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x4 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x4 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x4 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x4 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x4 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x4 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x4 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x1A0++0x3
line.long 0x0 "MB12_16B_CS,Message Buffer 12 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x1A0++0x3
line.long 0x0 "MB18_8B_CS,Message Buffer 18 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x1A0++0x3
line.long 0x0 "MB4_64B_CS,Message Buffer 4 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x1A0++0x7
line.long 0x0 "MB7_32B_WORD0,Message Buffer 7 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
line.long 0x4 "ID18,Message Buffer 18 ID Register"
bitfld.long 0x4 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x4 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x1A4++0x3
line.long 0x0 "MB12_16B_ID,Message Buffer 12 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x1A4++0x3
line.long 0x0 "MB18_8B_ID,Message Buffer 18 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x1A4++0x3
line.long 0x0 "MB4_64B_ID,Message Buffer 4 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x1A4++0x7
line.long 0x0 "MB7_32B_WORD1,Message Buffer 7 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB12_16B_WORD0,Message Buffer 12 WORD_16B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x1A8++0x3
line.long 0x0 "MB18_8B_WORD0,Message Buffer 18 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x1A8++0x3
line.long 0x0 "MB4_64B_WORD0,Message Buffer 4 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x1A8++0x3
line.long 0x0 "MB7_32B_WORD2,Message Buffer 7 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
group.long 0x1A8++0x7
line.long 0x0 "WORD018,Message Buffer 18 WORD0 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB12_16B_WORD1,Message Buffer 12 WORD_16B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x1AC++0x3
line.long 0x0 "MB18_8B_WORD1,Message Buffer 18 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x1AC++0x3
line.long 0x0 "MB4_64B_WORD1,Message Buffer 4 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x1AC++0x3
line.long 0x0 "MB7_32B_WORD3,Message Buffer 7 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
group.long 0x1AC++0x7
line.long 0x0 "WORD118,Message Buffer 18 WORD1 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
line.long 0x4 "CS19,Message Buffer 19 CS Register"
bitfld.long 0x4 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x4 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x4 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x4 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x4 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x4 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x4 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x4 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x4 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x1B0++0x3
line.long 0x0 "MB12_16B_WORD2,Message Buffer 12 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
group.long 0x1B0++0x3
line.long 0x0 "MB19_8B_CS,Message Buffer 19 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x1B0++0x3
line.long 0x0 "MB4_64B_WORD2,Message Buffer 4 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
group.long 0x1B0++0x7
line.long 0x0 "MB7_32B_WORD4,Message Buffer 7 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_16,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_17,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_18,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_19,Data byte 0 of Rx/Tx frame."
line.long 0x4 "ID19,Message Buffer 19 ID Register"
bitfld.long 0x4 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x4 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x1B4++0x3
line.long 0x0 "MB12_16B_WORD3,Message Buffer 12 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
group.long 0x1B4++0x3
line.long 0x0 "MB19_8B_ID,Message Buffer 19 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x1B4++0x3
line.long 0x0 "MB4_64B_WORD3,Message Buffer 4 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
group.long 0x1B4++0x7
line.long 0x0 "MB7_32B_WORD5,Message Buffer 7 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_20,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_21,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_22,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_23,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB13_16B_CS,Message Buffer 13 CS Register"
bitfld.long 0x4 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x4 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x4 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x4 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x4 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x4 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x4 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x4 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x4 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x1B8++0x3
line.long 0x0 "MB19_8B_WORD0,Message Buffer 19 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x1B8++0x3
line.long 0x0 "MB4_64B_WORD4,Message Buffer 4 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_16,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_17,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_18,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_19,Data byte 0 of Rx/Tx frame."
group.long 0x1B8++0x3
line.long 0x0 "MB7_32B_WORD6,Message Buffer 7 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_24,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_25,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_26,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_27,Data byte 0 of Rx/Tx frame."
group.long 0x1B8++0x7
line.long 0x0 "WORD019,Message Buffer 19 WORD0 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB13_16B_ID,Message Buffer 13 ID Register"
bitfld.long 0x4 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x4 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x1BC++0x3
line.long 0x0 "MB19_8B_WORD1,Message Buffer 19 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x1BC++0x3
line.long 0x0 "MB4_64B_WORD5,Message Buffer 4 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_20,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_21,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_22,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_23,Data byte 0 of Rx/Tx frame."
group.long 0x1BC++0x3
line.long 0x0 "MB7_32B_WORD7,Message Buffer 7 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_28,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_29,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_30,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_31,Data byte 0 of Rx/Tx frame."
group.long 0x1BC++0x7
line.long 0x0 "WORD119,Message Buffer 19 WORD1 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
line.long 0x4 "CS20,Message Buffer 20 CS Register"
bitfld.long 0x4 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x4 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x4 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x4 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x4 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x4 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x4 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x4 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x4 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x1C0++0x3
line.long 0x0 "MB13_16B_WORD0,Message Buffer 13 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x1C0++0x3
line.long 0x0 "MB20_8B_CS,Message Buffer 20 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x1C0++0x3
line.long 0x0 "MB4_64B_WORD6,Message Buffer 4 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_24,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_25,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_26,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_27,Data byte 0 of Rx/Tx frame."
group.long 0x1C0++0x7
line.long 0x0 "MB8_32B_CS,Message Buffer 8 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
line.long 0x4 "ID20,Message Buffer 20 ID Register"
bitfld.long 0x4 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x4 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x1C4++0x3
line.long 0x0 "MB13_16B_WORD1,Message Buffer 13 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x1C4++0x3
line.long 0x0 "MB20_8B_ID,Message Buffer 20 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x1C4++0x3
line.long 0x0 "MB4_64B_WORD7,Message Buffer 4 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_28,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_29,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_30,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_31,Data byte 0 of Rx/Tx frame."
group.long 0x1C4++0x7
line.long 0x0 "MB8_32B_ID,Message Buffer 8 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
line.long 0x4 "MB13_16B_WORD2,Message Buffer 13 WORD_16B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
group.long 0x1C8++0x3
line.long 0x0 "MB20_8B_WORD0,Message Buffer 20 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x1C8++0x3
line.long 0x0 "MB4_64B_WORD8,Message Buffer 4 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_32,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_33,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_34,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_35,Data byte 0 of Rx/Tx frame."
group.long 0x1C8++0x3
line.long 0x0 "MB8_32B_WORD0,Message Buffer 8 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x1C8++0x7
line.long 0x0 "WORD020,Message Buffer 20 WORD0 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB13_16B_WORD3,Message Buffer 13 WORD_16B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
group.long 0x1CC++0x3
line.long 0x0 "MB20_8B_WORD1,Message Buffer 20 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x1CC++0x3
line.long 0x0 "MB4_64B_WORD9,Message Buffer 4 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_36,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_37,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_38,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_39,Data byte 0 of Rx/Tx frame."
group.long 0x1CC++0x3
line.long 0x0 "MB8_32B_WORD1,Message Buffer 8 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x1CC++0x7
line.long 0x0 "WORD120,Message Buffer 20 WORD1 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
line.long 0x4 "CS21,Message Buffer 21 CS Register"
bitfld.long 0x4 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x4 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x4 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x4 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x4 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x4 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x4 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x4 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x4 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x1D0++0x3
line.long 0x0 "MB14_16B_CS,Message Buffer 14 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x1D0++0x3
line.long 0x0 "MB21_8B_CS,Message Buffer 21 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x1D0++0x3
line.long 0x0 "MB4_64B_WORD10,Message Buffer 4 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_40,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_41,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_42,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_43,Data byte 0 of Rx/Tx frame."
group.long 0x1D0++0x7
line.long 0x0 "MB8_32B_WORD2,Message Buffer 8 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
line.long 0x4 "ID21,Message Buffer 21 ID Register"
bitfld.long 0x4 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x4 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x1D4++0x3
line.long 0x0 "MB14_16B_ID,Message Buffer 14 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x1D4++0x3
line.long 0x0 "MB21_8B_ID,Message Buffer 21 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x1D4++0x3
line.long 0x0 "MB4_64B_WORD11,Message Buffer 4 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_44,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_45,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_46,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_47,Data byte 0 of Rx/Tx frame."
group.long 0x1D4++0x7
line.long 0x0 "MB8_32B_WORD3,Message Buffer 8 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB14_16B_WORD0,Message Buffer 14 WORD_16B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x1D8++0x3
line.long 0x0 "MB21_8B_WORD0,Message Buffer 21 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x1D8++0x3
line.long 0x0 "MB4_64B_WORD12,Message Buffer 4 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_48,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_49,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_50,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_51,Data byte 0 of Rx/Tx frame."
group.long 0x1D8++0x3
line.long 0x0 "MB8_32B_WORD4,Message Buffer 8 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_16,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_17,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_18,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_19,Data byte 0 of Rx/Tx frame."
group.long 0x1D8++0x7
line.long 0x0 "WORD021,Message Buffer 21 WORD0 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB14_16B_WORD1,Message Buffer 14 WORD_16B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x1DC++0x3
line.long 0x0 "MB21_8B_WORD1,Message Buffer 21 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x1DC++0x3
line.long 0x0 "MB4_64B_WORD13,Message Buffer 4 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_52,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_53,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_54,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_55,Data byte 0 of Rx/Tx frame."
group.long 0x1DC++0x3
line.long 0x0 "MB8_32B_WORD5,Message Buffer 8 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_20,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_21,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_22,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_23,Data byte 0 of Rx/Tx frame."
group.long 0x1DC++0x7
line.long 0x0 "WORD121,Message Buffer 21 WORD1 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
line.long 0x4 "CS22,Message Buffer 22 CS Register"
bitfld.long 0x4 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x4 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x4 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x4 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x4 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x4 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x4 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x4 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x4 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x1E0++0x3
line.long 0x0 "MB14_16B_WORD2,Message Buffer 14 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
group.long 0x1E0++0x3
line.long 0x0 "MB22_8B_CS,Message Buffer 22 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x1E0++0x3
line.long 0x0 "MB4_64B_WORD14,Message Buffer 4 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_56,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_57,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_58,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_59,Data byte 0 of Rx/Tx frame."
group.long 0x1E0++0x7
line.long 0x0 "MB8_32B_WORD6,Message Buffer 8 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_24,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_25,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_26,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_27,Data byte 0 of Rx/Tx frame."
line.long 0x4 "ID22,Message Buffer 22 ID Register"
bitfld.long 0x4 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x4 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x1E4++0x3
line.long 0x0 "MB14_16B_WORD3,Message Buffer 14 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
group.long 0x1E4++0x3
line.long 0x0 "MB22_8B_ID,Message Buffer 22 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x1E4++0x3
line.long 0x0 "MB4_64B_WORD15,Message Buffer 4 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_60,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_61,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_62,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_63,Data byte 0 of Rx/Tx frame."
group.long 0x1E4++0x7
line.long 0x0 "MB8_32B_WORD7,Message Buffer 8 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_28,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_29,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_30,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_31,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB15_16B_CS,Message Buffer 15 CS Register"
bitfld.long 0x4 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x4 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x4 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x4 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x4 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x4 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x4 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x4 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x4 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x1E8++0x3
line.long 0x0 "MB22_8B_WORD0,Message Buffer 22 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x1E8++0x3
line.long 0x0 "MB5_64B_CS,Message Buffer 5 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x1E8++0x3
line.long 0x0 "MB9_32B_CS,Message Buffer 9 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x1E8++0x7
line.long 0x0 "WORD022,Message Buffer 22 WORD0 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB15_16B_ID,Message Buffer 15 ID Register"
bitfld.long 0x4 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x4 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x1EC++0x3
line.long 0x0 "MB22_8B_WORD1,Message Buffer 22 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x1EC++0x3
line.long 0x0 "MB5_64B_ID,Message Buffer 5 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x1EC++0x3
line.long 0x0 "MB9_32B_ID,Message Buffer 9 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x1EC++0x7
line.long 0x0 "WORD122,Message Buffer 22 WORD1 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
line.long 0x4 "CS23,Message Buffer 23 CS Register"
bitfld.long 0x4 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x4 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x4 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x4 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x4 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x4 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x4 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x4 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x4 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x1F0++0x3
line.long 0x0 "MB15_16B_WORD0,Message Buffer 15 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x1F0++0x3
line.long 0x0 "MB23_8B_CS,Message Buffer 23 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x1F0++0x3
line.long 0x0 "MB5_64B_WORD0,Message Buffer 5 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x1F0++0x7
line.long 0x0 "MB9_32B_WORD0,Message Buffer 9 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
line.long 0x4 "ID23,Message Buffer 23 ID Register"
bitfld.long 0x4 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x4 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x1F4++0x3
line.long 0x0 "MB15_16B_WORD1,Message Buffer 15 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x1F4++0x3
line.long 0x0 "MB23_8B_ID,Message Buffer 23 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x1F4++0x3
line.long 0x0 "MB5_64B_WORD1,Message Buffer 5 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x1F4++0x7
line.long 0x0 "MB9_32B_WORD1,Message Buffer 9 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB15_16B_WORD2,Message Buffer 15 WORD_16B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
group.long 0x1F8++0x3
line.long 0x0 "MB23_8B_WORD0,Message Buffer 23 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x1F8++0x3
line.long 0x0 "MB5_64B_WORD2,Message Buffer 5 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
group.long 0x1F8++0x3
line.long 0x0 "MB9_32B_WORD2,Message Buffer 9 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
group.long 0x1F8++0x7
line.long 0x0 "WORD023,Message Buffer 23 WORD0 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB15_16B_WORD3,Message Buffer 15 WORD_16B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
group.long 0x1FC++0x3
line.long 0x0 "MB23_8B_WORD1,Message Buffer 23 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x1FC++0x3
line.long 0x0 "MB5_64B_WORD3,Message Buffer 5 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
group.long 0x1FC++0x3
line.long 0x0 "MB9_32B_WORD3,Message Buffer 9 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
group.long 0x1FC++0x7
line.long 0x0 "WORD123,Message Buffer 23 WORD1 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
line.long 0x4 "CS24,Message Buffer 24 CS Register"
bitfld.long 0x4 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x4 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x4 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x4 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x4 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x4 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x4 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x4 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x4 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x200++0x3
line.long 0x0 "MB16_16B_CS,Message Buffer 16 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x200++0x3
line.long 0x0 "MB24_8B_CS,Message Buffer 24 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x200++0x3
line.long 0x0 "MB5_64B_WORD4,Message Buffer 5 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_16,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_17,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_18,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_19,Data byte 0 of Rx/Tx frame."
group.long 0x200++0x7
line.long 0x0 "MB9_32B_WORD4,Message Buffer 9 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_16,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_17,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_18,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_19,Data byte 0 of Rx/Tx frame."
line.long 0x4 "ID24,Message Buffer 24 ID Register"
bitfld.long 0x4 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x4 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x204++0x3
line.long 0x0 "MB16_16B_ID,Message Buffer 16 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x204++0x3
line.long 0x0 "MB24_8B_ID,Message Buffer 24 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x204++0x3
line.long 0x0 "MB5_64B_WORD5,Message Buffer 5 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_20,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_21,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_22,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_23,Data byte 0 of Rx/Tx frame."
group.long 0x204++0x7
line.long 0x0 "MB9_32B_WORD5,Message Buffer 9 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_20,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_21,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_22,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_23,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB16_16B_WORD0,Message Buffer 16 WORD_16B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x208++0x3
line.long 0x0 "MB24_8B_WORD0,Message Buffer 24 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x208++0x3
line.long 0x0 "MB5_64B_WORD6,Message Buffer 5 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_24,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_25,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_26,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_27,Data byte 0 of Rx/Tx frame."
group.long 0x208++0x3
line.long 0x0 "MB9_32B_WORD6,Message Buffer 9 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_24,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_25,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_26,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_27,Data byte 0 of Rx/Tx frame."
group.long 0x208++0x7
line.long 0x0 "WORD024,Message Buffer 24 WORD0 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB16_16B_WORD1,Message Buffer 16 WORD_16B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x20C++0x3
line.long 0x0 "MB24_8B_WORD1,Message Buffer 24 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x20C++0x3
line.long 0x0 "MB5_64B_WORD7,Message Buffer 5 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_28,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_29,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_30,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_31,Data byte 0 of Rx/Tx frame."
group.long 0x20C++0x3
line.long 0x0 "MB9_32B_WORD7,Message Buffer 9 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_28,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_29,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_30,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_31,Data byte 0 of Rx/Tx frame."
group.long 0x20C++0x7
line.long 0x0 "WORD124,Message Buffer 24 WORD1 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
line.long 0x4 "CS25,Message Buffer 25 CS Register"
bitfld.long 0x4 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x4 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x4 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x4 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x4 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x4 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x4 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x4 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x4 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x210++0x3
line.long 0x0 "MB10_32B_CS,Message Buffer 10 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x210++0x3
line.long 0x0 "MB16_16B_WORD2,Message Buffer 16 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
group.long 0x210++0x3
line.long 0x0 "MB25_8B_CS,Message Buffer 25 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x210++0x7
line.long 0x0 "MB5_64B_WORD8,Message Buffer 5 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_32,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_33,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_34,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_35,Data byte 0 of Rx/Tx frame."
line.long 0x4 "ID25,Message Buffer 25 ID Register"
bitfld.long 0x4 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x4 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x214++0x3
line.long 0x0 "MB10_32B_ID,Message Buffer 10 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x214++0x3
line.long 0x0 "MB16_16B_WORD3,Message Buffer 16 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
group.long 0x214++0x3
line.long 0x0 "MB25_8B_ID,Message Buffer 25 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x214++0x7
line.long 0x0 "MB5_64B_WORD9,Message Buffer 5 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_36,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_37,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_38,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_39,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB10_32B_WORD0,Message Buffer 10 WORD_32B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x218++0x3
line.long 0x0 "MB17_16B_CS,Message Buffer 17 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x218++0x3
line.long 0x0 "MB25_8B_WORD0,Message Buffer 25 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x218++0x3
line.long 0x0 "MB5_64B_WORD10,Message Buffer 5 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_40,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_41,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_42,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_43,Data byte 0 of Rx/Tx frame."
group.long 0x218++0x7
line.long 0x0 "WORD025,Message Buffer 25 WORD0 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB10_32B_WORD1,Message Buffer 10 WORD_32B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x21C++0x3
line.long 0x0 "MB17_16B_ID,Message Buffer 17 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x21C++0x3
line.long 0x0 "MB25_8B_WORD1,Message Buffer 25 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x21C++0x3
line.long 0x0 "MB5_64B_WORD11,Message Buffer 5 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_44,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_45,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_46,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_47,Data byte 0 of Rx/Tx frame."
group.long 0x21C++0x7
line.long 0x0 "WORD125,Message Buffer 25 WORD1 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
line.long 0x4 "CS26,Message Buffer 26 CS Register"
bitfld.long 0x4 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x4 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x4 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x4 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x4 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x4 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x4 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x4 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x4 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x220++0x3
line.long 0x0 "MB10_32B_WORD2,Message Buffer 10 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
group.long 0x220++0x3
line.long 0x0 "MB17_16B_WORD0,Message Buffer 17 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x220++0x3
line.long 0x0 "MB26_8B_CS,Message Buffer 26 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x220++0x7
line.long 0x0 "MB5_64B_WORD12,Message Buffer 5 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_48,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_49,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_50,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_51,Data byte 0 of Rx/Tx frame."
line.long 0x4 "ID26,Message Buffer 26 ID Register"
bitfld.long 0x4 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x4 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x224++0x3
line.long 0x0 "MB10_32B_WORD3,Message Buffer 10 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
group.long 0x224++0x3
line.long 0x0 "MB17_16B_WORD1,Message Buffer 17 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x224++0x3
line.long 0x0 "MB26_8B_ID,Message Buffer 26 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x224++0x7
line.long 0x0 "MB5_64B_WORD13,Message Buffer 5 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_52,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_53,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_54,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_55,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB10_32B_WORD4,Message Buffer 10 WORD_32B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_16,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_17,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_18,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_19,Data byte 0 of Rx/Tx frame."
group.long 0x228++0x3
line.long 0x0 "MB17_16B_WORD2,Message Buffer 17 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
group.long 0x228++0x3
line.long 0x0 "MB26_8B_WORD0,Message Buffer 26 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x228++0x3
line.long 0x0 "MB5_64B_WORD14,Message Buffer 5 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_56,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_57,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_58,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_59,Data byte 0 of Rx/Tx frame."
group.long 0x228++0x7
line.long 0x0 "WORD026,Message Buffer 26 WORD0 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB10_32B_WORD5,Message Buffer 10 WORD_32B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_20,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_21,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_22,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_23,Data byte 0 of Rx/Tx frame."
group.long 0x22C++0x3
line.long 0x0 "MB17_16B_WORD3,Message Buffer 17 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
group.long 0x22C++0x3
line.long 0x0 "MB26_8B_WORD1,Message Buffer 26 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x22C++0x3
line.long 0x0 "MB5_64B_WORD15,Message Buffer 5 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_60,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_61,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_62,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_63,Data byte 0 of Rx/Tx frame."
group.long 0x22C++0x7
line.long 0x0 "WORD126,Message Buffer 26 WORD1 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
line.long 0x4 "CS27,Message Buffer 27 CS Register"
bitfld.long 0x4 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x4 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x4 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x4 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x4 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x4 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x4 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x4 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x4 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x230++0x3
line.long 0x0 "MB10_32B_WORD6,Message Buffer 10 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_24,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_25,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_26,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_27,Data byte 0 of Rx/Tx frame."
group.long 0x230++0x3
line.long 0x0 "MB18_16B_CS,Message Buffer 18 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x230++0x3
line.long 0x0 "MB27_8B_CS,Message Buffer 27 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x230++0x7
line.long 0x0 "MB6_64B_CS,Message Buffer 6 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
line.long 0x4 "ID27,Message Buffer 27 ID Register"
bitfld.long 0x4 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x4 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x234++0x3
line.long 0x0 "MB10_32B_WORD7,Message Buffer 10 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_28,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_29,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_30,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_31,Data byte 0 of Rx/Tx frame."
group.long 0x234++0x3
line.long 0x0 "MB18_16B_ID,Message Buffer 18 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x234++0x3
line.long 0x0 "MB27_8B_ID,Message Buffer 27 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x234++0x7
line.long 0x0 "MB6_64B_ID,Message Buffer 6 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
line.long 0x4 "MB11_32B_CS,Message Buffer 11 CS Register"
bitfld.long 0x4 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x4 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x4 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x4 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x4 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x4 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x4 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x4 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x4 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x238++0x3
line.long 0x0 "MB18_16B_WORD0,Message Buffer 18 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x238++0x3
line.long 0x0 "MB27_8B_WORD0,Message Buffer 27 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x238++0x3
line.long 0x0 "MB6_64B_WORD0,Message Buffer 6 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x238++0x7
line.long 0x0 "WORD027,Message Buffer 27 WORD0 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB11_32B_ID,Message Buffer 11 ID Register"
bitfld.long 0x4 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x4 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x23C++0x3
line.long 0x0 "MB18_16B_WORD1,Message Buffer 18 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x23C++0x3
line.long 0x0 "MB27_8B_WORD1,Message Buffer 27 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x23C++0x3
line.long 0x0 "MB6_64B_WORD1,Message Buffer 6 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x23C++0x7
line.long 0x0 "WORD127,Message Buffer 27 WORD1 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
line.long 0x4 "CS28,Message Buffer 28 CS Register"
bitfld.long 0x4 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x4 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x4 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x4 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x4 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x4 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x4 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x4 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x4 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x240++0x3
line.long 0x0 "MB11_32B_WORD0,Message Buffer 11 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x240++0x3
line.long 0x0 "MB18_16B_WORD2,Message Buffer 18 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
group.long 0x240++0x3
line.long 0x0 "MB28_8B_CS,Message Buffer 28 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x240++0x7
line.long 0x0 "MB6_64B_WORD2,Message Buffer 6 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
line.long 0x4 "ID28,Message Buffer 28 ID Register"
bitfld.long 0x4 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x4 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x244++0x3
line.long 0x0 "MB11_32B_WORD1,Message Buffer 11 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x244++0x3
line.long 0x0 "MB18_16B_WORD3,Message Buffer 18 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
group.long 0x244++0x3
line.long 0x0 "MB28_8B_ID,Message Buffer 28 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x244++0x7
line.long 0x0 "MB6_64B_WORD3,Message Buffer 6 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB11_32B_WORD2,Message Buffer 11 WORD_32B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
group.long 0x248++0x3
line.long 0x0 "MB19_16B_CS,Message Buffer 19 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x248++0x3
line.long 0x0 "MB28_8B_WORD0,Message Buffer 28 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x248++0x3
line.long 0x0 "MB6_64B_WORD4,Message Buffer 6 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_16,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_17,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_18,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_19,Data byte 0 of Rx/Tx frame."
group.long 0x248++0x7
line.long 0x0 "WORD028,Message Buffer 28 WORD0 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB11_32B_WORD3,Message Buffer 11 WORD_32B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
group.long 0x24C++0x3
line.long 0x0 "MB19_16B_ID,Message Buffer 19 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x24C++0x3
line.long 0x0 "MB28_8B_WORD1,Message Buffer 28 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x24C++0x3
line.long 0x0 "MB6_64B_WORD5,Message Buffer 6 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_20,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_21,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_22,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_23,Data byte 0 of Rx/Tx frame."
group.long 0x24C++0x7
line.long 0x0 "WORD128,Message Buffer 28 WORD1 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
line.long 0x4 "CS29,Message Buffer 29 CS Register"
bitfld.long 0x4 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x4 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x4 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x4 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x4 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x4 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x4 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x4 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x4 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x250++0x3
line.long 0x0 "MB11_32B_WORD4,Message Buffer 11 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_16,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_17,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_18,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_19,Data byte 0 of Rx/Tx frame."
group.long 0x250++0x3
line.long 0x0 "MB19_16B_WORD0,Message Buffer 19 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x250++0x3
line.long 0x0 "MB29_8B_CS,Message Buffer 29 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x250++0x7
line.long 0x0 "MB6_64B_WORD6,Message Buffer 6 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_24,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_25,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_26,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_27,Data byte 0 of Rx/Tx frame."
line.long 0x4 "ID29,Message Buffer 29 ID Register"
bitfld.long 0x4 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x4 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x254++0x3
line.long 0x0 "MB11_32B_WORD5,Message Buffer 11 WORD_32B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_20,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_21,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_22,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_23,Data byte 0 of Rx/Tx frame."
group.long 0x254++0x3
line.long 0x0 "MB19_16B_WORD1,Message Buffer 19 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x254++0x3
line.long 0x0 "MB29_8B_ID,Message Buffer 29 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x254++0x7
line.long 0x0 "MB6_64B_WORD7,Message Buffer 6 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_28,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_29,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_30,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_31,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB11_32B_WORD6,Message Buffer 11 WORD_32B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_24,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_25,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_26,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_27,Data byte 0 of Rx/Tx frame."
group.long 0x258++0x3
line.long 0x0 "MB19_16B_WORD2,Message Buffer 19 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
group.long 0x258++0x3
line.long 0x0 "MB29_8B_WORD0,Message Buffer 29 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x258++0x3
line.long 0x0 "MB6_64B_WORD8,Message Buffer 6 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_32,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_33,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_34,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_35,Data byte 0 of Rx/Tx frame."
group.long 0x258++0x7
line.long 0x0 "WORD029,Message Buffer 29 WORD0 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB11_32B_WORD7,Message Buffer 11 WORD_32B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_28,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_29,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_30,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_31,Data byte 0 of Rx/Tx frame."
group.long 0x25C++0x3
line.long 0x0 "MB19_16B_WORD3,Message Buffer 19 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
group.long 0x25C++0x3
line.long 0x0 "MB29_8B_WORD1,Message Buffer 29 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x25C++0x3
line.long 0x0 "MB6_64B_WORD9,Message Buffer 6 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_36,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_37,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_38,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_39,Data byte 0 of Rx/Tx frame."
group.long 0x25C++0x7
line.long 0x0 "WORD129,Message Buffer 29 WORD1 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
line.long 0x4 "CS30,Message Buffer 30 CS Register"
bitfld.long 0x4 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x4 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x4 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x4 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x4 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x4 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x4 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x4 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x4 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x260++0x3
line.long 0x0 "MB20_16B_CS,Message Buffer 20 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x260++0x3
line.long 0x0 "MB30_8B_CS,Message Buffer 30 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x260++0x7
line.long 0x0 "MB6_64B_WORD10,Message Buffer 6 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_40,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_41,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_42,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_43,Data byte 0 of Rx/Tx frame."
line.long 0x4 "ID30,Message Buffer 30 ID Register"
bitfld.long 0x4 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x4 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x264++0x3
line.long 0x0 "MB20_16B_ID,Message Buffer 20 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x264++0x3
line.long 0x0 "MB30_8B_ID,Message Buffer 30 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x264++0x7
line.long 0x0 "MB6_64B_WORD11,Message Buffer 6 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_44,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_45,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_46,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_47,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB20_16B_WORD0,Message Buffer 20 WORD_16B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x268++0x3
line.long 0x0 "MB30_8B_WORD0,Message Buffer 30 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x268++0x3
line.long 0x0 "MB6_64B_WORD12,Message Buffer 6 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_48,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_49,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_50,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_51,Data byte 0 of Rx/Tx frame."
group.long 0x268++0x7
line.long 0x0 "WORD030,Message Buffer 30 WORD0 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB20_16B_WORD1,Message Buffer 20 WORD_16B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x26C++0x3
line.long 0x0 "MB30_8B_WORD1,Message Buffer 30 WORD_8B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x26C++0x3
line.long 0x0 "MB6_64B_WORD13,Message Buffer 6 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_52,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_53,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_54,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_55,Data byte 0 of Rx/Tx frame."
group.long 0x26C++0x7
line.long 0x0 "WORD130,Message Buffer 30 WORD1 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
line.long 0x4 "CS31,Message Buffer 31 CS Register"
bitfld.long 0x4 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x4 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x4 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x4 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x4 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x4 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x4 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x4 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x4 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x270++0x3
line.long 0x0 "MB20_16B_WORD2,Message Buffer 20 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_8,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_9,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_10,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_11,Data byte 0 of Rx/Tx frame."
group.long 0x270++0x3
line.long 0x0 "MB31_8B_CS,Message Buffer 31 CS Register"
bitfld.long 0x0 31. "EDL,Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010." "0,1"
bitfld.long 0x0 30. "BRS,Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame." "0,1"
newline
bitfld.long 0x0 29. "ESI,Error State Indicator. This bit indicates if the transmitting node is error active or error passive." "0,1"
hexmask.long.byte 0x0 24.--27. 1. "CODE,Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself as part of the message buffer matching and arbitration process."
newline
bitfld.long 0x0 22. "SRR,Substitute Remote Request. Contains a fixed recessive bit." "0,1"
bitfld.long 0x0 21. "IDE,ID Extended. One/zero for extended/standard format frame." "0,1"
newline
bitfld.long 0x0 20. "RTR,Remote Transmission Request. One/zero for remote/data frame." "0,1"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of the data to be stored/transmitted."
newline
hexmask.long.word 0x0 0.--15. 1. "TIME_STAMP,Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus."
group.long 0x270++0x7
line.long 0x0 "MB6_64B_WORD14,Message Buffer 6 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_56,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_57,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_58,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_59,Data byte 0 of Rx/Tx frame."
line.long 0x4 "ID31,Message Buffer 31 ID Register"
bitfld.long 0x4 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x4 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x4 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x274++0x3
line.long 0x0 "MB20_16B_WORD3,Message Buffer 20 WORD_16B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_12,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_13,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_14,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_15,Data byte 0 of Rx/Tx frame."
group.long 0x274++0x3
line.long 0x0 "MB31_8B_ID,Message Buffer 31 ID Register"
bitfld.long 0x0 29.--31. "PRIO,Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority." "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0 18.--28. 1. "STD,Contains standard/extended (HIGH word) identifier of message buffer."
newline
hexmask.long.tbyte 0x0 0.--17. 1. "EXT,Contains extended (LOW word) identifier of message buffer."
group.long 0x274++0x7
line.long 0x0 "MB6_64B_WORD15,Message Buffer 6 WORD_64B Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_60,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_61,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_62,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_63,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB31_8B_WORD0,Message Buffer 31 WORD_8B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
group.long 0x278++0x7
line.long 0x0 "WORD031,Message Buffer 31 WORD0 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 0 of Rx/Tx frame."
line.long 0x4 "MB31_8B_WORD1,Message Buffer 31 WORD_8B Register"
hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
group.long 0x27C++0x3
line.long 0x0 "WORD131,Message Buffer 31 WORD1 Register"
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_4,Data byte 3 of Rx/Tx frame."
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_5,Data byte 2 of Rx/Tx frame."
newline
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_6,Data byte 1 of Rx/Tx frame."
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_7,Data byte 0 of Rx/Tx frame."
repeat 32. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x880)++0x3
line.long 0x0 "RXIMR[$1],Receive Individual Mask"
hexmask.long 0x0 0.--31. 1. "MI,Individual Mask Bits"
repeat.end
group.long 0xB00++0x27
line.long 0x0 "CTRL1_PN,Pretended Networking Control 1"
bitfld.long 0x0 17. "WTOF_MSK,Wake-up by Timeout Flag Mask" "0: Disable,1: Enable"
bitfld.long 0x0 16. "WUMF_MSK,Wake-up by Matching Flag Mask" "0: Disable,1: Enable"
newline
hexmask.long.byte 0x0 8.--15. 1. "NMATCH,Number of Messages Matching the Same Filtering Criteria"
bitfld.long 0x0 4.--5. "PLFS,Payload Filtering Selection" "0: Match payload contents to an exact target value,1: Match a payload value greater than or equal to a..,2: Match a payload value smaller than or equal to a..,3: Match upon a payload value within a range of.."
newline
bitfld.long 0x0 2.--3. "IDFS,ID Filtering Selection" "0: Match ID contents to an exact target value,1: Match an ID value greater than or equal to a..,2: Match an ID value smaller than or equal to a..,3: Match an ID value within a range of values.."
bitfld.long 0x0 0.--1. "FCS,Filtering Combination Selection" "0: Message ID filtering only,1: Message ID filtering and payload filtering,2: Message ID filtering occurring a specified..,3: Message ID filtering and payload filtering a.."
line.long 0x4 "CTRL2_PN,Pretended Networking Control 2"
hexmask.long.word 0x4 0.--15. 1. "MATCHTO,Timeout for No Message Matching the Filtering Criteria"
line.long 0x8 "WU_MTC,Pretended Networking Wake-Up Match"
eventfld.long 0x8 17. "WTOF,Wake-up by Timeout Flag Bit" "0: No event detected,1: Event detected"
eventfld.long 0x8 16. "WUMF,Wake-up by Match Flag" "0: No event detected,1: Event detected"
newline
hexmask.long.byte 0x8 8.--15. 1. "MCOUNTER,Number of Matches in Pretended Networking"
line.long 0xC "FLT_ID1,Pretended Networking ID Filter 1"
bitfld.long 0xC 30. "FLT_IDE,ID Extended Filter" "0: Standard,1: Extended"
bitfld.long 0xC 29. "FLT_RTR,Remote Transmission Request Filter" "0: Reject remote frame (accept data frame),1: Accept remote frame"
newline
hexmask.long 0xC 0.--28. 1. "FLT_ID1,ID Filter 1 for Pretended Networking filtering"
line.long 0x10 "FLT_DLC,Pretended Networking Data Length Code (DLC) Filter"
hexmask.long.byte 0x10 16.--19. 1. "FLT_DLC_LO,Lower Limit for Length of Data Bytes Filter"
hexmask.long.byte 0x10 0.--3. 1. "FLT_DLC_HI,Upper Limit for Length of Data Bytes Filter"
line.long 0x14 "PL1_LO,Pretended Networking Payload Low Filter 1"
hexmask.long.byte 0x14 24.--31. 1. "Data_byte_0,Data byte 0"
hexmask.long.byte 0x14 16.--23. 1. "Data_byte_1,Data byte 1"
newline
hexmask.long.byte 0x14 8.--15. 1. "Data_byte_2,Data byte 2"
hexmask.long.byte 0x14 0.--7. 1. "Data_byte_3,Data byte 3"
line.long 0x18 "PL1_HI,Pretended Networking Payload High Filter 1"
hexmask.long.byte 0x18 24.--31. 1. "Data_byte_4,Data byte 4"
hexmask.long.byte 0x18 16.--23. 1. "Data_byte_5,Data byte 5"
newline
hexmask.long.byte 0x18 8.--15. 1. "Data_byte_6,Data byte 6"
hexmask.long.byte 0x18 0.--7. 1. "Data_byte_7,Data byte 7"
line.long 0x1C "FLT_ID2_IDMASK,Pretended Networking ID Filter 2 or ID Mask"
bitfld.long 0x1C 30. "IDE_MSK,ID Extended Mask" "0: The corresponding bit in the filter is 'don't..,1: The corresponding bit in the filter is checked."
bitfld.long 0x1C 29. "RTR_MSK,Remote Transmission Request Mask" "0: The corresponding bit in the filter is 'don't..,1: The corresponding bit in the filter is checked."
newline
hexmask.long 0x1C 0.--28. 1. "FLT_ID2_IDMASK,ID Filter 2 for Pretended Networking Filtering or ID Mask Bits for Pretended Networking ID Filtering"
line.long 0x20 "PL2_PLMASK_LO,Pretended Networking Payload Low Filter 2 and Payload Low Mask"
hexmask.long.byte 0x20 24.--31. 1. "Data_byte_0,Data Byte 0"
hexmask.long.byte 0x20 16.--23. 1. "Data_byte_1,Data Byte 1"
newline
hexmask.long.byte 0x20 8.--15. 1. "Data_byte_2,Data Byte 2"
hexmask.long.byte 0x20 0.--7. 1. "Data_byte_3,Data Byte 3"
line.long 0x24 "PL2_PLMASK_HI,Pretended Networking Payload High Filter 2 and Payload High Mask"
hexmask.long.byte 0x24 24.--31. 1. "Data_byte_4,Data Byte 4"
hexmask.long.byte 0x24 16.--23. 1. "Data_byte_5,Data Byte 5"
newline
hexmask.long.byte 0x24 8.--15. 1. "Data_byte_6,Data Byte 6"
hexmask.long.byte 0x24 0.--7. 1. "Data_byte_7,Data Byte 7"
repeat 4. (list 0x0 0x1 0x2 0x3)(list ad:0x400CCB40 ad:0x400CCB50 ad:0x400CCB60 ad:0x400CCB70)
tree "WMB[$1]"
base $2
rgroup.long ($2)++0xF
line.long 0x0 "WMB_CS,Wake-Up Message Buffer"
bitfld.long 0x0 22. "SRR,Substitute Remote Request" "0: Dominant,1: Recessive"
bitfld.long 0x0 21. "IDE,ID Extended Bit" "0: Standard,1: Extended"
bitfld.long 0x0 20. "RTR,Remote Transmission Request" "0: Data,1: Remote"
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of Data in Bytes"
line.long 0x4 "WMB_ID,Wake-Up Message Buffer for ID"
hexmask.long 0x4 0.--28. 1. "ID,Received ID in Pretended Networking Mode"
line.long 0x8 "WMB_D03,Wake-Up Message Buffer for Data 0-3"
hexmask.long.byte 0x8 24.--31. 1. "Data_byte_0,Data Byte 0"
hexmask.long.byte 0x8 16.--23. 1. "Data_byte_1,Data Byte 1"
hexmask.long.byte 0x8 8.--15. 1. "Data_byte_2,Data Byte 2"
hexmask.long.byte 0x8 0.--7. 1. "Data_byte_3,Data Byte 3"
line.long 0xC "WMB_D47,Wake-Up Message Buffer Register Data 4-7"
hexmask.long.byte 0xC 24.--31. 1. "Data_byte_4,Data Byte 4"
hexmask.long.byte 0xC 16.--23. 1. "Data_byte_5,Data Byte 5"
hexmask.long.byte 0xC 8.--15. 1. "Data_byte_6,Data Byte 6"
hexmask.long.byte 0xC 0.--7. 1. "Data_byte_7,Data Byte 7"
tree.end
repeat.end
base ad:0x400CC000
newline
group.long 0xBF0++0x17
line.long 0x0 "EPRS,Enhanced CAN Bit Timing Prescalers"
hexmask.long.word 0x0 16.--25. 1. "EDPRESDIV,Extended Data Phase Prescaler Division Factor"
hexmask.long.word 0x0 0.--9. 1. "ENPRESDIV,Extended Nominal Prescaler Division Factor"
line.long 0x4 "ENCBT,Enhanced Nominal CAN Bit Timing"
hexmask.long.byte 0x4 22.--28. 1. "NRJW,Nominal Resynchronization Jump Width"
hexmask.long.byte 0x4 12.--18. 1. "NTSEG2,Nominal Time Segment 2"
newline
hexmask.long.byte 0x4 0.--7. 1. "NTSEG1,Nominal Time Segment 1"
line.long 0x8 "EDCBT,Enhanced Data Phase CAN Bit Timing"
hexmask.long.byte 0x8 22.--25. 1. "DRJW,Data Phase Resynchronization Jump Width"
hexmask.long.byte 0x8 12.--15. 1. "DTSEG2,Data Phase Time Segment 2"
newline
hexmask.long.byte 0x8 0.--4. 1. "DTSEG1,Data Phase Segment 1"
line.long 0xC "ETDC,Enhanced Transceiver Delay Compensation"
bitfld.long 0xC 31. "ETDCEN,Transceiver Delay Compensation Enable" "0: Disable,1: Enable"
bitfld.long 0xC 30. "TDMDIS,Transceiver Delay Measurement Disable" "0: Enable,1: Disable"
newline
hexmask.long.byte 0xC 16.--22. 1. "ETDCOFF,Enhanced Transceiver Delay Compensation Offset"
eventfld.long 0xC 15. "ETDCFAIL,Transceiver Delay Compensation Fail" "0: In range,1: Out of range"
newline
hexmask.long.byte 0xC 0.--7. 1. "ETDCVAL,Enhanced Transceiver Delay Compensation Value"
line.long 0x10 "FDCTRL,CAN FD Control"
bitfld.long 0x10 31. "FDRATE,Bit Rate Switch Enable" "0: Disable,1: Enable"
bitfld.long 0x10 16.--17. "MBDSR0,Message Buffer Data Size for Region 0" "0: 8 bytes,1: 16 bytes,2: 32 bytes,3: 64 bytes"
newline
bitfld.long 0x10 15. "TDCEN,Transceiver Delay Compensation Enable" "0: Disable,1: Enable"
eventfld.long 0x10 14. "TDCFAIL,Transceiver Delay Compensation Fail" "0: In range,1: Out of range"
newline
hexmask.long.byte 0x10 8.--12. 1. "TDCOFF,Transceiver Delay Compensation Offset"
hexmask.long.byte 0x10 0.--5. 1. "TDCVAL,Transceiver Delay Compensation Value"
line.long 0x14 "FDCBT,CAN FD Bit Timing"
hexmask.long.word 0x14 20.--29. 1. "FPRESDIV,Fast Prescaler Division Factor"
bitfld.long 0x14 16.--18. "FRJW,Fast Resync Jump Width" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x14 10.--14. 1. "FPROPSEG,Fast Propagation Segment"
bitfld.long 0x14 5.--7. "FPSEG1,Fast Phase Segment 1" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x14 0.--2. "FPSEG2,Fast Phase Segment 2" "0,1,2,3,4,5,6,7"
rgroup.long 0xC08++0x3
line.long 0x0 "FDCRC,CAN FD CRC"
hexmask.long.byte 0x0 24.--30. 1. "FD_MBCRC,CRC Message Buffer Number for FD_TXCRC"
hexmask.long.tbyte 0x0 0.--20. 1. "FD_TXCRC,Extended Transmitted CRC value"
group.long 0xC0C++0xB
line.long 0x0 "ERFCR,Enhanced RX FIFO Control"
bitfld.long 0x0 31. "ERFEN,Enhanced RX FIFO enable" "0: Disable,1: Enable"
hexmask.long.byte 0x0 26.--30. 1. "DMALW,DMA Last Word"
newline
hexmask.long.byte 0x0 16.--22. 1. "NEXIF,Number of Extended ID Filter Elements"
hexmask.long.byte 0x0 8.--13. 1. "NFE,Number of Enhanced RX FIFO Filter Elements"
newline
hexmask.long.byte 0x0 0.--4. 1. "ERFWM,Enhanced RX FIFO Watermark"
line.long 0x4 "ERFIER,Enhanced RX FIFO Interrupt Enable"
bitfld.long 0x4 31. "ERFUFWIE,Enhanced RX FIFO Underflow Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x4 30. "ERFOVFIE,Enhanced RX FIFO Overflow Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x4 29. "ERFWMIIE,Enhanced RX FIFO Watermark Indication Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x4 28. "ERFDAIE,Enhanced RX FIFO Data Available Interrupt Enable" "0: Disable,1: Enable"
line.long 0x8 "ERFSR,Enhanced RX FIFO Status"
eventfld.long 0x8 31. "ERFUFW,Enhanced RX FIFO Underflow Flag" "0: No such occurrence,1: Underflow"
eventfld.long 0x8 30. "ERFOVF,Enhanced RX FIFO Overflow Flag" "0: No such occurrence,1: Overflow"
newline
eventfld.long 0x8 29. "ERFWMI,Enhanced RX FIFO Watermark Indication Flag" "0: No such occurrence,1: Number of messages in FIFO is greater than the.."
eventfld.long 0x8 28. "ERFDA,Enhanced RX FIFO Data Available Flag" "0: No such occurrence,1: At least one message stored in Enhanced RX FIFO"
newline
bitfld.long 0x8 27. "ERFCLR,Enhanced RX FIFO Clear" "0: No effect,1: Clear enhanced RX FIFO content"
rbitfld.long 0x8 17. "ERFE,Enhanced RX FIFO Empty Flag" "0: Not empty,1: Empty"
newline
rbitfld.long 0x8 16. "ERFF,Enhanced RX FIFO Full Flag" "0: Not full,1: Full"
hexmask.long.byte 0x8 0.--5. 1. "ERFEL,Enhanced RX FIFO Elements"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x3000)++0x3
line.long 0x0 "ERFFEL[$1],Enhanced RX FIFO Filter Element"
hexmask.long 0x0 0.--31. 1. "FEL,Filter Element Bits"
repeat.end
tree.end
tree.end
endif
tree "CDOG (Cyclic Redundancy Check)"
base ad:0x40100000
group.long 0x0++0x7
line.long 0x0 "CONTROL,Control Register"
bitfld.long 0x0 30.--31. "DEBUG_HALT_CTRL,DEBUG_HALT control" "?,1: Keep the timer running,2: Stop the timer,?"
bitfld.long 0x0 28.--29. "IRQ_PAUSE,IRQ pause control" "?,1: Keep the timer running,2: Stop the timer,?"
newline
bitfld.long 0x0 17.--19. "ADDRESS_CTRL,ADDRESS fault control" "?,1: Enable reset,2: Enable interrupt,?,4: Disable both reset and interrupt,?,?,?"
bitfld.long 0x0 14.--16. "STATE_CTRL,STATE fault control" "?,1: Enable reset,2: Enable interrupt,?,4: Disable both reset and interrupt,?,?,?"
newline
bitfld.long 0x0 8.--10. "SEQUENCE_CTRL,SEQUENCE fault control" "?,1: Enable reset,2: Enable interrupt,?,4: Disable both reset and interrupt,?,?,?"
bitfld.long 0x0 5.--7. "MISCOMPARE_CTRL,MISCOMPARE fault control" "?,1: Enable reset,2: Enable interrupt,?,4: Disable both reset and interrupt,?,?,?"
newline
bitfld.long 0x0 2.--4. "TIMEOUT_CTRL,TIMEOUT fault control" "?,1: Enable reset,2: Enable interrupt,?,4: Disable both reset and interrupt,?,?,?"
bitfld.long 0x0 0.--1. "LOCK_CTRL,Lock control" "?,1: Locked,2: Unlocked,?"
line.long 0x4 "RELOAD,Instruction Timer Reload Register"
hexmask.long 0x4 0.--31. 1. "RLOAD,Instruction Timer reload value"
rgroup.long 0x8++0x3
line.long 0x0 "INSTRUCTION_TIMER,Instruction Timer Register"
hexmask.long 0x0 0.--31. 1. "INSTIM,Current value of the Instruction Timer"
rgroup.long 0x10++0x7
line.long 0x0 "STATUS,Status 1 Register"
hexmask.long.byte 0x0 28.--31. 1. "CURST,Current State"
hexmask.long.byte 0x0 16.--23. 1. "NUMILSEQF,Number of SEQUENCE faults since the last POR"
newline
hexmask.long.byte 0x0 8.--15. 1. "NUMMISCOMPF,Number of MISCOMPARE faults since the last POR"
hexmask.long.byte 0x0 0.--7. 1. "NUMTOF,Number of TIMEOUT faults since the last POR"
line.long 0x4 "STATUS2,Status 2 Register"
hexmask.long.byte 0x4 16.--23. 1. "NUMILLA,Number of ADDRESS faults since the last POR"
hexmask.long.byte 0x4 8.--15. 1. "NUMILLSTF,Number of STATE faults since the last POR"
newline
hexmask.long.byte 0x4 0.--7. 1. "NUMCNTF,Number of CONTROL faults since the last POR"
group.long 0x18++0x7
line.long 0x0 "FLAGS,Flags Register"
eventfld.long 0x0 16. "POR_FLAG,Power-on reset flag" "0: A Power-on reset event has not occurred,1: A Power-on reset event has occurred"
eventfld.long 0x0 5. "ADDR_FLAG,ADDRESS fault flag" "0: An ADDRESS fault has not occurred,1: An ADDRESS fault has occurred"
newline
eventfld.long 0x0 4. "STATE_FLAG,STATE fault flag" "0: A STATE fault has not occurred,1: A STATE fault has occurred"
eventfld.long 0x0 3. "CNT_FLAG,CONTROL fault flag" "0: A CONTROL fault has not occurred,1: A CONTROL fault has occurred"
newline
eventfld.long 0x0 2. "SEQ_FLAG,SEQUENCE fault flag" "0: A SEQUENCE fault has not occurred,1: A SEQUENCE fault has occurred"
eventfld.long 0x0 1. "MISCOM_FLAG,MISCOMPARE fault flag" "0: A MISCOMPARE fault has not occurred,1: A MISCOMPARE fault has occurred"
newline
eventfld.long 0x0 0. "TO_FLAG,TIMEOUT fault flag" "0: A TIMEOUT fault has not occurred,1: A TIMEOUT fault has occurred"
line.long 0x4 "PERSISTENT,Persistent Data Storage Register"
hexmask.long 0x4 0.--31. 1. "PERSIS,Persistent Storage"
wgroup.long 0x20++0x2F
line.long 0x0 "START,START Command Register"
hexmask.long 0x0 0.--31. 1. "STRT,Start command"
line.long 0x4 "STOP,STOP Command Register"
hexmask.long 0x4 0.--31. 1. "STP,Stop command"
line.long 0x8 "RESTART,RESTART Command Register"
hexmask.long 0x8 0.--31. 1. "RSTRT,Restart command"
line.long 0xC "ADD,ADD Command Register"
hexmask.long 0xC 0.--31. 1. "AD,ADD Write Value"
line.long 0x10 "ADD1,ADD1 Command Register"
hexmask.long 0x10 0.--31. 1. "AD1,ADD 1"
line.long 0x14 "ADD16,ADD16 Command Register"
hexmask.long 0x14 0.--31. 1. "AD16,ADD 16"
line.long 0x18 "ADD256,ADD256 Command Register"
hexmask.long 0x18 0.--31. 1. "AD256,ADD 256"
line.long 0x1C "SUB,SUB Command Register"
hexmask.long 0x1C 0.--31. 1. "SB,Subtract Write Value"
line.long 0x20 "SUB1,SUB1 Command Register"
hexmask.long 0x20 0.--31. 1. "SB1,Subtract 1"
line.long 0x24 "SUB16,SUB16 Command Register"
hexmask.long 0x24 0.--31. 1. "SB16,Subtract 16"
line.long 0x28 "SUB256,SUB256 Command Register"
hexmask.long 0x28 0.--31. 1. "SB256,Subtract 256"
line.long 0x2C "ASSERT16,ASSERT16 Command Register"
hexmask.long 0x2C 0.--31. 1. "AST16,ASSERT16 Command"
tree.end
tree "CMC (Core Mode Controller)"
base ad:0x4008B000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x13
line.long 0x0 "CKCTRL,Clock Control"
bitfld.long 0x0 31. "LOCK,Lock" "0: Allowed,1: Blocked"
hexmask.long.byte 0x0 0.--3. 1. "CKMODE,Clocking Mode"
line.long 0x4 "CKSTAT,Clock Status"
eventfld.long 0x4 31. "VALID,Clock Status Valid" "0: Core clock not gated,1: Core clock was gated due to Low-Power mode entry"
hexmask.long.byte 0x4 8.--15. 1. "WAKEUP,Wake-up Source"
newline
hexmask.long.byte 0x4 0.--3. 1. "CKMODE,Low Power Status"
line.long 0x8 "PMPROT,Power Mode Protection"
bitfld.long 0x8 31. "LOCK,Lock Register" "0: Allowed,1: Blocked"
hexmask.long.byte 0x8 0.--3. 1. "LPMODE,Low-Power Mode"
line.long 0xC "GPMCTRL,Global Power Mode Control"
hexmask.long.byte 0xC 0.--3. 1. "LPMODE,Low-Power Mode"
line.long 0x10 "PMCTRLMAIN,Power Mode Control"
hexmask.long.byte 0x10 0.--3. 1. "LPMODE,Low-Power Mode"
rgroup.long 0x80++0x3
line.long 0x0 "SRS,System Reset Status"
bitfld.long 0x0 28. "JTAG,JTAG System Reset" "0: Reset not generated,1: Reset generated"
bitfld.long 0x0 26. "CDOG0,Code Watchdog 0 Reset" "0: Reset is not generated,1: Reset is generated"
newline
bitfld.long 0x0 15. "LOCKUP,Lockup Reset" "0: Reset not generated,1: Reset generated"
bitfld.long 0x0 14. "SW,Software Reset" "0: Reset not generated,1: Reset generated"
newline
bitfld.long 0x0 13. "WWDT0,Windowed Watchdog 0 Reset" "0: Reset is not generated,1: Reset is generated"
bitfld.long 0x0 12. "SCG,System Clock Generation Reset" "0: Reset is not generated,1: Reset is generated"
newline
bitfld.long 0x0 11. "LPACK,Low Power Acknowledge Timeout Reset" "0: Reset not generated,1: Reset generated"
bitfld.long 0x0 10. "RSTACK,Reset Timeout" "0: Reset not generated,1: Reset generated"
newline
bitfld.long 0x0 9. "DAP,Debug Access Port Reset" "0: Reset was not generated,1: Reset was generated"
bitfld.long 0x0 8. "PIN,Pin Reset" "0: Reset was not generated,1: Reset was generated"
newline
bitfld.long 0x0 5. "FATAL,Fatal Reset" "0: Reset was not generated,1: Reset was generated"
bitfld.long 0x0 4. "WARM,Warm Reset" "0: Reset not generated,1: Reset generated"
newline
bitfld.long 0x0 2. "VD,Voltage Detect Reset" "0: Reset not generated,1: Reset generated"
bitfld.long 0x0 1. "POR,Power-on Reset" "0: Reset not generated,1: Reset generated"
newline
bitfld.long 0x0 0. "WAKEUP,Wake-up Reset" "0: Reset not generated,1: Reset generated"
group.long 0x84++0xF
line.long 0x0 "RPC,Reset Pin Control"
bitfld.long 0x0 9. "LPFEN,Low-Power Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x0 8. "FILTEN,Filter Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x0 0.--4. 1. "FILTCFG,Reset Filter Configuration"
line.long 0x4 "SSRS,Sticky System Reset Status"
eventfld.long 0x4 28. "JTAG,JTAG System Reset" "0: Reset not generated,1: Reset generated"
eventfld.long 0x4 26. "CDOG0,Code Watchdog 0 Reset" "0: Reset is not generated,1: Reset is generated"
newline
eventfld.long 0x4 15. "LOCKUP,Lockup Reset" "0: Reset not generated,1: Reset generated"
eventfld.long 0x4 14. "SW,Software Reset" "0: Reset not generated,1: Reset generated"
newline
eventfld.long 0x4 13. "WWDT0,Windowed Watchdog 0 Reset" "0: Reset is not generated,1: Reset is generated"
eventfld.long 0x4 12. "SCG,System Clock Generation Reset" "0: Reset is not generated,1: Reset is generated"
newline
eventfld.long 0x4 11. "LPACK,Low Power Acknowledge Timeout Reset" "0: Reset not generated,1: Reset generated"
eventfld.long 0x4 10. "RSTACK,Reset Timeout" "0: Reset not generated,1: Reset generated"
newline
eventfld.long 0x4 9. "DAP,DAP Reset" "0: Reset not generated,1: Reset generated"
eventfld.long 0x4 8. "PIN,Pin Reset" "0: Reset not generated,1: Reset generated"
newline
eventfld.long 0x4 5. "FATAL,Fatal Reset" "0: Reset was not generated,1: Reset was generated"
eventfld.long 0x4 4. "WARM,Warm Reset" "0: Reset not generated,1: Reset generated"
newline
rbitfld.long 0x4 2. "VD,Voltage Detect Reset" "0: Reset not generated,1: Reset generated"
eventfld.long 0x4 1. "POR,Power-on Reset" "0: Reset not generated,1: Reset generated"
newline
eventfld.long 0x4 0. "WAKEUP,Wake-up Reset" "0: Reset not generated,1: Reset generated"
line.long 0x8 "SRIE,System Reset Interrupt Enable"
bitfld.long 0x8 26. "CDOG0,Code Watchdog 0 Reset" "0: Interrupt disabled,1: Interrupt enabled"
bitfld.long 0x8 15. "LOCKUP,Lockup Reset" "0: Interrupt disabled,1: Interrupt enabled"
newline
bitfld.long 0x8 14. "SW,Software Reset" "0: Interrupt disabled,1: Interrupt enabled"
bitfld.long 0x8 13. "WWDT0,Windowed Watchdog 0 Reset" "0: Interrupt disabled,1: Interrupt enabled"
newline
bitfld.long 0x8 12. "SCG,System Clock Generation Reset" "0: Interrupt disabled,1: Interrupt enabled"
bitfld.long 0x8 11. "LPACK,Low Power Acknowledge Timeout Reset" "0: Interrupt disabled,1: Interrupt enabled"
newline
bitfld.long 0x8 9. "DAP,DAP Reset" "0: Interrupt disabled,1: Interrupt enabled"
bitfld.long 0x8 8. "PIN,Pin Reset" "0: Interrupt disabled,1: Interrupt enabled"
line.long 0xC "SRIF,System Reset Interrupt Flag"
eventfld.long 0xC 26. "CDOG0,Code Watchdog 0 Reset" "0: Reset source not pending,1: Reset source pending"
eventfld.long 0xC 15. "LOCKUP,Lockup Reset" "0: Reset source not pending,1: Reset source pending"
newline
eventfld.long 0xC 14. "SW,Software Reset" "0: Reset source not pending,1: Reset source pending"
eventfld.long 0xC 13. "WWDT0,Windowed Watchdog 0 Reset" "0: Reset source not pending,1: Reset source pending"
newline
eventfld.long 0xC 11. "LPACK,Low Power Acknowledge Timeout Reset" "0: Reset source not pending,1: Reset source pending"
eventfld.long 0xC 9. "DAP,DAP Reset" "0: Reset source not pending,1: Reset source pending"
newline
eventfld.long 0xC 8. "PIN,Pin Reset" "0: Reset source not pending,1: Reset source pending"
rgroup.long 0x9C++0x3
line.long 0x0 "RSTCNT,Reset Count Register"
hexmask.long.byte 0x0 0.--7. 1. "COUNT,Count"
group.long 0xA0++0x3
line.long 0x0 "MR0,Mode"
eventfld.long 0x0 0. "ISPMODE_n,In System Programming Mode" "0,1"
group.long 0xB0++0x3
line.long 0x0 "FM0,Force Mode"
bitfld.long 0x0 0. "FORCECFG,Boot Configuration" "0: No effect,1: Asserts"
group.long 0xE0++0x3
line.long 0x0 "FLASHCR,Flash Control"
bitfld.long 0x0 2. "FLASHWAKE,Flash Wake" "0: No effect,1: Flash memory is not disabled during flash memory.."
bitfld.long 0x0 1. "FLASHDOZE,Flash Doze" "0: No effect,1: Flash memory is disabled when core is sleeping.."
newline
bitfld.long 0x0 0. "FLASHDIS,Flash Disable" "0: No effect,1: Flash memory is disabled"
group.long 0x110++0x3
line.long 0x0 "CORECTL,Core Control"
bitfld.long 0x0 0. "NPIE,Non-maskable Pin Interrupt Enable" "0: Disables,1: Enables"
group.long 0x120++0x3
line.long 0x0 "DBGCTL,Debug Control"
bitfld.long 0x0 0. "SOD,Sleep Or Debug" "0: Remains enabled,1: Disabled"
tree.end
tree "CMP (Comparator)"
base ad:0x0
tree "CMP0"
base ad:0x400B1000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "DAC_RES,DAC Resolution"
group.long 0x8++0xB
line.long 0x0 "CCR0,Comparator Control Register 0"
bitfld.long 0x0 1. "CMP_STOP_EN,Comparator Deep Sleep Mode Enable" "0: Disable the analog comparator regardless of..,1: Allows CMP_EN to enable the analog comparator."
bitfld.long 0x0 0. "CMP_EN,Comparator Enable" "0: Disables (The analog logic remains off and..,1: Enables"
line.long 0x4 "CCR1,Comparator Control Register 1"
hexmask.long.byte 0x4 24.--31. 1. "FILT_PER,Filter Sample Period"
bitfld.long 0x4 16.--18. "FILT_CNT,Filter Sample Count" "0: Filter is bypassed: COUT = COUTA,1: 1 consecutive sample (Comparator output is..,2: 2 consecutive samples,3: 3 consecutive samples,4: 4 consecutive samples,5: 5 consecutive samples,6: 6 consecutive samples,7: 7 consecutive samples"
newline
bitfld.long 0x4 12.--13. "FUNC_CLK_SEL,Functional Clock Source Select" "0: Select functional clock source 0,1: Select functional clock source 1,2: Select functional clock source 2,3: Select functional clock source 3"
bitfld.long 0x4 10.--11. "EVT_SEL,COUT Event Select" "0: Both edges,1: Falling edge,2: Both edges,3: Both edges"
newline
bitfld.long 0x4 9. "WINDOW_CLS,COUT Event Window Close" "0: COUT event cannot close the window,1: COUT event can close the window"
bitfld.long 0x4 8. "WINDOW_INV,WINDOW/SAMPLE Signal Invert" "0: Do not invert,1: Invert"
newline
bitfld.long 0x4 7. "COUTA_OW,COUTA Output Level for Closed Window" "0: COUTA is 0,1: COUTA is 1"
bitfld.long 0x4 6. "COUTA_OWEN,COUTA_OW Enable" "0: COUTA holds the last sampled value.,1: Enables the COUTA signal value to be defined by.."
newline
bitfld.long 0x4 5. "COUT_PEN,Comparator Output Pin Enable" "0: Not available,1: Available"
bitfld.long 0x4 4. "COUT_SEL,Comparator Output Select" "0: Use COUT (filtered),1: Use COUTA (unfiltered)"
newline
bitfld.long 0x4 3. "COUT_INV,Comparator Invert" "0: Do not invert,1: Invert"
bitfld.long 0x4 2. "DMA_EN,DMA Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 1. "SAMPLE_EN,Sampling Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "WINDOW_EN,Windowing Enable" "0: Disables,1: Enables"
line.long 0x8 "CCR2,Comparator Control Register 2"
bitfld.long 0x8 20.--22. "MSEL,Minus Input MUX Select" "0: Input 0m,1: Input 1m,2: Input 2m,3: Input 3m,4: Input 4m,5: Input 5m,?,7: Internal DAC output"
bitfld.long 0x8 16.--18. "PSEL,Plus Input MUX Select" "0: Input 0p,1: Input 1p,2: Input 2p,3: Input 3p,4: Input 4p,5: Input 5p,?,7: Internal DAC output"
newline
bitfld.long 0x8 4.--5. "HYSTCTR,Comparator Hysteresis Control" "0: Level 0,1: Level 1,2: Level 2,3: Level 3"
bitfld.long 0x8 1. "CMP_NPMD,CMP Nano Power Mode Select" "0: Disables CMP Nano power mode. CCR2[CMP_HPMD]..,1: Enables CMP Nano power mode."
newline
bitfld.long 0x8 0. "CMP_HPMD,CMP High Power Mode Select" "0: Low power (speed) comparison mode,1: High power (speed) comparison mode"
group.long 0x18++0x1B
line.long 0x0 "DCR,DAC Control"
hexmask.long.byte 0x0 16.--23. 1. "DAC_DATA,DAC Output Voltage Select"
bitfld.long 0x0 8. "VRSEL,DAC Reference High Voltage Source Select" "0: vrefh0,1: vrefh1"
newline
bitfld.long 0x0 1. "DAC_HPMD,DAC High Power Mode Select" "0: Disables,1: Enables"
bitfld.long 0x0 0. "DAC_EN,DAC Enable" "0: Disables,1: Enables"
line.long 0x4 "IER,Interrupt Enable"
bitfld.long 0x4 2. "RRF_IE,Round-Robin Flag Interrupt Enable" "0: Disables the round-robin flag interrupt.,1: Enables the round-robin flag interrupt when the.."
bitfld.long 0x4 1. "CFF_IE,Comparator Flag Falling Interrupt Enable" "0: Disables the comparator flag falling interrupt.,1: Enables the comparator flag falling interrupt.."
newline
bitfld.long 0x4 0. "CFR_IE,Comparator Flag Rising Interrupt Enable" "0: Disables the comparator flag rising interrupt.,1: Enables the comparator flag rising interrupt.."
line.long 0x8 "CSR,Comparator Status"
rbitfld.long 0x8 8. "COUT,Analog Comparator Output" "0,1"
eventfld.long 0x8 2. "RRF,Round-Robin Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x8 1. "CFF,Analog Comparator Flag Falling" "0: Not detected,1: Detected"
eventfld.long 0x8 0. "CFR,Analog Comparator Flag Rising" "0: Not detected,1: Detected"
line.long 0xC "RRCR0,Round Robin Control Register 0"
hexmask.long.byte 0xC 28.--31. 1. "RR_SAMPLE_THRESHOLD,Sample Time Threshold"
hexmask.long.byte 0xC 24.--27. 1. "RR_SAMPLE_CNT,Number of Sample for One Channel"
newline
hexmask.long.byte 0xC 16.--21. 1. "RR_INITMOD,Initialization Delay Modulus"
bitfld.long 0xC 12.--13. "RR_CLK_SEL,Round Robin Clock Source Select" "0: Select Round Robin clock Source 0,1: Select Round Robin clock Source 1,2: Select Round Robin clock Source 2,3: Select Round Robin clock Source 3"
newline
bitfld.long 0xC 8.--9. "RR_NSAM,Number of Sample Clocks" "0: 0 clock,1: 1 clock,2: 2 clocks,3: 3 clocks"
bitfld.long 0xC 1. "RR_TRG_SEL,Round-Robin Trigger Select" "0: External trigger,1: Internal trigger"
newline
bitfld.long 0xC 0. "RR_EN,Round-Robin Enable" "0: Disables,1: Enables"
line.long 0x10 "RRCR1,Round Robin Control Register 1"
bitfld.long 0x10 20.--22. "FIXCH,Fixed Channel Select" "0: Channel 0,1: Channel 1,2: Channel 2,3: Channel 3,4: Channel 4,5: Channel 5,6: Channel 6,7: Channel 7"
bitfld.long 0x10 16. "FIXP,Fixed Port" "0: Fix the plus port. Sweep only the inputs to the..,1: Fix the minus port. Sweep only the inputs to the.."
newline
bitfld.long 0x10 7. "RR_CH7EN,Channel 7 Input Enable in Trigger Mode" "0: Disables,1: Enables"
bitfld.long 0x10 6. "RR_CH6EN,Channel 6 Input Enable in Trigger Mode" "0: Disables,1: Enables"
newline
bitfld.long 0x10 5. "RR_CH5EN,Channel 5 Input Enable in Trigger Mode" "0: Disables,1: Enables"
bitfld.long 0x10 4. "RR_CH4EN,Channel 4 Input Enable in Trigger Mode" "0: Disables,1: Enables"
newline
bitfld.long 0x10 3. "RR_CH3EN,Channel 3 Input Enable in Trigger Mode" "0: Disables,1: Enables"
bitfld.long 0x10 2. "RR_CH2EN,Channel 2 Input Enable in Trigger Mode" "0: Disables,1: Enables"
newline
bitfld.long 0x10 1. "RR_CH1EN,Channel 1 Input Enable in Trigger Mode" "0: Disables,1: Enables"
bitfld.long 0x10 0. "RR_CH0EN,Channel 0 Input Enable in Trigger Mode" "0: Disables,1: Enables"
line.long 0x14 "RRCSR,Round Robin Control and Status"
bitfld.long 0x14 7. "RR_CH7OUT,Comparison Result for Channel 7" "0,1"
bitfld.long 0x14 6. "RR_CH6OUT,Comparison Result for Channel 6" "0,1"
newline
bitfld.long 0x14 5. "RR_CH5OUT,Comparison Result for Channel 5" "0,1"
bitfld.long 0x14 4. "RR_CH4OUT,Comparison Result for Channel 4" "0,1"
newline
bitfld.long 0x14 3. "RR_CH3OUT,Comparison Result for Channel 3" "0,1"
bitfld.long 0x14 2. "RR_CH2OUT,Comparison Result for Channel 2" "0,1"
newline
bitfld.long 0x14 1. "RR_CH1OUT,Comparison Result for Channel 1" "0,1"
bitfld.long 0x14 0. "RR_CH0OUT,Comparison Result for Channel 0" "0,1"
line.long 0x18 "RRSR,Round Robin Status"
eventfld.long 0x18 7. "RR_CH7F,Channel 7 Input Changed Flag" "0: Not different,1: Different"
eventfld.long 0x18 6. "RR_CH6F,Channel 6 Input Changed Flag" "0: Not different,1: Different"
newline
eventfld.long 0x18 5. "RR_CH5F,Channel 5 Input Changed Flag" "0: Not different,1: Different"
eventfld.long 0x18 4. "RR_CH4F,Channel 4 Input Changed Flag" "0: Not different,1: Different"
newline
eventfld.long 0x18 3. "RR_CH3F,Channel 3 Input Changed Flag" "0: Not different,1: Different"
eventfld.long 0x18 2. "RR_CH2F,Channel 2 Input Changed Flag" "0: Not different,1: Different"
newline
eventfld.long 0x18 1. "RR_CH1F,Channel 1 Input Changed Flag" "0: Not different,1: Different"
eventfld.long 0x18 0. "RR_CH0F,Channel 0 Input Changed Flag" "0: Not different,1: Different"
group.long 0x38++0x3
line.long 0x0 "RRCR2,Round Robin Control Register 2"
bitfld.long 0x0 31. "RR_TIMER_EN,Round-Robin Internal Timer Enable" "0: Disables,1: Enables"
hexmask.long 0x0 0.--27. 1. "RR_TIMER_RELOAD,Number of Sample Clocks"
tree.end
tree "CMP1"
base ad:0x400B2000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "DAC_RES,DAC Resolution"
group.long 0x8++0xB
line.long 0x0 "CCR0,Comparator Control Register 0"
bitfld.long 0x0 1. "CMP_STOP_EN,Comparator Deep Sleep Mode Enable" "0: Disable the analog comparator regardless of..,1: Allows CMP_EN to enable the analog comparator."
bitfld.long 0x0 0. "CMP_EN,Comparator Enable" "0: Disables (The analog logic remains off and..,1: Enables"
line.long 0x4 "CCR1,Comparator Control Register 1"
hexmask.long.byte 0x4 24.--31. 1. "FILT_PER,Filter Sample Period"
bitfld.long 0x4 16.--18. "FILT_CNT,Filter Sample Count" "0: Filter is bypassed: COUT = COUTA,1: 1 consecutive sample (Comparator output is..,2: 2 consecutive samples,3: 3 consecutive samples,4: 4 consecutive samples,5: 5 consecutive samples,6: 6 consecutive samples,7: 7 consecutive samples"
newline
bitfld.long 0x4 12.--13. "FUNC_CLK_SEL,Functional Clock Source Select" "0: Select functional clock source 0,1: Select functional clock source 1,2: Select functional clock source 2,3: Select functional clock source 3"
bitfld.long 0x4 10.--11. "EVT_SEL,COUT Event Select" "0: Both edges,1: Falling edge,2: Both edges,3: Both edges"
newline
bitfld.long 0x4 9. "WINDOW_CLS,COUT Event Window Close" "0: COUT event cannot close the window,1: COUT event can close the window"
bitfld.long 0x4 8. "WINDOW_INV,WINDOW/SAMPLE Signal Invert" "0: Do not invert,1: Invert"
newline
bitfld.long 0x4 7. "COUTA_OW,COUTA Output Level for Closed Window" "0: COUTA is 0,1: COUTA is 1"
bitfld.long 0x4 6. "COUTA_OWEN,COUTA_OW Enable" "0: COUTA holds the last sampled value.,1: Enables the COUTA signal value to be defined by.."
newline
bitfld.long 0x4 5. "COUT_PEN,Comparator Output Pin Enable" "0: Not available,1: Available"
bitfld.long 0x4 4. "COUT_SEL,Comparator Output Select" "0: Use COUT (filtered),1: Use COUTA (unfiltered)"
newline
bitfld.long 0x4 3. "COUT_INV,Comparator Invert" "0: Do not invert,1: Invert"
bitfld.long 0x4 2. "DMA_EN,DMA Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 1. "SAMPLE_EN,Sampling Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "WINDOW_EN,Windowing Enable" "0: Disables,1: Enables"
line.long 0x8 "CCR2,Comparator Control Register 2"
bitfld.long 0x8 20.--22. "MSEL,Minus Input MUX Select" "0: Input 0m,1: Input 1m,2: Input 2m,3: Input 3m,4: Input 4m,5: Input 5m,?,7: Internal DAC output"
bitfld.long 0x8 16.--18. "PSEL,Plus Input MUX Select" "0: Input 0p,1: Input 1p,2: Input 2p,3: Input 3p,4: Input 4p,5: Input 5p,?,7: Internal DAC output"
newline
bitfld.long 0x8 4.--5. "HYSTCTR,Comparator Hysteresis Control" "0: Level 0,1: Level 1,2: Level 2,3: Level 3"
bitfld.long 0x8 1. "CMP_NPMD,CMP Nano Power Mode Select" "0: Disables CMP Nano power mode. CCR2[CMP_HPMD]..,1: Enables CMP Nano power mode."
newline
bitfld.long 0x8 0. "CMP_HPMD,CMP High Power Mode Select" "0: Low power (speed) comparison mode,1: High power (speed) comparison mode"
group.long 0x18++0x1B
line.long 0x0 "DCR,DAC Control"
hexmask.long.byte 0x0 16.--23. 1. "DAC_DATA,DAC Output Voltage Select"
bitfld.long 0x0 8. "VRSEL,DAC Reference High Voltage Source Select" "0: vrefh0,1: vrefh1"
newline
bitfld.long 0x0 1. "DAC_HPMD,DAC High Power Mode Select" "0: Disables,1: Enables"
bitfld.long 0x0 0. "DAC_EN,DAC Enable" "0: Disables,1: Enables"
line.long 0x4 "IER,Interrupt Enable"
bitfld.long 0x4 2. "RRF_IE,Round-Robin Flag Interrupt Enable" "0: Disables the round-robin flag interrupt.,1: Enables the round-robin flag interrupt when the.."
bitfld.long 0x4 1. "CFF_IE,Comparator Flag Falling Interrupt Enable" "0: Disables the comparator flag falling interrupt.,1: Enables the comparator flag falling interrupt.."
newline
bitfld.long 0x4 0. "CFR_IE,Comparator Flag Rising Interrupt Enable" "0: Disables the comparator flag rising interrupt.,1: Enables the comparator flag rising interrupt.."
line.long 0x8 "CSR,Comparator Status"
rbitfld.long 0x8 8. "COUT,Analog Comparator Output" "0,1"
eventfld.long 0x8 2. "RRF,Round-Robin Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x8 1. "CFF,Analog Comparator Flag Falling" "0: Not detected,1: Detected"
eventfld.long 0x8 0. "CFR,Analog Comparator Flag Rising" "0: Not detected,1: Detected"
line.long 0xC "RRCR0,Round Robin Control Register 0"
hexmask.long.byte 0xC 28.--31. 1. "RR_SAMPLE_THRESHOLD,Sample Time Threshold"
hexmask.long.byte 0xC 24.--27. 1. "RR_SAMPLE_CNT,Number of Sample for One Channel"
newline
hexmask.long.byte 0xC 16.--21. 1. "RR_INITMOD,Initialization Delay Modulus"
bitfld.long 0xC 12.--13. "RR_CLK_SEL,Round Robin Clock Source Select" "0: Select Round Robin clock Source 0,1: Select Round Robin clock Source 1,2: Select Round Robin clock Source 2,3: Select Round Robin clock Source 3"
newline
bitfld.long 0xC 8.--9. "RR_NSAM,Number of Sample Clocks" "0: 0 clock,1: 1 clock,2: 2 clocks,3: 3 clocks"
bitfld.long 0xC 1. "RR_TRG_SEL,Round-Robin Trigger Select" "0: External trigger,1: Internal trigger"
newline
bitfld.long 0xC 0. "RR_EN,Round-Robin Enable" "0: Disables,1: Enables"
line.long 0x10 "RRCR1,Round Robin Control Register 1"
bitfld.long 0x10 20.--22. "FIXCH,Fixed Channel Select" "0: Channel 0,1: Channel 1,2: Channel 2,3: Channel 3,4: Channel 4,5: Channel 5,6: Channel 6,7: Channel 7"
bitfld.long 0x10 16. "FIXP,Fixed Port" "0: Fix the plus port. Sweep only the inputs to the..,1: Fix the minus port. Sweep only the inputs to the.."
newline
bitfld.long 0x10 7. "RR_CH7EN,Channel 7 Input Enable in Trigger Mode" "0: Disables,1: Enables"
bitfld.long 0x10 6. "RR_CH6EN,Channel 6 Input Enable in Trigger Mode" "0: Disables,1: Enables"
newline
bitfld.long 0x10 5. "RR_CH5EN,Channel 5 Input Enable in Trigger Mode" "0: Disables,1: Enables"
bitfld.long 0x10 4. "RR_CH4EN,Channel 4 Input Enable in Trigger Mode" "0: Disables,1: Enables"
newline
bitfld.long 0x10 3. "RR_CH3EN,Channel 3 Input Enable in Trigger Mode" "0: Disables,1: Enables"
bitfld.long 0x10 2. "RR_CH2EN,Channel 2 Input Enable in Trigger Mode" "0: Disables,1: Enables"
newline
bitfld.long 0x10 1. "RR_CH1EN,Channel 1 Input Enable in Trigger Mode" "0: Disables,1: Enables"
bitfld.long 0x10 0. "RR_CH0EN,Channel 0 Input Enable in Trigger Mode" "0: Disables,1: Enables"
line.long 0x14 "RRCSR,Round Robin Control and Status"
bitfld.long 0x14 7. "RR_CH7OUT,Comparison Result for Channel 7" "0,1"
bitfld.long 0x14 6. "RR_CH6OUT,Comparison Result for Channel 6" "0,1"
newline
bitfld.long 0x14 5. "RR_CH5OUT,Comparison Result for Channel 5" "0,1"
bitfld.long 0x14 4. "RR_CH4OUT,Comparison Result for Channel 4" "0,1"
newline
bitfld.long 0x14 3. "RR_CH3OUT,Comparison Result for Channel 3" "0,1"
bitfld.long 0x14 2. "RR_CH2OUT,Comparison Result for Channel 2" "0,1"
newline
bitfld.long 0x14 1. "RR_CH1OUT,Comparison Result for Channel 1" "0,1"
bitfld.long 0x14 0. "RR_CH0OUT,Comparison Result for Channel 0" "0,1"
line.long 0x18 "RRSR,Round Robin Status"
eventfld.long 0x18 7. "RR_CH7F,Channel 7 Input Changed Flag" "0: Not different,1: Different"
eventfld.long 0x18 6. "RR_CH6F,Channel 6 Input Changed Flag" "0: Not different,1: Different"
newline
eventfld.long 0x18 5. "RR_CH5F,Channel 5 Input Changed Flag" "0: Not different,1: Different"
eventfld.long 0x18 4. "RR_CH4F,Channel 4 Input Changed Flag" "0: Not different,1: Different"
newline
eventfld.long 0x18 3. "RR_CH3F,Channel 3 Input Changed Flag" "0: Not different,1: Different"
eventfld.long 0x18 2. "RR_CH2F,Channel 2 Input Changed Flag" "0: Not different,1: Different"
newline
eventfld.long 0x18 1. "RR_CH1F,Channel 1 Input Changed Flag" "0: Not different,1: Different"
eventfld.long 0x18 0. "RR_CH0F,Channel 0 Input Changed Flag" "0: Not different,1: Different"
group.long 0x38++0x3
line.long 0x0 "RRCR2,Round Robin Control Register 2"
bitfld.long 0x0 31. "RR_TIMER_EN,Round-Robin Internal Timer Enable" "0: Disables,1: Enables"
hexmask.long 0x0 0.--27. 1. "RR_TIMER_RELOAD,Number of Sample Clocks"
tree.end
tree.end
tree "CRC (Cyclic Redundancy Check)"
base ad:0x4008A000
group.long 0x0++0xB
line.long 0x0 "DATA,CRC Data"
hexmask.long.byte 0x0 24.--31. 1. "HU,CRC High Upper Byte"
hexmask.long.byte 0x0 16.--23. 1. "HL,CRC High Lower Byte"
newline
hexmask.long.byte 0x0 8.--15. 1. "LU,CRC Low Upper Byte"
hexmask.long.byte 0x0 0.--7. 1. "LL,CRC Low Lower Byte"
line.long 0x4 "GPOLY,CRC Polynomial"
hexmask.long.word 0x4 16.--31. 1. "HIGH,High Polynomial Half-Word"
hexmask.long.word 0x4 0.--15. 1. "LOW,Low Polynomial Half-Word"
line.long 0x8 "CTRL,CRC Control"
bitfld.long 0x8 30.--31. "TOT,Transpose Type for Writes" "0: No transposition,1: Bits in bytes are transposed; bytes are not..,2: Both bits in bytes and bytes are transposed,3: Only bytes are transposed; no bits in a byte are.."
bitfld.long 0x8 28.--29. "TOTR,Transpose Type for Read" "0: No transposition,1: Bits in bytes are transposed; bytes are not..,2: Both bits in bytes and bytes are transposed,3: Only bytes are transposed; no bits in a byte are.."
newline
bitfld.long 0x8 26. "FXOR,Complement Read of CRC Data Register" "0: No XOR on reading,1: Inverts or complements the read value of the CRC.."
bitfld.long 0x8 25. "WAS,Write as Seed" "0: Data values,1: Seed values"
newline
bitfld.long 0x8 24. "TCRC,TCRC" "0: 16-bit,1: 32-bit"
tree.end
tree "CTIMER (Standard Counter/Timers)"
base ad:0x0
tree "CTIMER0"
base ad:0x40004000
group.long 0x0++0x17
line.long 0x0 "IR,Interrupt"
bitfld.long 0x0 7. "CR3INT,Interrupt Flag for Capture Channel 3 Event" "0,1"
bitfld.long 0x0 6. "CR2INT,Interrupt Flag for Capture Channel 2 Event" "0,1"
bitfld.long 0x0 5. "CR1INT,Interrupt Flag for Capture Channel 1 Event" "0,1"
newline
bitfld.long 0x0 4. "CR0INT,Interrupt Flag for Capture Channel 0 Event" "0,1"
bitfld.long 0x0 3. "MR3INT,Interrupt Flag for Match Channel 3 Event" "0,1"
bitfld.long 0x0 2. "MR2INT,Interrupt Flag for Match Channel 2 Event" "0,1"
newline
bitfld.long 0x0 1. "MR1INT,Interrupt Flag for Match Channel 1 Event" "0,1"
bitfld.long 0x0 0. "MR0INT,Interrupt Flag for Match Channel 0 Event" "0,1"
line.long 0x4 "TCR,Timer Control"
bitfld.long 0x4 5. "ATCEN,Allow Trigger Count Enable" "0: Disable,1: Enable"
bitfld.long 0x4 4. "AGCEN,Allow Global Count Enable" "0: Disable,1: Enable"
bitfld.long 0x4 1. "CRST,Counter Reset Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x4 0. "CEN,Counter Enable" "0: Disable,1: Enable"
line.long 0x8 "TC,Timer Counter"
hexmask.long 0x8 0.--31. 1. "TCVAL,Timer Counter Value"
line.long 0xC "PR,Prescale"
hexmask.long 0xC 0.--31. 1. "PRVAL,Prescale Reload Value"
line.long 0x10 "PC,Prescale Counter"
hexmask.long 0x10 0.--31. 1. "PCVAL,Prescale Counter Value"
line.long 0x14 "MCR,Match Control"
bitfld.long 0x14 27. "MR3RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 26. "MR2RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 25. "MR1RL,Reload MR" "0: Does not reload,1: Reloads"
newline
bitfld.long 0x14 24. "MR0RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 11. "MR3S,Stop on MR3" "0: Does not stop,1: Stops"
bitfld.long 0x14 10. "MR3R,Reset on MR3" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 9. "MR3I,Interrupt on MR3" "0: Does not generate,1: Generates"
bitfld.long 0x14 8. "MR2S,Stop on MR2" "0: Does not stop,1: Stops"
bitfld.long 0x14 7. "MR2R,Reset on MR2" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 6. "MR2I,Interrupt on MR2" "0: Does not generate,1: Generates"
bitfld.long 0x14 5. "MR1S,Stop on MR1" "0: Does not stop,1: Stops"
bitfld.long 0x14 4. "MR1R,Reset on MR1" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 3. "MR1I,Interrupt on MR1" "0: Does not generate,1: Generates"
bitfld.long 0x14 2. "MR0S,Stop on MR0" "0: Does not stop,1: Stops"
bitfld.long 0x14 1. "MR0R,Reset on MR0" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 0. "MR0I,Interrupt on MR0" "0: Does not generate,1: Generates"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x18)++0x3
line.long 0x0 "MR[$1],Match"
hexmask.long 0x0 0.--31. 1. "MATCH,Timer Counter Match Value"
repeat.end
group.long 0x28++0x3
line.long 0x0 "CCR,Capture Control"
bitfld.long 0x0 11. "CAP3I,Generate Interrupt on Channel 3 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 10. "CAP3FE,Falling Edge of Capture Channel 3" "0: Does not load,1: Loads"
bitfld.long 0x0 9. "CAP3RE,Rising Edge of Capture Channel 3" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 8. "CAP2I,Generate Interrupt on Channel 2 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 7. "CAP2FE,Falling Edge of Capture Channel 2" "0: Does not load,1: Loads"
bitfld.long 0x0 6. "CAP2RE,Rising Edge of Capture Channel 2" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 5. "CAP1I,Generate Interrupt on Channel 1 Capture Event" "0: Does not generates,1: Generates"
bitfld.long 0x0 4. "CAP1FE,Falling Edge of Capture Channel 1" "0: Does not load,1: Loads"
bitfld.long 0x0 3. "CAP1RE,Rising Edge of Capture Channel 1" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 2. "CAP0I,Generate Interrupt on Channel 0 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 1. "CAP0FE,Falling Edge of Capture Channel 0" "0: Does not load,1: Loads"
bitfld.long 0x0 0. "CAP0RE,Rising Edge of Capture Channel 0" "0: Does not load,1: Loads"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
rgroup.long ($2+0x2C)++0x3
line.long 0x0 "CR[$1],Capture"
hexmask.long 0x0 0.--31. 1. "CAP,Timer Counter Capture Value"
repeat.end
group.long 0x3C++0x3
line.long 0x0 "EMR,External Match"
bitfld.long 0x0 10.--11. "EMC3,External Match Control 3" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 8.--9. "EMC2,External Match Control 2" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 6.--7. "EMC1,External Match Control 1" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
newline
bitfld.long 0x0 4.--5. "EMC0,External Match Control 0" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 3. "EM3,External Match 3" "0: Low,1: High"
bitfld.long 0x0 2. "EM2,External Match 2" "0: Low,1: High"
newline
bitfld.long 0x0 1. "EM1,External Match 1" "0: Low,1: High"
bitfld.long 0x0 0. "EM0,External Match 0" "0: Low,1: High"
group.long 0x70++0x7
line.long 0x0 "CTCR,Count Control"
bitfld.long 0x0 5.--7. "SELCC,Edge Select" "0: Capture channel 0 rising edge,1: Capture channel 0 falling edge,2: Capture channel 1 rising edge,3: Capture channel 1 falling edge,4: Capture channel 2 rising edge,5: Capture channel 2 falling edge,?,?"
bitfld.long 0x0 4. "ENCC,Capture Channel Enable" "0,1"
bitfld.long 0x0 2.--3. "CINSEL,Count Input Select" "0: Channel 0 CAPn[0] for CTIMERn,1: Channel 1 CAPn[1] for CTIMERn,2: Channel 2 CAPn[2] for CTIMERn,3: Channel 3 CAPn[3] for CTIMERn"
newline
bitfld.long 0x0 0.--1. "CTMODE,Counter Timer Mode" "0: Timer mode,1: Counter mode rising edge,2: Counter mode falling edge,3: Counter mode dual edge"
line.long 0x4 "PWMC,PWM Control"
bitfld.long 0x4 3. "PWMEN3,PWM Mode Enable for Channel 3" "0: Disable,1: Enable"
bitfld.long 0x4 2. "PWMEN2,PWM Mode Enable for Channel 2" "0: Disable,1: Enable"
bitfld.long 0x4 1. "PWMEN1,PWM Mode Enable for Channel 1" "0: Disable,1: Enable"
newline
bitfld.long 0x4 0. "PWMEN0,PWM Mode Enable for Channel 0" "0: Disable,1: Enable"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x78)++0x3
line.long 0x0 "MSR[$1],Match Shadow"
hexmask.long 0x0 0.--31. 1. "MATCH_SHADOW,Timer Counter Match Shadow Value"
repeat.end
tree.end
tree "CTIMER1"
base ad:0x40005000
group.long 0x0++0x17
line.long 0x0 "IR,Interrupt"
bitfld.long 0x0 7. "CR3INT,Interrupt Flag for Capture Channel 3 Event" "0,1"
bitfld.long 0x0 6. "CR2INT,Interrupt Flag for Capture Channel 2 Event" "0,1"
bitfld.long 0x0 5. "CR1INT,Interrupt Flag for Capture Channel 1 Event" "0,1"
newline
bitfld.long 0x0 4. "CR0INT,Interrupt Flag for Capture Channel 0 Event" "0,1"
bitfld.long 0x0 3. "MR3INT,Interrupt Flag for Match Channel 3 Event" "0,1"
bitfld.long 0x0 2. "MR2INT,Interrupt Flag for Match Channel 2 Event" "0,1"
newline
bitfld.long 0x0 1. "MR1INT,Interrupt Flag for Match Channel 1 Event" "0,1"
bitfld.long 0x0 0. "MR0INT,Interrupt Flag for Match Channel 0 Event" "0,1"
line.long 0x4 "TCR,Timer Control"
bitfld.long 0x4 5. "ATCEN,Allow Trigger Count Enable" "0: Disable,1: Enable"
bitfld.long 0x4 4. "AGCEN,Allow Global Count Enable" "0: Disable,1: Enable"
bitfld.long 0x4 1. "CRST,Counter Reset Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x4 0. "CEN,Counter Enable" "0: Disable,1: Enable"
line.long 0x8 "TC,Timer Counter"
hexmask.long 0x8 0.--31. 1. "TCVAL,Timer Counter Value"
line.long 0xC "PR,Prescale"
hexmask.long 0xC 0.--31. 1. "PRVAL,Prescale Reload Value"
line.long 0x10 "PC,Prescale Counter"
hexmask.long 0x10 0.--31. 1. "PCVAL,Prescale Counter Value"
line.long 0x14 "MCR,Match Control"
bitfld.long 0x14 27. "MR3RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 26. "MR2RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 25. "MR1RL,Reload MR" "0: Does not reload,1: Reloads"
newline
bitfld.long 0x14 24. "MR0RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 11. "MR3S,Stop on MR3" "0: Does not stop,1: Stops"
bitfld.long 0x14 10. "MR3R,Reset on MR3" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 9. "MR3I,Interrupt on MR3" "0: Does not generate,1: Generates"
bitfld.long 0x14 8. "MR2S,Stop on MR2" "0: Does not stop,1: Stops"
bitfld.long 0x14 7. "MR2R,Reset on MR2" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 6. "MR2I,Interrupt on MR2" "0: Does not generate,1: Generates"
bitfld.long 0x14 5. "MR1S,Stop on MR1" "0: Does not stop,1: Stops"
bitfld.long 0x14 4. "MR1R,Reset on MR1" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 3. "MR1I,Interrupt on MR1" "0: Does not generate,1: Generates"
bitfld.long 0x14 2. "MR0S,Stop on MR0" "0: Does not stop,1: Stops"
bitfld.long 0x14 1. "MR0R,Reset on MR0" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 0. "MR0I,Interrupt on MR0" "0: Does not generate,1: Generates"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x18)++0x3
line.long 0x0 "MR[$1],Match"
hexmask.long 0x0 0.--31. 1. "MATCH,Timer Counter Match Value"
repeat.end
group.long 0x28++0x3
line.long 0x0 "CCR,Capture Control"
bitfld.long 0x0 11. "CAP3I,Generate Interrupt on Channel 3 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 10. "CAP3FE,Falling Edge of Capture Channel 3" "0: Does not load,1: Loads"
bitfld.long 0x0 9. "CAP3RE,Rising Edge of Capture Channel 3" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 8. "CAP2I,Generate Interrupt on Channel 2 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 7. "CAP2FE,Falling Edge of Capture Channel 2" "0: Does not load,1: Loads"
bitfld.long 0x0 6. "CAP2RE,Rising Edge of Capture Channel 2" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 5. "CAP1I,Generate Interrupt on Channel 1 Capture Event" "0: Does not generates,1: Generates"
bitfld.long 0x0 4. "CAP1FE,Falling Edge of Capture Channel 1" "0: Does not load,1: Loads"
bitfld.long 0x0 3. "CAP1RE,Rising Edge of Capture Channel 1" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 2. "CAP0I,Generate Interrupt on Channel 0 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 1. "CAP0FE,Falling Edge of Capture Channel 0" "0: Does not load,1: Loads"
bitfld.long 0x0 0. "CAP0RE,Rising Edge of Capture Channel 0" "0: Does not load,1: Loads"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
rgroup.long ($2+0x2C)++0x3
line.long 0x0 "CR[$1],Capture"
hexmask.long 0x0 0.--31. 1. "CAP,Timer Counter Capture Value"
repeat.end
group.long 0x3C++0x3
line.long 0x0 "EMR,External Match"
bitfld.long 0x0 10.--11. "EMC3,External Match Control 3" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 8.--9. "EMC2,External Match Control 2" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 6.--7. "EMC1,External Match Control 1" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
newline
bitfld.long 0x0 4.--5. "EMC0,External Match Control 0" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 3. "EM3,External Match 3" "0: Low,1: High"
bitfld.long 0x0 2. "EM2,External Match 2" "0: Low,1: High"
newline
bitfld.long 0x0 1. "EM1,External Match 1" "0: Low,1: High"
bitfld.long 0x0 0. "EM0,External Match 0" "0: Low,1: High"
group.long 0x70++0x7
line.long 0x0 "CTCR,Count Control"
bitfld.long 0x0 5.--7. "SELCC,Edge Select" "0: Capture channel 0 rising edge,1: Capture channel 0 falling edge,2: Capture channel 1 rising edge,3: Capture channel 1 falling edge,4: Capture channel 2 rising edge,5: Capture channel 2 falling edge,?,?"
bitfld.long 0x0 4. "ENCC,Capture Channel Enable" "0,1"
bitfld.long 0x0 2.--3. "CINSEL,Count Input Select" "0: Channel 0 CAPn[0] for CTIMERn,1: Channel 1 CAPn[1] for CTIMERn,2: Channel 2 CAPn[2] for CTIMERn,3: Channel 3 CAPn[3] for CTIMERn"
newline
bitfld.long 0x0 0.--1. "CTMODE,Counter Timer Mode" "0: Timer mode,1: Counter mode rising edge,2: Counter mode falling edge,3: Counter mode dual edge"
line.long 0x4 "PWMC,PWM Control"
bitfld.long 0x4 3. "PWMEN3,PWM Mode Enable for Channel 3" "0: Disable,1: Enable"
bitfld.long 0x4 2. "PWMEN2,PWM Mode Enable for Channel 2" "0: Disable,1: Enable"
bitfld.long 0x4 1. "PWMEN1,PWM Mode Enable for Channel 1" "0: Disable,1: Enable"
newline
bitfld.long 0x4 0. "PWMEN0,PWM Mode Enable for Channel 0" "0: Disable,1: Enable"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x78)++0x3
line.long 0x0 "MSR[$1],Match Shadow"
hexmask.long 0x0 0.--31. 1. "MATCH_SHADOW,Timer Counter Match Shadow Value"
repeat.end
tree.end
tree "CTIMER2"
base ad:0x40006000
group.long 0x0++0x17
line.long 0x0 "IR,Interrupt"
bitfld.long 0x0 7. "CR3INT,Interrupt Flag for Capture Channel 3 Event" "0,1"
bitfld.long 0x0 6. "CR2INT,Interrupt Flag for Capture Channel 2 Event" "0,1"
bitfld.long 0x0 5. "CR1INT,Interrupt Flag for Capture Channel 1 Event" "0,1"
newline
bitfld.long 0x0 4. "CR0INT,Interrupt Flag for Capture Channel 0 Event" "0,1"
bitfld.long 0x0 3. "MR3INT,Interrupt Flag for Match Channel 3 Event" "0,1"
bitfld.long 0x0 2. "MR2INT,Interrupt Flag for Match Channel 2 Event" "0,1"
newline
bitfld.long 0x0 1. "MR1INT,Interrupt Flag for Match Channel 1 Event" "0,1"
bitfld.long 0x0 0. "MR0INT,Interrupt Flag for Match Channel 0 Event" "0,1"
line.long 0x4 "TCR,Timer Control"
bitfld.long 0x4 5. "ATCEN,Allow Trigger Count Enable" "0: Disable,1: Enable"
bitfld.long 0x4 4. "AGCEN,Allow Global Count Enable" "0: Disable,1: Enable"
bitfld.long 0x4 1. "CRST,Counter Reset Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x4 0. "CEN,Counter Enable" "0: Disable,1: Enable"
line.long 0x8 "TC,Timer Counter"
hexmask.long 0x8 0.--31. 1. "TCVAL,Timer Counter Value"
line.long 0xC "PR,Prescale"
hexmask.long 0xC 0.--31. 1. "PRVAL,Prescale Reload Value"
line.long 0x10 "PC,Prescale Counter"
hexmask.long 0x10 0.--31. 1. "PCVAL,Prescale Counter Value"
line.long 0x14 "MCR,Match Control"
bitfld.long 0x14 27. "MR3RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 26. "MR2RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 25. "MR1RL,Reload MR" "0: Does not reload,1: Reloads"
newline
bitfld.long 0x14 24. "MR0RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 11. "MR3S,Stop on MR3" "0: Does not stop,1: Stops"
bitfld.long 0x14 10. "MR3R,Reset on MR3" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 9. "MR3I,Interrupt on MR3" "0: Does not generate,1: Generates"
bitfld.long 0x14 8. "MR2S,Stop on MR2" "0: Does not stop,1: Stops"
bitfld.long 0x14 7. "MR2R,Reset on MR2" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 6. "MR2I,Interrupt on MR2" "0: Does not generate,1: Generates"
bitfld.long 0x14 5. "MR1S,Stop on MR1" "0: Does not stop,1: Stops"
bitfld.long 0x14 4. "MR1R,Reset on MR1" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 3. "MR1I,Interrupt on MR1" "0: Does not generate,1: Generates"
bitfld.long 0x14 2. "MR0S,Stop on MR0" "0: Does not stop,1: Stops"
bitfld.long 0x14 1. "MR0R,Reset on MR0" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 0. "MR0I,Interrupt on MR0" "0: Does not generate,1: Generates"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x18)++0x3
line.long 0x0 "MR[$1],Match"
hexmask.long 0x0 0.--31. 1. "MATCH,Timer Counter Match Value"
repeat.end
group.long 0x28++0x3
line.long 0x0 "CCR,Capture Control"
bitfld.long 0x0 11. "CAP3I,Generate Interrupt on Channel 3 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 10. "CAP3FE,Falling Edge of Capture Channel 3" "0: Does not load,1: Loads"
bitfld.long 0x0 9. "CAP3RE,Rising Edge of Capture Channel 3" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 8. "CAP2I,Generate Interrupt on Channel 2 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 7. "CAP2FE,Falling Edge of Capture Channel 2" "0: Does not load,1: Loads"
bitfld.long 0x0 6. "CAP2RE,Rising Edge of Capture Channel 2" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 5. "CAP1I,Generate Interrupt on Channel 1 Capture Event" "0: Does not generates,1: Generates"
bitfld.long 0x0 4. "CAP1FE,Falling Edge of Capture Channel 1" "0: Does not load,1: Loads"
bitfld.long 0x0 3. "CAP1RE,Rising Edge of Capture Channel 1" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 2. "CAP0I,Generate Interrupt on Channel 0 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 1. "CAP0FE,Falling Edge of Capture Channel 0" "0: Does not load,1: Loads"
bitfld.long 0x0 0. "CAP0RE,Rising Edge of Capture Channel 0" "0: Does not load,1: Loads"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
rgroup.long ($2+0x2C)++0x3
line.long 0x0 "CR[$1],Capture"
hexmask.long 0x0 0.--31. 1. "CAP,Timer Counter Capture Value"
repeat.end
group.long 0x3C++0x3
line.long 0x0 "EMR,External Match"
bitfld.long 0x0 10.--11. "EMC3,External Match Control 3" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 8.--9. "EMC2,External Match Control 2" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 6.--7. "EMC1,External Match Control 1" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
newline
bitfld.long 0x0 4.--5. "EMC0,External Match Control 0" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 3. "EM3,External Match 3" "0: Low,1: High"
bitfld.long 0x0 2. "EM2,External Match 2" "0: Low,1: High"
newline
bitfld.long 0x0 1. "EM1,External Match 1" "0: Low,1: High"
bitfld.long 0x0 0. "EM0,External Match 0" "0: Low,1: High"
group.long 0x70++0x7
line.long 0x0 "CTCR,Count Control"
bitfld.long 0x0 5.--7. "SELCC,Edge Select" "0: Capture channel 0 rising edge,1: Capture channel 0 falling edge,2: Capture channel 1 rising edge,3: Capture channel 1 falling edge,4: Capture channel 2 rising edge,5: Capture channel 2 falling edge,?,?"
bitfld.long 0x0 4. "ENCC,Capture Channel Enable" "0,1"
bitfld.long 0x0 2.--3. "CINSEL,Count Input Select" "0: Channel 0 CAPn[0] for CTIMERn,1: Channel 1 CAPn[1] for CTIMERn,2: Channel 2 CAPn[2] for CTIMERn,3: Channel 3 CAPn[3] for CTIMERn"
newline
bitfld.long 0x0 0.--1. "CTMODE,Counter Timer Mode" "0: Timer mode,1: Counter mode rising edge,2: Counter mode falling edge,3: Counter mode dual edge"
line.long 0x4 "PWMC,PWM Control"
bitfld.long 0x4 3. "PWMEN3,PWM Mode Enable for Channel 3" "0: Disable,1: Enable"
bitfld.long 0x4 2. "PWMEN2,PWM Mode Enable for Channel 2" "0: Disable,1: Enable"
bitfld.long 0x4 1. "PWMEN1,PWM Mode Enable for Channel 1" "0: Disable,1: Enable"
newline
bitfld.long 0x4 0. "PWMEN0,PWM Mode Enable for Channel 0" "0: Disable,1: Enable"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x78)++0x3
line.long 0x0 "MSR[$1],Match Shadow"
hexmask.long 0x0 0.--31. 1. "MATCH_SHADOW,Timer Counter Match Shadow Value"
repeat.end
tree.end
sif (cpuis("MC?A144*"))
tree "CTIMER3"
base ad:0x40007000
group.long 0x0++0x17
line.long 0x0 "IR,Interrupt"
bitfld.long 0x0 7. "CR3INT,Interrupt Flag for Capture Channel 3 Event" "0,1"
bitfld.long 0x0 6. "CR2INT,Interrupt Flag for Capture Channel 2 Event" "0,1"
bitfld.long 0x0 5. "CR1INT,Interrupt Flag for Capture Channel 1 Event" "0,1"
newline
bitfld.long 0x0 4. "CR0INT,Interrupt Flag for Capture Channel 0 Event" "0,1"
bitfld.long 0x0 3. "MR3INT,Interrupt Flag for Match Channel 3 Event" "0,1"
bitfld.long 0x0 2. "MR2INT,Interrupt Flag for Match Channel 2 Event" "0,1"
newline
bitfld.long 0x0 1. "MR1INT,Interrupt Flag for Match Channel 1 Event" "0,1"
bitfld.long 0x0 0. "MR0INT,Interrupt Flag for Match Channel 0 Event" "0,1"
line.long 0x4 "TCR,Timer Control"
bitfld.long 0x4 5. "ATCEN,Allow Trigger Count Enable" "0: Disable,1: Enable"
bitfld.long 0x4 4. "AGCEN,Allow Global Count Enable" "0: Disable,1: Enable"
bitfld.long 0x4 1. "CRST,Counter Reset Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x4 0. "CEN,Counter Enable" "0: Disable,1: Enable"
line.long 0x8 "TC,Timer Counter"
hexmask.long 0x8 0.--31. 1. "TCVAL,Timer Counter Value"
line.long 0xC "PR,Prescale"
hexmask.long 0xC 0.--31. 1. "PRVAL,Prescale Reload Value"
line.long 0x10 "PC,Prescale Counter"
hexmask.long 0x10 0.--31. 1. "PCVAL,Prescale Counter Value"
line.long 0x14 "MCR,Match Control"
bitfld.long 0x14 27. "MR3RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 26. "MR2RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 25. "MR1RL,Reload MR" "0: Does not reload,1: Reloads"
newline
bitfld.long 0x14 24. "MR0RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 11. "MR3S,Stop on MR3" "0: Does not stop,1: Stops"
bitfld.long 0x14 10. "MR3R,Reset on MR3" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 9. "MR3I,Interrupt on MR3" "0: Does not generate,1: Generates"
bitfld.long 0x14 8. "MR2S,Stop on MR2" "0: Does not stop,1: Stops"
bitfld.long 0x14 7. "MR2R,Reset on MR2" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 6. "MR2I,Interrupt on MR2" "0: Does not generate,1: Generates"
bitfld.long 0x14 5. "MR1S,Stop on MR1" "0: Does not stop,1: Stops"
bitfld.long 0x14 4. "MR1R,Reset on MR1" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 3. "MR1I,Interrupt on MR1" "0: Does not generate,1: Generates"
bitfld.long 0x14 2. "MR0S,Stop on MR0" "0: Does not stop,1: Stops"
bitfld.long 0x14 1. "MR0R,Reset on MR0" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 0. "MR0I,Interrupt on MR0" "0: Does not generate,1: Generates"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x18)++0x3
line.long 0x0 "MR[$1],Match"
hexmask.long 0x0 0.--31. 1. "MATCH,Timer Counter Match Value"
repeat.end
group.long 0x28++0x3
line.long 0x0 "CCR,Capture Control"
bitfld.long 0x0 11. "CAP3I,Generate Interrupt on Channel 3 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 10. "CAP3FE,Falling Edge of Capture Channel 3" "0: Does not load,1: Loads"
bitfld.long 0x0 9. "CAP3RE,Rising Edge of Capture Channel 3" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 8. "CAP2I,Generate Interrupt on Channel 2 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 7. "CAP2FE,Falling Edge of Capture Channel 2" "0: Does not load,1: Loads"
bitfld.long 0x0 6. "CAP2RE,Rising Edge of Capture Channel 2" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 5. "CAP1I,Generate Interrupt on Channel 1 Capture Event" "0: Does not generates,1: Generates"
bitfld.long 0x0 4. "CAP1FE,Falling Edge of Capture Channel 1" "0: Does not load,1: Loads"
bitfld.long 0x0 3. "CAP1RE,Rising Edge of Capture Channel 1" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 2. "CAP0I,Generate Interrupt on Channel 0 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 1. "CAP0FE,Falling Edge of Capture Channel 0" "0: Does not load,1: Loads"
bitfld.long 0x0 0. "CAP0RE,Rising Edge of Capture Channel 0" "0: Does not load,1: Loads"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
rgroup.long ($2+0x2C)++0x3
line.long 0x0 "CR[$1],Capture"
hexmask.long 0x0 0.--31. 1. "CAP,Timer Counter Capture Value"
repeat.end
group.long 0x3C++0x3
line.long 0x0 "EMR,External Match"
bitfld.long 0x0 10.--11. "EMC3,External Match Control 3" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 8.--9. "EMC2,External Match Control 2" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 6.--7. "EMC1,External Match Control 1" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
newline
bitfld.long 0x0 4.--5. "EMC0,External Match Control 0" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 3. "EM3,External Match 3" "0: Low,1: High"
bitfld.long 0x0 2. "EM2,External Match 2" "0: Low,1: High"
newline
bitfld.long 0x0 1. "EM1,External Match 1" "0: Low,1: High"
bitfld.long 0x0 0. "EM0,External Match 0" "0: Low,1: High"
group.long 0x70++0x7
line.long 0x0 "CTCR,Count Control"
bitfld.long 0x0 5.--7. "SELCC,Edge Select" "0: Capture channel 0 rising edge,1: Capture channel 0 falling edge,2: Capture channel 1 rising edge,3: Capture channel 1 falling edge,4: Capture channel 2 rising edge,5: Capture channel 2 falling edge,?,?"
bitfld.long 0x0 4. "ENCC,Capture Channel Enable" "0,1"
bitfld.long 0x0 2.--3. "CINSEL,Count Input Select" "0: Channel 0 CAPn[0] for CTIMERn,1: Channel 1 CAPn[1] for CTIMERn,2: Channel 2 CAPn[2] for CTIMERn,3: Channel 3 CAPn[3] for CTIMERn"
newline
bitfld.long 0x0 0.--1. "CTMODE,Counter Timer Mode" "0: Timer mode,1: Counter mode rising edge,2: Counter mode falling edge,3: Counter mode dual edge"
line.long 0x4 "PWMC,PWM Control"
bitfld.long 0x4 3. "PWMEN3,PWM Mode Enable for Channel 3" "0: Disable,1: Enable"
bitfld.long 0x4 2. "PWMEN2,PWM Mode Enable for Channel 2" "0: Disable,1: Enable"
bitfld.long 0x4 1. "PWMEN1,PWM Mode Enable for Channel 1" "0: Disable,1: Enable"
newline
bitfld.long 0x4 0. "PWMEN0,PWM Mode Enable for Channel 0" "0: Disable,1: Enable"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x78)++0x3
line.long 0x0 "MSR[$1],Match Shadow"
hexmask.long 0x0 0.--31. 1. "MATCH_SHADOW,Timer Counter Match Shadow Value"
repeat.end
tree.end
tree "CTIMER4"
base ad:0x40008000
group.long 0x0++0x17
line.long 0x0 "IR,Interrupt"
bitfld.long 0x0 7. "CR3INT,Interrupt Flag for Capture Channel 3 Event" "0,1"
bitfld.long 0x0 6. "CR2INT,Interrupt Flag for Capture Channel 2 Event" "0,1"
bitfld.long 0x0 5. "CR1INT,Interrupt Flag for Capture Channel 1 Event" "0,1"
newline
bitfld.long 0x0 4. "CR0INT,Interrupt Flag for Capture Channel 0 Event" "0,1"
bitfld.long 0x0 3. "MR3INT,Interrupt Flag for Match Channel 3 Event" "0,1"
bitfld.long 0x0 2. "MR2INT,Interrupt Flag for Match Channel 2 Event" "0,1"
newline
bitfld.long 0x0 1. "MR1INT,Interrupt Flag for Match Channel 1 Event" "0,1"
bitfld.long 0x0 0. "MR0INT,Interrupt Flag for Match Channel 0 Event" "0,1"
line.long 0x4 "TCR,Timer Control"
bitfld.long 0x4 5. "ATCEN,Allow Trigger Count Enable" "0: Disable,1: Enable"
bitfld.long 0x4 4. "AGCEN,Allow Global Count Enable" "0: Disable,1: Enable"
bitfld.long 0x4 1. "CRST,Counter Reset Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x4 0. "CEN,Counter Enable" "0: Disable,1: Enable"
line.long 0x8 "TC,Timer Counter"
hexmask.long 0x8 0.--31. 1. "TCVAL,Timer Counter Value"
line.long 0xC "PR,Prescale"
hexmask.long 0xC 0.--31. 1. "PRVAL,Prescale Reload Value"
line.long 0x10 "PC,Prescale Counter"
hexmask.long 0x10 0.--31. 1. "PCVAL,Prescale Counter Value"
line.long 0x14 "MCR,Match Control"
bitfld.long 0x14 27. "MR3RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 26. "MR2RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 25. "MR1RL,Reload MR" "0: Does not reload,1: Reloads"
newline
bitfld.long 0x14 24. "MR0RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 11. "MR3S,Stop on MR3" "0: Does not stop,1: Stops"
bitfld.long 0x14 10. "MR3R,Reset on MR3" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 9. "MR3I,Interrupt on MR3" "0: Does not generate,1: Generates"
bitfld.long 0x14 8. "MR2S,Stop on MR2" "0: Does not stop,1: Stops"
bitfld.long 0x14 7. "MR2R,Reset on MR2" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 6. "MR2I,Interrupt on MR2" "0: Does not generate,1: Generates"
bitfld.long 0x14 5. "MR1S,Stop on MR1" "0: Does not stop,1: Stops"
bitfld.long 0x14 4. "MR1R,Reset on MR1" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 3. "MR1I,Interrupt on MR1" "0: Does not generate,1: Generates"
bitfld.long 0x14 2. "MR0S,Stop on MR0" "0: Does not stop,1: Stops"
bitfld.long 0x14 1. "MR0R,Reset on MR0" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 0. "MR0I,Interrupt on MR0" "0: Does not generate,1: Generates"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x18)++0x3
line.long 0x0 "MR[$1],Match"
hexmask.long 0x0 0.--31. 1. "MATCH,Timer Counter Match Value"
repeat.end
group.long 0x28++0x3
line.long 0x0 "CCR,Capture Control"
bitfld.long 0x0 11. "CAP3I,Generate Interrupt on Channel 3 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 10. "CAP3FE,Falling Edge of Capture Channel 3" "0: Does not load,1: Loads"
bitfld.long 0x0 9. "CAP3RE,Rising Edge of Capture Channel 3" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 8. "CAP2I,Generate Interrupt on Channel 2 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 7. "CAP2FE,Falling Edge of Capture Channel 2" "0: Does not load,1: Loads"
bitfld.long 0x0 6. "CAP2RE,Rising Edge of Capture Channel 2" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 5. "CAP1I,Generate Interrupt on Channel 1 Capture Event" "0: Does not generates,1: Generates"
bitfld.long 0x0 4. "CAP1FE,Falling Edge of Capture Channel 1" "0: Does not load,1: Loads"
bitfld.long 0x0 3. "CAP1RE,Rising Edge of Capture Channel 1" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 2. "CAP0I,Generate Interrupt on Channel 0 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 1. "CAP0FE,Falling Edge of Capture Channel 0" "0: Does not load,1: Loads"
bitfld.long 0x0 0. "CAP0RE,Rising Edge of Capture Channel 0" "0: Does not load,1: Loads"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
rgroup.long ($2+0x2C)++0x3
line.long 0x0 "CR[$1],Capture"
hexmask.long 0x0 0.--31. 1. "CAP,Timer Counter Capture Value"
repeat.end
group.long 0x3C++0x3
line.long 0x0 "EMR,External Match"
bitfld.long 0x0 10.--11. "EMC3,External Match Control 3" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 8.--9. "EMC2,External Match Control 2" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 6.--7. "EMC1,External Match Control 1" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
newline
bitfld.long 0x0 4.--5. "EMC0,External Match Control 0" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 3. "EM3,External Match 3" "0: Low,1: High"
bitfld.long 0x0 2. "EM2,External Match 2" "0: Low,1: High"
newline
bitfld.long 0x0 1. "EM1,External Match 1" "0: Low,1: High"
bitfld.long 0x0 0. "EM0,External Match 0" "0: Low,1: High"
group.long 0x70++0x7
line.long 0x0 "CTCR,Count Control"
bitfld.long 0x0 5.--7. "SELCC,Edge Select" "0: Capture channel 0 rising edge,1: Capture channel 0 falling edge,2: Capture channel 1 rising edge,3: Capture channel 1 falling edge,4: Capture channel 2 rising edge,5: Capture channel 2 falling edge,?,?"
bitfld.long 0x0 4. "ENCC,Capture Channel Enable" "0,1"
bitfld.long 0x0 2.--3. "CINSEL,Count Input Select" "0: Channel 0 CAPn[0] for CTIMERn,1: Channel 1 CAPn[1] for CTIMERn,2: Channel 2 CAPn[2] for CTIMERn,3: Channel 3 CAPn[3] for CTIMERn"
newline
bitfld.long 0x0 0.--1. "CTMODE,Counter Timer Mode" "0: Timer mode,1: Counter mode rising edge,2: Counter mode falling edge,3: Counter mode dual edge"
line.long 0x4 "PWMC,PWM Control"
bitfld.long 0x4 3. "PWMEN3,PWM Mode Enable for Channel 3" "0: Disable,1: Enable"
bitfld.long 0x4 2. "PWMEN2,PWM Mode Enable for Channel 2" "0: Disable,1: Enable"
bitfld.long 0x4 1. "PWMEN1,PWM Mode Enable for Channel 1" "0: Disable,1: Enable"
newline
bitfld.long 0x4 0. "PWMEN0,PWM Mode Enable for Channel 0" "0: Disable,1: Enable"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x78)++0x3
line.long 0x0 "MSR[$1],Match Shadow"
hexmask.long 0x0 0.--31. 1. "MATCH_SHADOW,Timer Counter Match Shadow Value"
repeat.end
tree.end
endif
sif (cpuis("MC?A145*"))
tree "CTIMER3"
base ad:0x40007000
group.long 0x0++0x17
line.long 0x0 "IR,Interrupt"
bitfld.long 0x0 7. "CR3INT,Interrupt Flag for Capture Channel 3 Event" "0,1"
bitfld.long 0x0 6. "CR2INT,Interrupt Flag for Capture Channel 2 Event" "0,1"
bitfld.long 0x0 5. "CR1INT,Interrupt Flag for Capture Channel 1 Event" "0,1"
newline
bitfld.long 0x0 4. "CR0INT,Interrupt Flag for Capture Channel 0 Event" "0,1"
bitfld.long 0x0 3. "MR3INT,Interrupt Flag for Match Channel 3 Event" "0,1"
bitfld.long 0x0 2. "MR2INT,Interrupt Flag for Match Channel 2 Event" "0,1"
newline
bitfld.long 0x0 1. "MR1INT,Interrupt Flag for Match Channel 1 Event" "0,1"
bitfld.long 0x0 0. "MR0INT,Interrupt Flag for Match Channel 0 Event" "0,1"
line.long 0x4 "TCR,Timer Control"
bitfld.long 0x4 5. "ATCEN,Allow Trigger Count Enable" "0: Disable,1: Enable"
bitfld.long 0x4 4. "AGCEN,Allow Global Count Enable" "0: Disable,1: Enable"
bitfld.long 0x4 1. "CRST,Counter Reset Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x4 0. "CEN,Counter Enable" "0: Disable,1: Enable"
line.long 0x8 "TC,Timer Counter"
hexmask.long 0x8 0.--31. 1. "TCVAL,Timer Counter Value"
line.long 0xC "PR,Prescale"
hexmask.long 0xC 0.--31. 1. "PRVAL,Prescale Reload Value"
line.long 0x10 "PC,Prescale Counter"
hexmask.long 0x10 0.--31. 1. "PCVAL,Prescale Counter Value"
line.long 0x14 "MCR,Match Control"
bitfld.long 0x14 27. "MR3RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 26. "MR2RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 25. "MR1RL,Reload MR" "0: Does not reload,1: Reloads"
newline
bitfld.long 0x14 24. "MR0RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 11. "MR3S,Stop on MR3" "0: Does not stop,1: Stops"
bitfld.long 0x14 10. "MR3R,Reset on MR3" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 9. "MR3I,Interrupt on MR3" "0: Does not generate,1: Generates"
bitfld.long 0x14 8. "MR2S,Stop on MR2" "0: Does not stop,1: Stops"
bitfld.long 0x14 7. "MR2R,Reset on MR2" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 6. "MR2I,Interrupt on MR2" "0: Does not generate,1: Generates"
bitfld.long 0x14 5. "MR1S,Stop on MR1" "0: Does not stop,1: Stops"
bitfld.long 0x14 4. "MR1R,Reset on MR1" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 3. "MR1I,Interrupt on MR1" "0: Does not generate,1: Generates"
bitfld.long 0x14 2. "MR0S,Stop on MR0" "0: Does not stop,1: Stops"
bitfld.long 0x14 1. "MR0R,Reset on MR0" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 0. "MR0I,Interrupt on MR0" "0: Does not generate,1: Generates"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x18)++0x3
line.long 0x0 "MR[$1],Match"
hexmask.long 0x0 0.--31. 1. "MATCH,Timer Counter Match Value"
repeat.end
group.long 0x28++0x3
line.long 0x0 "CCR,Capture Control"
bitfld.long 0x0 11. "CAP3I,Generate Interrupt on Channel 3 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 10. "CAP3FE,Falling Edge of Capture Channel 3" "0: Does not load,1: Loads"
bitfld.long 0x0 9. "CAP3RE,Rising Edge of Capture Channel 3" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 8. "CAP2I,Generate Interrupt on Channel 2 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 7. "CAP2FE,Falling Edge of Capture Channel 2" "0: Does not load,1: Loads"
bitfld.long 0x0 6. "CAP2RE,Rising Edge of Capture Channel 2" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 5. "CAP1I,Generate Interrupt on Channel 1 Capture Event" "0: Does not generates,1: Generates"
bitfld.long 0x0 4. "CAP1FE,Falling Edge of Capture Channel 1" "0: Does not load,1: Loads"
bitfld.long 0x0 3. "CAP1RE,Rising Edge of Capture Channel 1" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 2. "CAP0I,Generate Interrupt on Channel 0 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 1. "CAP0FE,Falling Edge of Capture Channel 0" "0: Does not load,1: Loads"
bitfld.long 0x0 0. "CAP0RE,Rising Edge of Capture Channel 0" "0: Does not load,1: Loads"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
rgroup.long ($2+0x2C)++0x3
line.long 0x0 "CR[$1],Capture"
hexmask.long 0x0 0.--31. 1. "CAP,Timer Counter Capture Value"
repeat.end
group.long 0x3C++0x3
line.long 0x0 "EMR,External Match"
bitfld.long 0x0 10.--11. "EMC3,External Match Control 3" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 8.--9. "EMC2,External Match Control 2" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 6.--7. "EMC1,External Match Control 1" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
newline
bitfld.long 0x0 4.--5. "EMC0,External Match Control 0" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 3. "EM3,External Match 3" "0: Low,1: High"
bitfld.long 0x0 2. "EM2,External Match 2" "0: Low,1: High"
newline
bitfld.long 0x0 1. "EM1,External Match 1" "0: Low,1: High"
bitfld.long 0x0 0. "EM0,External Match 0" "0: Low,1: High"
group.long 0x70++0x7
line.long 0x0 "CTCR,Count Control"
bitfld.long 0x0 5.--7. "SELCC,Edge Select" "0: Capture channel 0 rising edge,1: Capture channel 0 falling edge,2: Capture channel 1 rising edge,3: Capture channel 1 falling edge,4: Capture channel 2 rising edge,5: Capture channel 2 falling edge,?,?"
bitfld.long 0x0 4. "ENCC,Capture Channel Enable" "0,1"
bitfld.long 0x0 2.--3. "CINSEL,Count Input Select" "0: Channel 0 CAPn[0] for CTIMERn,1: Channel 1 CAPn[1] for CTIMERn,2: Channel 2 CAPn[2] for CTIMERn,3: Channel 3 CAPn[3] for CTIMERn"
newline
bitfld.long 0x0 0.--1. "CTMODE,Counter Timer Mode" "0: Timer mode,1: Counter mode rising edge,2: Counter mode falling edge,3: Counter mode dual edge"
line.long 0x4 "PWMC,PWM Control"
bitfld.long 0x4 3. "PWMEN3,PWM Mode Enable for Channel 3" "0: Disable,1: Enable"
bitfld.long 0x4 2. "PWMEN2,PWM Mode Enable for Channel 2" "0: Disable,1: Enable"
bitfld.long 0x4 1. "PWMEN1,PWM Mode Enable for Channel 1" "0: Disable,1: Enable"
newline
bitfld.long 0x4 0. "PWMEN0,PWM Mode Enable for Channel 0" "0: Disable,1: Enable"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x78)++0x3
line.long 0x0 "MSR[$1],Match Shadow"
hexmask.long 0x0 0.--31. 1. "MATCH_SHADOW,Timer Counter Match Shadow Value"
repeat.end
tree.end
tree "CTIMER4"
base ad:0x40008000
group.long 0x0++0x17
line.long 0x0 "IR,Interrupt"
bitfld.long 0x0 7. "CR3INT,Interrupt Flag for Capture Channel 3 Event" "0,1"
bitfld.long 0x0 6. "CR2INT,Interrupt Flag for Capture Channel 2 Event" "0,1"
bitfld.long 0x0 5. "CR1INT,Interrupt Flag for Capture Channel 1 Event" "0,1"
newline
bitfld.long 0x0 4. "CR0INT,Interrupt Flag for Capture Channel 0 Event" "0,1"
bitfld.long 0x0 3. "MR3INT,Interrupt Flag for Match Channel 3 Event" "0,1"
bitfld.long 0x0 2. "MR2INT,Interrupt Flag for Match Channel 2 Event" "0,1"
newline
bitfld.long 0x0 1. "MR1INT,Interrupt Flag for Match Channel 1 Event" "0,1"
bitfld.long 0x0 0. "MR0INT,Interrupt Flag for Match Channel 0 Event" "0,1"
line.long 0x4 "TCR,Timer Control"
bitfld.long 0x4 5. "ATCEN,Allow Trigger Count Enable" "0: Disable,1: Enable"
bitfld.long 0x4 4. "AGCEN,Allow Global Count Enable" "0: Disable,1: Enable"
bitfld.long 0x4 1. "CRST,Counter Reset Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x4 0. "CEN,Counter Enable" "0: Disable,1: Enable"
line.long 0x8 "TC,Timer Counter"
hexmask.long 0x8 0.--31. 1. "TCVAL,Timer Counter Value"
line.long 0xC "PR,Prescale"
hexmask.long 0xC 0.--31. 1. "PRVAL,Prescale Reload Value"
line.long 0x10 "PC,Prescale Counter"
hexmask.long 0x10 0.--31. 1. "PCVAL,Prescale Counter Value"
line.long 0x14 "MCR,Match Control"
bitfld.long 0x14 27. "MR3RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 26. "MR2RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 25. "MR1RL,Reload MR" "0: Does not reload,1: Reloads"
newline
bitfld.long 0x14 24. "MR0RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 11. "MR3S,Stop on MR3" "0: Does not stop,1: Stops"
bitfld.long 0x14 10. "MR3R,Reset on MR3" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 9. "MR3I,Interrupt on MR3" "0: Does not generate,1: Generates"
bitfld.long 0x14 8. "MR2S,Stop on MR2" "0: Does not stop,1: Stops"
bitfld.long 0x14 7. "MR2R,Reset on MR2" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 6. "MR2I,Interrupt on MR2" "0: Does not generate,1: Generates"
bitfld.long 0x14 5. "MR1S,Stop on MR1" "0: Does not stop,1: Stops"
bitfld.long 0x14 4. "MR1R,Reset on MR1" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 3. "MR1I,Interrupt on MR1" "0: Does not generate,1: Generates"
bitfld.long 0x14 2. "MR0S,Stop on MR0" "0: Does not stop,1: Stops"
bitfld.long 0x14 1. "MR0R,Reset on MR0" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 0. "MR0I,Interrupt on MR0" "0: Does not generate,1: Generates"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x18)++0x3
line.long 0x0 "MR[$1],Match"
hexmask.long 0x0 0.--31. 1. "MATCH,Timer Counter Match Value"
repeat.end
group.long 0x28++0x3
line.long 0x0 "CCR,Capture Control"
bitfld.long 0x0 11. "CAP3I,Generate Interrupt on Channel 3 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 10. "CAP3FE,Falling Edge of Capture Channel 3" "0: Does not load,1: Loads"
bitfld.long 0x0 9. "CAP3RE,Rising Edge of Capture Channel 3" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 8. "CAP2I,Generate Interrupt on Channel 2 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 7. "CAP2FE,Falling Edge of Capture Channel 2" "0: Does not load,1: Loads"
bitfld.long 0x0 6. "CAP2RE,Rising Edge of Capture Channel 2" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 5. "CAP1I,Generate Interrupt on Channel 1 Capture Event" "0: Does not generates,1: Generates"
bitfld.long 0x0 4. "CAP1FE,Falling Edge of Capture Channel 1" "0: Does not load,1: Loads"
bitfld.long 0x0 3. "CAP1RE,Rising Edge of Capture Channel 1" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 2. "CAP0I,Generate Interrupt on Channel 0 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 1. "CAP0FE,Falling Edge of Capture Channel 0" "0: Does not load,1: Loads"
bitfld.long 0x0 0. "CAP0RE,Rising Edge of Capture Channel 0" "0: Does not load,1: Loads"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
rgroup.long ($2+0x2C)++0x3
line.long 0x0 "CR[$1],Capture"
hexmask.long 0x0 0.--31. 1. "CAP,Timer Counter Capture Value"
repeat.end
group.long 0x3C++0x3
line.long 0x0 "EMR,External Match"
bitfld.long 0x0 10.--11. "EMC3,External Match Control 3" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 8.--9. "EMC2,External Match Control 2" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 6.--7. "EMC1,External Match Control 1" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
newline
bitfld.long 0x0 4.--5. "EMC0,External Match Control 0" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 3. "EM3,External Match 3" "0: Low,1: High"
bitfld.long 0x0 2. "EM2,External Match 2" "0: Low,1: High"
newline
bitfld.long 0x0 1. "EM1,External Match 1" "0: Low,1: High"
bitfld.long 0x0 0. "EM0,External Match 0" "0: Low,1: High"
group.long 0x70++0x7
line.long 0x0 "CTCR,Count Control"
bitfld.long 0x0 5.--7. "SELCC,Edge Select" "0: Capture channel 0 rising edge,1: Capture channel 0 falling edge,2: Capture channel 1 rising edge,3: Capture channel 1 falling edge,4: Capture channel 2 rising edge,5: Capture channel 2 falling edge,?,?"
bitfld.long 0x0 4. "ENCC,Capture Channel Enable" "0,1"
bitfld.long 0x0 2.--3. "CINSEL,Count Input Select" "0: Channel 0 CAPn[0] for CTIMERn,1: Channel 1 CAPn[1] for CTIMERn,2: Channel 2 CAPn[2] for CTIMERn,3: Channel 3 CAPn[3] for CTIMERn"
newline
bitfld.long 0x0 0.--1. "CTMODE,Counter Timer Mode" "0: Timer mode,1: Counter mode rising edge,2: Counter mode falling edge,3: Counter mode dual edge"
line.long 0x4 "PWMC,PWM Control"
bitfld.long 0x4 3. "PWMEN3,PWM Mode Enable for Channel 3" "0: Disable,1: Enable"
bitfld.long 0x4 2. "PWMEN2,PWM Mode Enable for Channel 2" "0: Disable,1: Enable"
bitfld.long 0x4 1. "PWMEN1,PWM Mode Enable for Channel 1" "0: Disable,1: Enable"
newline
bitfld.long 0x4 0. "PWMEN0,PWM Mode Enable for Channel 0" "0: Disable,1: Enable"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x78)++0x3
line.long 0x0 "MSR[$1],Match Shadow"
hexmask.long 0x0 0.--31. 1. "MATCH_SHADOW,Timer Counter Match Shadow Value"
repeat.end
tree.end
endif
sif (cpuis("MC?A146*"))
tree "CTIMER3"
base ad:0x40007000
group.long 0x0++0x17
line.long 0x0 "IR,Interrupt"
bitfld.long 0x0 7. "CR3INT,Interrupt Flag for Capture Channel 3 Event" "0,1"
bitfld.long 0x0 6. "CR2INT,Interrupt Flag for Capture Channel 2 Event" "0,1"
bitfld.long 0x0 5. "CR1INT,Interrupt Flag for Capture Channel 1 Event" "0,1"
newline
bitfld.long 0x0 4. "CR0INT,Interrupt Flag for Capture Channel 0 Event" "0,1"
bitfld.long 0x0 3. "MR3INT,Interrupt Flag for Match Channel 3 Event" "0,1"
bitfld.long 0x0 2. "MR2INT,Interrupt Flag for Match Channel 2 Event" "0,1"
newline
bitfld.long 0x0 1. "MR1INT,Interrupt Flag for Match Channel 1 Event" "0,1"
bitfld.long 0x0 0. "MR0INT,Interrupt Flag for Match Channel 0 Event" "0,1"
line.long 0x4 "TCR,Timer Control"
bitfld.long 0x4 5. "ATCEN,Allow Trigger Count Enable" "0: Disable,1: Enable"
bitfld.long 0x4 4. "AGCEN,Allow Global Count Enable" "0: Disable,1: Enable"
bitfld.long 0x4 1. "CRST,Counter Reset Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x4 0. "CEN,Counter Enable" "0: Disable,1: Enable"
line.long 0x8 "TC,Timer Counter"
hexmask.long 0x8 0.--31. 1. "TCVAL,Timer Counter Value"
line.long 0xC "PR,Prescale"
hexmask.long 0xC 0.--31. 1. "PRVAL,Prescale Reload Value"
line.long 0x10 "PC,Prescale Counter"
hexmask.long 0x10 0.--31. 1. "PCVAL,Prescale Counter Value"
line.long 0x14 "MCR,Match Control"
bitfld.long 0x14 27. "MR3RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 26. "MR2RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 25. "MR1RL,Reload MR" "0: Does not reload,1: Reloads"
newline
bitfld.long 0x14 24. "MR0RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 11. "MR3S,Stop on MR3" "0: Does not stop,1: Stops"
bitfld.long 0x14 10. "MR3R,Reset on MR3" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 9. "MR3I,Interrupt on MR3" "0: Does not generate,1: Generates"
bitfld.long 0x14 8. "MR2S,Stop on MR2" "0: Does not stop,1: Stops"
bitfld.long 0x14 7. "MR2R,Reset on MR2" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 6. "MR2I,Interrupt on MR2" "0: Does not generate,1: Generates"
bitfld.long 0x14 5. "MR1S,Stop on MR1" "0: Does not stop,1: Stops"
bitfld.long 0x14 4. "MR1R,Reset on MR1" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 3. "MR1I,Interrupt on MR1" "0: Does not generate,1: Generates"
bitfld.long 0x14 2. "MR0S,Stop on MR0" "0: Does not stop,1: Stops"
bitfld.long 0x14 1. "MR0R,Reset on MR0" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 0. "MR0I,Interrupt on MR0" "0: Does not generate,1: Generates"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x18)++0x3
line.long 0x0 "MR[$1],Match"
hexmask.long 0x0 0.--31. 1. "MATCH,Timer Counter Match Value"
repeat.end
group.long 0x28++0x3
line.long 0x0 "CCR,Capture Control"
bitfld.long 0x0 11. "CAP3I,Generate Interrupt on Channel 3 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 10. "CAP3FE,Falling Edge of Capture Channel 3" "0: Does not load,1: Loads"
bitfld.long 0x0 9. "CAP3RE,Rising Edge of Capture Channel 3" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 8. "CAP2I,Generate Interrupt on Channel 2 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 7. "CAP2FE,Falling Edge of Capture Channel 2" "0: Does not load,1: Loads"
bitfld.long 0x0 6. "CAP2RE,Rising Edge of Capture Channel 2" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 5. "CAP1I,Generate Interrupt on Channel 1 Capture Event" "0: Does not generates,1: Generates"
bitfld.long 0x0 4. "CAP1FE,Falling Edge of Capture Channel 1" "0: Does not load,1: Loads"
bitfld.long 0x0 3. "CAP1RE,Rising Edge of Capture Channel 1" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 2. "CAP0I,Generate Interrupt on Channel 0 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 1. "CAP0FE,Falling Edge of Capture Channel 0" "0: Does not load,1: Loads"
bitfld.long 0x0 0. "CAP0RE,Rising Edge of Capture Channel 0" "0: Does not load,1: Loads"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
rgroup.long ($2+0x2C)++0x3
line.long 0x0 "CR[$1],Capture"
hexmask.long 0x0 0.--31. 1. "CAP,Timer Counter Capture Value"
repeat.end
group.long 0x3C++0x3
line.long 0x0 "EMR,External Match"
bitfld.long 0x0 10.--11. "EMC3,External Match Control 3" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 8.--9. "EMC2,External Match Control 2" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 6.--7. "EMC1,External Match Control 1" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
newline
bitfld.long 0x0 4.--5. "EMC0,External Match Control 0" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 3. "EM3,External Match 3" "0: Low,1: High"
bitfld.long 0x0 2. "EM2,External Match 2" "0: Low,1: High"
newline
bitfld.long 0x0 1. "EM1,External Match 1" "0: Low,1: High"
bitfld.long 0x0 0. "EM0,External Match 0" "0: Low,1: High"
group.long 0x70++0x7
line.long 0x0 "CTCR,Count Control"
bitfld.long 0x0 5.--7. "SELCC,Edge Select" "0: Capture channel 0 rising edge,1: Capture channel 0 falling edge,2: Capture channel 1 rising edge,3: Capture channel 1 falling edge,4: Capture channel 2 rising edge,5: Capture channel 2 falling edge,?,?"
bitfld.long 0x0 4. "ENCC,Capture Channel Enable" "0,1"
bitfld.long 0x0 2.--3. "CINSEL,Count Input Select" "0: Channel 0 CAPn[0] for CTIMERn,1: Channel 1 CAPn[1] for CTIMERn,2: Channel 2 CAPn[2] for CTIMERn,3: Channel 3 CAPn[3] for CTIMERn"
newline
bitfld.long 0x0 0.--1. "CTMODE,Counter Timer Mode" "0: Timer mode,1: Counter mode rising edge,2: Counter mode falling edge,3: Counter mode dual edge"
line.long 0x4 "PWMC,PWM Control"
bitfld.long 0x4 3. "PWMEN3,PWM Mode Enable for Channel 3" "0: Disable,1: Enable"
bitfld.long 0x4 2. "PWMEN2,PWM Mode Enable for Channel 2" "0: Disable,1: Enable"
bitfld.long 0x4 1. "PWMEN1,PWM Mode Enable for Channel 1" "0: Disable,1: Enable"
newline
bitfld.long 0x4 0. "PWMEN0,PWM Mode Enable for Channel 0" "0: Disable,1: Enable"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x78)++0x3
line.long 0x0 "MSR[$1],Match Shadow"
hexmask.long 0x0 0.--31. 1. "MATCH_SHADOW,Timer Counter Match Shadow Value"
repeat.end
tree.end
tree "CTIMER4"
base ad:0x40008000
group.long 0x0++0x17
line.long 0x0 "IR,Interrupt"
bitfld.long 0x0 7. "CR3INT,Interrupt Flag for Capture Channel 3 Event" "0,1"
bitfld.long 0x0 6. "CR2INT,Interrupt Flag for Capture Channel 2 Event" "0,1"
bitfld.long 0x0 5. "CR1INT,Interrupt Flag for Capture Channel 1 Event" "0,1"
newline
bitfld.long 0x0 4. "CR0INT,Interrupt Flag for Capture Channel 0 Event" "0,1"
bitfld.long 0x0 3. "MR3INT,Interrupt Flag for Match Channel 3 Event" "0,1"
bitfld.long 0x0 2. "MR2INT,Interrupt Flag for Match Channel 2 Event" "0,1"
newline
bitfld.long 0x0 1. "MR1INT,Interrupt Flag for Match Channel 1 Event" "0,1"
bitfld.long 0x0 0. "MR0INT,Interrupt Flag for Match Channel 0 Event" "0,1"
line.long 0x4 "TCR,Timer Control"
bitfld.long 0x4 5. "ATCEN,Allow Trigger Count Enable" "0: Disable,1: Enable"
bitfld.long 0x4 4. "AGCEN,Allow Global Count Enable" "0: Disable,1: Enable"
bitfld.long 0x4 1. "CRST,Counter Reset Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x4 0. "CEN,Counter Enable" "0: Disable,1: Enable"
line.long 0x8 "TC,Timer Counter"
hexmask.long 0x8 0.--31. 1. "TCVAL,Timer Counter Value"
line.long 0xC "PR,Prescale"
hexmask.long 0xC 0.--31. 1. "PRVAL,Prescale Reload Value"
line.long 0x10 "PC,Prescale Counter"
hexmask.long 0x10 0.--31. 1. "PCVAL,Prescale Counter Value"
line.long 0x14 "MCR,Match Control"
bitfld.long 0x14 27. "MR3RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 26. "MR2RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 25. "MR1RL,Reload MR" "0: Does not reload,1: Reloads"
newline
bitfld.long 0x14 24. "MR0RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 11. "MR3S,Stop on MR3" "0: Does not stop,1: Stops"
bitfld.long 0x14 10. "MR3R,Reset on MR3" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 9. "MR3I,Interrupt on MR3" "0: Does not generate,1: Generates"
bitfld.long 0x14 8. "MR2S,Stop on MR2" "0: Does not stop,1: Stops"
bitfld.long 0x14 7. "MR2R,Reset on MR2" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 6. "MR2I,Interrupt on MR2" "0: Does not generate,1: Generates"
bitfld.long 0x14 5. "MR1S,Stop on MR1" "0: Does not stop,1: Stops"
bitfld.long 0x14 4. "MR1R,Reset on MR1" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 3. "MR1I,Interrupt on MR1" "0: Does not generate,1: Generates"
bitfld.long 0x14 2. "MR0S,Stop on MR0" "0: Does not stop,1: Stops"
bitfld.long 0x14 1. "MR0R,Reset on MR0" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 0. "MR0I,Interrupt on MR0" "0: Does not generate,1: Generates"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x18)++0x3
line.long 0x0 "MR[$1],Match"
hexmask.long 0x0 0.--31. 1. "MATCH,Timer Counter Match Value"
repeat.end
group.long 0x28++0x3
line.long 0x0 "CCR,Capture Control"
bitfld.long 0x0 11. "CAP3I,Generate Interrupt on Channel 3 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 10. "CAP3FE,Falling Edge of Capture Channel 3" "0: Does not load,1: Loads"
bitfld.long 0x0 9. "CAP3RE,Rising Edge of Capture Channel 3" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 8. "CAP2I,Generate Interrupt on Channel 2 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 7. "CAP2FE,Falling Edge of Capture Channel 2" "0: Does not load,1: Loads"
bitfld.long 0x0 6. "CAP2RE,Rising Edge of Capture Channel 2" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 5. "CAP1I,Generate Interrupt on Channel 1 Capture Event" "0: Does not generates,1: Generates"
bitfld.long 0x0 4. "CAP1FE,Falling Edge of Capture Channel 1" "0: Does not load,1: Loads"
bitfld.long 0x0 3. "CAP1RE,Rising Edge of Capture Channel 1" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 2. "CAP0I,Generate Interrupt on Channel 0 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 1. "CAP0FE,Falling Edge of Capture Channel 0" "0: Does not load,1: Loads"
bitfld.long 0x0 0. "CAP0RE,Rising Edge of Capture Channel 0" "0: Does not load,1: Loads"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
rgroup.long ($2+0x2C)++0x3
line.long 0x0 "CR[$1],Capture"
hexmask.long 0x0 0.--31. 1. "CAP,Timer Counter Capture Value"
repeat.end
group.long 0x3C++0x3
line.long 0x0 "EMR,External Match"
bitfld.long 0x0 10.--11. "EMC3,External Match Control 3" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 8.--9. "EMC2,External Match Control 2" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 6.--7. "EMC1,External Match Control 1" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
newline
bitfld.long 0x0 4.--5. "EMC0,External Match Control 0" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 3. "EM3,External Match 3" "0: Low,1: High"
bitfld.long 0x0 2. "EM2,External Match 2" "0: Low,1: High"
newline
bitfld.long 0x0 1. "EM1,External Match 1" "0: Low,1: High"
bitfld.long 0x0 0. "EM0,External Match 0" "0: Low,1: High"
group.long 0x70++0x7
line.long 0x0 "CTCR,Count Control"
bitfld.long 0x0 5.--7. "SELCC,Edge Select" "0: Capture channel 0 rising edge,1: Capture channel 0 falling edge,2: Capture channel 1 rising edge,3: Capture channel 1 falling edge,4: Capture channel 2 rising edge,5: Capture channel 2 falling edge,?,?"
bitfld.long 0x0 4. "ENCC,Capture Channel Enable" "0,1"
bitfld.long 0x0 2.--3. "CINSEL,Count Input Select" "0: Channel 0 CAPn[0] for CTIMERn,1: Channel 1 CAPn[1] for CTIMERn,2: Channel 2 CAPn[2] for CTIMERn,3: Channel 3 CAPn[3] for CTIMERn"
newline
bitfld.long 0x0 0.--1. "CTMODE,Counter Timer Mode" "0: Timer mode,1: Counter mode rising edge,2: Counter mode falling edge,3: Counter mode dual edge"
line.long 0x4 "PWMC,PWM Control"
bitfld.long 0x4 3. "PWMEN3,PWM Mode Enable for Channel 3" "0: Disable,1: Enable"
bitfld.long 0x4 2. "PWMEN2,PWM Mode Enable for Channel 2" "0: Disable,1: Enable"
bitfld.long 0x4 1. "PWMEN1,PWM Mode Enable for Channel 1" "0: Disable,1: Enable"
newline
bitfld.long 0x4 0. "PWMEN0,PWM Mode Enable for Channel 0" "0: Disable,1: Enable"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x78)++0x3
line.long 0x0 "MSR[$1],Match Shadow"
hexmask.long 0x0 0.--31. 1. "MATCH_SHADOW,Timer Counter Match Shadow Value"
repeat.end
tree.end
endif
sif (cpuis("MC?A154*"))
tree "CTIMER3"
base ad:0x40007000
group.long 0x0++0x17
line.long 0x0 "IR,Interrupt"
bitfld.long 0x0 7. "CR3INT,Interrupt Flag for Capture Channel 3 Event" "0,1"
bitfld.long 0x0 6. "CR2INT,Interrupt Flag for Capture Channel 2 Event" "0,1"
bitfld.long 0x0 5. "CR1INT,Interrupt Flag for Capture Channel 1 Event" "0,1"
newline
bitfld.long 0x0 4. "CR0INT,Interrupt Flag for Capture Channel 0 Event" "0,1"
bitfld.long 0x0 3. "MR3INT,Interrupt Flag for Match Channel 3 Event" "0,1"
bitfld.long 0x0 2. "MR2INT,Interrupt Flag for Match Channel 2 Event" "0,1"
newline
bitfld.long 0x0 1. "MR1INT,Interrupt Flag for Match Channel 1 Event" "0,1"
bitfld.long 0x0 0. "MR0INT,Interrupt Flag for Match Channel 0 Event" "0,1"
line.long 0x4 "TCR,Timer Control"
bitfld.long 0x4 5. "ATCEN,Allow Trigger Count Enable" "0: Disable,1: Enable"
bitfld.long 0x4 4. "AGCEN,Allow Global Count Enable" "0: Disable,1: Enable"
bitfld.long 0x4 1. "CRST,Counter Reset Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x4 0. "CEN,Counter Enable" "0: Disable,1: Enable"
line.long 0x8 "TC,Timer Counter"
hexmask.long 0x8 0.--31. 1. "TCVAL,Timer Counter Value"
line.long 0xC "PR,Prescale"
hexmask.long 0xC 0.--31. 1. "PRVAL,Prescale Reload Value"
line.long 0x10 "PC,Prescale Counter"
hexmask.long 0x10 0.--31. 1. "PCVAL,Prescale Counter Value"
line.long 0x14 "MCR,Match Control"
bitfld.long 0x14 27. "MR3RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 26. "MR2RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 25. "MR1RL,Reload MR" "0: Does not reload,1: Reloads"
newline
bitfld.long 0x14 24. "MR0RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 11. "MR3S,Stop on MR3" "0: Does not stop,1: Stops"
bitfld.long 0x14 10. "MR3R,Reset on MR3" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 9. "MR3I,Interrupt on MR3" "0: Does not generate,1: Generates"
bitfld.long 0x14 8. "MR2S,Stop on MR2" "0: Does not stop,1: Stops"
bitfld.long 0x14 7. "MR2R,Reset on MR2" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 6. "MR2I,Interrupt on MR2" "0: Does not generate,1: Generates"
bitfld.long 0x14 5. "MR1S,Stop on MR1" "0: Does not stop,1: Stops"
bitfld.long 0x14 4. "MR1R,Reset on MR1" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 3. "MR1I,Interrupt on MR1" "0: Does not generate,1: Generates"
bitfld.long 0x14 2. "MR0S,Stop on MR0" "0: Does not stop,1: Stops"
bitfld.long 0x14 1. "MR0R,Reset on MR0" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 0. "MR0I,Interrupt on MR0" "0: Does not generate,1: Generates"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x18)++0x3
line.long 0x0 "MR[$1],Match"
hexmask.long 0x0 0.--31. 1. "MATCH,Timer Counter Match Value"
repeat.end
group.long 0x28++0x3
line.long 0x0 "CCR,Capture Control"
bitfld.long 0x0 11. "CAP3I,Generate Interrupt on Channel 3 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 10. "CAP3FE,Falling Edge of Capture Channel 3" "0: Does not load,1: Loads"
bitfld.long 0x0 9. "CAP3RE,Rising Edge of Capture Channel 3" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 8. "CAP2I,Generate Interrupt on Channel 2 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 7. "CAP2FE,Falling Edge of Capture Channel 2" "0: Does not load,1: Loads"
bitfld.long 0x0 6. "CAP2RE,Rising Edge of Capture Channel 2" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 5. "CAP1I,Generate Interrupt on Channel 1 Capture Event" "0: Does not generates,1: Generates"
bitfld.long 0x0 4. "CAP1FE,Falling Edge of Capture Channel 1" "0: Does not load,1: Loads"
bitfld.long 0x0 3. "CAP1RE,Rising Edge of Capture Channel 1" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 2. "CAP0I,Generate Interrupt on Channel 0 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 1. "CAP0FE,Falling Edge of Capture Channel 0" "0: Does not load,1: Loads"
bitfld.long 0x0 0. "CAP0RE,Rising Edge of Capture Channel 0" "0: Does not load,1: Loads"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
rgroup.long ($2+0x2C)++0x3
line.long 0x0 "CR[$1],Capture"
hexmask.long 0x0 0.--31. 1. "CAP,Timer Counter Capture Value"
repeat.end
group.long 0x3C++0x3
line.long 0x0 "EMR,External Match"
bitfld.long 0x0 10.--11. "EMC3,External Match Control 3" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 8.--9. "EMC2,External Match Control 2" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 6.--7. "EMC1,External Match Control 1" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
newline
bitfld.long 0x0 4.--5. "EMC0,External Match Control 0" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 3. "EM3,External Match 3" "0: Low,1: High"
bitfld.long 0x0 2. "EM2,External Match 2" "0: Low,1: High"
newline
bitfld.long 0x0 1. "EM1,External Match 1" "0: Low,1: High"
bitfld.long 0x0 0. "EM0,External Match 0" "0: Low,1: High"
group.long 0x70++0x7
line.long 0x0 "CTCR,Count Control"
bitfld.long 0x0 5.--7. "SELCC,Edge Select" "0: Capture channel 0 rising edge,1: Capture channel 0 falling edge,2: Capture channel 1 rising edge,3: Capture channel 1 falling edge,4: Capture channel 2 rising edge,5: Capture channel 2 falling edge,?,?"
bitfld.long 0x0 4. "ENCC,Capture Channel Enable" "0,1"
bitfld.long 0x0 2.--3. "CINSEL,Count Input Select" "0: Channel 0 CAPn[0] for CTIMERn,1: Channel 1 CAPn[1] for CTIMERn,2: Channel 2 CAPn[2] for CTIMERn,3: Channel 3 CAPn[3] for CTIMERn"
newline
bitfld.long 0x0 0.--1. "CTMODE,Counter Timer Mode" "0: Timer mode,1: Counter mode rising edge,2: Counter mode falling edge,3: Counter mode dual edge"
line.long 0x4 "PWMC,PWM Control"
bitfld.long 0x4 3. "PWMEN3,PWM Mode Enable for Channel 3" "0: Disable,1: Enable"
bitfld.long 0x4 2. "PWMEN2,PWM Mode Enable for Channel 2" "0: Disable,1: Enable"
bitfld.long 0x4 1. "PWMEN1,PWM Mode Enable for Channel 1" "0: Disable,1: Enable"
newline
bitfld.long 0x4 0. "PWMEN0,PWM Mode Enable for Channel 0" "0: Disable,1: Enable"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x78)++0x3
line.long 0x0 "MSR[$1],Match Shadow"
hexmask.long 0x0 0.--31. 1. "MATCH_SHADOW,Timer Counter Match Shadow Value"
repeat.end
tree.end
tree "CTIMER4"
base ad:0x40008000
group.long 0x0++0x17
line.long 0x0 "IR,Interrupt"
bitfld.long 0x0 7. "CR3INT,Interrupt Flag for Capture Channel 3 Event" "0,1"
bitfld.long 0x0 6. "CR2INT,Interrupt Flag for Capture Channel 2 Event" "0,1"
bitfld.long 0x0 5. "CR1INT,Interrupt Flag for Capture Channel 1 Event" "0,1"
newline
bitfld.long 0x0 4. "CR0INT,Interrupt Flag for Capture Channel 0 Event" "0,1"
bitfld.long 0x0 3. "MR3INT,Interrupt Flag for Match Channel 3 Event" "0,1"
bitfld.long 0x0 2. "MR2INT,Interrupt Flag for Match Channel 2 Event" "0,1"
newline
bitfld.long 0x0 1. "MR1INT,Interrupt Flag for Match Channel 1 Event" "0,1"
bitfld.long 0x0 0. "MR0INT,Interrupt Flag for Match Channel 0 Event" "0,1"
line.long 0x4 "TCR,Timer Control"
bitfld.long 0x4 5. "ATCEN,Allow Trigger Count Enable" "0: Disable,1: Enable"
bitfld.long 0x4 4. "AGCEN,Allow Global Count Enable" "0: Disable,1: Enable"
bitfld.long 0x4 1. "CRST,Counter Reset Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x4 0. "CEN,Counter Enable" "0: Disable,1: Enable"
line.long 0x8 "TC,Timer Counter"
hexmask.long 0x8 0.--31. 1. "TCVAL,Timer Counter Value"
line.long 0xC "PR,Prescale"
hexmask.long 0xC 0.--31. 1. "PRVAL,Prescale Reload Value"
line.long 0x10 "PC,Prescale Counter"
hexmask.long 0x10 0.--31. 1. "PCVAL,Prescale Counter Value"
line.long 0x14 "MCR,Match Control"
bitfld.long 0x14 27. "MR3RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 26. "MR2RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 25. "MR1RL,Reload MR" "0: Does not reload,1: Reloads"
newline
bitfld.long 0x14 24. "MR0RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 11. "MR3S,Stop on MR3" "0: Does not stop,1: Stops"
bitfld.long 0x14 10. "MR3R,Reset on MR3" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 9. "MR3I,Interrupt on MR3" "0: Does not generate,1: Generates"
bitfld.long 0x14 8. "MR2S,Stop on MR2" "0: Does not stop,1: Stops"
bitfld.long 0x14 7. "MR2R,Reset on MR2" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 6. "MR2I,Interrupt on MR2" "0: Does not generate,1: Generates"
bitfld.long 0x14 5. "MR1S,Stop on MR1" "0: Does not stop,1: Stops"
bitfld.long 0x14 4. "MR1R,Reset on MR1" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 3. "MR1I,Interrupt on MR1" "0: Does not generate,1: Generates"
bitfld.long 0x14 2. "MR0S,Stop on MR0" "0: Does not stop,1: Stops"
bitfld.long 0x14 1. "MR0R,Reset on MR0" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 0. "MR0I,Interrupt on MR0" "0: Does not generate,1: Generates"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x18)++0x3
line.long 0x0 "MR[$1],Match"
hexmask.long 0x0 0.--31. 1. "MATCH,Timer Counter Match Value"
repeat.end
group.long 0x28++0x3
line.long 0x0 "CCR,Capture Control"
bitfld.long 0x0 11. "CAP3I,Generate Interrupt on Channel 3 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 10. "CAP3FE,Falling Edge of Capture Channel 3" "0: Does not load,1: Loads"
bitfld.long 0x0 9. "CAP3RE,Rising Edge of Capture Channel 3" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 8. "CAP2I,Generate Interrupt on Channel 2 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 7. "CAP2FE,Falling Edge of Capture Channel 2" "0: Does not load,1: Loads"
bitfld.long 0x0 6. "CAP2RE,Rising Edge of Capture Channel 2" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 5. "CAP1I,Generate Interrupt on Channel 1 Capture Event" "0: Does not generates,1: Generates"
bitfld.long 0x0 4. "CAP1FE,Falling Edge of Capture Channel 1" "0: Does not load,1: Loads"
bitfld.long 0x0 3. "CAP1RE,Rising Edge of Capture Channel 1" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 2. "CAP0I,Generate Interrupt on Channel 0 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 1. "CAP0FE,Falling Edge of Capture Channel 0" "0: Does not load,1: Loads"
bitfld.long 0x0 0. "CAP0RE,Rising Edge of Capture Channel 0" "0: Does not load,1: Loads"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
rgroup.long ($2+0x2C)++0x3
line.long 0x0 "CR[$1],Capture"
hexmask.long 0x0 0.--31. 1. "CAP,Timer Counter Capture Value"
repeat.end
group.long 0x3C++0x3
line.long 0x0 "EMR,External Match"
bitfld.long 0x0 10.--11. "EMC3,External Match Control 3" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 8.--9. "EMC2,External Match Control 2" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 6.--7. "EMC1,External Match Control 1" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
newline
bitfld.long 0x0 4.--5. "EMC0,External Match Control 0" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 3. "EM3,External Match 3" "0: Low,1: High"
bitfld.long 0x0 2. "EM2,External Match 2" "0: Low,1: High"
newline
bitfld.long 0x0 1. "EM1,External Match 1" "0: Low,1: High"
bitfld.long 0x0 0. "EM0,External Match 0" "0: Low,1: High"
group.long 0x70++0x7
line.long 0x0 "CTCR,Count Control"
bitfld.long 0x0 5.--7. "SELCC,Edge Select" "0: Capture channel 0 rising edge,1: Capture channel 0 falling edge,2: Capture channel 1 rising edge,3: Capture channel 1 falling edge,4: Capture channel 2 rising edge,5: Capture channel 2 falling edge,?,?"
bitfld.long 0x0 4. "ENCC,Capture Channel Enable" "0,1"
bitfld.long 0x0 2.--3. "CINSEL,Count Input Select" "0: Channel 0 CAPn[0] for CTIMERn,1: Channel 1 CAPn[1] for CTIMERn,2: Channel 2 CAPn[2] for CTIMERn,3: Channel 3 CAPn[3] for CTIMERn"
newline
bitfld.long 0x0 0.--1. "CTMODE,Counter Timer Mode" "0: Timer mode,1: Counter mode rising edge,2: Counter mode falling edge,3: Counter mode dual edge"
line.long 0x4 "PWMC,PWM Control"
bitfld.long 0x4 3. "PWMEN3,PWM Mode Enable for Channel 3" "0: Disable,1: Enable"
bitfld.long 0x4 2. "PWMEN2,PWM Mode Enable for Channel 2" "0: Disable,1: Enable"
bitfld.long 0x4 1. "PWMEN1,PWM Mode Enable for Channel 1" "0: Disable,1: Enable"
newline
bitfld.long 0x4 0. "PWMEN0,PWM Mode Enable for Channel 0" "0: Disable,1: Enable"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x78)++0x3
line.long 0x0 "MSR[$1],Match Shadow"
hexmask.long 0x0 0.--31. 1. "MATCH_SHADOW,Timer Counter Match Shadow Value"
repeat.end
tree.end
endif
sif (cpuis("MC?A155*"))
tree "CTIMER3"
base ad:0x40007000
group.long 0x0++0x17
line.long 0x0 "IR,Interrupt"
bitfld.long 0x0 7. "CR3INT,Interrupt Flag for Capture Channel 3 Event" "0,1"
bitfld.long 0x0 6. "CR2INT,Interrupt Flag for Capture Channel 2 Event" "0,1"
bitfld.long 0x0 5. "CR1INT,Interrupt Flag for Capture Channel 1 Event" "0,1"
newline
bitfld.long 0x0 4. "CR0INT,Interrupt Flag for Capture Channel 0 Event" "0,1"
bitfld.long 0x0 3. "MR3INT,Interrupt Flag for Match Channel 3 Event" "0,1"
bitfld.long 0x0 2. "MR2INT,Interrupt Flag for Match Channel 2 Event" "0,1"
newline
bitfld.long 0x0 1. "MR1INT,Interrupt Flag for Match Channel 1 Event" "0,1"
bitfld.long 0x0 0. "MR0INT,Interrupt Flag for Match Channel 0 Event" "0,1"
line.long 0x4 "TCR,Timer Control"
bitfld.long 0x4 5. "ATCEN,Allow Trigger Count Enable" "0: Disable,1: Enable"
bitfld.long 0x4 4. "AGCEN,Allow Global Count Enable" "0: Disable,1: Enable"
bitfld.long 0x4 1. "CRST,Counter Reset Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x4 0. "CEN,Counter Enable" "0: Disable,1: Enable"
line.long 0x8 "TC,Timer Counter"
hexmask.long 0x8 0.--31. 1. "TCVAL,Timer Counter Value"
line.long 0xC "PR,Prescale"
hexmask.long 0xC 0.--31. 1. "PRVAL,Prescale Reload Value"
line.long 0x10 "PC,Prescale Counter"
hexmask.long 0x10 0.--31. 1. "PCVAL,Prescale Counter Value"
line.long 0x14 "MCR,Match Control"
bitfld.long 0x14 27. "MR3RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 26. "MR2RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 25. "MR1RL,Reload MR" "0: Does not reload,1: Reloads"
newline
bitfld.long 0x14 24. "MR0RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 11. "MR3S,Stop on MR3" "0: Does not stop,1: Stops"
bitfld.long 0x14 10. "MR3R,Reset on MR3" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 9. "MR3I,Interrupt on MR3" "0: Does not generate,1: Generates"
bitfld.long 0x14 8. "MR2S,Stop on MR2" "0: Does not stop,1: Stops"
bitfld.long 0x14 7. "MR2R,Reset on MR2" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 6. "MR2I,Interrupt on MR2" "0: Does not generate,1: Generates"
bitfld.long 0x14 5. "MR1S,Stop on MR1" "0: Does not stop,1: Stops"
bitfld.long 0x14 4. "MR1R,Reset on MR1" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 3. "MR1I,Interrupt on MR1" "0: Does not generate,1: Generates"
bitfld.long 0x14 2. "MR0S,Stop on MR0" "0: Does not stop,1: Stops"
bitfld.long 0x14 1. "MR0R,Reset on MR0" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 0. "MR0I,Interrupt on MR0" "0: Does not generate,1: Generates"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x18)++0x3
line.long 0x0 "MR[$1],Match"
hexmask.long 0x0 0.--31. 1. "MATCH,Timer Counter Match Value"
repeat.end
group.long 0x28++0x3
line.long 0x0 "CCR,Capture Control"
bitfld.long 0x0 11. "CAP3I,Generate Interrupt on Channel 3 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 10. "CAP3FE,Falling Edge of Capture Channel 3" "0: Does not load,1: Loads"
bitfld.long 0x0 9. "CAP3RE,Rising Edge of Capture Channel 3" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 8. "CAP2I,Generate Interrupt on Channel 2 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 7. "CAP2FE,Falling Edge of Capture Channel 2" "0: Does not load,1: Loads"
bitfld.long 0x0 6. "CAP2RE,Rising Edge of Capture Channel 2" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 5. "CAP1I,Generate Interrupt on Channel 1 Capture Event" "0: Does not generates,1: Generates"
bitfld.long 0x0 4. "CAP1FE,Falling Edge of Capture Channel 1" "0: Does not load,1: Loads"
bitfld.long 0x0 3. "CAP1RE,Rising Edge of Capture Channel 1" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 2. "CAP0I,Generate Interrupt on Channel 0 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 1. "CAP0FE,Falling Edge of Capture Channel 0" "0: Does not load,1: Loads"
bitfld.long 0x0 0. "CAP0RE,Rising Edge of Capture Channel 0" "0: Does not load,1: Loads"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
rgroup.long ($2+0x2C)++0x3
line.long 0x0 "CR[$1],Capture"
hexmask.long 0x0 0.--31. 1. "CAP,Timer Counter Capture Value"
repeat.end
group.long 0x3C++0x3
line.long 0x0 "EMR,External Match"
bitfld.long 0x0 10.--11. "EMC3,External Match Control 3" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 8.--9. "EMC2,External Match Control 2" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 6.--7. "EMC1,External Match Control 1" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
newline
bitfld.long 0x0 4.--5. "EMC0,External Match Control 0" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 3. "EM3,External Match 3" "0: Low,1: High"
bitfld.long 0x0 2. "EM2,External Match 2" "0: Low,1: High"
newline
bitfld.long 0x0 1. "EM1,External Match 1" "0: Low,1: High"
bitfld.long 0x0 0. "EM0,External Match 0" "0: Low,1: High"
group.long 0x70++0x7
line.long 0x0 "CTCR,Count Control"
bitfld.long 0x0 5.--7. "SELCC,Edge Select" "0: Capture channel 0 rising edge,1: Capture channel 0 falling edge,2: Capture channel 1 rising edge,3: Capture channel 1 falling edge,4: Capture channel 2 rising edge,5: Capture channel 2 falling edge,?,?"
bitfld.long 0x0 4. "ENCC,Capture Channel Enable" "0,1"
bitfld.long 0x0 2.--3. "CINSEL,Count Input Select" "0: Channel 0 CAPn[0] for CTIMERn,1: Channel 1 CAPn[1] for CTIMERn,2: Channel 2 CAPn[2] for CTIMERn,3: Channel 3 CAPn[3] for CTIMERn"
newline
bitfld.long 0x0 0.--1. "CTMODE,Counter Timer Mode" "0: Timer mode,1: Counter mode rising edge,2: Counter mode falling edge,3: Counter mode dual edge"
line.long 0x4 "PWMC,PWM Control"
bitfld.long 0x4 3. "PWMEN3,PWM Mode Enable for Channel 3" "0: Disable,1: Enable"
bitfld.long 0x4 2. "PWMEN2,PWM Mode Enable for Channel 2" "0: Disable,1: Enable"
bitfld.long 0x4 1. "PWMEN1,PWM Mode Enable for Channel 1" "0: Disable,1: Enable"
newline
bitfld.long 0x4 0. "PWMEN0,PWM Mode Enable for Channel 0" "0: Disable,1: Enable"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x78)++0x3
line.long 0x0 "MSR[$1],Match Shadow"
hexmask.long 0x0 0.--31. 1. "MATCH_SHADOW,Timer Counter Match Shadow Value"
repeat.end
tree.end
tree "CTIMER4"
base ad:0x40008000
group.long 0x0++0x17
line.long 0x0 "IR,Interrupt"
bitfld.long 0x0 7. "CR3INT,Interrupt Flag for Capture Channel 3 Event" "0,1"
bitfld.long 0x0 6. "CR2INT,Interrupt Flag for Capture Channel 2 Event" "0,1"
bitfld.long 0x0 5. "CR1INT,Interrupt Flag for Capture Channel 1 Event" "0,1"
newline
bitfld.long 0x0 4. "CR0INT,Interrupt Flag for Capture Channel 0 Event" "0,1"
bitfld.long 0x0 3. "MR3INT,Interrupt Flag for Match Channel 3 Event" "0,1"
bitfld.long 0x0 2. "MR2INT,Interrupt Flag for Match Channel 2 Event" "0,1"
newline
bitfld.long 0x0 1. "MR1INT,Interrupt Flag for Match Channel 1 Event" "0,1"
bitfld.long 0x0 0. "MR0INT,Interrupt Flag for Match Channel 0 Event" "0,1"
line.long 0x4 "TCR,Timer Control"
bitfld.long 0x4 5. "ATCEN,Allow Trigger Count Enable" "0: Disable,1: Enable"
bitfld.long 0x4 4. "AGCEN,Allow Global Count Enable" "0: Disable,1: Enable"
bitfld.long 0x4 1. "CRST,Counter Reset Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x4 0. "CEN,Counter Enable" "0: Disable,1: Enable"
line.long 0x8 "TC,Timer Counter"
hexmask.long 0x8 0.--31. 1. "TCVAL,Timer Counter Value"
line.long 0xC "PR,Prescale"
hexmask.long 0xC 0.--31. 1. "PRVAL,Prescale Reload Value"
line.long 0x10 "PC,Prescale Counter"
hexmask.long 0x10 0.--31. 1. "PCVAL,Prescale Counter Value"
line.long 0x14 "MCR,Match Control"
bitfld.long 0x14 27. "MR3RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 26. "MR2RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 25. "MR1RL,Reload MR" "0: Does not reload,1: Reloads"
newline
bitfld.long 0x14 24. "MR0RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 11. "MR3S,Stop on MR3" "0: Does not stop,1: Stops"
bitfld.long 0x14 10. "MR3R,Reset on MR3" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 9. "MR3I,Interrupt on MR3" "0: Does not generate,1: Generates"
bitfld.long 0x14 8. "MR2S,Stop on MR2" "0: Does not stop,1: Stops"
bitfld.long 0x14 7. "MR2R,Reset on MR2" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 6. "MR2I,Interrupt on MR2" "0: Does not generate,1: Generates"
bitfld.long 0x14 5. "MR1S,Stop on MR1" "0: Does not stop,1: Stops"
bitfld.long 0x14 4. "MR1R,Reset on MR1" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 3. "MR1I,Interrupt on MR1" "0: Does not generate,1: Generates"
bitfld.long 0x14 2. "MR0S,Stop on MR0" "0: Does not stop,1: Stops"
bitfld.long 0x14 1. "MR0R,Reset on MR0" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 0. "MR0I,Interrupt on MR0" "0: Does not generate,1: Generates"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x18)++0x3
line.long 0x0 "MR[$1],Match"
hexmask.long 0x0 0.--31. 1. "MATCH,Timer Counter Match Value"
repeat.end
group.long 0x28++0x3
line.long 0x0 "CCR,Capture Control"
bitfld.long 0x0 11. "CAP3I,Generate Interrupt on Channel 3 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 10. "CAP3FE,Falling Edge of Capture Channel 3" "0: Does not load,1: Loads"
bitfld.long 0x0 9. "CAP3RE,Rising Edge of Capture Channel 3" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 8. "CAP2I,Generate Interrupt on Channel 2 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 7. "CAP2FE,Falling Edge of Capture Channel 2" "0: Does not load,1: Loads"
bitfld.long 0x0 6. "CAP2RE,Rising Edge of Capture Channel 2" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 5. "CAP1I,Generate Interrupt on Channel 1 Capture Event" "0: Does not generates,1: Generates"
bitfld.long 0x0 4. "CAP1FE,Falling Edge of Capture Channel 1" "0: Does not load,1: Loads"
bitfld.long 0x0 3. "CAP1RE,Rising Edge of Capture Channel 1" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 2. "CAP0I,Generate Interrupt on Channel 0 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 1. "CAP0FE,Falling Edge of Capture Channel 0" "0: Does not load,1: Loads"
bitfld.long 0x0 0. "CAP0RE,Rising Edge of Capture Channel 0" "0: Does not load,1: Loads"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
rgroup.long ($2+0x2C)++0x3
line.long 0x0 "CR[$1],Capture"
hexmask.long 0x0 0.--31. 1. "CAP,Timer Counter Capture Value"
repeat.end
group.long 0x3C++0x3
line.long 0x0 "EMR,External Match"
bitfld.long 0x0 10.--11. "EMC3,External Match Control 3" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 8.--9. "EMC2,External Match Control 2" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 6.--7. "EMC1,External Match Control 1" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
newline
bitfld.long 0x0 4.--5. "EMC0,External Match Control 0" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 3. "EM3,External Match 3" "0: Low,1: High"
bitfld.long 0x0 2. "EM2,External Match 2" "0: Low,1: High"
newline
bitfld.long 0x0 1. "EM1,External Match 1" "0: Low,1: High"
bitfld.long 0x0 0. "EM0,External Match 0" "0: Low,1: High"
group.long 0x70++0x7
line.long 0x0 "CTCR,Count Control"
bitfld.long 0x0 5.--7. "SELCC,Edge Select" "0: Capture channel 0 rising edge,1: Capture channel 0 falling edge,2: Capture channel 1 rising edge,3: Capture channel 1 falling edge,4: Capture channel 2 rising edge,5: Capture channel 2 falling edge,?,?"
bitfld.long 0x0 4. "ENCC,Capture Channel Enable" "0,1"
bitfld.long 0x0 2.--3. "CINSEL,Count Input Select" "0: Channel 0 CAPn[0] for CTIMERn,1: Channel 1 CAPn[1] for CTIMERn,2: Channel 2 CAPn[2] for CTIMERn,3: Channel 3 CAPn[3] for CTIMERn"
newline
bitfld.long 0x0 0.--1. "CTMODE,Counter Timer Mode" "0: Timer mode,1: Counter mode rising edge,2: Counter mode falling edge,3: Counter mode dual edge"
line.long 0x4 "PWMC,PWM Control"
bitfld.long 0x4 3. "PWMEN3,PWM Mode Enable for Channel 3" "0: Disable,1: Enable"
bitfld.long 0x4 2. "PWMEN2,PWM Mode Enable for Channel 2" "0: Disable,1: Enable"
bitfld.long 0x4 1. "PWMEN1,PWM Mode Enable for Channel 1" "0: Disable,1: Enable"
newline
bitfld.long 0x4 0. "PWMEN0,PWM Mode Enable for Channel 0" "0: Disable,1: Enable"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x78)++0x3
line.long 0x0 "MSR[$1],Match Shadow"
hexmask.long 0x0 0.--31. 1. "MATCH_SHADOW,Timer Counter Match Shadow Value"
repeat.end
tree.end
endif
sif (cpuis("MC?A156*"))
tree "CTIMER3"
base ad:0x40007000
group.long 0x0++0x17
line.long 0x0 "IR,Interrupt"
bitfld.long 0x0 7. "CR3INT,Interrupt Flag for Capture Channel 3 Event" "0,1"
bitfld.long 0x0 6. "CR2INT,Interrupt Flag for Capture Channel 2 Event" "0,1"
bitfld.long 0x0 5. "CR1INT,Interrupt Flag for Capture Channel 1 Event" "0,1"
newline
bitfld.long 0x0 4. "CR0INT,Interrupt Flag for Capture Channel 0 Event" "0,1"
bitfld.long 0x0 3. "MR3INT,Interrupt Flag for Match Channel 3 Event" "0,1"
bitfld.long 0x0 2. "MR2INT,Interrupt Flag for Match Channel 2 Event" "0,1"
newline
bitfld.long 0x0 1. "MR1INT,Interrupt Flag for Match Channel 1 Event" "0,1"
bitfld.long 0x0 0. "MR0INT,Interrupt Flag for Match Channel 0 Event" "0,1"
line.long 0x4 "TCR,Timer Control"
bitfld.long 0x4 5. "ATCEN,Allow Trigger Count Enable" "0: Disable,1: Enable"
bitfld.long 0x4 4. "AGCEN,Allow Global Count Enable" "0: Disable,1: Enable"
bitfld.long 0x4 1. "CRST,Counter Reset Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x4 0. "CEN,Counter Enable" "0: Disable,1: Enable"
line.long 0x8 "TC,Timer Counter"
hexmask.long 0x8 0.--31. 1. "TCVAL,Timer Counter Value"
line.long 0xC "PR,Prescale"
hexmask.long 0xC 0.--31. 1. "PRVAL,Prescale Reload Value"
line.long 0x10 "PC,Prescale Counter"
hexmask.long 0x10 0.--31. 1. "PCVAL,Prescale Counter Value"
line.long 0x14 "MCR,Match Control"
bitfld.long 0x14 27. "MR3RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 26. "MR2RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 25. "MR1RL,Reload MR" "0: Does not reload,1: Reloads"
newline
bitfld.long 0x14 24. "MR0RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 11. "MR3S,Stop on MR3" "0: Does not stop,1: Stops"
bitfld.long 0x14 10. "MR3R,Reset on MR3" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 9. "MR3I,Interrupt on MR3" "0: Does not generate,1: Generates"
bitfld.long 0x14 8. "MR2S,Stop on MR2" "0: Does not stop,1: Stops"
bitfld.long 0x14 7. "MR2R,Reset on MR2" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 6. "MR2I,Interrupt on MR2" "0: Does not generate,1: Generates"
bitfld.long 0x14 5. "MR1S,Stop on MR1" "0: Does not stop,1: Stops"
bitfld.long 0x14 4. "MR1R,Reset on MR1" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 3. "MR1I,Interrupt on MR1" "0: Does not generate,1: Generates"
bitfld.long 0x14 2. "MR0S,Stop on MR0" "0: Does not stop,1: Stops"
bitfld.long 0x14 1. "MR0R,Reset on MR0" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 0. "MR0I,Interrupt on MR0" "0: Does not generate,1: Generates"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x18)++0x3
line.long 0x0 "MR[$1],Match"
hexmask.long 0x0 0.--31. 1. "MATCH,Timer Counter Match Value"
repeat.end
group.long 0x28++0x3
line.long 0x0 "CCR,Capture Control"
bitfld.long 0x0 11. "CAP3I,Generate Interrupt on Channel 3 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 10. "CAP3FE,Falling Edge of Capture Channel 3" "0: Does not load,1: Loads"
bitfld.long 0x0 9. "CAP3RE,Rising Edge of Capture Channel 3" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 8. "CAP2I,Generate Interrupt on Channel 2 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 7. "CAP2FE,Falling Edge of Capture Channel 2" "0: Does not load,1: Loads"
bitfld.long 0x0 6. "CAP2RE,Rising Edge of Capture Channel 2" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 5. "CAP1I,Generate Interrupt on Channel 1 Capture Event" "0: Does not generates,1: Generates"
bitfld.long 0x0 4. "CAP1FE,Falling Edge of Capture Channel 1" "0: Does not load,1: Loads"
bitfld.long 0x0 3. "CAP1RE,Rising Edge of Capture Channel 1" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 2. "CAP0I,Generate Interrupt on Channel 0 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 1. "CAP0FE,Falling Edge of Capture Channel 0" "0: Does not load,1: Loads"
bitfld.long 0x0 0. "CAP0RE,Rising Edge of Capture Channel 0" "0: Does not load,1: Loads"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
rgroup.long ($2+0x2C)++0x3
line.long 0x0 "CR[$1],Capture"
hexmask.long 0x0 0.--31. 1. "CAP,Timer Counter Capture Value"
repeat.end
group.long 0x3C++0x3
line.long 0x0 "EMR,External Match"
bitfld.long 0x0 10.--11. "EMC3,External Match Control 3" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 8.--9. "EMC2,External Match Control 2" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 6.--7. "EMC1,External Match Control 1" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
newline
bitfld.long 0x0 4.--5. "EMC0,External Match Control 0" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 3. "EM3,External Match 3" "0: Low,1: High"
bitfld.long 0x0 2. "EM2,External Match 2" "0: Low,1: High"
newline
bitfld.long 0x0 1. "EM1,External Match 1" "0: Low,1: High"
bitfld.long 0x0 0. "EM0,External Match 0" "0: Low,1: High"
group.long 0x70++0x7
line.long 0x0 "CTCR,Count Control"
bitfld.long 0x0 5.--7. "SELCC,Edge Select" "0: Capture channel 0 rising edge,1: Capture channel 0 falling edge,2: Capture channel 1 rising edge,3: Capture channel 1 falling edge,4: Capture channel 2 rising edge,5: Capture channel 2 falling edge,?,?"
bitfld.long 0x0 4. "ENCC,Capture Channel Enable" "0,1"
bitfld.long 0x0 2.--3. "CINSEL,Count Input Select" "0: Channel 0 CAPn[0] for CTIMERn,1: Channel 1 CAPn[1] for CTIMERn,2: Channel 2 CAPn[2] for CTIMERn,3: Channel 3 CAPn[3] for CTIMERn"
newline
bitfld.long 0x0 0.--1. "CTMODE,Counter Timer Mode" "0: Timer mode,1: Counter mode rising edge,2: Counter mode falling edge,3: Counter mode dual edge"
line.long 0x4 "PWMC,PWM Control"
bitfld.long 0x4 3. "PWMEN3,PWM Mode Enable for Channel 3" "0: Disable,1: Enable"
bitfld.long 0x4 2. "PWMEN2,PWM Mode Enable for Channel 2" "0: Disable,1: Enable"
bitfld.long 0x4 1. "PWMEN1,PWM Mode Enable for Channel 1" "0: Disable,1: Enable"
newline
bitfld.long 0x4 0. "PWMEN0,PWM Mode Enable for Channel 0" "0: Disable,1: Enable"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x78)++0x3
line.long 0x0 "MSR[$1],Match Shadow"
hexmask.long 0x0 0.--31. 1. "MATCH_SHADOW,Timer Counter Match Shadow Value"
repeat.end
tree.end
tree "CTIMER4"
base ad:0x40008000
group.long 0x0++0x17
line.long 0x0 "IR,Interrupt"
bitfld.long 0x0 7. "CR3INT,Interrupt Flag for Capture Channel 3 Event" "0,1"
bitfld.long 0x0 6. "CR2INT,Interrupt Flag for Capture Channel 2 Event" "0,1"
bitfld.long 0x0 5. "CR1INT,Interrupt Flag for Capture Channel 1 Event" "0,1"
newline
bitfld.long 0x0 4. "CR0INT,Interrupt Flag for Capture Channel 0 Event" "0,1"
bitfld.long 0x0 3. "MR3INT,Interrupt Flag for Match Channel 3 Event" "0,1"
bitfld.long 0x0 2. "MR2INT,Interrupt Flag for Match Channel 2 Event" "0,1"
newline
bitfld.long 0x0 1. "MR1INT,Interrupt Flag for Match Channel 1 Event" "0,1"
bitfld.long 0x0 0. "MR0INT,Interrupt Flag for Match Channel 0 Event" "0,1"
line.long 0x4 "TCR,Timer Control"
bitfld.long 0x4 5. "ATCEN,Allow Trigger Count Enable" "0: Disable,1: Enable"
bitfld.long 0x4 4. "AGCEN,Allow Global Count Enable" "0: Disable,1: Enable"
bitfld.long 0x4 1. "CRST,Counter Reset Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x4 0. "CEN,Counter Enable" "0: Disable,1: Enable"
line.long 0x8 "TC,Timer Counter"
hexmask.long 0x8 0.--31. 1. "TCVAL,Timer Counter Value"
line.long 0xC "PR,Prescale"
hexmask.long 0xC 0.--31. 1. "PRVAL,Prescale Reload Value"
line.long 0x10 "PC,Prescale Counter"
hexmask.long 0x10 0.--31. 1. "PCVAL,Prescale Counter Value"
line.long 0x14 "MCR,Match Control"
bitfld.long 0x14 27. "MR3RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 26. "MR2RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 25. "MR1RL,Reload MR" "0: Does not reload,1: Reloads"
newline
bitfld.long 0x14 24. "MR0RL,Reload MR" "0: Does not reload,1: Reloads"
bitfld.long 0x14 11. "MR3S,Stop on MR3" "0: Does not stop,1: Stops"
bitfld.long 0x14 10. "MR3R,Reset on MR3" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 9. "MR3I,Interrupt on MR3" "0: Does not generate,1: Generates"
bitfld.long 0x14 8. "MR2S,Stop on MR2" "0: Does not stop,1: Stops"
bitfld.long 0x14 7. "MR2R,Reset on MR2" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 6. "MR2I,Interrupt on MR2" "0: Does not generate,1: Generates"
bitfld.long 0x14 5. "MR1S,Stop on MR1" "0: Does not stop,1: Stops"
bitfld.long 0x14 4. "MR1R,Reset on MR1" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 3. "MR1I,Interrupt on MR1" "0: Does not generate,1: Generates"
bitfld.long 0x14 2. "MR0S,Stop on MR0" "0: Does not stop,1: Stops"
bitfld.long 0x14 1. "MR0R,Reset on MR0" "0: Does not reset,1: Resets"
newline
bitfld.long 0x14 0. "MR0I,Interrupt on MR0" "0: Does not generate,1: Generates"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x18)++0x3
line.long 0x0 "MR[$1],Match"
hexmask.long 0x0 0.--31. 1. "MATCH,Timer Counter Match Value"
repeat.end
group.long 0x28++0x3
line.long 0x0 "CCR,Capture Control"
bitfld.long 0x0 11. "CAP3I,Generate Interrupt on Channel 3 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 10. "CAP3FE,Falling Edge of Capture Channel 3" "0: Does not load,1: Loads"
bitfld.long 0x0 9. "CAP3RE,Rising Edge of Capture Channel 3" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 8. "CAP2I,Generate Interrupt on Channel 2 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 7. "CAP2FE,Falling Edge of Capture Channel 2" "0: Does not load,1: Loads"
bitfld.long 0x0 6. "CAP2RE,Rising Edge of Capture Channel 2" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 5. "CAP1I,Generate Interrupt on Channel 1 Capture Event" "0: Does not generates,1: Generates"
bitfld.long 0x0 4. "CAP1FE,Falling Edge of Capture Channel 1" "0: Does not load,1: Loads"
bitfld.long 0x0 3. "CAP1RE,Rising Edge of Capture Channel 1" "0: Does not load,1: Loads"
newline
bitfld.long 0x0 2. "CAP0I,Generate Interrupt on Channel 0 Capture Event" "0: Does not generate,1: Generates"
bitfld.long 0x0 1. "CAP0FE,Falling Edge of Capture Channel 0" "0: Does not load,1: Loads"
bitfld.long 0x0 0. "CAP0RE,Rising Edge of Capture Channel 0" "0: Does not load,1: Loads"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
rgroup.long ($2+0x2C)++0x3
line.long 0x0 "CR[$1],Capture"
hexmask.long 0x0 0.--31. 1. "CAP,Timer Counter Capture Value"
repeat.end
group.long 0x3C++0x3
line.long 0x0 "EMR,External Match"
bitfld.long 0x0 10.--11. "EMC3,External Match Control 3" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 8.--9. "EMC2,External Match Control 2" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 6.--7. "EMC1,External Match Control 1" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
newline
bitfld.long 0x0 4.--5. "EMC0,External Match Control 0" "0: Does nothing,1: Goes low,2: Goes high,3: Toggles"
bitfld.long 0x0 3. "EM3,External Match 3" "0: Low,1: High"
bitfld.long 0x0 2. "EM2,External Match 2" "0: Low,1: High"
newline
bitfld.long 0x0 1. "EM1,External Match 1" "0: Low,1: High"
bitfld.long 0x0 0. "EM0,External Match 0" "0: Low,1: High"
group.long 0x70++0x7
line.long 0x0 "CTCR,Count Control"
bitfld.long 0x0 5.--7. "SELCC,Edge Select" "0: Capture channel 0 rising edge,1: Capture channel 0 falling edge,2: Capture channel 1 rising edge,3: Capture channel 1 falling edge,4: Capture channel 2 rising edge,5: Capture channel 2 falling edge,?,?"
bitfld.long 0x0 4. "ENCC,Capture Channel Enable" "0,1"
bitfld.long 0x0 2.--3. "CINSEL,Count Input Select" "0: Channel 0 CAPn[0] for CTIMERn,1: Channel 1 CAPn[1] for CTIMERn,2: Channel 2 CAPn[2] for CTIMERn,3: Channel 3 CAPn[3] for CTIMERn"
newline
bitfld.long 0x0 0.--1. "CTMODE,Counter Timer Mode" "0: Timer mode,1: Counter mode rising edge,2: Counter mode falling edge,3: Counter mode dual edge"
line.long 0x4 "PWMC,PWM Control"
bitfld.long 0x4 3. "PWMEN3,PWM Mode Enable for Channel 3" "0: Disable,1: Enable"
bitfld.long 0x4 2. "PWMEN2,PWM Mode Enable for Channel 2" "0: Disable,1: Enable"
bitfld.long 0x4 1. "PWMEN1,PWM Mode Enable for Channel 1" "0: Disable,1: Enable"
newline
bitfld.long 0x4 0. "PWMEN0,PWM Mode Enable for Channel 0" "0: Disable,1: Enable"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x78)++0x3
line.long 0x0 "MSR[$1],Match Shadow"
hexmask.long 0x0 0.--31. 1. "MATCH_SHADOW,Timer Counter Match Shadow Value"
repeat.end
tree.end
endif
tree.end
sif (cpuis("MC?A154*")||cpuis("MC?A155*")||cpuis("MC?A156*"))
tree "DAC (12-bit Digital-to-Analog Converter)"
base ad:0x400B4000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version Identifier"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Identification Number"
line.long 0x4 "PARAM,Parameter"
bitfld.long 0x4 0.--2. "FIFOSZ,FIFO Size" "?,1: FIFO depth is 4,2: FIFO depth is 8,3: FIFO depth is 16,4: FIFO depth is 32,5: FIFO depth is 64,6: FIFO depth is 128,7: FIFO depth is 256"
group.long 0x8++0xB
line.long 0x0 "DATA,Data"
hexmask.long.word 0x0 0.--11. 1. "DATA,FIFO Entry or Buffer Entry"
line.long 0x4 "GCR,Global Control"
bitfld.long 0x4 23. "BUF_SPD_CTRL,OPAMP as Buffer Speed Control Signal" "0: Lower Low-Power mode,1: Low-Power mode"
bitfld.long 0x4 21. "IREF_ZTC_EXT_SEL,External On-Chip ZTC Current Reference Select" "0: Not selected,1: Selected"
newline
bitfld.long 0x4 20. "IREF_PTAT_EXT_SEL,External On-Chip PTAT Current Reference Select" "0: Not selected,1: Selected"
bitfld.long 0x4 17. "BUF_EN,Buffer Enable" "0: Not used,1: Used"
newline
hexmask.long.byte 0x4 8.--11. 1. "LATCH_CYC,RCLK Cycles Before Data Latch"
bitfld.long 0x4 6. "PTGEN,DAC Periodic Trigger Mode Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 5. "TRGSEL,DAC Trigger Select" "0: Hardware trigger,1: Software trigger"
bitfld.long 0x4 4. "SWMD,Swing Back Mode" "0: Disables,1: Enables"
newline
bitfld.long 0x4 3. "FIFOEN,FIFO Enable" "0: Enables FIFO mode and disables Buffer mode. Any..,1: Enables FIFO mode. Data will be first read from.."
bitfld.long 0x4 1.--2. "DACRFS,DAC Reference Select" "0: Selects VREFH0 as the reference voltage.,1: Selects VREFH1 as the reference voltage.,2: Selects VREFH2 as the reference voltage.,?"
newline
bitfld.long 0x4 0. "DACEN,DAC Enable" "0: Disables,1: Enables"
line.long 0x8 "FCR,DAC FIFO Control"
hexmask.long.byte 0x8 0.--3. 1. "WML,Watermark Level"
rgroup.long 0x14++0x3
line.long 0x0 "FPR,DAC FIFO Pointer"
hexmask.long.byte 0x0 16.--19. 1. "FIFO_WPT,FIFO Write Pointer"
hexmask.long.byte 0x0 0.--3. 1. "FIFO_RPT,FIFO Read Pointer"
group.long 0x18++0x17
line.long 0x0 "FSR,FIFO Status"
eventfld.long 0x0 8. "PTGCOCO,Period Trigger Mode Conversion Complete Flag" "0: Not completed or not started,1: Completed"
eventfld.long 0x0 7. "UF,FIFO Underflow Flag" "0: No underflow has occurred since the last time..,1: At least one trigger underflow has occurred.."
newline
eventfld.long 0x0 6. "OF,FIFO Overflow Flag" "0: No overflow has occurred since the last time the..,1: At least one FIFO overflow has occurred since.."
eventfld.long 0x0 3. "SWBK,Swing Back One Cycle Complete Flag" "0: No swing back cycle has completed since the last..,1: At least one swing back cycle has occurred since.."
newline
rbitfld.long 0x0 2. "WM,FIFO Watermark Status Flag" "0: Data in FIFO is more than watermark level,1: Data in FIFO is less than or equal to watermark.."
rbitfld.long 0x0 1. "EMPTY,FIFO Empty Flag" "0: Not empty,1: Empty"
newline
rbitfld.long 0x0 0. "FULL,FIFO Full Flag" "0: Not full,1: Full"
line.long 0x4 "IER,Interrupt Enable"
bitfld.long 0x4 8. "PTGCOCO_IE,PTG Mode Conversion Complete Interrupt Enable" "0: Disables,1: Enables"
bitfld.long 0x4 7. "UF_IE,FIFO Underflow Interrupt Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 6. "OF_IE,FIFO Overflow Interrupt Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SWBK_IE,Swing Back One Cycle Complete Interrupt Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 2. "WM_IE,FIFO Watermark Interrupt Enable" "0: Disables,1: Enables"
bitfld.long 0x4 1. "EMPTY_IE,FIFO Empty Interrupt Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 0. "FULL_IE,FIFO Full Interrupt Enable" "0: Disables,1: Enables"
line.long 0x8 "DER,DMA Enable"
bitfld.long 0x8 2. "WM_DMAEN,FIFO Watermark DMA Enable" "0: Disables,1: Enables"
bitfld.long 0x8 1. "EMPTY_DMAEN,FIFO Empty DMA Enable" "0: Disables,1: Enables"
line.long 0xC "RCR,Reset Control"
bitfld.long 0xC 1. "FIFORST,FIFO Reset" "0: No effect,1: FIFO reset"
bitfld.long 0xC 0. "SWRST,Software Reset" "0: No effect,1: Software reset"
line.long 0x10 "TCR,Trigger Control"
bitfld.long 0x10 0. "SWTRG,Software Trigger" "0: Not valid,1: Valid"
line.long 0x14 "PCR,Periodic Trigger Control"
hexmask.long.word 0x14 16.--31. 1. "PTG_PERIOD,Periodic Trigger Period Width"
hexmask.long.word 0x14 0.--15. 1. "PTG_NUM,Periodic Trigger Number"
tree.end
endif
tree "DEBUGMAILBOX"
base ad:0x40101000
group.long 0x0++0xB
line.long 0x0 "CSW,Command and Status Word"
bitfld.long 0x0 5. "CHIP_RESET_REQ,Chip Reset Request" "0,1"
bitfld.long 0x0 4. "SOFT_RESET,Soft Reset" "0,1"
newline
bitfld.long 0x0 3. "AHB_OR_ERR,AHB Overrun Error" "0: No AHB Overrun Error,1: AHB Overrun Error. An AHB overrun occurred."
bitfld.long 0x0 2. "DBG_OR_ERR,DBGMB Overrun Error" "0: No DBGMB Overrun error,1: DBGMB overrun error. A DBGMB overrun occurred."
newline
bitfld.long 0x0 1. "REQ_PENDING,Request Pending" "0: No request pending,1: Request for resynchronization pending"
bitfld.long 0x0 0. "RESYNCH_REQ,Resynchronization Request" "0: No request,1: Request for resynchronization"
line.long 0x4 "REQUEST,Request Value"
hexmask.long 0x4 0.--31. 1. "REQUEST,Request Value"
line.long 0x8 "RETURN,Return Value"
hexmask.long 0x8 0.--31. 1. "RET,Return Value"
rgroup.long 0xFC++0x3
line.long 0x0 "ID,Identification"
hexmask.long 0x0 0.--31. 1. "ID,Identification Value"
tree.end
tree "EDMA_MP"
base ad:0x40080000
group.long 0x0++0x3
line.long 0x0 "MP_CSR,Management Page Control"
rbitfld.long 0x0 31. "ACTIVE,DMA Active Status" "0: eDMA is idle,1: eDMA is executing a channel"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
rbitfld.long 0x0 24.--25. "ACTIVE_ID,Active Channel ID" "0,1,2,3"
newline
endif
sif (cpuis("MC?A144*"))
rbitfld.long 0x0 24.--26. "ACTIVE_ID,Active Channel ID" "0,1,2,3,4,5,6,7"
newline
endif
sif (cpuis("MC?A145*"))
rbitfld.long 0x0 24.--26. "ACTIVE_ID,Active Channel ID" "0,1,2,3,4,5,6,7"
newline
endif
sif (cpuis("MC?A146*"))
rbitfld.long 0x0 24.--26. "ACTIVE_ID,Active Channel ID" "0,1,2,3,4,5,6,7"
newline
endif
sif (cpuis("MC?A152*"))
rbitfld.long 0x0 24.--25. "ACTIVE_ID,Active Channel ID" "0,1,2,3"
newline
endif
sif (cpuis("MC?A153*"))
rbitfld.long 0x0 24.--25. "ACTIVE_ID,Active Channel ID" "0,1,2,3"
newline
endif
sif (cpuis("MC?A154*"))
rbitfld.long 0x0 24.--26. "ACTIVE_ID,Active Channel ID" "0,1,2,3,4,5,6,7"
newline
endif
sif (cpuis("MC?A155*"))
rbitfld.long 0x0 24.--26. "ACTIVE_ID,Active Channel ID" "0,1,2,3,4,5,6,7"
newline
endif
sif (cpuis("MC?A156*"))
rbitfld.long 0x0 24.--26. "ACTIVE_ID,Active Channel ID" "0,1,2,3,4,5,6,7"
newline
endif
bitfld.long 0x0 9. "CX,Cancel Transfer" "0: Normal operation,1: Cancel the remaining data transfer"
bitfld.long 0x0 8. "ECX,Cancel Transfer With Error" "0: Normal operation,1: Cancel the remaining data transfer"
newline
bitfld.long 0x0 7. "GMRC,Global Master ID Replication Control" "0: Master ID replication disabled for all channels,1: Master ID replication available and controlled.."
bitfld.long 0x0 6. "GCLC,Global Channel Linking Control" "0: Channel linking disabled for all channels,1: Channel linking available and controlled by each.."
newline
bitfld.long 0x0 5. "HALT,Halt DMA Operations" "0: Normal operation,1: Stall the start of any new channels"
bitfld.long 0x0 4. "HAE,Halt After Error" "0: Normal operation,1: Any error causes the HALT field to be set to 1"
newline
bitfld.long 0x0 2. "ERCA,Enable Round Robin Channel Arbitration" "0: Round-robin channel arbitration disabled,1: Round-robin channel arbitration enabled"
bitfld.long 0x0 1. "EDBG,Enable Debug" "0: Debug mode disabled,1: Debug mode is enabled."
rgroup.long 0x4++0xB
line.long 0x0 "MP_ES,Management Page Error Status"
bitfld.long 0x0 31. "VLD,Valid" "0: No CHn_ES[ERR] fields are set to 1,1: At least one CHn_ES[ERR] field is set to 1.."
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
bitfld.long 0x0 24.--25. "ERRCHN,Error Channel Number or Canceled Channel Number" "0,1,2,3"
newline
endif
sif (cpuis("MC?A144*"))
bitfld.long 0x0 24.--26. "ERRCHN,Error Channel Number or Canceled Channel Number" "0,1,2,3,4,5,6,7"
newline
endif
sif (cpuis("MC?A145*"))
bitfld.long 0x0 24.--26. "ERRCHN,Error Channel Number or Canceled Channel Number" "0,1,2,3,4,5,6,7"
newline
endif
sif (cpuis("MC?A146*"))
bitfld.long 0x0 24.--26. "ERRCHN,Error Channel Number or Canceled Channel Number" "0,1,2,3,4,5,6,7"
newline
endif
sif (cpuis("MC?A152*"))
bitfld.long 0x0 24.--25. "ERRCHN,Error Channel Number or Canceled Channel Number" "0,1,2,3"
newline
endif
sif (cpuis("MC?A153*"))
bitfld.long 0x0 24.--25. "ERRCHN,Error Channel Number or Canceled Channel Number" "0,1,2,3"
newline
endif
sif (cpuis("MC?A154*"))
bitfld.long 0x0 24.--26. "ERRCHN,Error Channel Number or Canceled Channel Number" "0,1,2,3,4,5,6,7"
newline
endif
sif (cpuis("MC?A155*"))
bitfld.long 0x0 24.--26. "ERRCHN,Error Channel Number or Canceled Channel Number" "0,1,2,3,4,5,6,7"
newline
endif
sif (cpuis("MC?A156*"))
bitfld.long 0x0 24.--26. "ERRCHN,Error Channel Number or Canceled Channel Number" "0,1,2,3,4,5,6,7"
newline
endif
bitfld.long 0x0 8. "ECX,Transfer Canceled" "0: No canceled transfers,1: Last recorded entry was a canceled transfer by.."
bitfld.long 0x0 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.."
newline
bitfld.long 0x0 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.."
bitfld.long 0x0 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.."
newline
bitfld.long 0x0 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.."
bitfld.long 0x0 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: The last recorded error was NBYTES equal to zero.."
newline
bitfld.long 0x0 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.."
bitfld.long 0x0 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was a bus error on a source.."
newline
bitfld.long 0x0 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was a bus error on a.."
line.long 0x4 "MP_INT,Management Page Interrupt Request Status"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x4 0.--3. 1. "INT,Interrupt Request Status"
newline
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x4 0.--7. 1. "INT,Interrupt Request Status"
newline
endif
sif (cpuis("MC?A145*"))
hexmask.long.byte 0x4 0.--7. 1. "INT,Interrupt Request Status"
newline
endif
sif (cpuis("MC?A146*"))
hexmask.long.byte 0x4 0.--7. 1. "INT,Interrupt Request Status"
newline
endif
sif (cpuis("MC?A152*"))
hexmask.long.byte 0x4 0.--3. 1. "INT,Interrupt Request Status"
newline
endif
sif (cpuis("MC?A153*"))
hexmask.long.byte 0x4 0.--3. 1. "INT,Interrupt Request Status"
newline
endif
sif (cpuis("MC?A154*"))
hexmask.long.byte 0x4 0.--7. 1. "INT,Interrupt Request Status"
newline
endif
sif (cpuis("MC?A155*"))
hexmask.long.byte 0x4 0.--7. 1. "INT,Interrupt Request Status"
newline
endif
sif (cpuis("MC?A156*"))
hexmask.long.byte 0x4 0.--7. 1. "INT,Interrupt Request Status"
newline
endif
line.long 0x8 "MP_HRS,Management Page Hardware Request Status"
hexmask.long 0x8 0.--31. 1. "HRS,Hardware Request Status"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x100)++0x3
line.long 0x0 "CH_GRPRI[$1],Channel Arbitration Group"
hexmask.long.byte 0x0 0.--4. 1. "GRPRI,Arbitration Group For Channel n"
repeat.end
endif
sif (cpuis("MC?A144*"))
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x100)++0x3
line.long 0x0 "CH_GRPRI[$1],Channel Arbitration Group"
hexmask.long.byte 0x0 0.--4. 1. "GRPRI,Arbitration Group For Channel n"
repeat.end
endif
sif (cpuis("MC?A145*"))
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x100)++0x3
line.long 0x0 "CH_GRPRI[$1],Channel Arbitration Group"
hexmask.long.byte 0x0 0.--4. 1. "GRPRI,Arbitration Group For Channel n"
repeat.end
endif
sif (cpuis("MC?A146*"))
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x100)++0x3
line.long 0x0 "CH_GRPRI[$1],Channel Arbitration Group"
hexmask.long.byte 0x0 0.--4. 1. "GRPRI,Arbitration Group For Channel n"
repeat.end
endif
sif (cpuis("MC?A152*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x100)++0x3
line.long 0x0 "CH_GRPRI[$1],Channel Arbitration Group"
hexmask.long.byte 0x0 0.--4. 1. "GRPRI,Arbitration Group For Channel n"
repeat.end
endif
sif (cpuis("MC?A153*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x100)++0x3
line.long 0x0 "CH_GRPRI[$1],Channel Arbitration Group"
hexmask.long.byte 0x0 0.--4. 1. "GRPRI,Arbitration Group For Channel n"
repeat.end
endif
sif (cpuis("MC?A154*"))
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x100)++0x3
line.long 0x0 "CH_GRPRI[$1],Channel Arbitration Group"
hexmask.long.byte 0x0 0.--4. 1. "GRPRI,Arbitration Group For Channel n"
repeat.end
endif
sif (cpuis("MC?A155*"))
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x100)++0x3
line.long 0x0 "CH_GRPRI[$1],Channel Arbitration Group"
hexmask.long.byte 0x0 0.--4. 1. "GRPRI,Arbitration Group For Channel n"
repeat.end
endif
sif (cpuis("MC?A156*"))
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x100)++0x3
line.long 0x0 "CH_GRPRI[$1],Channel Arbitration Group"
hexmask.long.byte 0x0 0.--4. 1. "GRPRI,Arbitration Group For Channel n"
repeat.end
endif
tree.end
tree "EDMA_TCD"
base ad:0x40081000
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
repeat 4. (list 0x0 0x1 0x2 0x3)(list ad:0x40081000 ad:0x40082000 ad:0x40083000 ad:0x40084000)
tree "TCD[$1]"
base $2
group.long ($2)++0x17
line.long 0x0 "CH_CSR,Channel Control and Status"
rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1"
eventfld.long 0x0 30. "DONE,Channel Done" "0,1"
newline
bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled"
bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.."
newline
bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel"
bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.."
line.long 0x4 "CH_ES,Channel Error Status"
eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.."
newline
rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.."
rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.."
newline
rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.."
rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.."
newline
rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.."
rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read"
newline
rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.."
line.long 0x8 "CH_INT,Channel Interrupt Status"
eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active"
line.long 0xC "CH_SBR,Channel System Bus"
bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled"
rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers"
newline
hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID"
line.long 0x10 "CH_PRI,Channel Priority"
bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.."
bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.."
newline
bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7"
line.long 0x14 "CH_MUX,Channel Multiplexor Configuration"
hexmask.long.byte 0x14 0.--6. 1. "SRC,Service Request Source"
group.long ($2+0x20)++0x3
line.long 0x0 "TCD_SADDR,TCD Source Address"
hexmask.long 0x0 0.--31. 1. "SADDR,Source Address"
group.word ($2+0x24)++0x3
line.word 0x0 "TCD_SOFF,TCD Signed Source Address Offset"
hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset"
line.word 0x2 "TCD_ATTR,TCD Transfer Attributes"
hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo"
bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,?,?"
newline
hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo"
bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7"
group.long ($2+0x28)++0x3
line.long 0x0 "TCD_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets"
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
newline
hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
group.long ($2+0x28)++0xB
line.long 0x0 "TCD_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets"
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
newline
hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset"
hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
line.long 0x4 "TCD_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address"
hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address"
line.long 0x8 "TCD_DADDR,TCD Destination Address"
hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address"
group.word ($2+0x34)++0x3
line.word 0x0 "TCD_DOFF,TCD Signed Destination Address Offset"
hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset"
line.word 0x2 "TCD_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)"
bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count"
group.word ($2+0x36)++0x1
line.word 0x0 "TCD_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)"
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
bitfld.word 0x0 9.--10. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3"
newline
hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count"
group.long ($2+0x38)++0x3
line.long 0x0 "TCD_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address"
hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address"
group.word ($2+0x3C)++0x3
line.word 0x0 "TCD_CSR,TCD Control and Status"
bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
bitfld.word 0x0 8.--9. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3"
newline
bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.."
bitfld.word 0x0 6. "EEOP,Enable End-Of-Packet Processing" "0: End-of-packet operation disabled,1: End-of-packet hardware input signal enabled"
newline
bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.."
newline
bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.."
bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled"
newline
bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled"
bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.."
line.word 0x2 "TCD_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)"
bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count"
group.word ($2+0x3E)++0x1
line.word 0x0 "TCD_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)"
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
bitfld.word 0x0 9.--10. "LINKCH,Link Channel Number" "0,1,2,3"
newline
hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count"
tree.end
repeat.end
base ad:0x40081000
endif
sif (cpuis("MC?A144*"))
repeat 8. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7)(list ad:0x40081000 ad:0x40082000 ad:0x40083000 ad:0x40084000 ad:0x40085000 ad:0x40086000 ad:0x40087000 ad:0x40088000)
tree "TCD[$1]"
base $2
group.long ($2)++0x17
line.long 0x0 "CH_CSR,Channel Control and Status"
rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1"
eventfld.long 0x0 30. "DONE,Channel Done" "0,1"
newline
bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled"
bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.."
newline
bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel"
bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.."
line.long 0x4 "CH_ES,Channel Error Status"
eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.."
newline
rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.."
rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.."
newline
rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.."
rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.."
newline
rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.."
rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read"
newline
rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.."
line.long 0x8 "CH_INT,Channel Interrupt Status"
eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active"
line.long 0xC "CH_SBR,Channel System Bus"
bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled"
rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers"
newline
hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID"
line.long 0x10 "CH_PRI,Channel Priority"
bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.."
bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.."
newline
bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7"
line.long 0x14 "CH_MUX,Channel Multiplexor Configuration"
hexmask.long.byte 0x14 0.--6. 1. "SRC,Service Request Source"
group.long ($2+0x20)++0x3
line.long 0x0 "TCD_SADDR,TCD Source Address"
hexmask.long 0x0 0.--31. 1. "SADDR,Source Address"
group.word ($2+0x24)++0x3
line.word 0x0 "TCD_SOFF,TCD Signed Source Address Offset"
hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset"
line.word 0x2 "TCD_ATTR,TCD Transfer Attributes"
hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo"
bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,?,?"
newline
hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo"
bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7"
group.long ($2+0x28)++0x3
line.long 0x0 "TCD_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets"
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
newline
hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
group.long ($2+0x28)++0xB
line.long 0x0 "TCD_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets"
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
newline
hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset"
hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
line.long 0x4 "TCD_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address"
hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address"
line.long 0x8 "TCD_DADDR,TCD Destination Address"
hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address"
group.word ($2+0x34)++0x3
line.word 0x0 "TCD_DOFF,TCD Signed Destination Address Offset"
hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset"
line.word 0x2 "TCD_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)"
bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count"
group.word ($2+0x36)++0x1
line.word 0x0 "TCD_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)"
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
bitfld.word 0x0 9.--11. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3,4,5,6,7"
newline
hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count"
group.long ($2+0x38)++0x3
line.long 0x0 "TCD_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address"
hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address"
group.word ($2+0x3C)++0x3
line.word 0x0 "TCD_CSR,TCD Control and Status"
bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
bitfld.word 0x0 8.--10. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.."
bitfld.word 0x0 6. "EEOP,Enable End-Of-Packet Processing" "0: End-of-packet operation disabled,1: End-of-packet hardware input signal enabled"
newline
bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.."
newline
bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.."
bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled"
newline
bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled"
bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.."
line.word 0x2 "TCD_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)"
bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count"
group.word ($2+0x3E)++0x1
line.word 0x0 "TCD_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)"
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
bitfld.word 0x0 9.--11. "LINKCH,Link Channel Number" "0,1,2,3,4,5,6,7"
newline
hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count"
tree.end
repeat.end
base ad:0x40081000
endif
sif (cpuis("MC?A145*"))
repeat 8. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7)(list ad:0x40081000 ad:0x40082000 ad:0x40083000 ad:0x40084000 ad:0x40085000 ad:0x40086000 ad:0x40087000 ad:0x40088000)
tree "TCD[$1]"
base $2
group.long ($2)++0x17
line.long 0x0 "CH_CSR,Channel Control and Status"
rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1"
eventfld.long 0x0 30. "DONE,Channel Done" "0,1"
newline
bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled"
bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.."
newline
bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel"
bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.."
line.long 0x4 "CH_ES,Channel Error Status"
eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.."
newline
rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.."
rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.."
newline
rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.."
rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.."
newline
rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.."
rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read"
newline
rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.."
line.long 0x8 "CH_INT,Channel Interrupt Status"
eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active"
line.long 0xC "CH_SBR,Channel System Bus"
bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled"
rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers"
newline
hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID"
line.long 0x10 "CH_PRI,Channel Priority"
bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.."
bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.."
newline
bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7"
line.long 0x14 "CH_MUX,Channel Multiplexor Configuration"
hexmask.long.byte 0x14 0.--6. 1. "SRC,Service Request Source"
group.long ($2+0x20)++0x3
line.long 0x0 "TCD_SADDR,TCD Source Address"
hexmask.long 0x0 0.--31. 1. "SADDR,Source Address"
group.word ($2+0x24)++0x3
line.word 0x0 "TCD_SOFF,TCD Signed Source Address Offset"
hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset"
line.word 0x2 "TCD_ATTR,TCD Transfer Attributes"
hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo"
bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,?,?"
newline
hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo"
bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7"
group.long ($2+0x28)++0x3
line.long 0x0 "TCD_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets"
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
newline
hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
group.long ($2+0x28)++0xB
line.long 0x0 "TCD_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets"
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
newline
hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset"
hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
line.long 0x4 "TCD_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address"
hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address"
line.long 0x8 "TCD_DADDR,TCD Destination Address"
hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address"
group.word ($2+0x34)++0x3
line.word 0x0 "TCD_DOFF,TCD Signed Destination Address Offset"
hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset"
line.word 0x2 "TCD_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)"
bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count"
group.word ($2+0x36)++0x1
line.word 0x0 "TCD_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)"
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
bitfld.word 0x0 9.--11. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3,4,5,6,7"
newline
hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count"
group.long ($2+0x38)++0x3
line.long 0x0 "TCD_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address"
hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address"
group.word ($2+0x3C)++0x3
line.word 0x0 "TCD_CSR,TCD Control and Status"
bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
bitfld.word 0x0 8.--10. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.."
bitfld.word 0x0 6. "EEOP,Enable End-Of-Packet Processing" "0: End-of-packet operation disabled,1: End-of-packet hardware input signal enabled"
newline
bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.."
newline
bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.."
bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled"
newline
bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled"
bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.."
line.word 0x2 "TCD_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)"
bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count"
group.word ($2+0x3E)++0x1
line.word 0x0 "TCD_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)"
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
bitfld.word 0x0 9.--11. "LINKCH,Link Channel Number" "0,1,2,3,4,5,6,7"
newline
hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count"
tree.end
repeat.end
base ad:0x40081000
endif
sif (cpuis("MC?A146*"))
repeat 8. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7)(list ad:0x40081000 ad:0x40082000 ad:0x40083000 ad:0x40084000 ad:0x40085000 ad:0x40086000 ad:0x40087000 ad:0x40088000)
tree "TCD[$1]"
base $2
group.long ($2)++0x17
line.long 0x0 "CH_CSR,Channel Control and Status"
rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1"
eventfld.long 0x0 30. "DONE,Channel Done" "0,1"
newline
bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled"
bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.."
newline
bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel"
bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.."
line.long 0x4 "CH_ES,Channel Error Status"
eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.."
newline
rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.."
rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.."
newline
rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.."
rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.."
newline
rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.."
rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read"
newline
rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.."
line.long 0x8 "CH_INT,Channel Interrupt Status"
eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active"
line.long 0xC "CH_SBR,Channel System Bus"
bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled"
rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers"
newline
hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID"
line.long 0x10 "CH_PRI,Channel Priority"
bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.."
bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.."
newline
bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7"
line.long 0x14 "CH_MUX,Channel Multiplexor Configuration"
hexmask.long.byte 0x14 0.--6. 1. "SRC,Service Request Source"
group.long ($2+0x20)++0x3
line.long 0x0 "TCD_SADDR,TCD Source Address"
hexmask.long 0x0 0.--31. 1. "SADDR,Source Address"
group.word ($2+0x24)++0x3
line.word 0x0 "TCD_SOFF,TCD Signed Source Address Offset"
hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset"
line.word 0x2 "TCD_ATTR,TCD Transfer Attributes"
hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo"
bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,?,?"
newline
hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo"
bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7"
group.long ($2+0x28)++0x3
line.long 0x0 "TCD_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets"
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
newline
hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
group.long ($2+0x28)++0xB
line.long 0x0 "TCD_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets"
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
newline
hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset"
hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
line.long 0x4 "TCD_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address"
hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address"
line.long 0x8 "TCD_DADDR,TCD Destination Address"
hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address"
group.word ($2+0x34)++0x3
line.word 0x0 "TCD_DOFF,TCD Signed Destination Address Offset"
hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset"
line.word 0x2 "TCD_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)"
bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count"
group.word ($2+0x36)++0x1
line.word 0x0 "TCD_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)"
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
bitfld.word 0x0 9.--11. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3,4,5,6,7"
newline
hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count"
group.long ($2+0x38)++0x3
line.long 0x0 "TCD_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address"
hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address"
group.word ($2+0x3C)++0x3
line.word 0x0 "TCD_CSR,TCD Control and Status"
bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
bitfld.word 0x0 8.--10. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.."
bitfld.word 0x0 6. "EEOP,Enable End-Of-Packet Processing" "0: End-of-packet operation disabled,1: End-of-packet hardware input signal enabled"
newline
bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.."
newline
bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.."
bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled"
newline
bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled"
bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.."
line.word 0x2 "TCD_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)"
bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count"
group.word ($2+0x3E)++0x1
line.word 0x0 "TCD_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)"
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
bitfld.word 0x0 9.--11. "LINKCH,Link Channel Number" "0,1,2,3,4,5,6,7"
newline
hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count"
tree.end
repeat.end
base ad:0x40081000
endif
sif (cpuis("MC?A152*"))
repeat 4. (list 0x0 0x1 0x2 0x3)(list ad:0x40081000 ad:0x40082000 ad:0x40083000 ad:0x40084000)
tree "TCD[$1]"
base $2
group.long ($2)++0x17
line.long 0x0 "CH_CSR,Channel Control and Status"
rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1"
eventfld.long 0x0 30. "DONE,Channel Done" "0,1"
newline
bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled"
bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.."
newline
bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel"
bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.."
line.long 0x4 "CH_ES,Channel Error Status"
eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.."
newline
rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.."
rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.."
newline
rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.."
rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.."
newline
rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.."
rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read"
newline
rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.."
line.long 0x8 "CH_INT,Channel Interrupt Status"
eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active"
line.long 0xC "CH_SBR,Channel System Bus"
bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled"
rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers"
newline
hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID"
line.long 0x10 "CH_PRI,Channel Priority"
bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.."
bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.."
newline
bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7"
line.long 0x14 "CH_MUX,Channel Multiplexor Configuration"
hexmask.long.byte 0x14 0.--6. 1. "SRC,Service Request Source"
group.long ($2+0x20)++0x3
line.long 0x0 "TCD_SADDR,TCD Source Address"
hexmask.long 0x0 0.--31. 1. "SADDR,Source Address"
group.word ($2+0x24)++0x3
line.word 0x0 "TCD_SOFF,TCD Signed Source Address Offset"
hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset"
line.word 0x2 "TCD_ATTR,TCD Transfer Attributes"
hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo"
bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,?,?"
newline
hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo"
bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7"
group.long ($2+0x28)++0x3
line.long 0x0 "TCD_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets"
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
newline
hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
group.long ($2+0x28)++0xB
line.long 0x0 "TCD_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets"
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
newline
hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset"
hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
line.long 0x4 "TCD_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address"
hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address"
line.long 0x8 "TCD_DADDR,TCD Destination Address"
hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address"
group.word ($2+0x34)++0x3
line.word 0x0 "TCD_DOFF,TCD Signed Destination Address Offset"
hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset"
line.word 0x2 "TCD_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)"
bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count"
group.word ($2+0x36)++0x1
line.word 0x0 "TCD_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)"
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
bitfld.word 0x0 9.--10. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3"
newline
hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count"
group.long ($2+0x38)++0x3
line.long 0x0 "TCD_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address"
hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address"
group.word ($2+0x3C)++0x3
line.word 0x0 "TCD_CSR,TCD Control and Status"
bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
bitfld.word 0x0 8.--9. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3"
newline
bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.."
bitfld.word 0x0 6. "EEOP,Enable End-Of-Packet Processing" "0: End-of-packet operation disabled,1: End-of-packet hardware input signal enabled"
newline
bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.."
newline
bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.."
bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled"
newline
bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled"
bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.."
line.word 0x2 "TCD_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)"
bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count"
group.word ($2+0x3E)++0x1
line.word 0x0 "TCD_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)"
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
bitfld.word 0x0 9.--10. "LINKCH,Link Channel Number" "0,1,2,3"
newline
hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count"
tree.end
repeat.end
base ad:0x40081000
endif
sif (cpuis("MC?A153*"))
repeat 4. (list 0x0 0x1 0x2 0x3)(list ad:0x40081000 ad:0x40082000 ad:0x40083000 ad:0x40084000)
tree "TCD[$1]"
base $2
group.long ($2)++0x17
line.long 0x0 "CH_CSR,Channel Control and Status"
rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1"
eventfld.long 0x0 30. "DONE,Channel Done" "0,1"
newline
bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled"
bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.."
newline
bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel"
bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.."
line.long 0x4 "CH_ES,Channel Error Status"
eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.."
newline
rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.."
rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.."
newline
rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.."
rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.."
newline
rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.."
rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read"
newline
rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.."
line.long 0x8 "CH_INT,Channel Interrupt Status"
eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active"
line.long 0xC "CH_SBR,Channel System Bus"
bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled"
rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers"
newline
hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID"
line.long 0x10 "CH_PRI,Channel Priority"
bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.."
bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.."
newline
bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7"
line.long 0x14 "CH_MUX,Channel Multiplexor Configuration"
hexmask.long.byte 0x14 0.--6. 1. "SRC,Service Request Source"
group.long ($2+0x20)++0x3
line.long 0x0 "TCD_SADDR,TCD Source Address"
hexmask.long 0x0 0.--31. 1. "SADDR,Source Address"
group.word ($2+0x24)++0x3
line.word 0x0 "TCD_SOFF,TCD Signed Source Address Offset"
hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset"
line.word 0x2 "TCD_ATTR,TCD Transfer Attributes"
hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo"
bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,?,?"
newline
hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo"
bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7"
group.long ($2+0x28)++0x3
line.long 0x0 "TCD_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets"
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
newline
hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
group.long ($2+0x28)++0xB
line.long 0x0 "TCD_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets"
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
newline
hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset"
hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
line.long 0x4 "TCD_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address"
hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address"
line.long 0x8 "TCD_DADDR,TCD Destination Address"
hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address"
group.word ($2+0x34)++0x3
line.word 0x0 "TCD_DOFF,TCD Signed Destination Address Offset"
hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset"
line.word 0x2 "TCD_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)"
bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count"
group.word ($2+0x36)++0x1
line.word 0x0 "TCD_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)"
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
bitfld.word 0x0 9.--10. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3"
newline
hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count"
group.long ($2+0x38)++0x3
line.long 0x0 "TCD_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address"
hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address"
group.word ($2+0x3C)++0x3
line.word 0x0 "TCD_CSR,TCD Control and Status"
bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
bitfld.word 0x0 8.--9. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3"
newline
bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.."
bitfld.word 0x0 6. "EEOP,Enable End-Of-Packet Processing" "0: End-of-packet operation disabled,1: End-of-packet hardware input signal enabled"
newline
bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.."
newline
bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.."
bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled"
newline
bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled"
bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.."
line.word 0x2 "TCD_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)"
bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count"
group.word ($2+0x3E)++0x1
line.word 0x0 "TCD_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)"
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
bitfld.word 0x0 9.--10. "LINKCH,Link Channel Number" "0,1,2,3"
newline
hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count"
tree.end
repeat.end
base ad:0x40081000
endif
sif (cpuis("MC?A154*"))
repeat 8. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7)(list ad:0x40081000 ad:0x40082000 ad:0x40083000 ad:0x40084000 ad:0x40085000 ad:0x40086000 ad:0x40087000 ad:0x40088000)
tree "TCD[$1]"
base $2
group.long ($2)++0x17
line.long 0x0 "CH_CSR,Channel Control and Status"
rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1"
eventfld.long 0x0 30. "DONE,Channel Done" "0,1"
newline
bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled"
bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.."
newline
bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel"
bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.."
line.long 0x4 "CH_ES,Channel Error Status"
eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.."
newline
rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.."
rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.."
newline
rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.."
rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.."
newline
rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.."
rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read"
newline
rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.."
line.long 0x8 "CH_INT,Channel Interrupt Status"
eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active"
line.long 0xC "CH_SBR,Channel System Bus"
bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled"
rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers"
newline
hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID"
line.long 0x10 "CH_PRI,Channel Priority"
bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.."
bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.."
newline
bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7"
line.long 0x14 "CH_MUX,Channel Multiplexor Configuration"
hexmask.long.byte 0x14 0.--6. 1. "SRC,Service Request Source"
group.long ($2+0x20)++0x3
line.long 0x0 "TCD_SADDR,TCD Source Address"
hexmask.long 0x0 0.--31. 1. "SADDR,Source Address"
group.word ($2+0x24)++0x3
line.word 0x0 "TCD_SOFF,TCD Signed Source Address Offset"
hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset"
line.word 0x2 "TCD_ATTR,TCD Transfer Attributes"
hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo"
bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,?,?"
newline
hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo"
bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7"
group.long ($2+0x28)++0x3
line.long 0x0 "TCD_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets"
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
newline
hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
group.long ($2+0x28)++0xB
line.long 0x0 "TCD_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets"
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
newline
hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset"
hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
line.long 0x4 "TCD_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address"
hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address"
line.long 0x8 "TCD_DADDR,TCD Destination Address"
hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address"
group.word ($2+0x34)++0x3
line.word 0x0 "TCD_DOFF,TCD Signed Destination Address Offset"
hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset"
line.word 0x2 "TCD_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)"
bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count"
group.word ($2+0x36)++0x1
line.word 0x0 "TCD_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)"
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
bitfld.word 0x0 9.--11. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3,4,5,6,7"
newline
hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count"
group.long ($2+0x38)++0x3
line.long 0x0 "TCD_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address"
hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address"
group.word ($2+0x3C)++0x3
line.word 0x0 "TCD_CSR,TCD Control and Status"
bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
bitfld.word 0x0 8.--10. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.."
bitfld.word 0x0 6. "EEOP,Enable End-Of-Packet Processing" "0: End-of-packet operation disabled,1: End-of-packet hardware input signal enabled"
newline
bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.."
newline
bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.."
bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled"
newline
bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled"
bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.."
line.word 0x2 "TCD_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)"
bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count"
group.word ($2+0x3E)++0x1
line.word 0x0 "TCD_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)"
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
bitfld.word 0x0 9.--11. "LINKCH,Link Channel Number" "0,1,2,3,4,5,6,7"
newline
hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count"
tree.end
repeat.end
base ad:0x40081000
endif
sif (cpuis("MC?A155*"))
repeat 8. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7)(list ad:0x40081000 ad:0x40082000 ad:0x40083000 ad:0x40084000 ad:0x40085000 ad:0x40086000 ad:0x40087000 ad:0x40088000)
tree "TCD[$1]"
base $2
group.long ($2)++0x17
line.long 0x0 "CH_CSR,Channel Control and Status"
rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1"
eventfld.long 0x0 30. "DONE,Channel Done" "0,1"
newline
bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled"
bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.."
newline
bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel"
bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.."
line.long 0x4 "CH_ES,Channel Error Status"
eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.."
newline
rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.."
rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.."
newline
rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.."
rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.."
newline
rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.."
rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read"
newline
rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.."
line.long 0x8 "CH_INT,Channel Interrupt Status"
eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active"
line.long 0xC "CH_SBR,Channel System Bus"
bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled"
rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers"
newline
hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID"
line.long 0x10 "CH_PRI,Channel Priority"
bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.."
bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.."
newline
bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7"
line.long 0x14 "CH_MUX,Channel Multiplexor Configuration"
hexmask.long.byte 0x14 0.--6. 1. "SRC,Service Request Source"
group.long ($2+0x20)++0x3
line.long 0x0 "TCD_SADDR,TCD Source Address"
hexmask.long 0x0 0.--31. 1. "SADDR,Source Address"
group.word ($2+0x24)++0x3
line.word 0x0 "TCD_SOFF,TCD Signed Source Address Offset"
hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset"
line.word 0x2 "TCD_ATTR,TCD Transfer Attributes"
hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo"
bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,?,?"
newline
hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo"
bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7"
group.long ($2+0x28)++0x3
line.long 0x0 "TCD_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets"
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
newline
hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
group.long ($2+0x28)++0xB
line.long 0x0 "TCD_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets"
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
newline
hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset"
hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
line.long 0x4 "TCD_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address"
hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address"
line.long 0x8 "TCD_DADDR,TCD Destination Address"
hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address"
group.word ($2+0x34)++0x3
line.word 0x0 "TCD_DOFF,TCD Signed Destination Address Offset"
hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset"
line.word 0x2 "TCD_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)"
bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count"
group.word ($2+0x36)++0x1
line.word 0x0 "TCD_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)"
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
bitfld.word 0x0 9.--11. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3,4,5,6,7"
newline
hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count"
group.long ($2+0x38)++0x3
line.long 0x0 "TCD_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address"
hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address"
group.word ($2+0x3C)++0x3
line.word 0x0 "TCD_CSR,TCD Control and Status"
bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
bitfld.word 0x0 8.--10. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.."
bitfld.word 0x0 6. "EEOP,Enable End-Of-Packet Processing" "0: End-of-packet operation disabled,1: End-of-packet hardware input signal enabled"
newline
bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.."
newline
bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.."
bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled"
newline
bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled"
bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.."
line.word 0x2 "TCD_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)"
bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count"
group.word ($2+0x3E)++0x1
line.word 0x0 "TCD_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)"
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
bitfld.word 0x0 9.--11. "LINKCH,Link Channel Number" "0,1,2,3,4,5,6,7"
newline
hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count"
tree.end
repeat.end
base ad:0x40081000
endif
sif (cpuis("MC?A156*"))
repeat 8. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7)(list ad:0x40081000 ad:0x40082000 ad:0x40083000 ad:0x40084000 ad:0x40085000 ad:0x40086000 ad:0x40087000 ad:0x40088000)
tree "TCD[$1]"
base $2
group.long ($2)++0x17
line.long 0x0 "CH_CSR,Channel Control and Status"
rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1"
eventfld.long 0x0 30. "DONE,Channel Done" "0,1"
newline
bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled"
bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.."
newline
bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel"
bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.."
line.long 0x4 "CH_ES,Channel Error Status"
eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.."
newline
rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.."
rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.."
newline
rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.."
rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.."
newline
rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.."
rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read"
newline
rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.."
line.long 0x8 "CH_INT,Channel Interrupt Status"
eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active"
line.long 0xC "CH_SBR,Channel System Bus"
bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled"
rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers"
newline
hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID"
line.long 0x10 "CH_PRI,Channel Priority"
bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.."
bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.."
newline
bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7"
line.long 0x14 "CH_MUX,Channel Multiplexor Configuration"
hexmask.long.byte 0x14 0.--6. 1. "SRC,Service Request Source"
group.long ($2+0x20)++0x3
line.long 0x0 "TCD_SADDR,TCD Source Address"
hexmask.long 0x0 0.--31. 1. "SADDR,Source Address"
group.word ($2+0x24)++0x3
line.word 0x0 "TCD_SOFF,TCD Signed Source Address Offset"
hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset"
line.word 0x2 "TCD_ATTR,TCD Transfer Attributes"
hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo"
bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,?,?"
newline
hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo"
bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7"
group.long ($2+0x28)++0x3
line.long 0x0 "TCD_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets"
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
newline
hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
group.long ($2+0x28)++0xB
line.long 0x0 "TCD_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets"
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
newline
hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset"
hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
line.long 0x4 "TCD_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address"
hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address"
line.long 0x8 "TCD_DADDR,TCD Destination Address"
hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address"
group.word ($2+0x34)++0x3
line.word 0x0 "TCD_DOFF,TCD Signed Destination Address Offset"
hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset"
line.word 0x2 "TCD_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)"
bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count"
group.word ($2+0x36)++0x1
line.word 0x0 "TCD_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)"
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
bitfld.word 0x0 9.--11. "LINKCH,Minor Loop Link Channel Number" "0,1,2,3,4,5,6,7"
newline
hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count"
group.long ($2+0x38)++0x3
line.long 0x0 "TCD_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address"
hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address"
group.word ($2+0x3C)++0x3
line.word 0x0 "TCD_CSR,TCD Control and Status"
bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
bitfld.word 0x0 8.--10. "MAJORLINKCH,Major Loop Link Channel Number" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.."
bitfld.word 0x0 6. "EEOP,Enable End-Of-Packet Processing" "0: End-of-packet operation disabled,1: End-of-packet hardware input signal enabled"
newline
bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.."
newline
bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.."
bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled"
newline
bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled"
bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.."
line.word 0x2 "TCD_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)"
bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count"
group.word ($2+0x3E)++0x1
line.word 0x0 "TCD_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)"
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
bitfld.word 0x0 9.--11. "LINKCH,Link Channel Number" "0,1,2,3,4,5,6,7"
newline
hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count"
tree.end
repeat.end
base ad:0x40081000
endif
tree.end
tree "EIM (Error Injection Module)"
base ad:0x4008C000
group.long 0x0++0x7
line.long 0x0 "EIMCR,Error Injection Module Configuration Register"
bitfld.long 0x0 0. "GEIEN,Global Error Injection Enable" "0: Disabled,1: Enabled"
line.long 0x4 "EICHEN,Error Injection Channel Enable register"
bitfld.long 0x4 31. "EICH0EN,Error Injection Channel 0 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.."
group.long 0x100++0x7
line.long 0x0 "EICHD0_WORD0,Error Injection Channel Descriptor 0. Word0"
hexmask.long.byte 0x0 25.--31. 1. "CHKBIT_MASK,Checkbit Mask"
line.long 0x4 "EICHD0_WORD1,Error Injection Channel Descriptor 0. Word1"
hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3"
tree.end
tree "ERM (Error Recording Module)"
base ad:0x4008D000
group.long 0x0++0x3
line.long 0x0 "CR0,ERM Configuration Register 0"
bitfld.long 0x0 31. "ESCIE0,ESCIE0" "0: Interrupt notification of Memory 0 single-bit..,1: Interrupt notification of Memory 0 single-bit.."
bitfld.long 0x0 30. "ENCIE0,ENCIE0" "0: Interrupt notification of Memory 0..,1: Interrupt notification of Memory 0.."
newline
bitfld.long 0x0 27. "ESCIE1,ESCIE1" "0: Interrupt notification of Memory 1 single-bit..,1: Interrupt notification of Memory 1 single-bit.."
bitfld.long 0x0 26. "ENCIE1,ENCIE1" "0: Interrupt notification of Memory 1..,1: Interrupt notification of Memory 1.."
group.long 0x10++0x3
line.long 0x0 "SR0,ERM Status Register 0"
eventfld.long 0x0 31. "SBC0,SBC0" "0: No single-bit correction event on Memory 0..,1: Single-bit correction event on Memory 0 detected."
eventfld.long 0x0 30. "NCE0,NCE0" "0: No non-correctable error event on Memory 0..,1: Non-correctable error event on Memory 0 detected."
newline
eventfld.long 0x0 27. "SBC1,SBC1" "0: No single-bit correction event on Memory 1..,1: Single-bit correction event on Memory 1 detected."
eventfld.long 0x0 26. "NCE1,NCE1" "0: No non-correctable error event on Memory 1..,1: Non-correctable error event on Memory 1 detected."
rgroup.long 0x100++0x7
line.long 0x0 "EAR0,ERM Memory 0 Error Address Register"
hexmask.long 0x0 0.--31. 1. "EAR,EAR"
line.long 0x4 "SYN0,ERM Memory 0 Syndrome Register"
hexmask.long.byte 0x4 24.--31. 1. "SYNDROME,SYNDROME"
group.long 0x108++0x3
line.long 0x0 "CORR_ERR_CNT0,ERM Memory 0 Correctable Error Count Register"
hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count"
group.long 0x118++0x3
line.long 0x0 "CORR_ERR_CNT1,ERM Memory 1 Correctable Error Count Register"
hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count"
tree.end
sif (cpuis("MC?A144*")||cpuis("MC?A145*")||cpuis("MC?A146*")||cpuis("MC?A154*")||cpuis("MC?A155*")||cpuis("MC?A156*"))
tree "FLEXIO (Flexible I/O)"
base ad:0x40099000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 24.--31. 1. "TRIGGER,Trigger Number"
hexmask.long.byte 0x4 16.--23. 1. "PIN,Pin Number"
newline
hexmask.long.byte 0x4 8.--15. 1. "TIMER,Timer Number"
hexmask.long.byte 0x4 0.--7. 1. "SHIFTER,Shifter Number"
group.long 0x8++0x3
line.long 0x0 "CTRL,FLEXIO Control"
bitfld.long 0x0 31. "DOZEN,Doze Enable" "0: Enable,1: Disable"
bitfld.long 0x0 30. "DBGE,Debug Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x0 2. "FASTACC,Fast Access" "0: Normal,1: Fast"
bitfld.long 0x0 1. "SWRST,Software Reset" "0: Disabled,1: Enabled"
newline
bitfld.long 0x0 0. "FLEXEN,FLEXIO Enable" "0: Disable,1: Enable"
rgroup.long 0xC++0x3
line.long 0x0 "PIN,Pin State"
hexmask.long 0x0 0.--31. 1. "PDI,Pin Data Input"
group.long 0x10++0xB
line.long 0x0 "SHIFTSTAT,Shifter Status"
hexmask.long.byte 0x0 0.--3. 1. "SSF,Shifter Status Flag"
line.long 0x4 "SHIFTERR,Shifter Error"
hexmask.long.byte 0x4 0.--3. 1. "SEF,Shifter Error Flag"
line.long 0x8 "TIMSTAT,Timer Status Flag"
hexmask.long.byte 0x8 0.--3. 1. "TSF,Timer Status Flag"
group.long 0x20++0xB
line.long 0x0 "SHIFTSIEN,Shifter Status Interrupt Enable"
hexmask.long.byte 0x0 0.--3. 1. "SSIE,Shifter Status Interrupt Enable"
line.long 0x4 "SHIFTEIEN,Shifter Error Interrupt Enable"
hexmask.long.byte 0x4 0.--3. 1. "SEIE,Shifter Error Interrupt Enable"
line.long 0x8 "TIMIEN,Timer Interrupt Enable"
hexmask.long.byte 0x8 0.--3. 1. "TEIE,Timer Status Interrupt Enable"
group.long 0x30++0x3
line.long 0x0 "SHIFTSDEN,Shifter Status DMA Enable"
hexmask.long.byte 0x0 0.--3. 1. "SSDE,Shifter Status DMA Enable"
group.long 0x38++0x3
line.long 0x0 "TIMERSDEN,Timer Status DMA Enable"
hexmask.long.byte 0x0 0.--3. 1. "TSDE,Timer Status DMA Enable"
group.long 0x40++0x3
line.long 0x0 "SHIFTSTATE,Shifter State"
bitfld.long 0x0 0.--2. "STATE,Current State Pointer" "0,1,2,3,4,5,6,7"
group.long 0x48++0x2F
line.long 0x0 "TRGSTAT,Trigger Status"
hexmask.long.byte 0x0 0.--3. 1. "ETSF,External Trigger Status Flag"
line.long 0x4 "TRIGIEN,External Trigger Interrupt Enable"
hexmask.long.byte 0x4 0.--3. 1. "TRIE,External Trigger Interrupt Enable"
line.long 0x8 "PINSTAT,Pin Status"
hexmask.long 0x8 0.--31. 1. "PSF,Pin Status Flag"
line.long 0xC "PINIEN,Pin Interrupt Enable"
hexmask.long 0xC 0.--31. 1. "PSIE,Pin Status Interrupt Enable"
line.long 0x10 "PINREN,Pin Rising Edge Enable"
hexmask.long 0x10 0.--31. 1. "PRE,Pin Rising Edge"
line.long 0x14 "PINFEN,Pin Falling Edge Enable"
hexmask.long 0x14 0.--31. 1. "PFE,Pin Falling Edge"
line.long 0x18 "PINOUTD,Pin Output Data"
hexmask.long 0x18 0.--31. 1. "OUTD,Output Data"
line.long 0x1C "PINOUTE,Pin Output Enable"
hexmask.long 0x1C 0.--31. 1. "OUTE,Output Enable"
line.long 0x20 "PINOUTDIS,Pin Output Disable"
hexmask.long 0x20 0.--31. 1. "OUTDIS,Output Disable"
line.long 0x24 "PINOUTCLR,Pin Output Clear"
hexmask.long 0x24 0.--31. 1. "OUTCLR,Output Clear"
line.long 0x28 "PINOUTSET,Pin Output Set"
hexmask.long 0x28 0.--31. 1. "OUTSET,Output Set"
line.long 0x2C "PINOUTTOG,Pin Output Toggle"
hexmask.long 0x2C 0.--31. 1. "OUTTOG,Output Toggle"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x80)++0x3
line.long 0x0 "SHIFTCTL[$1],Shifter Control"
bitfld.long 0x0 24.--25. "TIMSEL,Timer Select" "0,1,2,3"
bitfld.long 0x0 23. "TIMPOL,Timer Polarity" "0: Positive edge,1: Negative edge"
newline
bitfld.long 0x0 16.--17. "PINCFG,Shifter Pin Configuration" "0: Shifter pin output disabled,1: Shifter pin open-drain or bidirectional output..,2: Shifter pin bidirectional output data,3: Shifter pin output"
hexmask.long.byte 0x0 8.--12. 1. "PINSEL,Shifter Pin Select"
newline
bitfld.long 0x0 7. "PINPOL,Shifter Pin Polarity" "0: Active high,1: Active low"
bitfld.long 0x0 0.--2. "SMOD,Shifter Mode" "0: Disable,1: Receive mode; capture the current shifter..,2: Transmit mode; load SHIFTBUF contents into the..,?,4: Match Store mode; shifter data is compared to..,5: Match Continuous mode; shifter data is..,6: State mode; SHIFTBUF contents store programmable..,7: Logic mode; SHIFTBUF contents implement.."
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x100)++0x3
line.long 0x0 "SHIFTCFG[$1],Shifter Configuration"
hexmask.long.byte 0x0 16.--20. 1. "PWIDTH,Parallel Width"
bitfld.long 0x0 12. "SSIZE,Shifter Size" "0: 32-bit,1: 24-bit"
newline
bitfld.long 0x0 9. "LATST,Late Store" "0: Store the pre-shift register state,1: Store the post-shift register state"
bitfld.long 0x0 8. "INSRC,Input Source" "0: Pin,1: Shifter n+1 output"
newline
bitfld.long 0x0 4.--5. "SSTOP,Shifter Stop" "0: Stop bit disabled for Transmitter Receiver and..,1: Stop bit disabled for Transmitter Receiver and..,2: Transmitter mode outputs stop bit value 0 in..,3: Transmitter mode outputs stop bit value 1 in.."
bitfld.long 0x0 0.--1. "SSTART,Shifter Start" "0: Start bit disabled for Transmitter Receiver and..,1: Start bit disabled for Transmitter Receiver and..,2: Transmitter mode outputs start bit value 0..,3: Transmitter mode outputs start bit value 1.."
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x200)++0x3
line.long 0x0 "SHIFTBUF[$1],Shifter Buffer"
hexmask.long 0x0 0.--31. 1. "SHIFTBUF,Shift Buffer"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x280)++0x3
line.long 0x0 "SHIFTBUFBIS[$1],Shifter Buffer Bit Swapped"
hexmask.long 0x0 0.--31. 1. "SHIFTBUFBIS,Shift Buffer"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x300)++0x3
line.long 0x0 "SHIFTBUFBYS[$1],Shifter Buffer Byte Swapped"
hexmask.long 0x0 0.--31. 1. "SHIFTBUFBYS,Shift Buffer"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x380)++0x3
line.long 0x0 "SHIFTBUFBBS[$1],Shifter Buffer Bit Byte Swapped"
hexmask.long 0x0 0.--31. 1. "SHIFTBUFBBS,Shift Buffer"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x400)++0x3
line.long 0x0 "TIMCTL[$1],Timer Control"
hexmask.long.byte 0x0 24.--29. 1. "TRGSEL,Trigger Select"
bitfld.long 0x0 23. "TRGPOL,Trigger Polarity" "0: Active high,1: Active low"
newline
bitfld.long 0x0 22. "TRGSRC,Trigger Source" "0: External,1: Internal"
bitfld.long 0x0 16.--17. "PINCFG,Timer Pin Configuration" "0: Timer pin output disabled,1: Timer pin open-drain or bidirectional output..,2: Timer pin bidirectional output data,3: Timer pin output"
newline
hexmask.long.byte 0x0 8.--12. 1. "PINSEL,Timer Pin Select"
bitfld.long 0x0 7. "PINPOL,Timer Pin Polarity" "0: Active high,1: Active low"
newline
bitfld.long 0x0 6. "PININS,Timer Pin Input Select" "0: PINSEL selects timer pin input and output,1: PINSEL + 1 selects the timer pin input; timer.."
bitfld.long 0x0 5. "ONETIM,Timer One Time Operation" "0: Generate the timer enable event as normal,1: Block the timer enable event unless the timer.."
newline
bitfld.long 0x0 0.--2. "TIMOD,Timer Mode" "0: Timer disabled,1: Dual 8-bit counters baud mode,2: Dual 8-bit counters PWM high mode,3: Single 16-bit counter mode,4: Single 16-bit counter disable mode,5: Dual 8-bit counters word mode,6: Dual 8-bit counters PWM low mode,7: Single 16-bit input capture mode"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x480)++0x3
line.long 0x0 "TIMCFG[$1],Timer Configuration"
bitfld.long 0x0 24.--25. "TIMOUT,Timer Output" "0: Logic one when enabled; not affected by timer..,1: Logic zero when enabled; not affected by timer..,2: Logic one when enabled and on timer reset,3: Logic zero when enabled and on timer reset"
bitfld.long 0x0 20.--22. "TIMDEC,Timer Decrement" "0: Decrement counter on FLEXIO clock; shift clock..,1: Decrement counter on trigger input (both edges);..,2: Decrement counter on pin input (both edges);..,3: Decrement counter on trigger input (both edges);..,4: Decrement counter on FLEXIO clock divided by 16;..,5: Decrement counter on FLEXIO clock divided by..,6: Decrement counter on pin input (rising edge);..,7: Decrement counter on trigger input (rising.."
newline
bitfld.long 0x0 16.--18. "TIMRST,Timer Reset" "0: Never reset timer,1: Timer reset on timer output high.,2: Timer reset on timer pin equal to timer output,3: Timer reset on timer trigger equal to timer output,4: Timer reset on timer pin rising edge,?,6: Timer reset on trigger rising edge,7: Timer reset on trigger rising or falling edge"
bitfld.long 0x0 12.--14. "TIMDIS,Timer Disable" "0: Timer never disabled,1: Timer disabled on timer n-1 disable,2: Timer disabled on timer compare (upper 8 bits..,3: Timer disabled on timer compare (upper 8 bits..,4: Timer disabled on pin rising or falling edge,5: Timer disabled on pin rising or falling edge..,6: Timer disabled on trigger falling edge,?"
newline
bitfld.long 0x0 8.--10. "TIMENA,Timer Enable" "0: Timer always enabled,1: Timer enabled on timer n-1 enable,2: Timer enabled on trigger high,3: Timer enabled on trigger high and pin high,4: Timer enabled on pin rising edge,5: Timer enabled on pin rising edge and trigger high,6: Timer enabled on trigger rising edge,7: Timer enabled on trigger rising or falling edge"
bitfld.long 0x0 4.--5. "TSTOP,Timer Stop" "0: Disabled,1: Enabled on timer compare,2: Enabled on timer disable,3: Enabled on timer compare and timer disable"
newline
bitfld.long 0x0 1. "TSTART,Timer Start" "0: Disabled,1: Enabled"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x500)++0x3
line.long 0x0 "TIMCMP[$1],Timer Compare"
hexmask.long.word 0x0 0.--15. 1. "CMP,Timer Compare Value"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x680)++0x3
line.long 0x0 "SHIFTBUFNBS[$1],Shifter Buffer Nibble Byte Swapped"
hexmask.long 0x0 0.--31. 1. "SHIFTBUFNBS,Shift Buffer"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x700)++0x3
line.long 0x0 "SHIFTBUFHWS[$1],Shifter Buffer Halfword Swapped"
hexmask.long 0x0 0.--31. 1. "SHIFTBUFHWS,Shift Buffer"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x780)++0x3
line.long 0x0 "SHIFTBUFNIS[$1],Shifter Buffer Nibble Swapped"
hexmask.long 0x0 0.--31. 1. "SHIFTBUFNIS,Shift Buffer"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x800)++0x3
line.long 0x0 "SHIFTBUFOES[$1],Shifter Buffer Odd Even Swapped"
hexmask.long 0x0 0.--31. 1. "SHIFTBUFOES,Shift Buffer"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x880)++0x3
line.long 0x0 "SHIFTBUFEOS[$1],Shifter Buffer Even Odd Swapped"
hexmask.long 0x0 0.--31. 1. "SHIFTBUFEOS,Shift Buffer"
repeat.end
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x900)++0x3
line.long 0x0 "SHIFTBUFHBS[$1],Shifter Buffer Halfword Byte Swapped"
hexmask.long 0x0 0.--31. 1. "SHIFTBUFHBS,Shift Buffer"
repeat.end
tree.end
endif
tree "FLEXPWM (Enhanced Flex Pulse Width Modulator)"
base ad:0x0
tree "FLEXPWM0"
base ad:0x400A9000
rgroup.word 0x0++0x1
line.word 0x0 "SM0CNT,Counter Register"
hexmask.word 0x0 0.--15. 1. "CNT,Counter Register Bits"
group.word 0x2++0x5
line.word 0x0 "SM0INIT,Initial Count Register"
hexmask.word 0x0 0.--15. 1. "INIT,Initial Count Register Bits"
line.word 0x2 "SM0CTRL2,Control 2 Register"
bitfld.word 0x2 15. "DBGEN,Debug Enable" "0,1"
bitfld.word 0x2 13. "INDEP,Independent or Complementary Pair Operation" "0: PWM_A and PWM_B form a complementary PWM pair.,1: PWM_A and PWM_B outputs are independent PWMs."
newline
bitfld.word 0x2 12. "PWM23_INIT,PWM23 Initial Value" "0,1"
bitfld.word 0x2 11. "PWM45_INIT,PWM45 Initial Value" "0,1"
newline
bitfld.word 0x2 10. "PWMX_INIT,PWM_X Initial Value" "0,1"
bitfld.word 0x2 8.--9. "INIT_SEL,Initialization Control Select" "0: Local sync (PWM_X) causes initialization.,1: Master reload from submodule 0 causes..,2: Master sync from submodule 0 causes..,3: EXT_SYNC causes initialization."
newline
bitfld.word 0x2 7. "FRCEN,Force Enable" "0: Initialization from a FORCE_OUT is disabled.,1: Initialization from a FORCE_OUT is enabled."
bitfld.word 0x2 6. "FORCE,Force Initialization" "0,1"
newline
bitfld.word 0x2 3.--5. "FORCE_SEL,Force Select" "0: The local force signal CTRL2[FORCE] from this..,1: The master force signal from submodule 0 is used..,2: The local reload signal from this submodule is..,3: The master reload signal from submodule0 is used..,4: The local sync signal from this submodule is..,5: The master sync signal from submodule0 is used..,6: The external force signal EXT_FORCE from outside..,7: The external sync signal EXT_SYNC from outside.."
bitfld.word 0x2 2. "RELOAD_SEL,Reload Source Select" "0: The local RELOAD signal is used to reload..,1: The master RELOAD signal (from submodule 0) is.."
newline
bitfld.word 0x2 0.--1. "CLK_SEL,Clock Source Select" "0: The IPBus clock is used as the clock for the..,1: EXT_CLK is used as the clock for the local..,2: Submodule 0's clock (AUX_CLK) is used as the..,?"
line.word 0x4 "SM0CTRL,Control Register"
hexmask.word.byte 0x4 12.--15. 1. "LDFQ,Load Frequency"
bitfld.word 0x4 11. "HALF,Half Cycle Reload" "0: Half-cycle reloads disabled.,1: Half-cycle reloads enabled."
newline
bitfld.word 0x4 10. "FULL,Full Cycle Reload" "0: Full-cycle reloads disabled.,1: Full-cycle reloads enabled."
rbitfld.word 0x4 8.--9. "DT,Deadtime" "0,1,2,3"
newline
bitfld.word 0x4 7. "COMPMODE,Compare Mode" "0: The VAL* registers and the PWM counter are..,1: The VAL* registers and the PWM counter are.."
bitfld.word 0x4 4.--6. "PRSC,Prescaler" "0: Prescaler 1,1: Prescaler 2,2: Prescaler 4,3: Prescaler 8,4: Prescaler 16,5: Prescaler 32,6: Prescaler 64,7: Prescaler 128"
newline
bitfld.word 0x4 3. "SPLIT,Split the DBLPWM signal to PWM_A and PWM_B" "0: DBLPWM is not split. PWM_A and PWM_B each have..,1: DBLPWM is split to PWM_A and PWM_B."
bitfld.word 0x4 2. "LDMOD,Load Mode Select" "0: Buffered registers of this submodule are loaded..,1: Buffered registers of this submodule are loaded.."
newline
bitfld.word 0x4 1. "DBLX,PWM_X Double Switching Enable" "0: PWM_X double pulse disabled.,1: PWM_X double pulse enabled."
bitfld.word 0x4 0. "DBLEN,Double Switching Enable" "0: Double switching disabled.,1: Double switching enabled."
group.word 0xA++0x1
line.word 0x0 "SM0VAL0,Value Register 0"
hexmask.word 0x0 0.--15. 1. "VAL0,Value 0"
group.word 0xE++0x1
line.word 0x0 "SM0VAL1,Value Register 1"
hexmask.word 0x0 0.--15. 1. "VAL1,Value 1"
group.word 0x12++0x1
line.word 0x0 "SM0VAL2,Value Register 2"
hexmask.word 0x0 0.--15. 1. "VAL2,Value 2"
group.word 0x16++0x1
line.word 0x0 "SM0VAL3,Value Register 3"
hexmask.word 0x0 0.--15. 1. "VAL3,Value 3"
group.word 0x1A++0x1
line.word 0x0 "SM0VAL4,Value Register 4"
hexmask.word 0x0 0.--15. 1. "VAL4,Value 4"
group.word 0x1E++0x1
line.word 0x0 "SM0VAL5,Value Register 5"
hexmask.word 0x0 0.--15. 1. "VAL5,Value 5"
group.word 0x22++0xB
line.word 0x0 "SM0OCTRL,Output Control Register"
rbitfld.word 0x0 15. "PWMA_IN,PWM_A Input" "0,1"
rbitfld.word 0x0 14. "PWMB_IN,PWM_B Input" "0,1"
newline
rbitfld.word 0x0 13. "PWMX_IN,PWM_X Input" "0,1"
bitfld.word 0x0 10. "POLA,PWM_A Output Polarity" "0: PWM_A output not inverted. A high level on the..,1: PWM_A output inverted. A low level on the PWM_A.."
newline
bitfld.word 0x0 9. "POLB,PWM_B Output Polarity" "0: PWM_B output not inverted. A high level on the..,1: PWM_B output inverted. A low level on the PWM_B.."
bitfld.word 0x0 8. "POLX,PWM_X Output Polarity" "0: PWM_X output not inverted. A high level on the..,1: PWM_X output inverted. A low level on the PWM_X.."
newline
bitfld.word 0x0 4.--5. "PWMAFS,PWM_A Fault State" "0: Output is forced to logic 0 state prior to..,1: Output is forced to logic 1 state prior to..,2: Output is put in a high-impedance state.,3: Output is put in a high-impedance state."
bitfld.word 0x0 2.--3. "PWMBFS,PWM_B Fault State" "0: Output is forced to logic 0 state prior to..,1: Output is forced to logic 1 state prior to..,2: Output is put in a high-impedance state.,3: Output is put in a high-impedance state."
newline
bitfld.word 0x0 0.--1. "PWMXFS,PWM_X Fault State" "0: Output is forced to logic 0 state prior to..,1: Output is forced to logic 1 state prior to..,2: Output is put in a high-impedance state.,3: Output is put in a high-impedance state."
line.word 0x2 "SM0STS,Status Register"
rbitfld.word 0x2 14. "RUF,Registers Updated Flag" "0: No register update has occurred since last reload.,1: At least one of the double buffered registers.."
eventfld.word 0x2 13. "REF,Reload Error Flag" "0: No reload error occurred.,1: Reload signal occurred with non-coherent data.."
newline
eventfld.word 0x2 12. "RF,Reload Flag" "0: No new reload cycle since last STS[RF] clearing,1: New reload cycle since last STS[RF] clearing"
eventfld.word 0x2 7. "CFX1,Capture Flag X1" "0,1"
newline
eventfld.word 0x2 6. "CFX0,Capture Flag X0" "0,1"
hexmask.word.byte 0x2 0.--5. 1. "CMPF,Compare Flags"
line.word 0x4 "SM0INTEN,Interrupt Enable Register"
bitfld.word 0x4 13. "REIE,Reload Error Interrupt Enable" "0: STS[REF] CPU interrupt requests disabled,1: STS[REF] CPU interrupt requests enabled"
bitfld.word 0x4 12. "RIE,Reload Interrupt Enable" "0: STS[RF] CPU interrupt requests disabled,1: STS[RF] CPU interrupt requests enabled"
newline
bitfld.word 0x4 7. "CX1IE,Capture X 1 Interrupt Enable" "0: Interrupt request disabled for STS[CFX1].,1: Interrupt request enabled for STS[CFX1]."
bitfld.word 0x4 6. "CX0IE,Capture X 0 Interrupt Enable" "0: Interrupt request disabled for STS[CFX0].,1: Interrupt request enabled for STS[CFX0]."
newline
hexmask.word.byte 0x4 0.--5. 1. "CMPIE,Compare Interrupt Enables"
line.word 0x6 "SM0DMAEN,DMA Enable Register"
bitfld.word 0x6 9. "VALDE,Value Registers DMA Enable" "0: DMA write requests disabled,1: Enabled"
bitfld.word 0x6 8. "FAND,FIFO Watermark AND Control" "0: Selected FIFO watermarks are OR'ed together.,1: Selected FIFO watermarks are AND'ed together."
newline
bitfld.word 0x6 6.--7. "CAPTDE,Capture DMA Enable Source Select" "0: Read DMA requests disabled.,1: Exceeding a FIFO watermark sets the DMA read..,2: A local synchronization (VAL1 matches counter)..,3: A local reload (STS[RF] being set) sets the read.."
bitfld.word 0x6 1. "CX1DE,Capture X1 FIFO DMA Enable" "0,1"
newline
bitfld.word 0x6 0. "CX0DE,Capture X0 FIFO DMA Enable" "0,1"
line.word 0x8 "SM0TCTRL,Output Trigger Control Register"
bitfld.word 0x8 15. "PWAOT0,Mux Output Trigger 0 Source Select" "0: Route the PWM_OUT_TRIG0 signal to PWM_MUX_TRIG0..,1: Route the PWM_A output to the PWM_MUX_TRIG0 port."
bitfld.word 0x8 14. "PWBOT1,Mux Output Trigger 1 Source Select" "0: Route the PWM_OUT_TRIG1 signal to PWM_MUX_TRIG1..,1: Route the PWM_B output to the PWM_MUX_TRIG1 port."
newline
bitfld.word 0x8 12. "TRGFRQ,Trigger Frequency" "0: Trigger outputs are generated during every PWM..,1: Trigger outputs are generated only during the.."
hexmask.word.byte 0x8 0.--5. 1. "OUT_TRIG_EN,Output Trigger Enables"
line.word 0xA "SM0DISMAP0,Fault Disable Mapping Register 0"
hexmask.word.byte 0xA 8.--11. 1. "DIS0X,PWM_X Fault Disable Mask 0"
hexmask.word.byte 0xA 4.--7. 1. "DIS0B,PWM_B Fault Disable Mask 0"
newline
hexmask.word.byte 0xA 0.--3. 1. "DIS0A,PWM_A Fault Disable Mask 0"
group.word 0x30++0x3
line.word 0x0 "SM0DTCNT0,Deadtime Count Register 0"
hexmask.word 0x0 0.--10. 1. "DTCNT0,Deadtime Count Register 0"
line.word 0x2 "SM0DTCNT1,Deadtime Count Register 1"
hexmask.word 0x2 0.--10. 1. "DTCNT1,Deadtime Count Register 1"
group.word 0x3C++0x3
line.word 0x0 "SM0CAPTCTRLX,Capture Control X Register"
rbitfld.word 0x0 13.--15. "CX1CNT,Capture X1 FIFO Word Count" "0,1,2,3,4,5,6,7"
rbitfld.word 0x0 10.--12. "CX0CNT,Capture X0 FIFO Word Count" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x0 8.--9. "CFXWM,Capture X FIFOs Water Mark" "0,1,2,3"
bitfld.word 0x0 7. "EDGCNTX_EN,Edge Counter X Enable" "0: Edge counter disabled and held in reset,1: Edge counter enabled"
newline
bitfld.word 0x0 6. "INP_SELX,Input Select X" "0: Raw PWM_X input signal selected as source.,1: Edge Counter"
bitfld.word 0x0 4.--5. "EDGX1,Edge X 1" "0: Disabled,1: Capture falling edges,2: Capture rising edges,3: Capture any edge"
newline
bitfld.word 0x0 2.--3. "EDGX0,Edge X 0" "0: Disabled,1: Capture falling edges,2: Capture rising edges,3: Capture any edge"
bitfld.word 0x0 1. "ONESHOTX,One Shot Mode Aux" "0: Free Running,1: One Shot"
newline
bitfld.word 0x0 0. "ARMX,Arm X" "0: Input capture operation is disabled.,1: Input capture operation as specified by.."
line.word 0x2 "SM0CAPTCOMPX,Capture Compare X Register"
hexmask.word.byte 0x2 8.--15. 1. "EDGCNTX,Edge Counter X"
hexmask.word.byte 0x2 0.--7. 1. "EDGCMPX,Edge Compare X"
rgroup.word 0x40++0x7
line.word 0x0 "SM0CVAL0,Capture Value 0 Register"
hexmask.word 0x0 0.--15. 1. "CAPTVAL0,Capture Value 0"
line.word 0x2 "SM0CVAL0CYC,Capture Value 0 Cycle Register"
hexmask.word.byte 0x2 0.--3. 1. "CVAL0CYC,Capture Value 0 Cycle"
line.word 0x4 "SM0CVAL1,Capture Value 1 Register"
hexmask.word 0x4 0.--15. 1. "CAPTVAL1,Capture Value 1"
line.word 0x6 "SM0CVAL1CYC,Capture Value 1 Cycle Register"
hexmask.word.byte 0x6 0.--3. 1. "CVAL1CYC,Capture Value 1 Cycle"
group.word 0x5E++0x1
line.word 0x0 "SM0CAPTFILTX,Capture PWM_X Input Filter Register"
bitfld.word 0x0 8.--10. "CAPTX_FILT_CNT,Input Capture Filter Count" "0,1,2,3,4,5,6,7"
hexmask.word.byte 0x0 0.--7. 1. "CAPTX_FILT_PER,Input Capture Filter Period"
rgroup.word 0x60++0x1
line.word 0x0 "SM1CNT,Counter Register"
hexmask.word 0x0 0.--15. 1. "CNT,Counter Register Bits"
group.word 0x62++0x5
line.word 0x0 "SM1INIT,Initial Count Register"
hexmask.word 0x0 0.--15. 1. "INIT,Initial Count Register Bits"
line.word 0x2 "SM1CTRL2,Control 2 Register"
bitfld.word 0x2 15. "DBGEN,Debug Enable" "0,1"
bitfld.word 0x2 13. "INDEP,Independent or Complementary Pair Operation" "0: PWM_A and PWM_B form a complementary PWM pair.,1: PWM_A and PWM_B outputs are independent PWMs."
newline
bitfld.word 0x2 12. "PWM23_INIT,PWM23 Initial Value" "0,1"
bitfld.word 0x2 11. "PWM45_INIT,PWM45 Initial Value" "0,1"
newline
bitfld.word 0x2 10. "PWMX_INIT,PWM_X Initial Value" "0,1"
bitfld.word 0x2 8.--9. "INIT_SEL,Initialization Control Select" "0: Local sync (PWM_X) causes initialization.,1: Master reload from submodule 0 causes..,2: Master sync from submodule 0 causes..,3: EXT_SYNC causes initialization."
newline
bitfld.word 0x2 7. "FRCEN,Force Enable" "0: Initialization from a FORCE_OUT is disabled.,1: Initialization from a FORCE_OUT is enabled."
bitfld.word 0x2 6. "FORCE,Force Initialization" "0,1"
newline
bitfld.word 0x2 3.--5. "FORCE_SEL,Force Select" "0: The local force signal CTRL2[FORCE] from this..,1: The master force signal from submodule 0 is used..,2: The local reload signal from this submodule is..,3: The master reload signal from submodule0 is used..,4: The local sync signal from this submodule is..,5: The master sync signal from submodule0 is used..,6: The external force signal EXT_FORCE from outside..,7: The external sync signal EXT_SYNC from outside.."
bitfld.word 0x2 2. "RELOAD_SEL,Reload Source Select" "0: The local RELOAD signal is used to reload..,1: The master RELOAD signal (from submodule 0) is.."
newline
bitfld.word 0x2 0.--1. "CLK_SEL,Clock Source Select" "0: The IPBus clock is used as the clock for the..,1: EXT_CLK is used as the clock for the local..,2: Submodule 0's clock (AUX_CLK) is used as the..,?"
line.word 0x4 "SM1CTRL,Control Register"
hexmask.word.byte 0x4 12.--15. 1. "LDFQ,Load Frequency"
bitfld.word 0x4 11. "HALF,Half Cycle Reload" "0: Half-cycle reloads disabled.,1: Half-cycle reloads enabled."
newline
bitfld.word 0x4 10. "FULL,Full Cycle Reload" "0: Full-cycle reloads disabled.,1: Full-cycle reloads enabled."
rbitfld.word 0x4 8.--9. "DT,Deadtime" "0,1,2,3"
newline
bitfld.word 0x4 7. "COMPMODE,Compare Mode" "0: The VAL* registers and the PWM counter are..,1: The VAL* registers and the PWM counter are.."
bitfld.word 0x4 4.--6. "PRSC,Prescaler" "0: Prescaler 1,1: Prescaler 2,2: Prescaler 4,3: Prescaler 8,4: Prescaler 16,5: Prescaler 32,6: Prescaler 64,7: Prescaler 128"
newline
bitfld.word 0x4 3. "SPLIT,Split the DBLPWM signal to PWM_A and PWM_B" "0: DBLPWM is not split. PWM_A and PWM_B each have..,1: DBLPWM is split to PWM_A and PWM_B."
bitfld.word 0x4 2. "LDMOD,Load Mode Select" "0: Buffered registers of this submodule are loaded..,1: Buffered registers of this submodule are loaded.."
newline
bitfld.word 0x4 1. "DBLX,PWM_X Double Switching Enable" "0: PWM_X double pulse disabled.,1: PWM_X double pulse enabled."
bitfld.word 0x4 0. "DBLEN,Double Switching Enable" "0: Double switching disabled.,1: Double switching enabled."
group.word 0x6A++0x1
line.word 0x0 "SM1VAL0,Value Register 0"
hexmask.word 0x0 0.--15. 1. "VAL0,Value 0"
group.word 0x6E++0x1
line.word 0x0 "SM1VAL1,Value Register 1"
hexmask.word 0x0 0.--15. 1. "VAL1,Value 1"
group.word 0x72++0x1
line.word 0x0 "SM1VAL2,Value Register 2"
hexmask.word 0x0 0.--15. 1. "VAL2,Value 2"
group.word 0x76++0x1
line.word 0x0 "SM1VAL3,Value Register 3"
hexmask.word 0x0 0.--15. 1. "VAL3,Value 3"
group.word 0x7A++0x1
line.word 0x0 "SM1VAL4,Value Register 4"
hexmask.word 0x0 0.--15. 1. "VAL4,Value 4"
group.word 0x7E++0x1
line.word 0x0 "SM1VAL5,Value Register 5"
hexmask.word 0x0 0.--15. 1. "VAL5,Value 5"
group.word 0x82++0xB
line.word 0x0 "SM1OCTRL,Output Control Register"
rbitfld.word 0x0 15. "PWMA_IN,PWM_A Input" "0,1"
rbitfld.word 0x0 14. "PWMB_IN,PWM_B Input" "0,1"
newline
rbitfld.word 0x0 13. "PWMX_IN,PWM_X Input" "0,1"
bitfld.word 0x0 10. "POLA,PWM_A Output Polarity" "0: PWM_A output not inverted. A high level on the..,1: PWM_A output inverted. A low level on the PWM_A.."
newline
bitfld.word 0x0 9. "POLB,PWM_B Output Polarity" "0: PWM_B output not inverted. A high level on the..,1: PWM_B output inverted. A low level on the PWM_B.."
bitfld.word 0x0 8. "POLX,PWM_X Output Polarity" "0: PWM_X output not inverted. A high level on the..,1: PWM_X output inverted. A low level on the PWM_X.."
newline
bitfld.word 0x0 4.--5. "PWMAFS,PWM_A Fault State" "0: Output is forced to logic 0 state prior to..,1: Output is forced to logic 1 state prior to..,2: Output is put in a high-impedance state.,3: Output is put in a high-impedance state."
bitfld.word 0x0 2.--3. "PWMBFS,PWM_B Fault State" "0: Output is forced to logic 0 state prior to..,1: Output is forced to logic 1 state prior to..,2: Output is put in a high-impedance state.,3: Output is put in a high-impedance state."
newline
bitfld.word 0x0 0.--1. "PWMXFS,PWM_X Fault State" "0: Output is forced to logic 0 state prior to..,1: Output is forced to logic 1 state prior to..,2: Output is put in a high-impedance state.,3: Output is put in a high-impedance state."
line.word 0x2 "SM1STS,Status Register"
rbitfld.word 0x2 14. "RUF,Registers Updated Flag" "0: No register update has occurred since last reload.,1: At least one of the double buffered registers.."
eventfld.word 0x2 13. "REF,Reload Error Flag" "0: No reload error occurred.,1: Reload signal occurred with non-coherent data.."
newline
eventfld.word 0x2 12. "RF,Reload Flag" "0: No new reload cycle since last STS[RF] clearing,1: New reload cycle since last STS[RF] clearing"
eventfld.word 0x2 7. "CFX1,Capture Flag X1" "0,1"
newline
eventfld.word 0x2 6. "CFX0,Capture Flag X0" "0,1"
hexmask.word.byte 0x2 0.--5. 1. "CMPF,Compare Flags"
line.word 0x4 "SM1INTEN,Interrupt Enable Register"
bitfld.word 0x4 13. "REIE,Reload Error Interrupt Enable" "0: STS[REF] CPU interrupt requests disabled,1: STS[REF] CPU interrupt requests enabled"
bitfld.word 0x4 12. "RIE,Reload Interrupt Enable" "0: STS[RF] CPU interrupt requests disabled,1: STS[RF] CPU interrupt requests enabled"
newline
bitfld.word 0x4 7. "CX1IE,Capture X 1 Interrupt Enable" "0: Interrupt request disabled for STS[CFX1].,1: Interrupt request enabled for STS[CFX1]."
bitfld.word 0x4 6. "CX0IE,Capture X 0 Interrupt Enable" "0: Interrupt request disabled for STS[CFX0].,1: Interrupt request enabled for STS[CFX0]."
newline
hexmask.word.byte 0x4 0.--5. 1. "CMPIE,Compare Interrupt Enables"
line.word 0x6 "SM1DMAEN,DMA Enable Register"
bitfld.word 0x6 9. "VALDE,Value Registers DMA Enable" "0: DMA write requests disabled,1: Enabled"
bitfld.word 0x6 8. "FAND,FIFO Watermark AND Control" "0: Selected FIFO watermarks are OR'ed together.,1: Selected FIFO watermarks are AND'ed together."
newline
bitfld.word 0x6 6.--7. "CAPTDE,Capture DMA Enable Source Select" "0: Read DMA requests disabled.,1: Exceeding a FIFO watermark sets the DMA read..,2: A local synchronization (VAL1 matches counter)..,3: A local reload (STS[RF] being set) sets the read.."
bitfld.word 0x6 1. "CX1DE,Capture X1 FIFO DMA Enable" "0,1"
newline
bitfld.word 0x6 0. "CX0DE,Capture X0 FIFO DMA Enable" "0,1"
line.word 0x8 "SM1TCTRL,Output Trigger Control Register"
bitfld.word 0x8 15. "PWAOT0,Mux Output Trigger 0 Source Select" "0: Route the PWM_OUT_TRIG0 signal to PWM_MUX_TRIG0..,1: Route the PWM_A output to the PWM_MUX_TRIG0 port."
bitfld.word 0x8 14. "PWBOT1,Mux Output Trigger 1 Source Select" "0: Route the PWM_OUT_TRIG1 signal to PWM_MUX_TRIG1..,1: Route the PWM_B output to the PWM_MUX_TRIG1 port."
newline
bitfld.word 0x8 12. "TRGFRQ,Trigger Frequency" "0: Trigger outputs are generated during every PWM..,1: Trigger outputs are generated only during the.."
hexmask.word.byte 0x8 0.--5. 1. "OUT_TRIG_EN,Output Trigger Enables"
line.word 0xA "SM1DISMAP0,Fault Disable Mapping Register 0"
hexmask.word.byte 0xA 8.--11. 1. "DIS0X,PWM_X Fault Disable Mask 0"
hexmask.word.byte 0xA 4.--7. 1. "DIS0B,PWM_B Fault Disable Mask 0"
newline
hexmask.word.byte 0xA 0.--3. 1. "DIS0A,PWM_A Fault Disable Mask 0"
group.word 0x90++0x3
line.word 0x0 "SM1DTCNT0,Deadtime Count Register 0"
hexmask.word 0x0 0.--10. 1. "DTCNT0,Deadtime Count Register 0"
line.word 0x2 "SM1DTCNT1,Deadtime Count Register 1"
hexmask.word 0x2 0.--10. 1. "DTCNT1,Deadtime Count Register 1"
group.word 0x9C++0x3
line.word 0x0 "SM1CAPTCTRLX,Capture Control X Register"
rbitfld.word 0x0 13.--15. "CX1CNT,Capture X1 FIFO Word Count" "0,1,2,3,4,5,6,7"
rbitfld.word 0x0 10.--12. "CX0CNT,Capture X0 FIFO Word Count" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x0 8.--9. "CFXWM,Capture X FIFOs Water Mark" "0,1,2,3"
bitfld.word 0x0 7. "EDGCNTX_EN,Edge Counter X Enable" "0: Edge counter disabled and held in reset,1: Edge counter enabled"
newline
bitfld.word 0x0 6. "INP_SELX,Input Select X" "0: Raw PWM_X input signal selected as source.,1: Edge Counter"
bitfld.word 0x0 4.--5. "EDGX1,Edge X 1" "0: Disabled,1: Capture falling edges,2: Capture rising edges,3: Capture any edge"
newline
bitfld.word 0x0 2.--3. "EDGX0,Edge X 0" "0: Disabled,1: Capture falling edges,2: Capture rising edges,3: Capture any edge"
bitfld.word 0x0 1. "ONESHOTX,One Shot Mode Aux" "0: Free Running,1: One Shot"
newline
bitfld.word 0x0 0. "ARMX,Arm X" "0: Input capture operation is disabled.,1: Input capture operation as specified by.."
line.word 0x2 "SM1CAPTCOMPX,Capture Compare X Register"
hexmask.word.byte 0x2 8.--15. 1. "EDGCNTX,Edge Counter X"
hexmask.word.byte 0x2 0.--7. 1. "EDGCMPX,Edge Compare X"
rgroup.word 0xA0++0x7
line.word 0x0 "SM1CVAL0,Capture Value 0 Register"
hexmask.word 0x0 0.--15. 1. "CAPTVAL0,Capture Value 0"
line.word 0x2 "SM1CVAL0CYC,Capture Value 0 Cycle Register"
hexmask.word.byte 0x2 0.--3. 1. "CVAL0CYC,Capture Value 0 Cycle"
line.word 0x4 "SM1CVAL1,Capture Value 1 Register"
hexmask.word 0x4 0.--15. 1. "CAPTVAL1,Capture Value 1"
line.word 0x6 "SM1CVAL1CYC,Capture Value 1 Cycle Register"
hexmask.word.byte 0x6 0.--3. 1. "CVAL1CYC,Capture Value 1 Cycle"
group.word 0xB8++0x1
line.word 0x0 "SM1PHASEDLY,Phase Delay Register"
hexmask.word 0x0 0.--15. 1. "PHASEDLY,Initial Count Register Bits"
group.word 0xBE++0x1
line.word 0x0 "SM1CAPTFILTX,Capture PWM_X Input Filter Register"
bitfld.word 0x0 8.--10. "CAPTX_FILT_CNT,Input Capture Filter Count" "0,1,2,3,4,5,6,7"
hexmask.word.byte 0x0 0.--7. 1. "CAPTX_FILT_PER,Input Capture Filter Period"
rgroup.word 0xC0++0x1
line.word 0x0 "SM2CNT,Counter Register"
hexmask.word 0x0 0.--15. 1. "CNT,Counter Register Bits"
group.word 0xC2++0x5
line.word 0x0 "SM2INIT,Initial Count Register"
hexmask.word 0x0 0.--15. 1. "INIT,Initial Count Register Bits"
line.word 0x2 "SM2CTRL2,Control 2 Register"
bitfld.word 0x2 15. "DBGEN,Debug Enable" "0,1"
bitfld.word 0x2 13. "INDEP,Independent or Complementary Pair Operation" "0: PWM_A and PWM_B form a complementary PWM pair.,1: PWM_A and PWM_B outputs are independent PWMs."
newline
bitfld.word 0x2 12. "PWM23_INIT,PWM23 Initial Value" "0,1"
bitfld.word 0x2 11. "PWM45_INIT,PWM45 Initial Value" "0,1"
newline
bitfld.word 0x2 10. "PWMX_INIT,PWM_X Initial Value" "0,1"
bitfld.word 0x2 8.--9. "INIT_SEL,Initialization Control Select" "0: Local sync (PWM_X) causes initialization.,1: Master reload from submodule 0 causes..,2: Master sync from submodule 0 causes..,3: EXT_SYNC causes initialization."
newline
bitfld.word 0x2 7. "FRCEN,Force Enable" "0: Initialization from a FORCE_OUT is disabled.,1: Initialization from a FORCE_OUT is enabled."
bitfld.word 0x2 6. "FORCE,Force Initialization" "0,1"
newline
bitfld.word 0x2 3.--5. "FORCE_SEL,Force Select" "0: The local force signal CTRL2[FORCE] from this..,1: The master force signal from submodule 0 is used..,2: The local reload signal from this submodule is..,3: The master reload signal from submodule0 is used..,4: The local sync signal from this submodule is..,5: The master sync signal from submodule0 is used..,6: The external force signal EXT_FORCE from outside..,7: The external sync signal EXT_SYNC from outside.."
bitfld.word 0x2 2. "RELOAD_SEL,Reload Source Select" "0: The local RELOAD signal is used to reload..,1: The master RELOAD signal (from submodule 0) is.."
newline
bitfld.word 0x2 0.--1. "CLK_SEL,Clock Source Select" "0: The IPBus clock is used as the clock for the..,1: EXT_CLK is used as the clock for the local..,2: Submodule 0's clock (AUX_CLK) is used as the..,?"
line.word 0x4 "SM2CTRL,Control Register"
hexmask.word.byte 0x4 12.--15. 1. "LDFQ,Load Frequency"
bitfld.word 0x4 11. "HALF,Half Cycle Reload" "0: Half-cycle reloads disabled.,1: Half-cycle reloads enabled."
newline
bitfld.word 0x4 10. "FULL,Full Cycle Reload" "0: Full-cycle reloads disabled.,1: Full-cycle reloads enabled."
rbitfld.word 0x4 8.--9. "DT,Deadtime" "0,1,2,3"
newline
bitfld.word 0x4 7. "COMPMODE,Compare Mode" "0: The VAL* registers and the PWM counter are..,1: The VAL* registers and the PWM counter are.."
bitfld.word 0x4 4.--6. "PRSC,Prescaler" "0: Prescaler 1,1: Prescaler 2,2: Prescaler 4,3: Prescaler 8,4: Prescaler 16,5: Prescaler 32,6: Prescaler 64,7: Prescaler 128"
newline
bitfld.word 0x4 3. "SPLIT,Split the DBLPWM signal to PWM_A and PWM_B" "0: DBLPWM is not split. PWM_A and PWM_B each have..,1: DBLPWM is split to PWM_A and PWM_B."
bitfld.word 0x4 2. "LDMOD,Load Mode Select" "0: Buffered registers of this submodule are loaded..,1: Buffered registers of this submodule are loaded.."
newline
bitfld.word 0x4 1. "DBLX,PWM_X Double Switching Enable" "0: PWM_X double pulse disabled.,1: PWM_X double pulse enabled."
bitfld.word 0x4 0. "DBLEN,Double Switching Enable" "0: Double switching disabled.,1: Double switching enabled."
group.word 0xCA++0x1
line.word 0x0 "SM2VAL0,Value Register 0"
hexmask.word 0x0 0.--15. 1. "VAL0,Value 0"
group.word 0xCE++0x1
line.word 0x0 "SM2VAL1,Value Register 1"
hexmask.word 0x0 0.--15. 1. "VAL1,Value 1"
group.word 0xD2++0x1
line.word 0x0 "SM2VAL2,Value Register 2"
hexmask.word 0x0 0.--15. 1. "VAL2,Value 2"
group.word 0xD6++0x1
line.word 0x0 "SM2VAL3,Value Register 3"
hexmask.word 0x0 0.--15. 1. "VAL3,Value 3"
group.word 0xDA++0x1
line.word 0x0 "SM2VAL4,Value Register 4"
hexmask.word 0x0 0.--15. 1. "VAL4,Value 4"
group.word 0xDE++0x1
line.word 0x0 "SM2VAL5,Value Register 5"
hexmask.word 0x0 0.--15. 1. "VAL5,Value 5"
group.word 0xE2++0xB
line.word 0x0 "SM2OCTRL,Output Control Register"
rbitfld.word 0x0 15. "PWMA_IN,PWM_A Input" "0,1"
rbitfld.word 0x0 14. "PWMB_IN,PWM_B Input" "0,1"
newline
rbitfld.word 0x0 13. "PWMX_IN,PWM_X Input" "0,1"
bitfld.word 0x0 10. "POLA,PWM_A Output Polarity" "0: PWM_A output not inverted. A high level on the..,1: PWM_A output inverted. A low level on the PWM_A.."
newline
bitfld.word 0x0 9. "POLB,PWM_B Output Polarity" "0: PWM_B output not inverted. A high level on the..,1: PWM_B output inverted. A low level on the PWM_B.."
bitfld.word 0x0 8. "POLX,PWM_X Output Polarity" "0: PWM_X output not inverted. A high level on the..,1: PWM_X output inverted. A low level on the PWM_X.."
newline
bitfld.word 0x0 4.--5. "PWMAFS,PWM_A Fault State" "0: Output is forced to logic 0 state prior to..,1: Output is forced to logic 1 state prior to..,2: Output is put in a high-impedance state.,3: Output is put in a high-impedance state."
bitfld.word 0x0 2.--3. "PWMBFS,PWM_B Fault State" "0: Output is forced to logic 0 state prior to..,1: Output is forced to logic 1 state prior to..,2: Output is put in a high-impedance state.,3: Output is put in a high-impedance state."
newline
bitfld.word 0x0 0.--1. "PWMXFS,PWM_X Fault State" "0: Output is forced to logic 0 state prior to..,1: Output is forced to logic 1 state prior to..,2: Output is put in a high-impedance state.,3: Output is put in a high-impedance state."
line.word 0x2 "SM2STS,Status Register"
rbitfld.word 0x2 14. "RUF,Registers Updated Flag" "0: No register update has occurred since last reload.,1: At least one of the double buffered registers.."
eventfld.word 0x2 13. "REF,Reload Error Flag" "0: No reload error occurred.,1: Reload signal occurred with non-coherent data.."
newline
eventfld.word 0x2 12. "RF,Reload Flag" "0: No new reload cycle since last STS[RF] clearing,1: New reload cycle since last STS[RF] clearing"
eventfld.word 0x2 7. "CFX1,Capture Flag X1" "0,1"
newline
eventfld.word 0x2 6. "CFX0,Capture Flag X0" "0,1"
hexmask.word.byte 0x2 0.--5. 1. "CMPF,Compare Flags"
line.word 0x4 "SM2INTEN,Interrupt Enable Register"
bitfld.word 0x4 13. "REIE,Reload Error Interrupt Enable" "0: STS[REF] CPU interrupt requests disabled,1: STS[REF] CPU interrupt requests enabled"
bitfld.word 0x4 12. "RIE,Reload Interrupt Enable" "0: STS[RF] CPU interrupt requests disabled,1: STS[RF] CPU interrupt requests enabled"
newline
bitfld.word 0x4 7. "CX1IE,Capture X 1 Interrupt Enable" "0: Interrupt request disabled for STS[CFX1].,1: Interrupt request enabled for STS[CFX1]."
bitfld.word 0x4 6. "CX0IE,Capture X 0 Interrupt Enable" "0: Interrupt request disabled for STS[CFX0].,1: Interrupt request enabled for STS[CFX0]."
newline
hexmask.word.byte 0x4 0.--5. 1. "CMPIE,Compare Interrupt Enables"
line.word 0x6 "SM2DMAEN,DMA Enable Register"
bitfld.word 0x6 9. "VALDE,Value Registers DMA Enable" "0: DMA write requests disabled,1: Enabled"
bitfld.word 0x6 8. "FAND,FIFO Watermark AND Control" "0: Selected FIFO watermarks are OR'ed together.,1: Selected FIFO watermarks are AND'ed together."
newline
bitfld.word 0x6 6.--7. "CAPTDE,Capture DMA Enable Source Select" "0: Read DMA requests disabled.,1: Exceeding a FIFO watermark sets the DMA read..,2: A local synchronization (VAL1 matches counter)..,3: A local reload (STS[RF] being set) sets the read.."
bitfld.word 0x6 1. "CX1DE,Capture X1 FIFO DMA Enable" "0,1"
newline
bitfld.word 0x6 0. "CX0DE,Capture X0 FIFO DMA Enable" "0,1"
line.word 0x8 "SM2TCTRL,Output Trigger Control Register"
bitfld.word 0x8 15. "PWAOT0,Mux Output Trigger 0 Source Select" "0: Route the PWM_OUT_TRIG0 signal to PWM_MUX_TRIG0..,1: Route the PWM_A output to the PWM_MUX_TRIG0 port."
bitfld.word 0x8 14. "PWBOT1,Mux Output Trigger 1 Source Select" "0: Route the PWM_OUT_TRIG1 signal to PWM_MUX_TRIG1..,1: Route the PWM_B output to the PWM_MUX_TRIG1 port."
newline
bitfld.word 0x8 12. "TRGFRQ,Trigger Frequency" "0: Trigger outputs are generated during every PWM..,1: Trigger outputs are generated only during the.."
hexmask.word.byte 0x8 0.--5. 1. "OUT_TRIG_EN,Output Trigger Enables"
line.word 0xA "SM2DISMAP0,Fault Disable Mapping Register 0"
hexmask.word.byte 0xA 8.--11. 1. "DIS0X,PWM_X Fault Disable Mask 0"
hexmask.word.byte 0xA 4.--7. 1. "DIS0B,PWM_B Fault Disable Mask 0"
newline
hexmask.word.byte 0xA 0.--3. 1. "DIS0A,PWM_A Fault Disable Mask 0"
group.word 0xF0++0x3
line.word 0x0 "SM2DTCNT0,Deadtime Count Register 0"
hexmask.word 0x0 0.--10. 1. "DTCNT0,Deadtime Count Register 0"
line.word 0x2 "SM2DTCNT1,Deadtime Count Register 1"
hexmask.word 0x2 0.--10. 1. "DTCNT1,Deadtime Count Register 1"
group.word 0xFC++0x3
line.word 0x0 "SM2CAPTCTRLX,Capture Control X Register"
rbitfld.word 0x0 13.--15. "CX1CNT,Capture X1 FIFO Word Count" "0,1,2,3,4,5,6,7"
rbitfld.word 0x0 10.--12. "CX0CNT,Capture X0 FIFO Word Count" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x0 8.--9. "CFXWM,Capture X FIFOs Water Mark" "0,1,2,3"
bitfld.word 0x0 7. "EDGCNTX_EN,Edge Counter X Enable" "0: Edge counter disabled and held in reset,1: Edge counter enabled"
newline
bitfld.word 0x0 6. "INP_SELX,Input Select X" "0: Raw PWM_X input signal selected as source.,1: Edge Counter"
bitfld.word 0x0 4.--5. "EDGX1,Edge X 1" "0: Disabled,1: Capture falling edges,2: Capture rising edges,3: Capture any edge"
newline
bitfld.word 0x0 2.--3. "EDGX0,Edge X 0" "0: Disabled,1: Capture falling edges,2: Capture rising edges,3: Capture any edge"
bitfld.word 0x0 1. "ONESHOTX,One Shot Mode Aux" "0: Free Running,1: One Shot"
newline
bitfld.word 0x0 0. "ARMX,Arm X" "0: Input capture operation is disabled.,1: Input capture operation as specified by.."
line.word 0x2 "SM2CAPTCOMPX,Capture Compare X Register"
hexmask.word.byte 0x2 8.--15. 1. "EDGCNTX,Edge Counter X"
hexmask.word.byte 0x2 0.--7. 1. "EDGCMPX,Edge Compare X"
rgroup.word 0x100++0x7
line.word 0x0 "SM2CVAL0,Capture Value 0 Register"
hexmask.word 0x0 0.--15. 1. "CAPTVAL0,Capture Value 0"
line.word 0x2 "SM2CVAL0CYC,Capture Value 0 Cycle Register"
hexmask.word.byte 0x2 0.--3. 1. "CVAL0CYC,Capture Value 0 Cycle"
line.word 0x4 "SM2CVAL1,Capture Value 1 Register"
hexmask.word 0x4 0.--15. 1. "CAPTVAL1,Capture Value 1"
line.word 0x6 "SM2CVAL1CYC,Capture Value 1 Cycle Register"
hexmask.word.byte 0x6 0.--3. 1. "CVAL1CYC,Capture Value 1 Cycle"
group.word 0x118++0x1
line.word 0x0 "SM2PHASEDLY,Phase Delay Register"
hexmask.word 0x0 0.--15. 1. "PHASEDLY,Initial Count Register Bits"
group.word 0x11E++0x1
line.word 0x0 "SM2CAPTFILTX,Capture PWM_X Input Filter Register"
bitfld.word 0x0 8.--10. "CAPTX_FILT_CNT,Input Capture Filter Count" "0,1,2,3,4,5,6,7"
hexmask.word.byte 0x0 0.--7. 1. "CAPTX_FILT_PER,Input Capture Filter Period"
group.word 0x180++0x15
line.word 0x0 "OUTEN,Output Enable Register"
bitfld.word 0x0 8.--10. "PWMA_EN,PWM_A Output Enables" "0,1,2,3,4,5,6,7"
bitfld.word 0x0 4.--6. "PWMB_EN,PWM_B Output Enables" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x0 0.--2. "PWMX_EN,PWM_X Output Enables" "0,1,2,3,4,5,6,7"
line.word 0x2 "MASK,Mask Register"
bitfld.word 0x2 12.--14. "UPDATE_MASK,Update Mask Bits Immediately" "0,1,2,3,4,5,6,7"
bitfld.word 0x2 8.--10. "MASKA,PWM_A Masks" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x2 4.--6. "MASKB,PWM_B Masks" "0,1,2,3,4,5,6,7"
bitfld.word 0x2 0.--2. "MASKX,PWM_X Masks" "0,1,2,3,4,5,6,7"
line.word 0x4 "SWCOUT,Software Controlled Output Register"
bitfld.word 0x4 5. "SM2OUT23,Submodule 2 Software Controlled Output 23" "0: A logic 0 is supplied to the deadtime generator..,1: A logic 1 is supplied to the deadtime generator.."
bitfld.word 0x4 4. "SM2OUT45,Submodule 2 Software Controlled Output 45" "0: A logic 0 is supplied to the deadtime generator..,1: A logic 1 is supplied to the deadtime generator.."
newline
bitfld.word 0x4 3. "SM1OUT23,Submodule 1 Software Controlled Output 23" "0: A logic 0 is supplied to the deadtime generator..,1: A logic 1 is supplied to the deadtime generator.."
bitfld.word 0x4 2. "SM1OUT45,Submodule 1 Software Controlled Output 45" "0: A logic 0 is supplied to the deadtime generator..,1: A logic 1 is supplied to the deadtime generator.."
newline
bitfld.word 0x4 1. "SM0OUT23,Submodule 0 Software Controlled Output 23" "0: A logic 0 is supplied to the deadtime generator..,1: A logic 1 is supplied to the deadtime generator.."
bitfld.word 0x4 0. "SM0OUT45,Submodule 0 Software Controlled Output 45" "0: A logic 0 is supplied to the deadtime generator..,1: A logic 1 is supplied to the deadtime generator.."
line.word 0x6 "DTSRCSEL,PWM Source Select Register"
bitfld.word 0x6 10.--11. "SM2SEL23,Submodule 2 PWM23 Control Select" "0: Generated SM2PWM23 signal used by the deadtime..,1: Inverted generated SM2PWM23 signal used by the..,2: SWCOUT[SM2OUT23] used by the deadtime logic.,3: PWM2_EXTA signal used by the deadtime logic."
bitfld.word 0x6 8.--9. "SM2SEL45,Submodule 2 PWM45 Control Select" "0: Generated SM2PWM45 signal used by the deadtime..,1: Inverted generated SM2PWM45 signal used by the..,2: SWCOUT[SM2OUT45] used by the deadtime logic.,?"
newline
bitfld.word 0x6 6.--7. "SM1SEL23,Submodule 1 PWM23 Control Select" "0: Generated SM1PWM23 signal used by the deadtime..,1: Inverted generated SM1PWM23 signal used by the..,2: SWCOUT[SM1OUT23] used by the deadtime logic.,3: PWM1_EXTA signal used by the deadtime logic."
bitfld.word 0x6 4.--5. "SM1SEL45,Submodule 1 PWM45 Control Select" "0: Generated SM1PWM45 signal used by the deadtime..,1: Inverted generated SM1PWM45 signal used by the..,2: SWCOUT[SM1OUT45] used by the deadtime logic.,?"
newline
bitfld.word 0x6 2.--3. "SM0SEL23,Submodule 0 PWM23 Control Select" "0: Generated SM0PWM23 signal used by the deadtime..,1: Inverted generated SM0PWM23 signal used by the..,2: SWCOUT[SM0OUT23] used by the deadtime logic.,3: PWM0_EXTA signal used by the deadtime logic."
bitfld.word 0x6 0.--1. "SM0SEL45,Submodule 0 PWM45 Control Select" "0: Generated SM0PWM45 signal used by the deadtime..,1: Inverted generated SM0PWM45 signal used by the..,2: SWCOUT[SM0OUT45] used by the deadtime logic.,?"
line.word 0x8 "MCTRL,Master Control Register"
bitfld.word 0x8 12.--14. "IPOL,Current Polarity" "0: PWM23 is used to generate complementary PWM pair..,1: PWM45 is used to generate complementary PWM pair..,?,?,?,?,?,?"
bitfld.word 0x8 8.--10. "RUN,Run" "0: PWM counter is stopped but PWM outputs hold the..,1: PWM counter is started in the corresponding..,?,?,?,?,?,?"
newline
bitfld.word 0x8 4.--6. "CLDOK,Clear Load Okay" "0,1,2,3,4,5,6,7"
bitfld.word 0x8 0.--2. "LDOK,Load Okay" "0: Do not load new values.,1: Load prescaler modulus and PWM values of the..,?,?,?,?,?,?"
line.word 0xA "MCTRL2,Master Control 2 Register"
bitfld.word 0xA 6.--7. "STRETCH_CNT_PRSC,Stretch IPBus clock count prescaler for mux0_trig/mux1_trig/out0_trig/out1_trig/pwma_trig/pwmb_trig" "0: Stretch count is zero no stretch.,1: Stretch..,2: Stretch..,3: Stretch.."
bitfld.word 0xA 2.--3. "WRPROT,Write protect" "0: Write protection off (default).,1: Write protection on.,2: Write protection off and locked until chip reset.,3: Write protection on and locked until chip reset."
line.word 0xC "FCTRL0,Fault Control Register"
hexmask.word.byte 0xC 12.--15. 1. "FLVL,Fault Level"
hexmask.word.byte 0xC 8.--11. 1. "FAUTO,Automatic Fault Clearing"
newline
hexmask.word.byte 0xC 4.--7. 1. "FSAFE,Fault Safety Mode"
hexmask.word.byte 0xC 0.--3. 1. "FIE,Fault Interrupt Enables"
line.word 0xE "FSTS0,Fault Status Register"
hexmask.word.byte 0xE 12.--15. 1. "FHALF,Half Cycle Fault Recovery"
hexmask.word.byte 0xE 8.--11. 1. "FFPIN,Filtered Fault Pins"
newline
hexmask.word.byte 0xE 4.--7. 1. "FFULL,Full Cycle"
hexmask.word.byte 0xE 0.--3. 1. "FFLAG,Fault Flags"
line.word 0x10 "FFILT0,Fault Filter Register"
bitfld.word 0x10 15. "GSTR,Fault Glitch Stretch Enable" "0: Fault input glitch stretching is disabled.,1: Input fault signals are stretched to at least 2.."
bitfld.word 0x10 8.--10. "FILT_CNT,Fault Filter Count" "0,1,2,3,4,5,6,7"
newline
hexmask.word.byte 0x10 0.--7. 1. "FILT_PER,Fault Filter Period"
line.word 0x12 "FTST0,Fault Test Register"
bitfld.word 0x12 0. "FTEST,Fault Test" "0: No fault,1: Cause a simulated fault"
line.word 0x14 "FCTRL20,Fault Control 2 Register"
hexmask.word.byte 0x14 0.--3. 1. "NOCOMB,No Combinational Path From Fault Input To PWM Output"
tree.end
sif (cpuis("MC?A154*"))
tree "FLEXPWM1"
base ad:0x400AA000
rgroup.word 0x0++0x1
line.word 0x0 "SM0CNT,Counter Register"
hexmask.word 0x0 0.--15. 1. "CNT,Counter Register Bits"
group.word 0x2++0x5
line.word 0x0 "SM0INIT,Initial Count Register"
hexmask.word 0x0 0.--15. 1. "INIT,Initial Count Register Bits"
line.word 0x2 "SM0CTRL2,Control 2 Register"
bitfld.word 0x2 15. "DBGEN,Debug Enable" "0,1"
bitfld.word 0x2 13. "INDEP,Independent or Complementary Pair Operation" "0: PWM_A and PWM_B form a complementary PWM pair.,1: PWM_A and PWM_B outputs are independent PWMs."
newline
bitfld.word 0x2 12. "PWM23_INIT,PWM23 Initial Value" "0,1"
bitfld.word 0x2 11. "PWM45_INIT,PWM45 Initial Value" "0,1"
newline
bitfld.word 0x2 10. "PWMX_INIT,PWM_X Initial Value" "0,1"
bitfld.word 0x2 8.--9. "INIT_SEL,Initialization Control Select" "0: Local sync (PWM_X) causes initialization.,1: Master reload from submodule 0 causes..,2: Master sync from submodule 0 causes..,3: EXT_SYNC causes initialization."
newline
bitfld.word 0x2 7. "FRCEN,Force Enable" "0: Initialization from a FORCE_OUT is disabled.,1: Initialization from a FORCE_OUT is enabled."
bitfld.word 0x2 6. "FORCE,Force Initialization" "0,1"
newline
bitfld.word 0x2 3.--5. "FORCE_SEL,Force Select" "0: The local force signal CTRL2[FORCE] from this..,1: The master force signal from submodule 0 is used..,2: The local reload signal from this submodule is..,3: The master reload signal from submodule0 is used..,4: The local sync signal from this submodule is..,5: The master sync signal from submodule0 is used..,6: The external force signal EXT_FORCE from outside..,7: The external sync signal EXT_SYNC from outside.."
bitfld.word 0x2 2. "RELOAD_SEL,Reload Source Select" "0: The local RELOAD signal is used to reload..,1: The master RELOAD signal (from submodule 0) is.."
newline
bitfld.word 0x2 0.--1. "CLK_SEL,Clock Source Select" "0: The IPBus clock is used as the clock for the..,1: EXT_CLK is used as the clock for the local..,2: Submodule 0's clock (AUX_CLK) is used as the..,?"
line.word 0x4 "SM0CTRL,Control Register"
hexmask.word.byte 0x4 12.--15. 1. "LDFQ,Load Frequency"
bitfld.word 0x4 11. "HALF,Half Cycle Reload" "0: Half-cycle reloads disabled.,1: Half-cycle reloads enabled."
newline
bitfld.word 0x4 10. "FULL,Full Cycle Reload" "0: Full-cycle reloads disabled.,1: Full-cycle reloads enabled."
rbitfld.word 0x4 8.--9. "DT,Deadtime" "0,1,2,3"
newline
bitfld.word 0x4 7. "COMPMODE,Compare Mode" "0: The VAL* registers and the PWM counter are..,1: The VAL* registers and the PWM counter are.."
bitfld.word 0x4 4.--6. "PRSC,Prescaler" "0: Prescaler 1,1: Prescaler 2,2: Prescaler 4,3: Prescaler 8,4: Prescaler 16,5: Prescaler 32,6: Prescaler 64,7: Prescaler 128"
newline
bitfld.word 0x4 3. "SPLIT,Split the DBLPWM signal to PWM_A and PWM_B" "0: DBLPWM is not split. PWM_A and PWM_B each have..,1: DBLPWM is split to PWM_A and PWM_B."
bitfld.word 0x4 2. "LDMOD,Load Mode Select" "0: Buffered registers of this submodule are loaded..,1: Buffered registers of this submodule are loaded.."
newline
bitfld.word 0x4 1. "DBLX,PWM_X Double Switching Enable" "0: PWM_X double pulse disabled.,1: PWM_X double pulse enabled."
bitfld.word 0x4 0. "DBLEN,Double Switching Enable" "0: Double switching disabled.,1: Double switching enabled."
group.word 0xA++0x1
line.word 0x0 "SM0VAL0,Value Register 0"
hexmask.word 0x0 0.--15. 1. "VAL0,Value 0"
group.word 0xE++0x1
line.word 0x0 "SM0VAL1,Value Register 1"
hexmask.word 0x0 0.--15. 1. "VAL1,Value 1"
group.word 0x12++0x1
line.word 0x0 "SM0VAL2,Value Register 2"
hexmask.word 0x0 0.--15. 1. "VAL2,Value 2"
group.word 0x16++0x1
line.word 0x0 "SM0VAL3,Value Register 3"
hexmask.word 0x0 0.--15. 1. "VAL3,Value 3"
group.word 0x1A++0x1
line.word 0x0 "SM0VAL4,Value Register 4"
hexmask.word 0x0 0.--15. 1. "VAL4,Value 4"
group.word 0x1E++0x1
line.word 0x0 "SM0VAL5,Value Register 5"
hexmask.word 0x0 0.--15. 1. "VAL5,Value 5"
group.word 0x22++0xB
line.word 0x0 "SM0OCTRL,Output Control Register"
rbitfld.word 0x0 15. "PWMA_IN,PWM_A Input" "0,1"
rbitfld.word 0x0 14. "PWMB_IN,PWM_B Input" "0,1"
newline
rbitfld.word 0x0 13. "PWMX_IN,PWM_X Input" "0,1"
bitfld.word 0x0 10. "POLA,PWM_A Output Polarity" "0: PWM_A output not inverted. A high level on the..,1: PWM_A output inverted. A low level on the PWM_A.."
newline
bitfld.word 0x0 9. "POLB,PWM_B Output Polarity" "0: PWM_B output not inverted. A high level on the..,1: PWM_B output inverted. A low level on the PWM_B.."
bitfld.word 0x0 8. "POLX,PWM_X Output Polarity" "0: PWM_X output not inverted. A high level on the..,1: PWM_X output inverted. A low level on the PWM_X.."
newline
bitfld.word 0x0 4.--5. "PWMAFS,PWM_A Fault State" "0: Output is forced to logic 0 state prior to..,1: Output is forced to logic 1 state prior to..,2: Output is put in a high-impedance state.,3: Output is put in a high-impedance state."
bitfld.word 0x0 2.--3. "PWMBFS,PWM_B Fault State" "0: Output is forced to logic 0 state prior to..,1: Output is forced to logic 1 state prior to..,2: Output is put in a high-impedance state.,3: Output is put in a high-impedance state."
newline
bitfld.word 0x0 0.--1. "PWMXFS,PWM_X Fault State" "0: Output is forced to logic 0 state prior to..,1: Output is forced to logic 1 state prior to..,2: Output is put in a high-impedance state.,3: Output is put in a high-impedance state."
line.word 0x2 "SM0STS,Status Register"
rbitfld.word 0x2 14. "RUF,Registers Updated Flag" "0: No register update has occurred since last reload.,1: At least one of the double buffered registers.."
eventfld.word 0x2 13. "REF,Reload Error Flag" "0: No reload error occurred.,1: Reload signal occurred with non-coherent data.."
newline
eventfld.word 0x2 12. "RF,Reload Flag" "0: No new reload cycle since last STS[RF] clearing,1: New reload cycle since last STS[RF] clearing"
eventfld.word 0x2 7. "CFX1,Capture Flag X1" "0,1"
newline
eventfld.word 0x2 6. "CFX0,Capture Flag X0" "0,1"
hexmask.word.byte 0x2 0.--5. 1. "CMPF,Compare Flags"
line.word 0x4 "SM0INTEN,Interrupt Enable Register"
bitfld.word 0x4 13. "REIE,Reload Error Interrupt Enable" "0: STS[REF] CPU interrupt requests disabled,1: STS[REF] CPU interrupt requests enabled"
bitfld.word 0x4 12. "RIE,Reload Interrupt Enable" "0: STS[RF] CPU interrupt requests disabled,1: STS[RF] CPU interrupt requests enabled"
newline
bitfld.word 0x4 7. "CX1IE,Capture X 1 Interrupt Enable" "0: Interrupt request disabled for STS[CFX1].,1: Interrupt request enabled for STS[CFX1]."
bitfld.word 0x4 6. "CX0IE,Capture X 0 Interrupt Enable" "0: Interrupt request disabled for STS[CFX0].,1: Interrupt request enabled for STS[CFX0]."
newline
hexmask.word.byte 0x4 0.--5. 1. "CMPIE,Compare Interrupt Enables"
line.word 0x6 "SM0DMAEN,DMA Enable Register"
bitfld.word 0x6 9. "VALDE,Value Registers DMA Enable" "0: DMA write requests disabled,1: Enabled"
bitfld.word 0x6 8. "FAND,FIFO Watermark AND Control" "0: Selected FIFO watermarks are OR'ed together.,1: Selected FIFO watermarks are AND'ed together."
newline
bitfld.word 0x6 6.--7. "CAPTDE,Capture DMA Enable Source Select" "0: Read DMA requests disabled.,1: Exceeding a FIFO watermark sets the DMA read..,2: A local synchronization (VAL1 matches counter)..,3: A local reload (STS[RF] being set) sets the read.."
bitfld.word 0x6 1. "CX1DE,Capture X1 FIFO DMA Enable" "0,1"
newline
bitfld.word 0x6 0. "CX0DE,Capture X0 FIFO DMA Enable" "0,1"
line.word 0x8 "SM0TCTRL,Output Trigger Control Register"
bitfld.word 0x8 15. "PWAOT0,Mux Output Trigger 0 Source Select" "0: Route the PWM_OUT_TRIG0 signal to PWM_MUX_TRIG0..,1: Route the PWM_A output to the PWM_MUX_TRIG0 port."
bitfld.word 0x8 14. "PWBOT1,Mux Output Trigger 1 Source Select" "0: Route the PWM_OUT_TRIG1 signal to PWM_MUX_TRIG1..,1: Route the PWM_B output to the PWM_MUX_TRIG1 port."
newline
bitfld.word 0x8 12. "TRGFRQ,Trigger Frequency" "0: Trigger outputs are generated during every PWM..,1: Trigger outputs are generated only during the.."
hexmask.word.byte 0x8 0.--5. 1. "OUT_TRIG_EN,Output Trigger Enables"
line.word 0xA "SM0DISMAP0,Fault Disable Mapping Register 0"
hexmask.word.byte 0xA 8.--11. 1. "DIS0X,PWM_X Fault Disable Mask 0"
hexmask.word.byte 0xA 4.--7. 1. "DIS0B,PWM_B Fault Disable Mask 0"
newline
hexmask.word.byte 0xA 0.--3. 1. "DIS0A,PWM_A Fault Disable Mask 0"
group.word 0x30++0x3
line.word 0x0 "SM0DTCNT0,Deadtime Count Register 0"
hexmask.word 0x0 0.--10. 1. "DTCNT0,Deadtime Count Register 0"
line.word 0x2 "SM0DTCNT1,Deadtime Count Register 1"
hexmask.word 0x2 0.--10. 1. "DTCNT1,Deadtime Count Register 1"
group.word 0x3C++0x3
line.word 0x0 "SM0CAPTCTRLX,Capture Control X Register"
rbitfld.word 0x0 13.--15. "CX1CNT,Capture X1 FIFO Word Count" "0,1,2,3,4,5,6,7"
rbitfld.word 0x0 10.--12. "CX0CNT,Capture X0 FIFO Word Count" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x0 8.--9. "CFXWM,Capture X FIFOs Water Mark" "0,1,2,3"
bitfld.word 0x0 7. "EDGCNTX_EN,Edge Counter X Enable" "0: Edge counter disabled and held in reset,1: Edge counter enabled"
newline
bitfld.word 0x0 6. "INP_SELX,Input Select X" "0: Raw PWM_X input signal selected as source.,1: Edge Counter"
bitfld.word 0x0 4.--5. "EDGX1,Edge X 1" "0: Disabled,1: Capture falling edges,2: Capture rising edges,3: Capture any edge"
newline
bitfld.word 0x0 2.--3. "EDGX0,Edge X 0" "0: Disabled,1: Capture falling edges,2: Capture rising edges,3: Capture any edge"
bitfld.word 0x0 1. "ONESHOTX,One Shot Mode Aux" "0: Free Running,1: One Shot"
newline
bitfld.word 0x0 0. "ARMX,Arm X" "0: Input capture operation is disabled.,1: Input capture operation as specified by.."
line.word 0x2 "SM0CAPTCOMPX,Capture Compare X Register"
hexmask.word.byte 0x2 8.--15. 1. "EDGCNTX,Edge Counter X"
hexmask.word.byte 0x2 0.--7. 1. "EDGCMPX,Edge Compare X"
rgroup.word 0x40++0x7
line.word 0x0 "SM0CVAL0,Capture Value 0 Register"
hexmask.word 0x0 0.--15. 1. "CAPTVAL0,Capture Value 0"
line.word 0x2 "SM0CVAL0CYC,Capture Value 0 Cycle Register"
hexmask.word.byte 0x2 0.--3. 1. "CVAL0CYC,Capture Value 0 Cycle"
line.word 0x4 "SM0CVAL1,Capture Value 1 Register"
hexmask.word 0x4 0.--15. 1. "CAPTVAL1,Capture Value 1"
line.word 0x6 "SM0CVAL1CYC,Capture Value 1 Cycle Register"
hexmask.word.byte 0x6 0.--3. 1. "CVAL1CYC,Capture Value 1 Cycle"
group.word 0x5E++0x1
line.word 0x0 "SM0CAPTFILTX,Capture PWM_X Input Filter Register"
bitfld.word 0x0 8.--10. "CAPTX_FILT_CNT,Input Capture Filter Count" "0,1,2,3,4,5,6,7"
hexmask.word.byte 0x0 0.--7. 1. "CAPTX_FILT_PER,Input Capture Filter Period"
rgroup.word 0x60++0x1
line.word 0x0 "SM1CNT,Counter Register"
hexmask.word 0x0 0.--15. 1. "CNT,Counter Register Bits"
group.word 0x62++0x5
line.word 0x0 "SM1INIT,Initial Count Register"
hexmask.word 0x0 0.--15. 1. "INIT,Initial Count Register Bits"
line.word 0x2 "SM1CTRL2,Control 2 Register"
bitfld.word 0x2 15. "DBGEN,Debug Enable" "0,1"
bitfld.word 0x2 13. "INDEP,Independent or Complementary Pair Operation" "0: PWM_A and PWM_B form a complementary PWM pair.,1: PWM_A and PWM_B outputs are independent PWMs."
newline
bitfld.word 0x2 12. "PWM23_INIT,PWM23 Initial Value" "0,1"
bitfld.word 0x2 11. "PWM45_INIT,PWM45 Initial Value" "0,1"
newline
bitfld.word 0x2 10. "PWMX_INIT,PWM_X Initial Value" "0,1"
bitfld.word 0x2 8.--9. "INIT_SEL,Initialization Control Select" "0: Local sync (PWM_X) causes initialization.,1: Master reload from submodule 0 causes..,2: Master sync from submodule 0 causes..,3: EXT_SYNC causes initialization."
newline
bitfld.word 0x2 7. "FRCEN,Force Enable" "0: Initialization from a FORCE_OUT is disabled.,1: Initialization from a FORCE_OUT is enabled."
bitfld.word 0x2 6. "FORCE,Force Initialization" "0,1"
newline
bitfld.word 0x2 3.--5. "FORCE_SEL,Force Select" "0: The local force signal CTRL2[FORCE] from this..,1: The master force signal from submodule 0 is used..,2: The local reload signal from this submodule is..,3: The master reload signal from submodule0 is used..,4: The local sync signal from this submodule is..,5: The master sync signal from submodule0 is used..,6: The external force signal EXT_FORCE from outside..,7: The external sync signal EXT_SYNC from outside.."
bitfld.word 0x2 2. "RELOAD_SEL,Reload Source Select" "0: The local RELOAD signal is used to reload..,1: The master RELOAD signal (from submodule 0) is.."
newline
bitfld.word 0x2 0.--1. "CLK_SEL,Clock Source Select" "0: The IPBus clock is used as the clock for the..,1: EXT_CLK is used as the clock for the local..,2: Submodule 0's clock (AUX_CLK) is used as the..,?"
line.word 0x4 "SM1CTRL,Control Register"
hexmask.word.byte 0x4 12.--15. 1. "LDFQ,Load Frequency"
bitfld.word 0x4 11. "HALF,Half Cycle Reload" "0: Half-cycle reloads disabled.,1: Half-cycle reloads enabled."
newline
bitfld.word 0x4 10. "FULL,Full Cycle Reload" "0: Full-cycle reloads disabled.,1: Full-cycle reloads enabled."
rbitfld.word 0x4 8.--9. "DT,Deadtime" "0,1,2,3"
newline
bitfld.word 0x4 7. "COMPMODE,Compare Mode" "0: The VAL* registers and the PWM counter are..,1: The VAL* registers and the PWM counter are.."
bitfld.word 0x4 4.--6. "PRSC,Prescaler" "0: Prescaler 1,1: Prescaler 2,2: Prescaler 4,3: Prescaler 8,4: Prescaler 16,5: Prescaler 32,6: Prescaler 64,7: Prescaler 128"
newline
bitfld.word 0x4 3. "SPLIT,Split the DBLPWM signal to PWM_A and PWM_B" "0: DBLPWM is not split. PWM_A and PWM_B each have..,1: DBLPWM is split to PWM_A and PWM_B."
bitfld.word 0x4 2. "LDMOD,Load Mode Select" "0: Buffered registers of this submodule are loaded..,1: Buffered registers of this submodule are loaded.."
newline
bitfld.word 0x4 1. "DBLX,PWM_X Double Switching Enable" "0: PWM_X double pulse disabled.,1: PWM_X double pulse enabled."
bitfld.word 0x4 0. "DBLEN,Double Switching Enable" "0: Double switching disabled.,1: Double switching enabled."
group.word 0x6A++0x1
line.word 0x0 "SM1VAL0,Value Register 0"
hexmask.word 0x0 0.--15. 1. "VAL0,Value 0"
group.word 0x6E++0x1
line.word 0x0 "SM1VAL1,Value Register 1"
hexmask.word 0x0 0.--15. 1. "VAL1,Value 1"
group.word 0x72++0x1
line.word 0x0 "SM1VAL2,Value Register 2"
hexmask.word 0x0 0.--15. 1. "VAL2,Value 2"
group.word 0x76++0x1
line.word 0x0 "SM1VAL3,Value Register 3"
hexmask.word 0x0 0.--15. 1. "VAL3,Value 3"
group.word 0x7A++0x1
line.word 0x0 "SM1VAL4,Value Register 4"
hexmask.word 0x0 0.--15. 1. "VAL4,Value 4"
group.word 0x7E++0x1
line.word 0x0 "SM1VAL5,Value Register 5"
hexmask.word 0x0 0.--15. 1. "VAL5,Value 5"
group.word 0x82++0xB
line.word 0x0 "SM1OCTRL,Output Control Register"
rbitfld.word 0x0 15. "PWMA_IN,PWM_A Input" "0,1"
rbitfld.word 0x0 14. "PWMB_IN,PWM_B Input" "0,1"
newline
rbitfld.word 0x0 13. "PWMX_IN,PWM_X Input" "0,1"
bitfld.word 0x0 10. "POLA,PWM_A Output Polarity" "0: PWM_A output not inverted. A high level on the..,1: PWM_A output inverted. A low level on the PWM_A.."
newline
bitfld.word 0x0 9. "POLB,PWM_B Output Polarity" "0: PWM_B output not inverted. A high level on the..,1: PWM_B output inverted. A low level on the PWM_B.."
bitfld.word 0x0 8. "POLX,PWM_X Output Polarity" "0: PWM_X output not inverted. A high level on the..,1: PWM_X output inverted. A low level on the PWM_X.."
newline
bitfld.word 0x0 4.--5. "PWMAFS,PWM_A Fault State" "0: Output is forced to logic 0 state prior to..,1: Output is forced to logic 1 state prior to..,2: Output is put in a high-impedance state.,3: Output is put in a high-impedance state."
bitfld.word 0x0 2.--3. "PWMBFS,PWM_B Fault State" "0: Output is forced to logic 0 state prior to..,1: Output is forced to logic 1 state prior to..,2: Output is put in a high-impedance state.,3: Output is put in a high-impedance state."
newline
bitfld.word 0x0 0.--1. "PWMXFS,PWM_X Fault State" "0: Output is forced to logic 0 state prior to..,1: Output is forced to logic 1 state prior to..,2: Output is put in a high-impedance state.,3: Output is put in a high-impedance state."
line.word 0x2 "SM1STS,Status Register"
rbitfld.word 0x2 14. "RUF,Registers Updated Flag" "0: No register update has occurred since last reload.,1: At least one of the double buffered registers.."
eventfld.word 0x2 13. "REF,Reload Error Flag" "0: No reload error occurred.,1: Reload signal occurred with non-coherent data.."
newline
eventfld.word 0x2 12. "RF,Reload Flag" "0: No new reload cycle since last STS[RF] clearing,1: New reload cycle since last STS[RF] clearing"
eventfld.word 0x2 7. "CFX1,Capture Flag X1" "0,1"
newline
eventfld.word 0x2 6. "CFX0,Capture Flag X0" "0,1"
hexmask.word.byte 0x2 0.--5. 1. "CMPF,Compare Flags"
line.word 0x4 "SM1INTEN,Interrupt Enable Register"
bitfld.word 0x4 13. "REIE,Reload Error Interrupt Enable" "0: STS[REF] CPU interrupt requests disabled,1: STS[REF] CPU interrupt requests enabled"
bitfld.word 0x4 12. "RIE,Reload Interrupt Enable" "0: STS[RF] CPU interrupt requests disabled,1: STS[RF] CPU interrupt requests enabled"
newline
bitfld.word 0x4 7. "CX1IE,Capture X 1 Interrupt Enable" "0: Interrupt request disabled for STS[CFX1].,1: Interrupt request enabled for STS[CFX1]."
bitfld.word 0x4 6. "CX0IE,Capture X 0 Interrupt Enable" "0: Interrupt request disabled for STS[CFX0].,1: Interrupt request enabled for STS[CFX0]."
newline
hexmask.word.byte 0x4 0.--5. 1. "CMPIE,Compare Interrupt Enables"
line.word 0x6 "SM1DMAEN,DMA Enable Register"
bitfld.word 0x6 9. "VALDE,Value Registers DMA Enable" "0: DMA write requests disabled,1: Enabled"
bitfld.word 0x6 8. "FAND,FIFO Watermark AND Control" "0: Selected FIFO watermarks are OR'ed together.,1: Selected FIFO watermarks are AND'ed together."
newline
bitfld.word 0x6 6.--7. "CAPTDE,Capture DMA Enable Source Select" "0: Read DMA requests disabled.,1: Exceeding a FIFO watermark sets the DMA read..,2: A local synchronization (VAL1 matches counter)..,3: A local reload (STS[RF] being set) sets the read.."
bitfld.word 0x6 1. "CX1DE,Capture X1 FIFO DMA Enable" "0,1"
newline
bitfld.word 0x6 0. "CX0DE,Capture X0 FIFO DMA Enable" "0,1"
line.word 0x8 "SM1TCTRL,Output Trigger Control Register"
bitfld.word 0x8 15. "PWAOT0,Mux Output Trigger 0 Source Select" "0: Route the PWM_OUT_TRIG0 signal to PWM_MUX_TRIG0..,1: Route the PWM_A output to the PWM_MUX_TRIG0 port."
bitfld.word 0x8 14. "PWBOT1,Mux Output Trigger 1 Source Select" "0: Route the PWM_OUT_TRIG1 signal to PWM_MUX_TRIG1..,1: Route the PWM_B output to the PWM_MUX_TRIG1 port."
newline
bitfld.word 0x8 12. "TRGFRQ,Trigger Frequency" "0: Trigger outputs are generated during every PWM..,1: Trigger outputs are generated only during the.."
hexmask.word.byte 0x8 0.--5. 1. "OUT_TRIG_EN,Output Trigger Enables"
line.word 0xA "SM1DISMAP0,Fault Disable Mapping Register 0"
hexmask.word.byte 0xA 8.--11. 1. "DIS0X,PWM_X Fault Disable Mask 0"
hexmask.word.byte 0xA 4.--7. 1. "DIS0B,PWM_B Fault Disable Mask 0"
newline
hexmask.word.byte 0xA 0.--3. 1. "DIS0A,PWM_A Fault Disable Mask 0"
group.word 0x90++0x3
line.word 0x0 "SM1DTCNT0,Deadtime Count Register 0"
hexmask.word 0x0 0.--10. 1. "DTCNT0,Deadtime Count Register 0"
line.word 0x2 "SM1DTCNT1,Deadtime Count Register 1"
hexmask.word 0x2 0.--10. 1. "DTCNT1,Deadtime Count Register 1"
group.word 0x9C++0x3
line.word 0x0 "SM1CAPTCTRLX,Capture Control X Register"
rbitfld.word 0x0 13.--15. "CX1CNT,Capture X1 FIFO Word Count" "0,1,2,3,4,5,6,7"
rbitfld.word 0x0 10.--12. "CX0CNT,Capture X0 FIFO Word Count" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x0 8.--9. "CFXWM,Capture X FIFOs Water Mark" "0,1,2,3"
bitfld.word 0x0 7. "EDGCNTX_EN,Edge Counter X Enable" "0: Edge counter disabled and held in reset,1: Edge counter enabled"
newline
bitfld.word 0x0 6. "INP_SELX,Input Select X" "0: Raw PWM_X input signal selected as source.,1: Edge Counter"
bitfld.word 0x0 4.--5. "EDGX1,Edge X 1" "0: Disabled,1: Capture falling edges,2: Capture rising edges,3: Capture any edge"
newline
bitfld.word 0x0 2.--3. "EDGX0,Edge X 0" "0: Disabled,1: Capture falling edges,2: Capture rising edges,3: Capture any edge"
bitfld.word 0x0 1. "ONESHOTX,One Shot Mode Aux" "0: Free Running,1: One Shot"
newline
bitfld.word 0x0 0. "ARMX,Arm X" "0: Input capture operation is disabled.,1: Input capture operation as specified by.."
line.word 0x2 "SM1CAPTCOMPX,Capture Compare X Register"
hexmask.word.byte 0x2 8.--15. 1. "EDGCNTX,Edge Counter X"
hexmask.word.byte 0x2 0.--7. 1. "EDGCMPX,Edge Compare X"
rgroup.word 0xA0++0x7
line.word 0x0 "SM1CVAL0,Capture Value 0 Register"
hexmask.word 0x0 0.--15. 1. "CAPTVAL0,Capture Value 0"
line.word 0x2 "SM1CVAL0CYC,Capture Value 0 Cycle Register"
hexmask.word.byte 0x2 0.--3. 1. "CVAL0CYC,Capture Value 0 Cycle"
line.word 0x4 "SM1CVAL1,Capture Value 1 Register"
hexmask.word 0x4 0.--15. 1. "CAPTVAL1,Capture Value 1"
line.word 0x6 "SM1CVAL1CYC,Capture Value 1 Cycle Register"
hexmask.word.byte 0x6 0.--3. 1. "CVAL1CYC,Capture Value 1 Cycle"
group.word 0xB8++0x1
line.word 0x0 "SM1PHASEDLY,Phase Delay Register"
hexmask.word 0x0 0.--15. 1. "PHASEDLY,Initial Count Register Bits"
group.word 0xBE++0x1
line.word 0x0 "SM1CAPTFILTX,Capture PWM_X Input Filter Register"
bitfld.word 0x0 8.--10. "CAPTX_FILT_CNT,Input Capture Filter Count" "0,1,2,3,4,5,6,7"
hexmask.word.byte 0x0 0.--7. 1. "CAPTX_FILT_PER,Input Capture Filter Period"
rgroup.word 0xC0++0x1
line.word 0x0 "SM2CNT,Counter Register"
hexmask.word 0x0 0.--15. 1. "CNT,Counter Register Bits"
group.word 0xC2++0x5
line.word 0x0 "SM2INIT,Initial Count Register"
hexmask.word 0x0 0.--15. 1. "INIT,Initial Count Register Bits"
line.word 0x2 "SM2CTRL2,Control 2 Register"
bitfld.word 0x2 15. "DBGEN,Debug Enable" "0,1"
bitfld.word 0x2 13. "INDEP,Independent or Complementary Pair Operation" "0: PWM_A and PWM_B form a complementary PWM pair.,1: PWM_A and PWM_B outputs are independent PWMs."
newline
bitfld.word 0x2 12. "PWM23_INIT,PWM23 Initial Value" "0,1"
bitfld.word 0x2 11. "PWM45_INIT,PWM45 Initial Value" "0,1"
newline
bitfld.word 0x2 10. "PWMX_INIT,PWM_X Initial Value" "0,1"
bitfld.word 0x2 8.--9. "INIT_SEL,Initialization Control Select" "0: Local sync (PWM_X) causes initialization.,1: Master reload from submodule 0 causes..,2: Master sync from submodule 0 causes..,3: EXT_SYNC causes initialization."
newline
bitfld.word 0x2 7. "FRCEN,Force Enable" "0: Initialization from a FORCE_OUT is disabled.,1: Initialization from a FORCE_OUT is enabled."
bitfld.word 0x2 6. "FORCE,Force Initialization" "0,1"
newline
bitfld.word 0x2 3.--5. "FORCE_SEL,Force Select" "0: The local force signal CTRL2[FORCE] from this..,1: The master force signal from submodule 0 is used..,2: The local reload signal from this submodule is..,3: The master reload signal from submodule0 is used..,4: The local sync signal from this submodule is..,5: The master sync signal from submodule0 is used..,6: The external force signal EXT_FORCE from outside..,7: The external sync signal EXT_SYNC from outside.."
bitfld.word 0x2 2. "RELOAD_SEL,Reload Source Select" "0: The local RELOAD signal is used to reload..,1: The master RELOAD signal (from submodule 0) is.."
newline
bitfld.word 0x2 0.--1. "CLK_SEL,Clock Source Select" "0: The IPBus clock is used as the clock for the..,1: EXT_CLK is used as the clock for the local..,2: Submodule 0's clock (AUX_CLK) is used as the..,?"
line.word 0x4 "SM2CTRL,Control Register"
hexmask.word.byte 0x4 12.--15. 1. "LDFQ,Load Frequency"
bitfld.word 0x4 11. "HALF,Half Cycle Reload" "0: Half-cycle reloads disabled.,1: Half-cycle reloads enabled."
newline
bitfld.word 0x4 10. "FULL,Full Cycle Reload" "0: Full-cycle reloads disabled.,1: Full-cycle reloads enabled."
rbitfld.word 0x4 8.--9. "DT,Deadtime" "0,1,2,3"
newline
bitfld.word 0x4 7. "COMPMODE,Compare Mode" "0: The VAL* registers and the PWM counter are..,1: The VAL* registers and the PWM counter are.."
bitfld.word 0x4 4.--6. "PRSC,Prescaler" "0: Prescaler 1,1: Prescaler 2,2: Prescaler 4,3: Prescaler 8,4: Prescaler 16,5: Prescaler 32,6: Prescaler 64,7: Prescaler 128"
newline
bitfld.word 0x4 3. "SPLIT,Split the DBLPWM signal to PWM_A and PWM_B" "0: DBLPWM is not split. PWM_A and PWM_B each have..,1: DBLPWM is split to PWM_A and PWM_B."
bitfld.word 0x4 2. "LDMOD,Load Mode Select" "0: Buffered registers of this submodule are loaded..,1: Buffered registers of this submodule are loaded.."
newline
bitfld.word 0x4 1. "DBLX,PWM_X Double Switching Enable" "0: PWM_X double pulse disabled.,1: PWM_X double pulse enabled."
bitfld.word 0x4 0. "DBLEN,Double Switching Enable" "0: Double switching disabled.,1: Double switching enabled."
group.word 0xCA++0x1
line.word 0x0 "SM2VAL0,Value Register 0"
hexmask.word 0x0 0.--15. 1. "VAL0,Value 0"
group.word 0xCE++0x1
line.word 0x0 "SM2VAL1,Value Register 1"
hexmask.word 0x0 0.--15. 1. "VAL1,Value 1"
group.word 0xD2++0x1
line.word 0x0 "SM2VAL2,Value Register 2"
hexmask.word 0x0 0.--15. 1. "VAL2,Value 2"
group.word 0xD6++0x1
line.word 0x0 "SM2VAL3,Value Register 3"
hexmask.word 0x0 0.--15. 1. "VAL3,Value 3"
group.word 0xDA++0x1
line.word 0x0 "SM2VAL4,Value Register 4"
hexmask.word 0x0 0.--15. 1. "VAL4,Value 4"
group.word 0xDE++0x1
line.word 0x0 "SM2VAL5,Value Register 5"
hexmask.word 0x0 0.--15. 1. "VAL5,Value 5"
group.word 0xE2++0xB
line.word 0x0 "SM2OCTRL,Output Control Register"
rbitfld.word 0x0 15. "PWMA_IN,PWM_A Input" "0,1"
rbitfld.word 0x0 14. "PWMB_IN,PWM_B Input" "0,1"
newline
rbitfld.word 0x0 13. "PWMX_IN,PWM_X Input" "0,1"
bitfld.word 0x0 10. "POLA,PWM_A Output Polarity" "0: PWM_A output not inverted. A high level on the..,1: PWM_A output inverted. A low level on the PWM_A.."
newline
bitfld.word 0x0 9. "POLB,PWM_B Output Polarity" "0: PWM_B output not inverted. A high level on the..,1: PWM_B output inverted. A low level on the PWM_B.."
bitfld.word 0x0 8. "POLX,PWM_X Output Polarity" "0: PWM_X output not inverted. A high level on the..,1: PWM_X output inverted. A low level on the PWM_X.."
newline
bitfld.word 0x0 4.--5. "PWMAFS,PWM_A Fault State" "0: Output is forced to logic 0 state prior to..,1: Output is forced to logic 1 state prior to..,2: Output is put in a high-impedance state.,3: Output is put in a high-impedance state."
bitfld.word 0x0 2.--3. "PWMBFS,PWM_B Fault State" "0: Output is forced to logic 0 state prior to..,1: Output is forced to logic 1 state prior to..,2: Output is put in a high-impedance state.,3: Output is put in a high-impedance state."
newline
bitfld.word 0x0 0.--1. "PWMXFS,PWM_X Fault State" "0: Output is forced to logic 0 state prior to..,1: Output is forced to logic 1 state prior to..,2: Output is put in a high-impedance state.,3: Output is put in a high-impedance state."
line.word 0x2 "SM2STS,Status Register"
rbitfld.word 0x2 14. "RUF,Registers Updated Flag" "0: No register update has occurred since last reload.,1: At least one of the double buffered registers.."
eventfld.word 0x2 13. "REF,Reload Error Flag" "0: No reload error occurred.,1: Reload signal occurred with non-coherent data.."
newline
eventfld.word 0x2 12. "RF,Reload Flag" "0: No new reload cycle since last STS[RF] clearing,1: New reload cycle since last STS[RF] clearing"
eventfld.word 0x2 7. "CFX1,Capture Flag X1" "0,1"
newline
eventfld.word 0x2 6. "CFX0,Capture Flag X0" "0,1"
hexmask.word.byte 0x2 0.--5. 1. "CMPF,Compare Flags"
line.word 0x4 "SM2INTEN,Interrupt Enable Register"
bitfld.word 0x4 13. "REIE,Reload Error Interrupt Enable" "0: STS[REF] CPU interrupt requests disabled,1: STS[REF] CPU interrupt requests enabled"
bitfld.word 0x4 12. "RIE,Reload Interrupt Enable" "0: STS[RF] CPU interrupt requests disabled,1: STS[RF] CPU interrupt requests enabled"
newline
bitfld.word 0x4 7. "CX1IE,Capture X 1 Interrupt Enable" "0: Interrupt request disabled for STS[CFX1].,1: Interrupt request enabled for STS[CFX1]."
bitfld.word 0x4 6. "CX0IE,Capture X 0 Interrupt Enable" "0: Interrupt request disabled for STS[CFX0].,1: Interrupt request enabled for STS[CFX0]."
newline
hexmask.word.byte 0x4 0.--5. 1. "CMPIE,Compare Interrupt Enables"
line.word 0x6 "SM2DMAEN,DMA Enable Register"
bitfld.word 0x6 9. "VALDE,Value Registers DMA Enable" "0: DMA write requests disabled,1: Enabled"
bitfld.word 0x6 8. "FAND,FIFO Watermark AND Control" "0: Selected FIFO watermarks are OR'ed together.,1: Selected FIFO watermarks are AND'ed together."
newline
bitfld.word 0x6 6.--7. "CAPTDE,Capture DMA Enable Source Select" "0: Read DMA requests disabled.,1: Exceeding a FIFO watermark sets the DMA read..,2: A local synchronization (VAL1 matches counter)..,3: A local reload (STS[RF] being set) sets the read.."
bitfld.word 0x6 1. "CX1DE,Capture X1 FIFO DMA Enable" "0,1"
newline
bitfld.word 0x6 0. "CX0DE,Capture X0 FIFO DMA Enable" "0,1"
line.word 0x8 "SM2TCTRL,Output Trigger Control Register"
bitfld.word 0x8 15. "PWAOT0,Mux Output Trigger 0 Source Select" "0: Route the PWM_OUT_TRIG0 signal to PWM_MUX_TRIG0..,1: Route the PWM_A output to the PWM_MUX_TRIG0 port."
bitfld.word 0x8 14. "PWBOT1,Mux Output Trigger 1 Source Select" "0: Route the PWM_OUT_TRIG1 signal to PWM_MUX_TRIG1..,1: Route the PWM_B output to the PWM_MUX_TRIG1 port."
newline
bitfld.word 0x8 12. "TRGFRQ,Trigger Frequency" "0: Trigger outputs are generated during every PWM..,1: Trigger outputs are generated only during the.."
hexmask.word.byte 0x8 0.--5. 1. "OUT_TRIG_EN,Output Trigger Enables"
line.word 0xA "SM2DISMAP0,Fault Disable Mapping Register 0"
hexmask.word.byte 0xA 8.--11. 1. "DIS0X,PWM_X Fault Disable Mask 0"
hexmask.word.byte 0xA 4.--7. 1. "DIS0B,PWM_B Fault Disable Mask 0"
newline
hexmask.word.byte 0xA 0.--3. 1. "DIS0A,PWM_A Fault Disable Mask 0"
group.word 0xF0++0x3
line.word 0x0 "SM2DTCNT0,Deadtime Count Register 0"
hexmask.word 0x0 0.--10. 1. "DTCNT0,Deadtime Count Register 0"
line.word 0x2 "SM2DTCNT1,Deadtime Count Register 1"
hexmask.word 0x2 0.--10. 1. "DTCNT1,Deadtime Count Register 1"
group.word 0xFC++0x3
line.word 0x0 "SM2CAPTCTRLX,Capture Control X Register"
rbitfld.word 0x0 13.--15. "CX1CNT,Capture X1 FIFO Word Count" "0,1,2,3,4,5,6,7"
rbitfld.word 0x0 10.--12. "CX0CNT,Capture X0 FIFO Word Count" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x0 8.--9. "CFXWM,Capture X FIFOs Water Mark" "0,1,2,3"
bitfld.word 0x0 7. "EDGCNTX_EN,Edge Counter X Enable" "0: Edge counter disabled and held in reset,1: Edge counter enabled"
newline
bitfld.word 0x0 6. "INP_SELX,Input Select X" "0: Raw PWM_X input signal selected as source.,1: Edge Counter"
bitfld.word 0x0 4.--5. "EDGX1,Edge X 1" "0: Disabled,1: Capture falling edges,2: Capture rising edges,3: Capture any edge"
newline
bitfld.word 0x0 2.--3. "EDGX0,Edge X 0" "0: Disabled,1: Capture falling edges,2: Capture rising edges,3: Capture any edge"
bitfld.word 0x0 1. "ONESHOTX,One Shot Mode Aux" "0: Free Running,1: One Shot"
newline
bitfld.word 0x0 0. "ARMX,Arm X" "0: Input capture operation is disabled.,1: Input capture operation as specified by.."
line.word 0x2 "SM2CAPTCOMPX,Capture Compare X Register"
hexmask.word.byte 0x2 8.--15. 1. "EDGCNTX,Edge Counter X"
hexmask.word.byte 0x2 0.--7. 1. "EDGCMPX,Edge Compare X"
rgroup.word 0x100++0x7
line.word 0x0 "SM2CVAL0,Capture Value 0 Register"
hexmask.word 0x0 0.--15. 1. "CAPTVAL0,Capture Value 0"
line.word 0x2 "SM2CVAL0CYC,Capture Value 0 Cycle Register"
hexmask.word.byte 0x2 0.--3. 1. "CVAL0CYC,Capture Value 0 Cycle"
line.word 0x4 "SM2CVAL1,Capture Value 1 Register"
hexmask.word 0x4 0.--15. 1. "CAPTVAL1,Capture Value 1"
line.word 0x6 "SM2CVAL1CYC,Capture Value 1 Cycle Register"
hexmask.word.byte 0x6 0.--3. 1. "CVAL1CYC,Capture Value 1 Cycle"
group.word 0x118++0x1
line.word 0x0 "SM2PHASEDLY,Phase Delay Register"
hexmask.word 0x0 0.--15. 1. "PHASEDLY,Initial Count Register Bits"
group.word 0x11E++0x1
line.word 0x0 "SM2CAPTFILTX,Capture PWM_X Input Filter Register"
bitfld.word 0x0 8.--10. "CAPTX_FILT_CNT,Input Capture Filter Count" "0,1,2,3,4,5,6,7"
hexmask.word.byte 0x0 0.--7. 1. "CAPTX_FILT_PER,Input Capture Filter Period"
group.word 0x180++0x15
line.word 0x0 "OUTEN,Output Enable Register"
bitfld.word 0x0 8.--10. "PWMA_EN,PWM_A Output Enables" "0,1,2,3,4,5,6,7"
bitfld.word 0x0 4.--6. "PWMB_EN,PWM_B Output Enables" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x0 0.--2. "PWMX_EN,PWM_X Output Enables" "0,1,2,3,4,5,6,7"
line.word 0x2 "MASK,Mask Register"
bitfld.word 0x2 12.--14. "UPDATE_MASK,Update Mask Bits Immediately" "0,1,2,3,4,5,6,7"
bitfld.word 0x2 8.--10. "MASKA,PWM_A Masks" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x2 4.--6. "MASKB,PWM_B Masks" "0,1,2,3,4,5,6,7"
bitfld.word 0x2 0.--2. "MASKX,PWM_X Masks" "0,1,2,3,4,5,6,7"
line.word 0x4 "SWCOUT,Software Controlled Output Register"
bitfld.word 0x4 5. "SM2OUT23,Submodule 2 Software Controlled Output 23" "0: A logic 0 is supplied to the deadtime generator..,1: A logic 1 is supplied to the deadtime generator.."
bitfld.word 0x4 4. "SM2OUT45,Submodule 2 Software Controlled Output 45" "0: A logic 0 is supplied to the deadtime generator..,1: A logic 1 is supplied to the deadtime generator.."
newline
bitfld.word 0x4 3. "SM1OUT23,Submodule 1 Software Controlled Output 23" "0: A logic 0 is supplied to the deadtime generator..,1: A logic 1 is supplied to the deadtime generator.."
bitfld.word 0x4 2. "SM1OUT45,Submodule 1 Software Controlled Output 45" "0: A logic 0 is supplied to the deadtime generator..,1: A logic 1 is supplied to the deadtime generator.."
newline
bitfld.word 0x4 1. "SM0OUT23,Submodule 0 Software Controlled Output 23" "0: A logic 0 is supplied to the deadtime generator..,1: A logic 1 is supplied to the deadtime generator.."
bitfld.word 0x4 0. "SM0OUT45,Submodule 0 Software Controlled Output 45" "0: A logic 0 is supplied to the deadtime generator..,1: A logic 1 is supplied to the deadtime generator.."
line.word 0x6 "DTSRCSEL,PWM Source Select Register"
bitfld.word 0x6 10.--11. "SM2SEL23,Submodule 2 PWM23 Control Select" "0: Generated SM2PWM23 signal used by the deadtime..,1: Inverted generated SM2PWM23 signal used by the..,2: SWCOUT[SM2OUT23] used by the deadtime logic.,3: PWM2_EXTA signal used by the deadtime logic."
bitfld.word 0x6 8.--9. "SM2SEL45,Submodule 2 PWM45 Control Select" "0: Generated SM2PWM45 signal used by the deadtime..,1: Inverted generated SM2PWM45 signal used by the..,2: SWCOUT[SM2OUT45] used by the deadtime logic.,?"
newline
bitfld.word 0x6 6.--7. "SM1SEL23,Submodule 1 PWM23 Control Select" "0: Generated SM1PWM23 signal used by the deadtime..,1: Inverted generated SM1PWM23 signal used by the..,2: SWCOUT[SM1OUT23] used by the deadtime logic.,3: PWM1_EXTA signal used by the deadtime logic."
bitfld.word 0x6 4.--5. "SM1SEL45,Submodule 1 PWM45 Control Select" "0: Generated SM1PWM45 signal used by the deadtime..,1: Inverted generated SM1PWM45 signal used by the..,2: SWCOUT[SM1OUT45] used by the deadtime logic.,?"
newline
bitfld.word 0x6 2.--3. "SM0SEL23,Submodule 0 PWM23 Control Select" "0: Generated SM0PWM23 signal used by the deadtime..,1: Inverted generated SM0PWM23 signal used by the..,2: SWCOUT[SM0OUT23] used by the deadtime logic.,3: PWM0_EXTA signal used by the deadtime logic."
bitfld.word 0x6 0.--1. "SM0SEL45,Submodule 0 PWM45 Control Select" "0: Generated SM0PWM45 signal used by the deadtime..,1: Inverted generated SM0PWM45 signal used by the..,2: SWCOUT[SM0OUT45] used by the deadtime logic.,?"
line.word 0x8 "MCTRL,Master Control Register"
bitfld.word 0x8 12.--14. "IPOL,Current Polarity" "0: PWM23 is used to generate complementary PWM pair..,1: PWM45 is used to generate complementary PWM pair..,?,?,?,?,?,?"
bitfld.word 0x8 8.--10. "RUN,Run" "0: PWM counter is stopped but PWM outputs hold the..,1: PWM counter is started in the corresponding..,?,?,?,?,?,?"
newline
bitfld.word 0x8 4.--6. "CLDOK,Clear Load Okay" "0,1,2,3,4,5,6,7"
bitfld.word 0x8 0.--2. "LDOK,Load Okay" "0: Do not load new values.,1: Load prescaler modulus and PWM values of the..,?,?,?,?,?,?"
line.word 0xA "MCTRL2,Master Control 2 Register"
bitfld.word 0xA 6.--7. "STRETCH_CNT_PRSC,Stretch IPBus clock count prescaler for mux0_trig/mux1_trig/out0_trig/out1_trig/pwma_trig/pwmb_trig" "0: Stretch count is zero no stretch.,1: Stretch..,2: Stretch..,3: Stretch.."
bitfld.word 0xA 2.--3. "WRPROT,Write protect" "0: Write protection off (default).,1: Write protection on.,2: Write protection off and locked until chip reset.,3: Write protection on and locked until chip reset."
line.word 0xC "FCTRL0,Fault Control Register"
hexmask.word.byte 0xC 12.--15. 1. "FLVL,Fault Level"
hexmask.word.byte 0xC 8.--11. 1. "FAUTO,Automatic Fault Clearing"
newline
hexmask.word.byte 0xC 4.--7. 1. "FSAFE,Fault Safety Mode"
hexmask.word.byte 0xC 0.--3. 1. "FIE,Fault Interrupt Enables"
line.word 0xE "FSTS0,Fault Status Register"
hexmask.word.byte 0xE 12.--15. 1. "FHALF,Half Cycle Fault Recovery"
hexmask.word.byte 0xE 8.--11. 1. "FFPIN,Filtered Fault Pins"
newline
hexmask.word.byte 0xE 4.--7. 1. "FFULL,Full Cycle"
hexmask.word.byte 0xE 0.--3. 1. "FFLAG,Fault Flags"
line.word 0x10 "FFILT0,Fault Filter Register"
bitfld.word 0x10 15. "GSTR,Fault Glitch Stretch Enable" "0: Fault input glitch stretching is disabled.,1: Input fault signals are stretched to at least 2.."
bitfld.word 0x10 8.--10. "FILT_CNT,Fault Filter Count" "0,1,2,3,4,5,6,7"
newline
hexmask.word.byte 0x10 0.--7. 1. "FILT_PER,Fault Filter Period"
line.word 0x12 "FTST0,Fault Test Register"
bitfld.word 0x12 0. "FTEST,Fault Test" "0: No fault,1: Cause a simulated fault"
line.word 0x14 "FCTRL20,Fault Control 2 Register"
hexmask.word.byte 0x14 0.--3. 1. "NOCOMB,No Combinational Path From Fault Input To PWM Output"
tree.end
endif
sif (cpuis("MC?A155*"))
tree "FLEXPWM1"
base ad:0x400AA000
rgroup.word 0x0++0x1
line.word 0x0 "SM0CNT,Counter Register"
hexmask.word 0x0 0.--15. 1. "CNT,Counter Register Bits"
group.word 0x2++0x5
line.word 0x0 "SM0INIT,Initial Count Register"
hexmask.word 0x0 0.--15. 1. "INIT,Initial Count Register Bits"
line.word 0x2 "SM0CTRL2,Control 2 Register"
bitfld.word 0x2 15. "DBGEN,Debug Enable" "0,1"
bitfld.word 0x2 13. "INDEP,Independent or Complementary Pair Operation" "0: PWM_A and PWM_B form a complementary PWM pair.,1: PWM_A and PWM_B outputs are independent PWMs."
newline
bitfld.word 0x2 12. "PWM23_INIT,PWM23 Initial Value" "0,1"
bitfld.word 0x2 11. "PWM45_INIT,PWM45 Initial Value" "0,1"
newline
bitfld.word 0x2 10. "PWMX_INIT,PWM_X Initial Value" "0,1"
bitfld.word 0x2 8.--9. "INIT_SEL,Initialization Control Select" "0: Local sync (PWM_X) causes initialization.,1: Master reload from submodule 0 causes..,2: Master sync from submodule 0 causes..,3: EXT_SYNC causes initialization."
newline
bitfld.word 0x2 7. "FRCEN,Force Enable" "0: Initialization from a FORCE_OUT is disabled.,1: Initialization from a FORCE_OUT is enabled."
bitfld.word 0x2 6. "FORCE,Force Initialization" "0,1"
newline
bitfld.word 0x2 3.--5. "FORCE_SEL,Force Select" "0: The local force signal CTRL2[FORCE] from this..,1: The master force signal from submodule 0 is used..,2: The local reload signal from this submodule is..,3: The master reload signal from submodule0 is used..,4: The local sync signal from this submodule is..,5: The master sync signal from submodule0 is used..,6: The external force signal EXT_FORCE from outside..,7: The external sync signal EXT_SYNC from outside.."
bitfld.word 0x2 2. "RELOAD_SEL,Reload Source Select" "0: The local RELOAD signal is used to reload..,1: The master RELOAD signal (from submodule 0) is.."
newline
bitfld.word 0x2 0.--1. "CLK_SEL,Clock Source Select" "0: The IPBus clock is used as the clock for the..,1: EXT_CLK is used as the clock for the local..,2: Submodule 0's clock (AUX_CLK) is used as the..,?"
line.word 0x4 "SM0CTRL,Control Register"
hexmask.word.byte 0x4 12.--15. 1. "LDFQ,Load Frequency"
bitfld.word 0x4 11. "HALF,Half Cycle Reload" "0: Half-cycle reloads disabled.,1: Half-cycle reloads enabled."
newline
bitfld.word 0x4 10. "FULL,Full Cycle Reload" "0: Full-cycle reloads disabled.,1: Full-cycle reloads enabled."
rbitfld.word 0x4 8.--9. "DT,Deadtime" "0,1,2,3"
newline
bitfld.word 0x4 7. "COMPMODE,Compare Mode" "0: The VAL* registers and the PWM counter are..,1: The VAL* registers and the PWM counter are.."
bitfld.word 0x4 4.--6. "PRSC,Prescaler" "0: Prescaler 1,1: Prescaler 2,2: Prescaler 4,3: Prescaler 8,4: Prescaler 16,5: Prescaler 32,6: Prescaler 64,7: Prescaler 128"
newline
bitfld.word 0x4 3. "SPLIT,Split the DBLPWM signal to PWM_A and PWM_B" "0: DBLPWM is not split. PWM_A and PWM_B each have..,1: DBLPWM is split to PWM_A and PWM_B."
bitfld.word 0x4 2. "LDMOD,Load Mode Select" "0: Buffered registers of this submodule are loaded..,1: Buffered registers of this submodule are loaded.."
newline
bitfld.word 0x4 1. "DBLX,PWM_X Double Switching Enable" "0: PWM_X double pulse disabled.,1: PWM_X double pulse enabled."
bitfld.word 0x4 0. "DBLEN,Double Switching Enable" "0: Double switching disabled.,1: Double switching enabled."
group.word 0xA++0x1
line.word 0x0 "SM0VAL0,Value Register 0"
hexmask.word 0x0 0.--15. 1. "VAL0,Value 0"
group.word 0xE++0x1
line.word 0x0 "SM0VAL1,Value Register 1"
hexmask.word 0x0 0.--15. 1. "VAL1,Value 1"
group.word 0x12++0x1
line.word 0x0 "SM0VAL2,Value Register 2"
hexmask.word 0x0 0.--15. 1. "VAL2,Value 2"
group.word 0x16++0x1
line.word 0x0 "SM0VAL3,Value Register 3"
hexmask.word 0x0 0.--15. 1. "VAL3,Value 3"
group.word 0x1A++0x1
line.word 0x0 "SM0VAL4,Value Register 4"
hexmask.word 0x0 0.--15. 1. "VAL4,Value 4"
group.word 0x1E++0x1
line.word 0x0 "SM0VAL5,Value Register 5"
hexmask.word 0x0 0.--15. 1. "VAL5,Value 5"
group.word 0x22++0xB
line.word 0x0 "SM0OCTRL,Output Control Register"
rbitfld.word 0x0 15. "PWMA_IN,PWM_A Input" "0,1"
rbitfld.word 0x0 14. "PWMB_IN,PWM_B Input" "0,1"
newline
rbitfld.word 0x0 13. "PWMX_IN,PWM_X Input" "0,1"
bitfld.word 0x0 10. "POLA,PWM_A Output Polarity" "0: PWM_A output not inverted. A high level on the..,1: PWM_A output inverted. A low level on the PWM_A.."
newline
bitfld.word 0x0 9. "POLB,PWM_B Output Polarity" "0: PWM_B output not inverted. A high level on the..,1: PWM_B output inverted. A low level on the PWM_B.."
bitfld.word 0x0 8. "POLX,PWM_X Output Polarity" "0: PWM_X output not inverted. A high level on the..,1: PWM_X output inverted. A low level on the PWM_X.."
newline
bitfld.word 0x0 4.--5. "PWMAFS,PWM_A Fault State" "0: Output is forced to logic 0 state prior to..,1: Output is forced to logic 1 state prior to..,2: Output is put in a high-impedance state.,3: Output is put in a high-impedance state."
bitfld.word 0x0 2.--3. "PWMBFS,PWM_B Fault State" "0: Output is forced to logic 0 state prior to..,1: Output is forced to logic 1 state prior to..,2: Output is put in a high-impedance state.,3: Output is put in a high-impedance state."
newline
bitfld.word 0x0 0.--1. "PWMXFS,PWM_X Fault State" "0: Output is forced to logic 0 state prior to..,1: Output is forced to logic 1 state prior to..,2: Output is put in a high-impedance state.,3: Output is put in a high-impedance state."
line.word 0x2 "SM0STS,Status Register"
rbitfld.word 0x2 14. "RUF,Registers Updated Flag" "0: No register update has occurred since last reload.,1: At least one of the double buffered registers.."
eventfld.word 0x2 13. "REF,Reload Error Flag" "0: No reload error occurred.,1: Reload signal occurred with non-coherent data.."
newline
eventfld.word 0x2 12. "RF,Reload Flag" "0: No new reload cycle since last STS[RF] clearing,1: New reload cycle since last STS[RF] clearing"
eventfld.word 0x2 7. "CFX1,Capture Flag X1" "0,1"
newline
eventfld.word 0x2 6. "CFX0,Capture Flag X0" "0,1"
hexmask.word.byte 0x2 0.--5. 1. "CMPF,Compare Flags"
line.word 0x4 "SM0INTEN,Interrupt Enable Register"
bitfld.word 0x4 13. "REIE,Reload Error Interrupt Enable" "0: STS[REF] CPU interrupt requests disabled,1: STS[REF] CPU interrupt requests enabled"
bitfld.word 0x4 12. "RIE,Reload Interrupt Enable" "0: STS[RF] CPU interrupt requests disabled,1: STS[RF] CPU interrupt requests enabled"
newline
bitfld.word 0x4 7. "CX1IE,Capture X 1 Interrupt Enable" "0: Interrupt request disabled for STS[CFX1].,1: Interrupt request enabled for STS[CFX1]."
bitfld.word 0x4 6. "CX0IE,Capture X 0 Interrupt Enable" "0: Interrupt request disabled for STS[CFX0].,1: Interrupt request enabled for STS[CFX0]."
newline
hexmask.word.byte 0x4 0.--5. 1. "CMPIE,Compare Interrupt Enables"
line.word 0x6 "SM0DMAEN,DMA Enable Register"
bitfld.word 0x6 9. "VALDE,Value Registers DMA Enable" "0: DMA write requests disabled,1: Enabled"
bitfld.word 0x6 8. "FAND,FIFO Watermark AND Control" "0: Selected FIFO watermarks are OR'ed together.,1: Selected FIFO watermarks are AND'ed together."
newline
bitfld.word 0x6 6.--7. "CAPTDE,Capture DMA Enable Source Select" "0: Read DMA requests disabled.,1: Exceeding a FIFO watermark sets the DMA read..,2: A local synchronization (VAL1 matches counter)..,3: A local reload (STS[RF] being set) sets the read.."
bitfld.word 0x6 1. "CX1DE,Capture X1 FIFO DMA Enable" "0,1"
newline
bitfld.word 0x6 0. "CX0DE,Capture X0 FIFO DMA Enable" "0,1"
line.word 0x8 "SM0TCTRL,Output Trigger Control Register"
bitfld.word 0x8 15. "PWAOT0,Mux Output Trigger 0 Source Select" "0: Route the PWM_OUT_TRIG0 signal to PWM_MUX_TRIG0..,1: Route the PWM_A output to the PWM_MUX_TRIG0 port."
bitfld.word 0x8 14. "PWBOT1,Mux Output Trigger 1 Source Select" "0: Route the PWM_OUT_TRIG1 signal to PWM_MUX_TRIG1..,1: Route the PWM_B output to the PWM_MUX_TRIG1 port."
newline
bitfld.word 0x8 12. "TRGFRQ,Trigger Frequency" "0: Trigger outputs are generated during every PWM..,1: Trigger outputs are generated only during the.."
hexmask.word.byte 0x8 0.--5. 1. "OUT_TRIG_EN,Output Trigger Enables"
line.word 0xA "SM0DISMAP0,Fault Disable Mapping Register 0"
hexmask.word.byte 0xA 8.--11. 1. "DIS0X,PWM_X Fault Disable Mask 0"
hexmask.word.byte 0xA 4.--7. 1. "DIS0B,PWM_B Fault Disable Mask 0"
newline
hexmask.word.byte 0xA 0.--3. 1. "DIS0A,PWM_A Fault Disable Mask 0"
group.word 0x30++0x3
line.word 0x0 "SM0DTCNT0,Deadtime Count Register 0"
hexmask.word 0x0 0.--10. 1. "DTCNT0,Deadtime Count Register 0"
line.word 0x2 "SM0DTCNT1,Deadtime Count Register 1"
hexmask.word 0x2 0.--10. 1. "DTCNT1,Deadtime Count Register 1"
group.word 0x3C++0x3
line.word 0x0 "SM0CAPTCTRLX,Capture Control X Register"
rbitfld.word 0x0 13.--15. "CX1CNT,Capture X1 FIFO Word Count" "0,1,2,3,4,5,6,7"
rbitfld.word 0x0 10.--12. "CX0CNT,Capture X0 FIFO Word Count" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x0 8.--9. "CFXWM,Capture X FIFOs Water Mark" "0,1,2,3"
bitfld.word 0x0 7. "EDGCNTX_EN,Edge Counter X Enable" "0: Edge counter disabled and held in reset,1: Edge counter enabled"
newline
bitfld.word 0x0 6. "INP_SELX,Input Select X" "0: Raw PWM_X input signal selected as source.,1: Edge Counter"
bitfld.word 0x0 4.--5. "EDGX1,Edge X 1" "0: Disabled,1: Capture falling edges,2: Capture rising edges,3: Capture any edge"
newline
bitfld.word 0x0 2.--3. "EDGX0,Edge X 0" "0: Disabled,1: Capture falling edges,2: Capture rising edges,3: Capture any edge"
bitfld.word 0x0 1. "ONESHOTX,One Shot Mode Aux" "0: Free Running,1: One Shot"
newline
bitfld.word 0x0 0. "ARMX,Arm X" "0: Input capture operation is disabled.,1: Input capture operation as specified by.."
line.word 0x2 "SM0CAPTCOMPX,Capture Compare X Register"
hexmask.word.byte 0x2 8.--15. 1. "EDGCNTX,Edge Counter X"
hexmask.word.byte 0x2 0.--7. 1. "EDGCMPX,Edge Compare X"
rgroup.word 0x40++0x7
line.word 0x0 "SM0CVAL0,Capture Value 0 Register"
hexmask.word 0x0 0.--15. 1. "CAPTVAL0,Capture Value 0"
line.word 0x2 "SM0CVAL0CYC,Capture Value 0 Cycle Register"
hexmask.word.byte 0x2 0.--3. 1. "CVAL0CYC,Capture Value 0 Cycle"
line.word 0x4 "SM0CVAL1,Capture Value 1 Register"
hexmask.word 0x4 0.--15. 1. "CAPTVAL1,Capture Value 1"
line.word 0x6 "SM0CVAL1CYC,Capture Value 1 Cycle Register"
hexmask.word.byte 0x6 0.--3. 1. "CVAL1CYC,Capture Value 1 Cycle"
group.word 0x5E++0x1
line.word 0x0 "SM0CAPTFILTX,Capture PWM_X Input Filter Register"
bitfld.word 0x0 8.--10. "CAPTX_FILT_CNT,Input Capture Filter Count" "0,1,2,3,4,5,6,7"
hexmask.word.byte 0x0 0.--7. 1. "CAPTX_FILT_PER,Input Capture Filter Period"
rgroup.word 0x60++0x1
line.word 0x0 "SM1CNT,Counter Register"
hexmask.word 0x0 0.--15. 1. "CNT,Counter Register Bits"
group.word 0x62++0x5
line.word 0x0 "SM1INIT,Initial Count Register"
hexmask.word 0x0 0.--15. 1. "INIT,Initial Count Register Bits"
line.word 0x2 "SM1CTRL2,Control 2 Register"
bitfld.word 0x2 15. "DBGEN,Debug Enable" "0,1"
bitfld.word 0x2 13. "INDEP,Independent or Complementary Pair Operation" "0: PWM_A and PWM_B form a complementary PWM pair.,1: PWM_A and PWM_B outputs are independent PWMs."
newline
bitfld.word 0x2 12. "PWM23_INIT,PWM23 Initial Value" "0,1"
bitfld.word 0x2 11. "PWM45_INIT,PWM45 Initial Value" "0,1"
newline
bitfld.word 0x2 10. "PWMX_INIT,PWM_X Initial Value" "0,1"
bitfld.word 0x2 8.--9. "INIT_SEL,Initialization Control Select" "0: Local sync (PWM_X) causes initialization.,1: Master reload from submodule 0 causes..,2: Master sync from submodule 0 causes..,3: EXT_SYNC causes initialization."
newline
bitfld.word 0x2 7. "FRCEN,Force Enable" "0: Initialization from a FORCE_OUT is disabled.,1: Initialization from a FORCE_OUT is enabled."
bitfld.word 0x2 6. "FORCE,Force Initialization" "0,1"
newline
bitfld.word 0x2 3.--5. "FORCE_SEL,Force Select" "0: The local force signal CTRL2[FORCE] from this..,1: The master force signal from submodule 0 is used..,2: The local reload signal from this submodule is..,3: The master reload signal from submodule0 is used..,4: The local sync signal from this submodule is..,5: The master sync signal from submodule0 is used..,6: The external force signal EXT_FORCE from outside..,7: The external sync signal EXT_SYNC from outside.."
bitfld.word 0x2 2. "RELOAD_SEL,Reload Source Select" "0: The local RELOAD signal is used to reload..,1: The master RELOAD signal (from submodule 0) is.."
newline
bitfld.word 0x2 0.--1. "CLK_SEL,Clock Source Select" "0: The IPBus clock is used as the clock for the..,1: EXT_CLK is used as the clock for the local..,2: Submodule 0's clock (AUX_CLK) is used as the..,?"
line.word 0x4 "SM1CTRL,Control Register"
hexmask.word.byte 0x4 12.--15. 1. "LDFQ,Load Frequency"
bitfld.word 0x4 11. "HALF,Half Cycle Reload" "0: Half-cycle reloads disabled.,1: Half-cycle reloads enabled."
newline
bitfld.word 0x4 10. "FULL,Full Cycle Reload" "0: Full-cycle reloads disabled.,1: Full-cycle reloads enabled."
rbitfld.word 0x4 8.--9. "DT,Deadtime" "0,1,2,3"
newline
bitfld.word 0x4 7. "COMPMODE,Compare Mode" "0: The VAL* registers and the PWM counter are..,1: The VAL* registers and the PWM counter are.."
bitfld.word 0x4 4.--6. "PRSC,Prescaler" "0: Prescaler 1,1: Prescaler 2,2: Prescaler 4,3: Prescaler 8,4: Prescaler 16,5: Prescaler 32,6: Prescaler 64,7: Prescaler 128"
newline
bitfld.word 0x4 3. "SPLIT,Split the DBLPWM signal to PWM_A and PWM_B" "0: DBLPWM is not split. PWM_A and PWM_B each have..,1: DBLPWM is split to PWM_A and PWM_B."
bitfld.word 0x4 2. "LDMOD,Load Mode Select" "0: Buffered registers of this submodule are loaded..,1: Buffered registers of this submodule are loaded.."
newline
bitfld.word 0x4 1. "DBLX,PWM_X Double Switching Enable" "0: PWM_X double pulse disabled.,1: PWM_X double pulse enabled."
bitfld.word 0x4 0. "DBLEN,Double Switching Enable" "0: Double switching disabled.,1: Double switching enabled."
group.word 0x6A++0x1
line.word 0x0 "SM1VAL0,Value Register 0"
hexmask.word 0x0 0.--15. 1. "VAL0,Value 0"
group.word 0x6E++0x1
line.word 0x0 "SM1VAL1,Value Register 1"
hexmask.word 0x0 0.--15. 1. "VAL1,Value 1"
group.word 0x72++0x1
line.word 0x0 "SM1VAL2,Value Register 2"
hexmask.word 0x0 0.--15. 1. "VAL2,Value 2"
group.word 0x76++0x1
line.word 0x0 "SM1VAL3,Value Register 3"
hexmask.word 0x0 0.--15. 1. "VAL3,Value 3"
group.word 0x7A++0x1
line.word 0x0 "SM1VAL4,Value Register 4"
hexmask.word 0x0 0.--15. 1. "VAL4,Value 4"
group.word 0x7E++0x1
line.word 0x0 "SM1VAL5,Value Register 5"
hexmask.word 0x0 0.--15. 1. "VAL5,Value 5"
group.word 0x82++0xB
line.word 0x0 "SM1OCTRL,Output Control Register"
rbitfld.word 0x0 15. "PWMA_IN,PWM_A Input" "0,1"
rbitfld.word 0x0 14. "PWMB_IN,PWM_B Input" "0,1"
newline
rbitfld.word 0x0 13. "PWMX_IN,PWM_X Input" "0,1"
bitfld.word 0x0 10. "POLA,PWM_A Output Polarity" "0: PWM_A output not inverted. A high level on the..,1: PWM_A output inverted. A low level on the PWM_A.."
newline
bitfld.word 0x0 9. "POLB,PWM_B Output Polarity" "0: PWM_B output not inverted. A high level on the..,1: PWM_B output inverted. A low level on the PWM_B.."
bitfld.word 0x0 8. "POLX,PWM_X Output Polarity" "0: PWM_X output not inverted. A high level on the..,1: PWM_X output inverted. A low level on the PWM_X.."
newline
bitfld.word 0x0 4.--5. "PWMAFS,PWM_A Fault State" "0: Output is forced to logic 0 state prior to..,1: Output is forced to logic 1 state prior to..,2: Output is put in a high-impedance state.,3: Output is put in a high-impedance state."
bitfld.word 0x0 2.--3. "PWMBFS,PWM_B Fault State" "0: Output is forced to logic 0 state prior to..,1: Output is forced to logic 1 state prior to..,2: Output is put in a high-impedance state.,3: Output is put in a high-impedance state."
newline
bitfld.word 0x0 0.--1. "PWMXFS,PWM_X Fault State" "0: Output is forced to logic 0 state prior to..,1: Output is forced to logic 1 state prior to..,2: Output is put in a high-impedance state.,3: Output is put in a high-impedance state."
line.word 0x2 "SM1STS,Status Register"
rbitfld.word 0x2 14. "RUF,Registers Updated Flag" "0: No register update has occurred since last reload.,1: At least one of the double buffered registers.."
eventfld.word 0x2 13. "REF,Reload Error Flag" "0: No reload error occurred.,1: Reload signal occurred with non-coherent data.."
newline
eventfld.word 0x2 12. "RF,Reload Flag" "0: No new reload cycle since last STS[RF] clearing,1: New reload cycle since last STS[RF] clearing"
eventfld.word 0x2 7. "CFX1,Capture Flag X1" "0,1"
newline
eventfld.word 0x2 6. "CFX0,Capture Flag X0" "0,1"
hexmask.word.byte 0x2 0.--5. 1. "CMPF,Compare Flags"
line.word 0x4 "SM1INTEN,Interrupt Enable Register"
bitfld.word 0x4 13. "REIE,Reload Error Interrupt Enable" "0: STS[REF] CPU interrupt requests disabled,1: STS[REF] CPU interrupt requests enabled"
bitfld.word 0x4 12. "RIE,Reload Interrupt Enable" "0: STS[RF] CPU interrupt requests disabled,1: STS[RF] CPU interrupt requests enabled"
newline
bitfld.word 0x4 7. "CX1IE,Capture X 1 Interrupt Enable" "0: Interrupt request disabled for STS[CFX1].,1: Interrupt request enabled for STS[CFX1]."
bitfld.word 0x4 6. "CX0IE,Capture X 0 Interrupt Enable" "0: Interrupt request disabled for STS[CFX0].,1: Interrupt request enabled for STS[CFX0]."
newline
hexmask.word.byte 0x4 0.--5. 1. "CMPIE,Compare Interrupt Enables"
line.word 0x6 "SM1DMAEN,DMA Enable Register"
bitfld.word 0x6 9. "VALDE,Value Registers DMA Enable" "0: DMA write requests disabled,1: Enabled"
bitfld.word 0x6 8. "FAND,FIFO Watermark AND Control" "0: Selected FIFO watermarks are OR'ed together.,1: Selected FIFO watermarks are AND'ed together."
newline
bitfld.word 0x6 6.--7. "CAPTDE,Capture DMA Enable Source Select" "0: Read DMA requests disabled.,1: Exceeding a FIFO watermark sets the DMA read..,2: A local synchronization (VAL1 matches counter)..,3: A local reload (STS[RF] being set) sets the read.."
bitfld.word 0x6 1. "CX1DE,Capture X1 FIFO DMA Enable" "0,1"
newline
bitfld.word 0x6 0. "CX0DE,Capture X0 FIFO DMA Enable" "0,1"
line.word 0x8 "SM1TCTRL,Output Trigger Control Register"
bitfld.word 0x8 15. "PWAOT0,Mux Output Trigger 0 Source Select" "0: Route the PWM_OUT_TRIG0 signal to PWM_MUX_TRIG0..,1: Route the PWM_A output to the PWM_MUX_TRIG0 port."
bitfld.word 0x8 14. "PWBOT1,Mux Output Trigger 1 Source Select" "0: Route the PWM_OUT_TRIG1 signal to PWM_MUX_TRIG1..,1: Route the PWM_B output to the PWM_MUX_TRIG1 port."
newline
bitfld.word 0x8 12. "TRGFRQ,Trigger Frequency" "0: Trigger outputs are generated during every PWM..,1: Trigger outputs are generated only during the.."
hexmask.word.byte 0x8 0.--5. 1. "OUT_TRIG_EN,Output Trigger Enables"
line.word 0xA "SM1DISMAP0,Fault Disable Mapping Register 0"
hexmask.word.byte 0xA 8.--11. 1. "DIS0X,PWM_X Fault Disable Mask 0"
hexmask.word.byte 0xA 4.--7. 1. "DIS0B,PWM_B Fault Disable Mask 0"
newline
hexmask.word.byte 0xA 0.--3. 1. "DIS0A,PWM_A Fault Disable Mask 0"
group.word 0x90++0x3
line.word 0x0 "SM1DTCNT0,Deadtime Count Register 0"
hexmask.word 0x0 0.--10. 1. "DTCNT0,Deadtime Count Register 0"
line.word 0x2 "SM1DTCNT1,Deadtime Count Register 1"
hexmask.word 0x2 0.--10. 1. "DTCNT1,Deadtime Count Register 1"
group.word 0x9C++0x3
line.word 0x0 "SM1CAPTCTRLX,Capture Control X Register"
rbitfld.word 0x0 13.--15. "CX1CNT,Capture X1 FIFO Word Count" "0,1,2,3,4,5,6,7"
rbitfld.word 0x0 10.--12. "CX0CNT,Capture X0 FIFO Word Count" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x0 8.--9. "CFXWM,Capture X FIFOs Water Mark" "0,1,2,3"
bitfld.word 0x0 7. "EDGCNTX_EN,Edge Counter X Enable" "0: Edge counter disabled and held in reset,1: Edge counter enabled"
newline
bitfld.word 0x0 6. "INP_SELX,Input Select X" "0: Raw PWM_X input signal selected as source.,1: Edge Counter"
bitfld.word 0x0 4.--5. "EDGX1,Edge X 1" "0: Disabled,1: Capture falling edges,2: Capture rising edges,3: Capture any edge"
newline
bitfld.word 0x0 2.--3. "EDGX0,Edge X 0" "0: Disabled,1: Capture falling edges,2: Capture rising edges,3: Capture any edge"
bitfld.word 0x0 1. "ONESHOTX,One Shot Mode Aux" "0: Free Running,1: One Shot"
newline
bitfld.word 0x0 0. "ARMX,Arm X" "0: Input capture operation is disabled.,1: Input capture operation as specified by.."
line.word 0x2 "SM1CAPTCOMPX,Capture Compare X Register"
hexmask.word.byte 0x2 8.--15. 1. "EDGCNTX,Edge Counter X"
hexmask.word.byte 0x2 0.--7. 1. "EDGCMPX,Edge Compare X"
rgroup.word 0xA0++0x7
line.word 0x0 "SM1CVAL0,Capture Value 0 Register"
hexmask.word 0x0 0.--15. 1. "CAPTVAL0,Capture Value 0"
line.word 0x2 "SM1CVAL0CYC,Capture Value 0 Cycle Register"
hexmask.word.byte 0x2 0.--3. 1. "CVAL0CYC,Capture Value 0 Cycle"
line.word 0x4 "SM1CVAL1,Capture Value 1 Register"
hexmask.word 0x4 0.--15. 1. "CAPTVAL1,Capture Value 1"
line.word 0x6 "SM1CVAL1CYC,Capture Value 1 Cycle Register"
hexmask.word.byte 0x6 0.--3. 1. "CVAL1CYC,Capture Value 1 Cycle"
group.word 0xB8++0x1
line.word 0x0 "SM1PHASEDLY,Phase Delay Register"
hexmask.word 0x0 0.--15. 1. "PHASEDLY,Initial Count Register Bits"
group.word 0xBE++0x1
line.word 0x0 "SM1CAPTFILTX,Capture PWM_X Input Filter Register"
bitfld.word 0x0 8.--10. "CAPTX_FILT_CNT,Input Capture Filter Count" "0,1,2,3,4,5,6,7"
hexmask.word.byte 0x0 0.--7. 1. "CAPTX_FILT_PER,Input Capture Filter Period"
rgroup.word 0xC0++0x1
line.word 0x0 "SM2CNT,Counter Register"
hexmask.word 0x0 0.--15. 1. "CNT,Counter Register Bits"
group.word 0xC2++0x5
line.word 0x0 "SM2INIT,Initial Count Register"
hexmask.word 0x0 0.--15. 1. "INIT,Initial Count Register Bits"
line.word 0x2 "SM2CTRL2,Control 2 Register"
bitfld.word 0x2 15. "DBGEN,Debug Enable" "0,1"
bitfld.word 0x2 13. "INDEP,Independent or Complementary Pair Operation" "0: PWM_A and PWM_B form a complementary PWM pair.,1: PWM_A and PWM_B outputs are independent PWMs."
newline
bitfld.word 0x2 12. "PWM23_INIT,PWM23 Initial Value" "0,1"
bitfld.word 0x2 11. "PWM45_INIT,PWM45 Initial Value" "0,1"
newline
bitfld.word 0x2 10. "PWMX_INIT,PWM_X Initial Value" "0,1"
bitfld.word 0x2 8.--9. "INIT_SEL,Initialization Control Select" "0: Local sync (PWM_X) causes initialization.,1: Master reload from submodule 0 causes..,2: Master sync from submodule 0 causes..,3: EXT_SYNC causes initialization."
newline
bitfld.word 0x2 7. "FRCEN,Force Enable" "0: Initialization from a FORCE_OUT is disabled.,1: Initialization from a FORCE_OUT is enabled."
bitfld.word 0x2 6. "FORCE,Force Initialization" "0,1"
newline
bitfld.word 0x2 3.--5. "FORCE_SEL,Force Select" "0: The local force signal CTRL2[FORCE] from this..,1: The master force signal from submodule 0 is used..,2: The local reload signal from this submodule is..,3: The master reload signal from submodule0 is used..,4: The local sync signal from this submodule is..,5: The master sync signal from submodule0 is used..,6: The external force signal EXT_FORCE from outside..,7: The external sync signal EXT_SYNC from outside.."
bitfld.word 0x2 2. "RELOAD_SEL,Reload Source Select" "0: The local RELOAD signal is used to reload..,1: The master RELOAD signal (from submodule 0) is.."
newline
bitfld.word 0x2 0.--1. "CLK_SEL,Clock Source Select" "0: The IPBus clock is used as the clock for the..,1: EXT_CLK is used as the clock for the local..,2: Submodule 0's clock (AUX_CLK) is used as the..,?"
line.word 0x4 "SM2CTRL,Control Register"
hexmask.word.byte 0x4 12.--15. 1. "LDFQ,Load Frequency"
bitfld.word 0x4 11. "HALF,Half Cycle Reload" "0: Half-cycle reloads disabled.,1: Half-cycle reloads enabled."
newline
bitfld.word 0x4 10. "FULL,Full Cycle Reload" "0: Full-cycle reloads disabled.,1: Full-cycle reloads enabled."
rbitfld.word 0x4 8.--9. "DT,Deadtime" "0,1,2,3"
newline
bitfld.word 0x4 7. "COMPMODE,Compare Mode" "0: The VAL* registers and the PWM counter are..,1: The VAL* registers and the PWM counter are.."
bitfld.word 0x4 4.--6. "PRSC,Prescaler" "0: Prescaler 1,1: Prescaler 2,2: Prescaler 4,3: Prescaler 8,4: Prescaler 16,5: Prescaler 32,6: Prescaler 64,7: Prescaler 128"
newline
bitfld.word 0x4 3. "SPLIT,Split the DBLPWM signal to PWM_A and PWM_B" "0: DBLPWM is not split. PWM_A and PWM_B each have..,1: DBLPWM is split to PWM_A and PWM_B."
bitfld.word 0x4 2. "LDMOD,Load Mode Select" "0: Buffered registers of this submodule are loaded..,1: Buffered registers of this submodule are loaded.."
newline
bitfld.word 0x4 1. "DBLX,PWM_X Double Switching Enable" "0: PWM_X double pulse disabled.,1: PWM_X double pulse enabled."
bitfld.word 0x4 0. "DBLEN,Double Switching Enable" "0: Double switching disabled.,1: Double switching enabled."
group.word 0xCA++0x1
line.word 0x0 "SM2VAL0,Value Register 0"
hexmask.word 0x0 0.--15. 1. "VAL0,Value 0"
group.word 0xCE++0x1
line.word 0x0 "SM2VAL1,Value Register 1"
hexmask.word 0x0 0.--15. 1. "VAL1,Value 1"
group.word 0xD2++0x1
line.word 0x0 "SM2VAL2,Value Register 2"
hexmask.word 0x0 0.--15. 1. "VAL2,Value 2"
group.word 0xD6++0x1
line.word 0x0 "SM2VAL3,Value Register 3"
hexmask.word 0x0 0.--15. 1. "VAL3,Value 3"
group.word 0xDA++0x1
line.word 0x0 "SM2VAL4,Value Register 4"
hexmask.word 0x0 0.--15. 1. "VAL4,Value 4"
group.word 0xDE++0x1
line.word 0x0 "SM2VAL5,Value Register 5"
hexmask.word 0x0 0.--15. 1. "VAL5,Value 5"
group.word 0xE2++0xB
line.word 0x0 "SM2OCTRL,Output Control Register"
rbitfld.word 0x0 15. "PWMA_IN,PWM_A Input" "0,1"
rbitfld.word 0x0 14. "PWMB_IN,PWM_B Input" "0,1"
newline
rbitfld.word 0x0 13. "PWMX_IN,PWM_X Input" "0,1"
bitfld.word 0x0 10. "POLA,PWM_A Output Polarity" "0: PWM_A output not inverted. A high level on the..,1: PWM_A output inverted. A low level on the PWM_A.."
newline
bitfld.word 0x0 9. "POLB,PWM_B Output Polarity" "0: PWM_B output not inverted. A high level on the..,1: PWM_B output inverted. A low level on the PWM_B.."
bitfld.word 0x0 8. "POLX,PWM_X Output Polarity" "0: PWM_X output not inverted. A high level on the..,1: PWM_X output inverted. A low level on the PWM_X.."
newline
bitfld.word 0x0 4.--5. "PWMAFS,PWM_A Fault State" "0: Output is forced to logic 0 state prior to..,1: Output is forced to logic 1 state prior to..,2: Output is put in a high-impedance state.,3: Output is put in a high-impedance state."
bitfld.word 0x0 2.--3. "PWMBFS,PWM_B Fault State" "0: Output is forced to logic 0 state prior to..,1: Output is forced to logic 1 state prior to..,2: Output is put in a high-impedance state.,3: Output is put in a high-impedance state."
newline
bitfld.word 0x0 0.--1. "PWMXFS,PWM_X Fault State" "0: Output is forced to logic 0 state prior to..,1: Output is forced to logic 1 state prior to..,2: Output is put in a high-impedance state.,3: Output is put in a high-impedance state."
line.word 0x2 "SM2STS,Status Register"
rbitfld.word 0x2 14. "RUF,Registers Updated Flag" "0: No register update has occurred since last reload.,1: At least one of the double buffered registers.."
eventfld.word 0x2 13. "REF,Reload Error Flag" "0: No reload error occurred.,1: Reload signal occurred with non-coherent data.."
newline
eventfld.word 0x2 12. "RF,Reload Flag" "0: No new reload cycle since last STS[RF] clearing,1: New reload cycle since last STS[RF] clearing"
eventfld.word 0x2 7. "CFX1,Capture Flag X1" "0,1"
newline
eventfld.word 0x2 6. "CFX0,Capture Flag X0" "0,1"
hexmask.word.byte 0x2 0.--5. 1. "CMPF,Compare Flags"
line.word 0x4 "SM2INTEN,Interrupt Enable Register"
bitfld.word 0x4 13. "REIE,Reload Error Interrupt Enable" "0: STS[REF] CPU interrupt requests disabled,1: STS[REF] CPU interrupt requests enabled"
bitfld.word 0x4 12. "RIE,Reload Interrupt Enable" "0: STS[RF] CPU interrupt requests disabled,1: STS[RF] CPU interrupt requests enabled"
newline
bitfld.word 0x4 7. "CX1IE,Capture X 1 Interrupt Enable" "0: Interrupt request disabled for STS[CFX1].,1: Interrupt request enabled for STS[CFX1]."
bitfld.word 0x4 6. "CX0IE,Capture X 0 Interrupt Enable" "0: Interrupt request disabled for STS[CFX0].,1: Interrupt request enabled for STS[CFX0]."
newline
hexmask.word.byte 0x4 0.--5. 1. "CMPIE,Compare Interrupt Enables"
line.word 0x6 "SM2DMAEN,DMA Enable Register"
bitfld.word 0x6 9. "VALDE,Value Registers DMA Enable" "0: DMA write requests disabled,1: Enabled"
bitfld.word 0x6 8. "FAND,FIFO Watermark AND Control" "0: Selected FIFO watermarks are OR'ed together.,1: Selected FIFO watermarks are AND'ed together."
newline
bitfld.word 0x6 6.--7. "CAPTDE,Capture DMA Enable Source Select" "0: Read DMA requests disabled.,1: Exceeding a FIFO watermark sets the DMA read..,2: A local synchronization (VAL1 matches counter)..,3: A local reload (STS[RF] being set) sets the read.."
bitfld.word 0x6 1. "CX1DE,Capture X1 FIFO DMA Enable" "0,1"
newline
bitfld.word 0x6 0. "CX0DE,Capture X0 FIFO DMA Enable" "0,1"
line.word 0x8 "SM2TCTRL,Output Trigger Control Register"
bitfld.word 0x8 15. "PWAOT0,Mux Output Trigger 0 Source Select" "0: Route the PWM_OUT_TRIG0 signal to PWM_MUX_TRIG0..,1: Route the PWM_A output to the PWM_MUX_TRIG0 port."
bitfld.word 0x8 14. "PWBOT1,Mux Output Trigger 1 Source Select" "0: Route the PWM_OUT_TRIG1 signal to PWM_MUX_TRIG1..,1: Route the PWM_B output to the PWM_MUX_TRIG1 port."
newline
bitfld.word 0x8 12. "TRGFRQ,Trigger Frequency" "0: Trigger outputs are generated during every PWM..,1: Trigger outputs are generated only during the.."
hexmask.word.byte 0x8 0.--5. 1. "OUT_TRIG_EN,Output Trigger Enables"
line.word 0xA "SM2DISMAP0,Fault Disable Mapping Register 0"
hexmask.word.byte 0xA 8.--11. 1. "DIS0X,PWM_X Fault Disable Mask 0"
hexmask.word.byte 0xA 4.--7. 1. "DIS0B,PWM_B Fault Disable Mask 0"
newline
hexmask.word.byte 0xA 0.--3. 1. "DIS0A,PWM_A Fault Disable Mask 0"
group.word 0xF0++0x3
line.word 0x0 "SM2DTCNT0,Deadtime Count Register 0"
hexmask.word 0x0 0.--10. 1. "DTCNT0,Deadtime Count Register 0"
line.word 0x2 "SM2DTCNT1,Deadtime Count Register 1"
hexmask.word 0x2 0.--10. 1. "DTCNT1,Deadtime Count Register 1"
group.word 0xFC++0x3
line.word 0x0 "SM2CAPTCTRLX,Capture Control X Register"
rbitfld.word 0x0 13.--15. "CX1CNT,Capture X1 FIFO Word Count" "0,1,2,3,4,5,6,7"
rbitfld.word 0x0 10.--12. "CX0CNT,Capture X0 FIFO Word Count" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x0 8.--9. "CFXWM,Capture X FIFOs Water Mark" "0,1,2,3"
bitfld.word 0x0 7. "EDGCNTX_EN,Edge Counter X Enable" "0: Edge counter disabled and held in reset,1: Edge counter enabled"
newline
bitfld.word 0x0 6. "INP_SELX,Input Select X" "0: Raw PWM_X input signal selected as source.,1: Edge Counter"
bitfld.word 0x0 4.--5. "EDGX1,Edge X 1" "0: Disabled,1: Capture falling edges,2: Capture rising edges,3: Capture any edge"
newline
bitfld.word 0x0 2.--3. "EDGX0,Edge X 0" "0: Disabled,1: Capture falling edges,2: Capture rising edges,3: Capture any edge"
bitfld.word 0x0 1. "ONESHOTX,One Shot Mode Aux" "0: Free Running,1: One Shot"
newline
bitfld.word 0x0 0. "ARMX,Arm X" "0: Input capture operation is disabled.,1: Input capture operation as specified by.."
line.word 0x2 "SM2CAPTCOMPX,Capture Compare X Register"
hexmask.word.byte 0x2 8.--15. 1. "EDGCNTX,Edge Counter X"
hexmask.word.byte 0x2 0.--7. 1. "EDGCMPX,Edge Compare X"
rgroup.word 0x100++0x7
line.word 0x0 "SM2CVAL0,Capture Value 0 Register"
hexmask.word 0x0 0.--15. 1. "CAPTVAL0,Capture Value 0"
line.word 0x2 "SM2CVAL0CYC,Capture Value 0 Cycle Register"
hexmask.word.byte 0x2 0.--3. 1. "CVAL0CYC,Capture Value 0 Cycle"
line.word 0x4 "SM2CVAL1,Capture Value 1 Register"
hexmask.word 0x4 0.--15. 1. "CAPTVAL1,Capture Value 1"
line.word 0x6 "SM2CVAL1CYC,Capture Value 1 Cycle Register"
hexmask.word.byte 0x6 0.--3. 1. "CVAL1CYC,Capture Value 1 Cycle"
group.word 0x118++0x1
line.word 0x0 "SM2PHASEDLY,Phase Delay Register"
hexmask.word 0x0 0.--15. 1. "PHASEDLY,Initial Count Register Bits"
group.word 0x11E++0x1
line.word 0x0 "SM2CAPTFILTX,Capture PWM_X Input Filter Register"
bitfld.word 0x0 8.--10. "CAPTX_FILT_CNT,Input Capture Filter Count" "0,1,2,3,4,5,6,7"
hexmask.word.byte 0x0 0.--7. 1. "CAPTX_FILT_PER,Input Capture Filter Period"
group.word 0x180++0x15
line.word 0x0 "OUTEN,Output Enable Register"
bitfld.word 0x0 8.--10. "PWMA_EN,PWM_A Output Enables" "0,1,2,3,4,5,6,7"
bitfld.word 0x0 4.--6. "PWMB_EN,PWM_B Output Enables" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x0 0.--2. "PWMX_EN,PWM_X Output Enables" "0,1,2,3,4,5,6,7"
line.word 0x2 "MASK,Mask Register"
bitfld.word 0x2 12.--14. "UPDATE_MASK,Update Mask Bits Immediately" "0,1,2,3,4,5,6,7"
bitfld.word 0x2 8.--10. "MASKA,PWM_A Masks" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x2 4.--6. "MASKB,PWM_B Masks" "0,1,2,3,4,5,6,7"
bitfld.word 0x2 0.--2. "MASKX,PWM_X Masks" "0,1,2,3,4,5,6,7"
line.word 0x4 "SWCOUT,Software Controlled Output Register"
bitfld.word 0x4 5. "SM2OUT23,Submodule 2 Software Controlled Output 23" "0: A logic 0 is supplied to the deadtime generator..,1: A logic 1 is supplied to the deadtime generator.."
bitfld.word 0x4 4. "SM2OUT45,Submodule 2 Software Controlled Output 45" "0: A logic 0 is supplied to the deadtime generator..,1: A logic 1 is supplied to the deadtime generator.."
newline
bitfld.word 0x4 3. "SM1OUT23,Submodule 1 Software Controlled Output 23" "0: A logic 0 is supplied to the deadtime generator..,1: A logic 1 is supplied to the deadtime generator.."
bitfld.word 0x4 2. "SM1OUT45,Submodule 1 Software Controlled Output 45" "0: A logic 0 is supplied to the deadtime generator..,1: A logic 1 is supplied to the deadtime generator.."
newline
bitfld.word 0x4 1. "SM0OUT23,Submodule 0 Software Controlled Output 23" "0: A logic 0 is supplied to the deadtime generator..,1: A logic 1 is supplied to the deadtime generator.."
bitfld.word 0x4 0. "SM0OUT45,Submodule 0 Software Controlled Output 45" "0: A logic 0 is supplied to the deadtime generator..,1: A logic 1 is supplied to the deadtime generator.."
line.word 0x6 "DTSRCSEL,PWM Source Select Register"
bitfld.word 0x6 10.--11. "SM2SEL23,Submodule 2 PWM23 Control Select" "0: Generated SM2PWM23 signal used by the deadtime..,1: Inverted generated SM2PWM23 signal used by the..,2: SWCOUT[SM2OUT23] used by the deadtime logic.,3: PWM2_EXTA signal used by the deadtime logic."
bitfld.word 0x6 8.--9. "SM2SEL45,Submodule 2 PWM45 Control Select" "0: Generated SM2PWM45 signal used by the deadtime..,1: Inverted generated SM2PWM45 signal used by the..,2: SWCOUT[SM2OUT45] used by the deadtime logic.,?"
newline
bitfld.word 0x6 6.--7. "SM1SEL23,Submodule 1 PWM23 Control Select" "0: Generated SM1PWM23 signal used by the deadtime..,1: Inverted generated SM1PWM23 signal used by the..,2: SWCOUT[SM1OUT23] used by the deadtime logic.,3: PWM1_EXTA signal used by the deadtime logic."
bitfld.word 0x6 4.--5. "SM1SEL45,Submodule 1 PWM45 Control Select" "0: Generated SM1PWM45 signal used by the deadtime..,1: Inverted generated SM1PWM45 signal used by the..,2: SWCOUT[SM1OUT45] used by the deadtime logic.,?"
newline
bitfld.word 0x6 2.--3. "SM0SEL23,Submodule 0 PWM23 Control Select" "0: Generated SM0PWM23 signal used by the deadtime..,1: Inverted generated SM0PWM23 signal used by the..,2: SWCOUT[SM0OUT23] used by the deadtime logic.,3: PWM0_EXTA signal used by the deadtime logic."
bitfld.word 0x6 0.--1. "SM0SEL45,Submodule 0 PWM45 Control Select" "0: Generated SM0PWM45 signal used by the deadtime..,1: Inverted generated SM0PWM45 signal used by the..,2: SWCOUT[SM0OUT45] used by the deadtime logic.,?"
line.word 0x8 "MCTRL,Master Control Register"
bitfld.word 0x8 12.--14. "IPOL,Current Polarity" "0: PWM23 is used to generate complementary PWM pair..,1: PWM45 is used to generate complementary PWM pair..,?,?,?,?,?,?"
bitfld.word 0x8 8.--10. "RUN,Run" "0: PWM counter is stopped but PWM outputs hold the..,1: PWM counter is started in the corresponding..,?,?,?,?,?,?"
newline
bitfld.word 0x8 4.--6. "CLDOK,Clear Load Okay" "0,1,2,3,4,5,6,7"
bitfld.word 0x8 0.--2. "LDOK,Load Okay" "0: Do not load new values.,1: Load prescaler modulus and PWM values of the..,?,?,?,?,?,?"
line.word 0xA "MCTRL2,Master Control 2 Register"
bitfld.word 0xA 6.--7. "STRETCH_CNT_PRSC,Stretch IPBus clock count prescaler for mux0_trig/mux1_trig/out0_trig/out1_trig/pwma_trig/pwmb_trig" "0: Stretch count is zero no stretch.,1: Stretch..,2: Stretch..,3: Stretch.."
bitfld.word 0xA 2.--3. "WRPROT,Write protect" "0: Write protection off (default).,1: Write protection on.,2: Write protection off and locked until chip reset.,3: Write protection on and locked until chip reset."
line.word 0xC "FCTRL0,Fault Control Register"
hexmask.word.byte 0xC 12.--15. 1. "FLVL,Fault Level"
hexmask.word.byte 0xC 8.--11. 1. "FAUTO,Automatic Fault Clearing"
newline
hexmask.word.byte 0xC 4.--7. 1. "FSAFE,Fault Safety Mode"
hexmask.word.byte 0xC 0.--3. 1. "FIE,Fault Interrupt Enables"
line.word 0xE "FSTS0,Fault Status Register"
hexmask.word.byte 0xE 12.--15. 1. "FHALF,Half Cycle Fault Recovery"
hexmask.word.byte 0xE 8.--11. 1. "FFPIN,Filtered Fault Pins"
newline
hexmask.word.byte 0xE 4.--7. 1. "FFULL,Full Cycle"
hexmask.word.byte 0xE 0.--3. 1. "FFLAG,Fault Flags"
line.word 0x10 "FFILT0,Fault Filter Register"
bitfld.word 0x10 15. "GSTR,Fault Glitch Stretch Enable" "0: Fault input glitch stretching is disabled.,1: Input fault signals are stretched to at least 2.."
bitfld.word 0x10 8.--10. "FILT_CNT,Fault Filter Count" "0,1,2,3,4,5,6,7"
newline
hexmask.word.byte 0x10 0.--7. 1. "FILT_PER,Fault Filter Period"
line.word 0x12 "FTST0,Fault Test Register"
bitfld.word 0x12 0. "FTEST,Fault Test" "0: No fault,1: Cause a simulated fault"
line.word 0x14 "FCTRL20,Fault Control 2 Register"
hexmask.word.byte 0x14 0.--3. 1. "NOCOMB,No Combinational Path From Fault Input To PWM Output"
tree.end
endif
sif (cpuis("MC?A156*"))
tree "FLEXPWM1"
base ad:0x400AA000
rgroup.word 0x0++0x1
line.word 0x0 "SM0CNT,Counter Register"
hexmask.word 0x0 0.--15. 1. "CNT,Counter Register Bits"
group.word 0x2++0x5
line.word 0x0 "SM0INIT,Initial Count Register"
hexmask.word 0x0 0.--15. 1. "INIT,Initial Count Register Bits"
line.word 0x2 "SM0CTRL2,Control 2 Register"
bitfld.word 0x2 15. "DBGEN,Debug Enable" "0,1"
bitfld.word 0x2 13. "INDEP,Independent or Complementary Pair Operation" "0: PWM_A and PWM_B form a complementary PWM pair.,1: PWM_A and PWM_B outputs are independent PWMs."
newline
bitfld.word 0x2 12. "PWM23_INIT,PWM23 Initial Value" "0,1"
bitfld.word 0x2 11. "PWM45_INIT,PWM45 Initial Value" "0,1"
newline
bitfld.word 0x2 10. "PWMX_INIT,PWM_X Initial Value" "0,1"
bitfld.word 0x2 8.--9. "INIT_SEL,Initialization Control Select" "0: Local sync (PWM_X) causes initialization.,1: Master reload from submodule 0 causes..,2: Master sync from submodule 0 causes..,3: EXT_SYNC causes initialization."
newline
bitfld.word 0x2 7. "FRCEN,Force Enable" "0: Initialization from a FORCE_OUT is disabled.,1: Initialization from a FORCE_OUT is enabled."
bitfld.word 0x2 6. "FORCE,Force Initialization" "0,1"
newline
bitfld.word 0x2 3.--5. "FORCE_SEL,Force Select" "0: The local force signal CTRL2[FORCE] from this..,1: The master force signal from submodule 0 is used..,2: The local reload signal from this submodule is..,3: The master reload signal from submodule0 is used..,4: The local sync signal from this submodule is..,5: The master sync signal from submodule0 is used..,6: The external force signal EXT_FORCE from outside..,7: The external sync signal EXT_SYNC from outside.."
bitfld.word 0x2 2. "RELOAD_SEL,Reload Source Select" "0: The local RELOAD signal is used to reload..,1: The master RELOAD signal (from submodule 0) is.."
newline
bitfld.word 0x2 0.--1. "CLK_SEL,Clock Source Select" "0: The IPBus clock is used as the clock for the..,1: EXT_CLK is used as the clock for the local..,2: Submodule 0's clock (AUX_CLK) is used as the..,?"
line.word 0x4 "SM0CTRL,Control Register"
hexmask.word.byte 0x4 12.--15. 1. "LDFQ,Load Frequency"
bitfld.word 0x4 11. "HALF,Half Cycle Reload" "0: Half-cycle reloads disabled.,1: Half-cycle reloads enabled."
newline
bitfld.word 0x4 10. "FULL,Full Cycle Reload" "0: Full-cycle reloads disabled.,1: Full-cycle reloads enabled."
rbitfld.word 0x4 8.--9. "DT,Deadtime" "0,1,2,3"
newline
bitfld.word 0x4 7. "COMPMODE,Compare Mode" "0: The VAL* registers and the PWM counter are..,1: The VAL* registers and the PWM counter are.."
bitfld.word 0x4 4.--6. "PRSC,Prescaler" "0: Prescaler 1,1: Prescaler 2,2: Prescaler 4,3: Prescaler 8,4: Prescaler 16,5: Prescaler 32,6: Prescaler 64,7: Prescaler 128"
newline
bitfld.word 0x4 3. "SPLIT,Split the DBLPWM signal to PWM_A and PWM_B" "0: DBLPWM is not split. PWM_A and PWM_B each have..,1: DBLPWM is split to PWM_A and PWM_B."
bitfld.word 0x4 2. "LDMOD,Load Mode Select" "0: Buffered registers of this submodule are loaded..,1: Buffered registers of this submodule are loaded.."
newline
bitfld.word 0x4 1. "DBLX,PWM_X Double Switching Enable" "0: PWM_X double pulse disabled.,1: PWM_X double pulse enabled."
bitfld.word 0x4 0. "DBLEN,Double Switching Enable" "0: Double switching disabled.,1: Double switching enabled."
group.word 0xA++0x1
line.word 0x0 "SM0VAL0,Value Register 0"
hexmask.word 0x0 0.--15. 1. "VAL0,Value 0"
group.word 0xE++0x1
line.word 0x0 "SM0VAL1,Value Register 1"
hexmask.word 0x0 0.--15. 1. "VAL1,Value 1"
group.word 0x12++0x1
line.word 0x0 "SM0VAL2,Value Register 2"
hexmask.word 0x0 0.--15. 1. "VAL2,Value 2"
group.word 0x16++0x1
line.word 0x0 "SM0VAL3,Value Register 3"
hexmask.word 0x0 0.--15. 1. "VAL3,Value 3"
group.word 0x1A++0x1
line.word 0x0 "SM0VAL4,Value Register 4"
hexmask.word 0x0 0.--15. 1. "VAL4,Value 4"
group.word 0x1E++0x1
line.word 0x0 "SM0VAL5,Value Register 5"
hexmask.word 0x0 0.--15. 1. "VAL5,Value 5"
group.word 0x22++0xB
line.word 0x0 "SM0OCTRL,Output Control Register"
rbitfld.word 0x0 15. "PWMA_IN,PWM_A Input" "0,1"
rbitfld.word 0x0 14. "PWMB_IN,PWM_B Input" "0,1"
newline
rbitfld.word 0x0 13. "PWMX_IN,PWM_X Input" "0,1"
bitfld.word 0x0 10. "POLA,PWM_A Output Polarity" "0: PWM_A output not inverted. A high level on the..,1: PWM_A output inverted. A low level on the PWM_A.."
newline
bitfld.word 0x0 9. "POLB,PWM_B Output Polarity" "0: PWM_B output not inverted. A high level on the..,1: PWM_B output inverted. A low level on the PWM_B.."
bitfld.word 0x0 8. "POLX,PWM_X Output Polarity" "0: PWM_X output not inverted. A high level on the..,1: PWM_X output inverted. A low level on the PWM_X.."
newline
bitfld.word 0x0 4.--5. "PWMAFS,PWM_A Fault State" "0: Output is forced to logic 0 state prior to..,1: Output is forced to logic 1 state prior to..,2: Output is put in a high-impedance state.,3: Output is put in a high-impedance state."
bitfld.word 0x0 2.--3. "PWMBFS,PWM_B Fault State" "0: Output is forced to logic 0 state prior to..,1: Output is forced to logic 1 state prior to..,2: Output is put in a high-impedance state.,3: Output is put in a high-impedance state."
newline
bitfld.word 0x0 0.--1. "PWMXFS,PWM_X Fault State" "0: Output is forced to logic 0 state prior to..,1: Output is forced to logic 1 state prior to..,2: Output is put in a high-impedance state.,3: Output is put in a high-impedance state."
line.word 0x2 "SM0STS,Status Register"
rbitfld.word 0x2 14. "RUF,Registers Updated Flag" "0: No register update has occurred since last reload.,1: At least one of the double buffered registers.."
eventfld.word 0x2 13. "REF,Reload Error Flag" "0: No reload error occurred.,1: Reload signal occurred with non-coherent data.."
newline
eventfld.word 0x2 12. "RF,Reload Flag" "0: No new reload cycle since last STS[RF] clearing,1: New reload cycle since last STS[RF] clearing"
eventfld.word 0x2 7. "CFX1,Capture Flag X1" "0,1"
newline
eventfld.word 0x2 6. "CFX0,Capture Flag X0" "0,1"
hexmask.word.byte 0x2 0.--5. 1. "CMPF,Compare Flags"
line.word 0x4 "SM0INTEN,Interrupt Enable Register"
bitfld.word 0x4 13. "REIE,Reload Error Interrupt Enable" "0: STS[REF] CPU interrupt requests disabled,1: STS[REF] CPU interrupt requests enabled"
bitfld.word 0x4 12. "RIE,Reload Interrupt Enable" "0: STS[RF] CPU interrupt requests disabled,1: STS[RF] CPU interrupt requests enabled"
newline
bitfld.word 0x4 7. "CX1IE,Capture X 1 Interrupt Enable" "0: Interrupt request disabled for STS[CFX1].,1: Interrupt request enabled for STS[CFX1]."
bitfld.word 0x4 6. "CX0IE,Capture X 0 Interrupt Enable" "0: Interrupt request disabled for STS[CFX0].,1: Interrupt request enabled for STS[CFX0]."
newline
hexmask.word.byte 0x4 0.--5. 1. "CMPIE,Compare Interrupt Enables"
line.word 0x6 "SM0DMAEN,DMA Enable Register"
bitfld.word 0x6 9. "VALDE,Value Registers DMA Enable" "0: DMA write requests disabled,1: Enabled"
bitfld.word 0x6 8. "FAND,FIFO Watermark AND Control" "0: Selected FIFO watermarks are OR'ed together.,1: Selected FIFO watermarks are AND'ed together."
newline
bitfld.word 0x6 6.--7. "CAPTDE,Capture DMA Enable Source Select" "0: Read DMA requests disabled.,1: Exceeding a FIFO watermark sets the DMA read..,2: A local synchronization (VAL1 matches counter)..,3: A local reload (STS[RF] being set) sets the read.."
bitfld.word 0x6 1. "CX1DE,Capture X1 FIFO DMA Enable" "0,1"
newline
bitfld.word 0x6 0. "CX0DE,Capture X0 FIFO DMA Enable" "0,1"
line.word 0x8 "SM0TCTRL,Output Trigger Control Register"
bitfld.word 0x8 15. "PWAOT0,Mux Output Trigger 0 Source Select" "0: Route the PWM_OUT_TRIG0 signal to PWM_MUX_TRIG0..,1: Route the PWM_A output to the PWM_MUX_TRIG0 port."
bitfld.word 0x8 14. "PWBOT1,Mux Output Trigger 1 Source Select" "0: Route the PWM_OUT_TRIG1 signal to PWM_MUX_TRIG1..,1: Route the PWM_B output to the PWM_MUX_TRIG1 port."
newline
bitfld.word 0x8 12. "TRGFRQ,Trigger Frequency" "0: Trigger outputs are generated during every PWM..,1: Trigger outputs are generated only during the.."
hexmask.word.byte 0x8 0.--5. 1. "OUT_TRIG_EN,Output Trigger Enables"
line.word 0xA "SM0DISMAP0,Fault Disable Mapping Register 0"
hexmask.word.byte 0xA 8.--11. 1. "DIS0X,PWM_X Fault Disable Mask 0"
hexmask.word.byte 0xA 4.--7. 1. "DIS0B,PWM_B Fault Disable Mask 0"
newline
hexmask.word.byte 0xA 0.--3. 1. "DIS0A,PWM_A Fault Disable Mask 0"
group.word 0x30++0x3
line.word 0x0 "SM0DTCNT0,Deadtime Count Register 0"
hexmask.word 0x0 0.--10. 1. "DTCNT0,Deadtime Count Register 0"
line.word 0x2 "SM0DTCNT1,Deadtime Count Register 1"
hexmask.word 0x2 0.--10. 1. "DTCNT1,Deadtime Count Register 1"
group.word 0x3C++0x3
line.word 0x0 "SM0CAPTCTRLX,Capture Control X Register"
rbitfld.word 0x0 13.--15. "CX1CNT,Capture X1 FIFO Word Count" "0,1,2,3,4,5,6,7"
rbitfld.word 0x0 10.--12. "CX0CNT,Capture X0 FIFO Word Count" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x0 8.--9. "CFXWM,Capture X FIFOs Water Mark" "0,1,2,3"
bitfld.word 0x0 7. "EDGCNTX_EN,Edge Counter X Enable" "0: Edge counter disabled and held in reset,1: Edge counter enabled"
newline
bitfld.word 0x0 6. "INP_SELX,Input Select X" "0: Raw PWM_X input signal selected as source.,1: Edge Counter"
bitfld.word 0x0 4.--5. "EDGX1,Edge X 1" "0: Disabled,1: Capture falling edges,2: Capture rising edges,3: Capture any edge"
newline
bitfld.word 0x0 2.--3. "EDGX0,Edge X 0" "0: Disabled,1: Capture falling edges,2: Capture rising edges,3: Capture any edge"
bitfld.word 0x0 1. "ONESHOTX,One Shot Mode Aux" "0: Free Running,1: One Shot"
newline
bitfld.word 0x0 0. "ARMX,Arm X" "0: Input capture operation is disabled.,1: Input capture operation as specified by.."
line.word 0x2 "SM0CAPTCOMPX,Capture Compare X Register"
hexmask.word.byte 0x2 8.--15. 1. "EDGCNTX,Edge Counter X"
hexmask.word.byte 0x2 0.--7. 1. "EDGCMPX,Edge Compare X"
rgroup.word 0x40++0x7
line.word 0x0 "SM0CVAL0,Capture Value 0 Register"
hexmask.word 0x0 0.--15. 1. "CAPTVAL0,Capture Value 0"
line.word 0x2 "SM0CVAL0CYC,Capture Value 0 Cycle Register"
hexmask.word.byte 0x2 0.--3. 1. "CVAL0CYC,Capture Value 0 Cycle"
line.word 0x4 "SM0CVAL1,Capture Value 1 Register"
hexmask.word 0x4 0.--15. 1. "CAPTVAL1,Capture Value 1"
line.word 0x6 "SM0CVAL1CYC,Capture Value 1 Cycle Register"
hexmask.word.byte 0x6 0.--3. 1. "CVAL1CYC,Capture Value 1 Cycle"
group.word 0x5E++0x1
line.word 0x0 "SM0CAPTFILTX,Capture PWM_X Input Filter Register"
bitfld.word 0x0 8.--10. "CAPTX_FILT_CNT,Input Capture Filter Count" "0,1,2,3,4,5,6,7"
hexmask.word.byte 0x0 0.--7. 1. "CAPTX_FILT_PER,Input Capture Filter Period"
rgroup.word 0x60++0x1
line.word 0x0 "SM1CNT,Counter Register"
hexmask.word 0x0 0.--15. 1. "CNT,Counter Register Bits"
group.word 0x62++0x5
line.word 0x0 "SM1INIT,Initial Count Register"
hexmask.word 0x0 0.--15. 1. "INIT,Initial Count Register Bits"
line.word 0x2 "SM1CTRL2,Control 2 Register"
bitfld.word 0x2 15. "DBGEN,Debug Enable" "0,1"
bitfld.word 0x2 13. "INDEP,Independent or Complementary Pair Operation" "0: PWM_A and PWM_B form a complementary PWM pair.,1: PWM_A and PWM_B outputs are independent PWMs."
newline
bitfld.word 0x2 12. "PWM23_INIT,PWM23 Initial Value" "0,1"
bitfld.word 0x2 11. "PWM45_INIT,PWM45 Initial Value" "0,1"
newline
bitfld.word 0x2 10. "PWMX_INIT,PWM_X Initial Value" "0,1"
bitfld.word 0x2 8.--9. "INIT_SEL,Initialization Control Select" "0: Local sync (PWM_X) causes initialization.,1: Master reload from submodule 0 causes..,2: Master sync from submodule 0 causes..,3: EXT_SYNC causes initialization."
newline
bitfld.word 0x2 7. "FRCEN,Force Enable" "0: Initialization from a FORCE_OUT is disabled.,1: Initialization from a FORCE_OUT is enabled."
bitfld.word 0x2 6. "FORCE,Force Initialization" "0,1"
newline
bitfld.word 0x2 3.--5. "FORCE_SEL,Force Select" "0: The local force signal CTRL2[FORCE] from this..,1: The master force signal from submodule 0 is used..,2: The local reload signal from this submodule is..,3: The master reload signal from submodule0 is used..,4: The local sync signal from this submodule is..,5: The master sync signal from submodule0 is used..,6: The external force signal EXT_FORCE from outside..,7: The external sync signal EXT_SYNC from outside.."
bitfld.word 0x2 2. "RELOAD_SEL,Reload Source Select" "0: The local RELOAD signal is used to reload..,1: The master RELOAD signal (from submodule 0) is.."
newline
bitfld.word 0x2 0.--1. "CLK_SEL,Clock Source Select" "0: The IPBus clock is used as the clock for the..,1: EXT_CLK is used as the clock for the local..,2: Submodule 0's clock (AUX_CLK) is used as the..,?"
line.word 0x4 "SM1CTRL,Control Register"
hexmask.word.byte 0x4 12.--15. 1. "LDFQ,Load Frequency"
bitfld.word 0x4 11. "HALF,Half Cycle Reload" "0: Half-cycle reloads disabled.,1: Half-cycle reloads enabled."
newline
bitfld.word 0x4 10. "FULL,Full Cycle Reload" "0: Full-cycle reloads disabled.,1: Full-cycle reloads enabled."
rbitfld.word 0x4 8.--9. "DT,Deadtime" "0,1,2,3"
newline
bitfld.word 0x4 7. "COMPMODE,Compare Mode" "0: The VAL* registers and the PWM counter are..,1: The VAL* registers and the PWM counter are.."
bitfld.word 0x4 4.--6. "PRSC,Prescaler" "0: Prescaler 1,1: Prescaler 2,2: Prescaler 4,3: Prescaler 8,4: Prescaler 16,5: Prescaler 32,6: Prescaler 64,7: Prescaler 128"
newline
bitfld.word 0x4 3. "SPLIT,Split the DBLPWM signal to PWM_A and PWM_B" "0: DBLPWM is not split. PWM_A and PWM_B each have..,1: DBLPWM is split to PWM_A and PWM_B."
bitfld.word 0x4 2. "LDMOD,Load Mode Select" "0: Buffered registers of this submodule are loaded..,1: Buffered registers of this submodule are loaded.."
newline
bitfld.word 0x4 1. "DBLX,PWM_X Double Switching Enable" "0: PWM_X double pulse disabled.,1: PWM_X double pulse enabled."
bitfld.word 0x4 0. "DBLEN,Double Switching Enable" "0: Double switching disabled.,1: Double switching enabled."
group.word 0x6A++0x1
line.word 0x0 "SM1VAL0,Value Register 0"
hexmask.word 0x0 0.--15. 1. "VAL0,Value 0"
group.word 0x6E++0x1
line.word 0x0 "SM1VAL1,Value Register 1"
hexmask.word 0x0 0.--15. 1. "VAL1,Value 1"
group.word 0x72++0x1
line.word 0x0 "SM1VAL2,Value Register 2"
hexmask.word 0x0 0.--15. 1. "VAL2,Value 2"
group.word 0x76++0x1
line.word 0x0 "SM1VAL3,Value Register 3"
hexmask.word 0x0 0.--15. 1. "VAL3,Value 3"
group.word 0x7A++0x1
line.word 0x0 "SM1VAL4,Value Register 4"
hexmask.word 0x0 0.--15. 1. "VAL4,Value 4"
group.word 0x7E++0x1
line.word 0x0 "SM1VAL5,Value Register 5"
hexmask.word 0x0 0.--15. 1. "VAL5,Value 5"
group.word 0x82++0xB
line.word 0x0 "SM1OCTRL,Output Control Register"
rbitfld.word 0x0 15. "PWMA_IN,PWM_A Input" "0,1"
rbitfld.word 0x0 14. "PWMB_IN,PWM_B Input" "0,1"
newline
rbitfld.word 0x0 13. "PWMX_IN,PWM_X Input" "0,1"
bitfld.word 0x0 10. "POLA,PWM_A Output Polarity" "0: PWM_A output not inverted. A high level on the..,1: PWM_A output inverted. A low level on the PWM_A.."
newline
bitfld.word 0x0 9. "POLB,PWM_B Output Polarity" "0: PWM_B output not inverted. A high level on the..,1: PWM_B output inverted. A low level on the PWM_B.."
bitfld.word 0x0 8. "POLX,PWM_X Output Polarity" "0: PWM_X output not inverted. A high level on the..,1: PWM_X output inverted. A low level on the PWM_X.."
newline
bitfld.word 0x0 4.--5. "PWMAFS,PWM_A Fault State" "0: Output is forced to logic 0 state prior to..,1: Output is forced to logic 1 state prior to..,2: Output is put in a high-impedance state.,3: Output is put in a high-impedance state."
bitfld.word 0x0 2.--3. "PWMBFS,PWM_B Fault State" "0: Output is forced to logic 0 state prior to..,1: Output is forced to logic 1 state prior to..,2: Output is put in a high-impedance state.,3: Output is put in a high-impedance state."
newline
bitfld.word 0x0 0.--1. "PWMXFS,PWM_X Fault State" "0: Output is forced to logic 0 state prior to..,1: Output is forced to logic 1 state prior to..,2: Output is put in a high-impedance state.,3: Output is put in a high-impedance state."
line.word 0x2 "SM1STS,Status Register"
rbitfld.word 0x2 14. "RUF,Registers Updated Flag" "0: No register update has occurred since last reload.,1: At least one of the double buffered registers.."
eventfld.word 0x2 13. "REF,Reload Error Flag" "0: No reload error occurred.,1: Reload signal occurred with non-coherent data.."
newline
eventfld.word 0x2 12. "RF,Reload Flag" "0: No new reload cycle since last STS[RF] clearing,1: New reload cycle since last STS[RF] clearing"
eventfld.word 0x2 7. "CFX1,Capture Flag X1" "0,1"
newline
eventfld.word 0x2 6. "CFX0,Capture Flag X0" "0,1"
hexmask.word.byte 0x2 0.--5. 1. "CMPF,Compare Flags"
line.word 0x4 "SM1INTEN,Interrupt Enable Register"
bitfld.word 0x4 13. "REIE,Reload Error Interrupt Enable" "0: STS[REF] CPU interrupt requests disabled,1: STS[REF] CPU interrupt requests enabled"
bitfld.word 0x4 12. "RIE,Reload Interrupt Enable" "0: STS[RF] CPU interrupt requests disabled,1: STS[RF] CPU interrupt requests enabled"
newline
bitfld.word 0x4 7. "CX1IE,Capture X 1 Interrupt Enable" "0: Interrupt request disabled for STS[CFX1].,1: Interrupt request enabled for STS[CFX1]."
bitfld.word 0x4 6. "CX0IE,Capture X 0 Interrupt Enable" "0: Interrupt request disabled for STS[CFX0].,1: Interrupt request enabled for STS[CFX0]."
newline
hexmask.word.byte 0x4 0.--5. 1. "CMPIE,Compare Interrupt Enables"
line.word 0x6 "SM1DMAEN,DMA Enable Register"
bitfld.word 0x6 9. "VALDE,Value Registers DMA Enable" "0: DMA write requests disabled,1: Enabled"
bitfld.word 0x6 8. "FAND,FIFO Watermark AND Control" "0: Selected FIFO watermarks are OR'ed together.,1: Selected FIFO watermarks are AND'ed together."
newline
bitfld.word 0x6 6.--7. "CAPTDE,Capture DMA Enable Source Select" "0: Read DMA requests disabled.,1: Exceeding a FIFO watermark sets the DMA read..,2: A local synchronization (VAL1 matches counter)..,3: A local reload (STS[RF] being set) sets the read.."
bitfld.word 0x6 1. "CX1DE,Capture X1 FIFO DMA Enable" "0,1"
newline
bitfld.word 0x6 0. "CX0DE,Capture X0 FIFO DMA Enable" "0,1"
line.word 0x8 "SM1TCTRL,Output Trigger Control Register"
bitfld.word 0x8 15. "PWAOT0,Mux Output Trigger 0 Source Select" "0: Route the PWM_OUT_TRIG0 signal to PWM_MUX_TRIG0..,1: Route the PWM_A output to the PWM_MUX_TRIG0 port."
bitfld.word 0x8 14. "PWBOT1,Mux Output Trigger 1 Source Select" "0: Route the PWM_OUT_TRIG1 signal to PWM_MUX_TRIG1..,1: Route the PWM_B output to the PWM_MUX_TRIG1 port."
newline
bitfld.word 0x8 12. "TRGFRQ,Trigger Frequency" "0: Trigger outputs are generated during every PWM..,1: Trigger outputs are generated only during the.."
hexmask.word.byte 0x8 0.--5. 1. "OUT_TRIG_EN,Output Trigger Enables"
line.word 0xA "SM1DISMAP0,Fault Disable Mapping Register 0"
hexmask.word.byte 0xA 8.--11. 1. "DIS0X,PWM_X Fault Disable Mask 0"
hexmask.word.byte 0xA 4.--7. 1. "DIS0B,PWM_B Fault Disable Mask 0"
newline
hexmask.word.byte 0xA 0.--3. 1. "DIS0A,PWM_A Fault Disable Mask 0"
group.word 0x90++0x3
line.word 0x0 "SM1DTCNT0,Deadtime Count Register 0"
hexmask.word 0x0 0.--10. 1. "DTCNT0,Deadtime Count Register 0"
line.word 0x2 "SM1DTCNT1,Deadtime Count Register 1"
hexmask.word 0x2 0.--10. 1. "DTCNT1,Deadtime Count Register 1"
group.word 0x9C++0x3
line.word 0x0 "SM1CAPTCTRLX,Capture Control X Register"
rbitfld.word 0x0 13.--15. "CX1CNT,Capture X1 FIFO Word Count" "0,1,2,3,4,5,6,7"
rbitfld.word 0x0 10.--12. "CX0CNT,Capture X0 FIFO Word Count" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x0 8.--9. "CFXWM,Capture X FIFOs Water Mark" "0,1,2,3"
bitfld.word 0x0 7. "EDGCNTX_EN,Edge Counter X Enable" "0: Edge counter disabled and held in reset,1: Edge counter enabled"
newline
bitfld.word 0x0 6. "INP_SELX,Input Select X" "0: Raw PWM_X input signal selected as source.,1: Edge Counter"
bitfld.word 0x0 4.--5. "EDGX1,Edge X 1" "0: Disabled,1: Capture falling edges,2: Capture rising edges,3: Capture any edge"
newline
bitfld.word 0x0 2.--3. "EDGX0,Edge X 0" "0: Disabled,1: Capture falling edges,2: Capture rising edges,3: Capture any edge"
bitfld.word 0x0 1. "ONESHOTX,One Shot Mode Aux" "0: Free Running,1: One Shot"
newline
bitfld.word 0x0 0. "ARMX,Arm X" "0: Input capture operation is disabled.,1: Input capture operation as specified by.."
line.word 0x2 "SM1CAPTCOMPX,Capture Compare X Register"
hexmask.word.byte 0x2 8.--15. 1. "EDGCNTX,Edge Counter X"
hexmask.word.byte 0x2 0.--7. 1. "EDGCMPX,Edge Compare X"
rgroup.word 0xA0++0x7
line.word 0x0 "SM1CVAL0,Capture Value 0 Register"
hexmask.word 0x0 0.--15. 1. "CAPTVAL0,Capture Value 0"
line.word 0x2 "SM1CVAL0CYC,Capture Value 0 Cycle Register"
hexmask.word.byte 0x2 0.--3. 1. "CVAL0CYC,Capture Value 0 Cycle"
line.word 0x4 "SM1CVAL1,Capture Value 1 Register"
hexmask.word 0x4 0.--15. 1. "CAPTVAL1,Capture Value 1"
line.word 0x6 "SM1CVAL1CYC,Capture Value 1 Cycle Register"
hexmask.word.byte 0x6 0.--3. 1. "CVAL1CYC,Capture Value 1 Cycle"
group.word 0xB8++0x1
line.word 0x0 "SM1PHASEDLY,Phase Delay Register"
hexmask.word 0x0 0.--15. 1. "PHASEDLY,Initial Count Register Bits"
group.word 0xBE++0x1
line.word 0x0 "SM1CAPTFILTX,Capture PWM_X Input Filter Register"
bitfld.word 0x0 8.--10. "CAPTX_FILT_CNT,Input Capture Filter Count" "0,1,2,3,4,5,6,7"
hexmask.word.byte 0x0 0.--7. 1. "CAPTX_FILT_PER,Input Capture Filter Period"
rgroup.word 0xC0++0x1
line.word 0x0 "SM2CNT,Counter Register"
hexmask.word 0x0 0.--15. 1. "CNT,Counter Register Bits"
group.word 0xC2++0x5
line.word 0x0 "SM2INIT,Initial Count Register"
hexmask.word 0x0 0.--15. 1. "INIT,Initial Count Register Bits"
line.word 0x2 "SM2CTRL2,Control 2 Register"
bitfld.word 0x2 15. "DBGEN,Debug Enable" "0,1"
bitfld.word 0x2 13. "INDEP,Independent or Complementary Pair Operation" "0: PWM_A and PWM_B form a complementary PWM pair.,1: PWM_A and PWM_B outputs are independent PWMs."
newline
bitfld.word 0x2 12. "PWM23_INIT,PWM23 Initial Value" "0,1"
bitfld.word 0x2 11. "PWM45_INIT,PWM45 Initial Value" "0,1"
newline
bitfld.word 0x2 10. "PWMX_INIT,PWM_X Initial Value" "0,1"
bitfld.word 0x2 8.--9. "INIT_SEL,Initialization Control Select" "0: Local sync (PWM_X) causes initialization.,1: Master reload from submodule 0 causes..,2: Master sync from submodule 0 causes..,3: EXT_SYNC causes initialization."
newline
bitfld.word 0x2 7. "FRCEN,Force Enable" "0: Initialization from a FORCE_OUT is disabled.,1: Initialization from a FORCE_OUT is enabled."
bitfld.word 0x2 6. "FORCE,Force Initialization" "0,1"
newline
bitfld.word 0x2 3.--5. "FORCE_SEL,Force Select" "0: The local force signal CTRL2[FORCE] from this..,1: The master force signal from submodule 0 is used..,2: The local reload signal from this submodule is..,3: The master reload signal from submodule0 is used..,4: The local sync signal from this submodule is..,5: The master sync signal from submodule0 is used..,6: The external force signal EXT_FORCE from outside..,7: The external sync signal EXT_SYNC from outside.."
bitfld.word 0x2 2. "RELOAD_SEL,Reload Source Select" "0: The local RELOAD signal is used to reload..,1: The master RELOAD signal (from submodule 0) is.."
newline
bitfld.word 0x2 0.--1. "CLK_SEL,Clock Source Select" "0: The IPBus clock is used as the clock for the..,1: EXT_CLK is used as the clock for the local..,2: Submodule 0's clock (AUX_CLK) is used as the..,?"
line.word 0x4 "SM2CTRL,Control Register"
hexmask.word.byte 0x4 12.--15. 1. "LDFQ,Load Frequency"
bitfld.word 0x4 11. "HALF,Half Cycle Reload" "0: Half-cycle reloads disabled.,1: Half-cycle reloads enabled."
newline
bitfld.word 0x4 10. "FULL,Full Cycle Reload" "0: Full-cycle reloads disabled.,1: Full-cycle reloads enabled."
rbitfld.word 0x4 8.--9. "DT,Deadtime" "0,1,2,3"
newline
bitfld.word 0x4 7. "COMPMODE,Compare Mode" "0: The VAL* registers and the PWM counter are..,1: The VAL* registers and the PWM counter are.."
bitfld.word 0x4 4.--6. "PRSC,Prescaler" "0: Prescaler 1,1: Prescaler 2,2: Prescaler 4,3: Prescaler 8,4: Prescaler 16,5: Prescaler 32,6: Prescaler 64,7: Prescaler 128"
newline
bitfld.word 0x4 3. "SPLIT,Split the DBLPWM signal to PWM_A and PWM_B" "0: DBLPWM is not split. PWM_A and PWM_B each have..,1: DBLPWM is split to PWM_A and PWM_B."
bitfld.word 0x4 2. "LDMOD,Load Mode Select" "0: Buffered registers of this submodule are loaded..,1: Buffered registers of this submodule are loaded.."
newline
bitfld.word 0x4 1. "DBLX,PWM_X Double Switching Enable" "0: PWM_X double pulse disabled.,1: PWM_X double pulse enabled."
bitfld.word 0x4 0. "DBLEN,Double Switching Enable" "0: Double switching disabled.,1: Double switching enabled."
group.word 0xCA++0x1
line.word 0x0 "SM2VAL0,Value Register 0"
hexmask.word 0x0 0.--15. 1. "VAL0,Value 0"
group.word 0xCE++0x1
line.word 0x0 "SM2VAL1,Value Register 1"
hexmask.word 0x0 0.--15. 1. "VAL1,Value 1"
group.word 0xD2++0x1
line.word 0x0 "SM2VAL2,Value Register 2"
hexmask.word 0x0 0.--15. 1. "VAL2,Value 2"
group.word 0xD6++0x1
line.word 0x0 "SM2VAL3,Value Register 3"
hexmask.word 0x0 0.--15. 1. "VAL3,Value 3"
group.word 0xDA++0x1
line.word 0x0 "SM2VAL4,Value Register 4"
hexmask.word 0x0 0.--15. 1. "VAL4,Value 4"
group.word 0xDE++0x1
line.word 0x0 "SM2VAL5,Value Register 5"
hexmask.word 0x0 0.--15. 1. "VAL5,Value 5"
group.word 0xE2++0xB
line.word 0x0 "SM2OCTRL,Output Control Register"
rbitfld.word 0x0 15. "PWMA_IN,PWM_A Input" "0,1"
rbitfld.word 0x0 14. "PWMB_IN,PWM_B Input" "0,1"
newline
rbitfld.word 0x0 13. "PWMX_IN,PWM_X Input" "0,1"
bitfld.word 0x0 10. "POLA,PWM_A Output Polarity" "0: PWM_A output not inverted. A high level on the..,1: PWM_A output inverted. A low level on the PWM_A.."
newline
bitfld.word 0x0 9. "POLB,PWM_B Output Polarity" "0: PWM_B output not inverted. A high level on the..,1: PWM_B output inverted. A low level on the PWM_B.."
bitfld.word 0x0 8. "POLX,PWM_X Output Polarity" "0: PWM_X output not inverted. A high level on the..,1: PWM_X output inverted. A low level on the PWM_X.."
newline
bitfld.word 0x0 4.--5. "PWMAFS,PWM_A Fault State" "0: Output is forced to logic 0 state prior to..,1: Output is forced to logic 1 state prior to..,2: Output is put in a high-impedance state.,3: Output is put in a high-impedance state."
bitfld.word 0x0 2.--3. "PWMBFS,PWM_B Fault State" "0: Output is forced to logic 0 state prior to..,1: Output is forced to logic 1 state prior to..,2: Output is put in a high-impedance state.,3: Output is put in a high-impedance state."
newline
bitfld.word 0x0 0.--1. "PWMXFS,PWM_X Fault State" "0: Output is forced to logic 0 state prior to..,1: Output is forced to logic 1 state prior to..,2: Output is put in a high-impedance state.,3: Output is put in a high-impedance state."
line.word 0x2 "SM2STS,Status Register"
rbitfld.word 0x2 14. "RUF,Registers Updated Flag" "0: No register update has occurred since last reload.,1: At least one of the double buffered registers.."
eventfld.word 0x2 13. "REF,Reload Error Flag" "0: No reload error occurred.,1: Reload signal occurred with non-coherent data.."
newline
eventfld.word 0x2 12. "RF,Reload Flag" "0: No new reload cycle since last STS[RF] clearing,1: New reload cycle since last STS[RF] clearing"
eventfld.word 0x2 7. "CFX1,Capture Flag X1" "0,1"
newline
eventfld.word 0x2 6. "CFX0,Capture Flag X0" "0,1"
hexmask.word.byte 0x2 0.--5. 1. "CMPF,Compare Flags"
line.word 0x4 "SM2INTEN,Interrupt Enable Register"
bitfld.word 0x4 13. "REIE,Reload Error Interrupt Enable" "0: STS[REF] CPU interrupt requests disabled,1: STS[REF] CPU interrupt requests enabled"
bitfld.word 0x4 12. "RIE,Reload Interrupt Enable" "0: STS[RF] CPU interrupt requests disabled,1: STS[RF] CPU interrupt requests enabled"
newline
bitfld.word 0x4 7. "CX1IE,Capture X 1 Interrupt Enable" "0: Interrupt request disabled for STS[CFX1].,1: Interrupt request enabled for STS[CFX1]."
bitfld.word 0x4 6. "CX0IE,Capture X 0 Interrupt Enable" "0: Interrupt request disabled for STS[CFX0].,1: Interrupt request enabled for STS[CFX0]."
newline
hexmask.word.byte 0x4 0.--5. 1. "CMPIE,Compare Interrupt Enables"
line.word 0x6 "SM2DMAEN,DMA Enable Register"
bitfld.word 0x6 9. "VALDE,Value Registers DMA Enable" "0: DMA write requests disabled,1: Enabled"
bitfld.word 0x6 8. "FAND,FIFO Watermark AND Control" "0: Selected FIFO watermarks are OR'ed together.,1: Selected FIFO watermarks are AND'ed together."
newline
bitfld.word 0x6 6.--7. "CAPTDE,Capture DMA Enable Source Select" "0: Read DMA requests disabled.,1: Exceeding a FIFO watermark sets the DMA read..,2: A local synchronization (VAL1 matches counter)..,3: A local reload (STS[RF] being set) sets the read.."
bitfld.word 0x6 1. "CX1DE,Capture X1 FIFO DMA Enable" "0,1"
newline
bitfld.word 0x6 0. "CX0DE,Capture X0 FIFO DMA Enable" "0,1"
line.word 0x8 "SM2TCTRL,Output Trigger Control Register"
bitfld.word 0x8 15. "PWAOT0,Mux Output Trigger 0 Source Select" "0: Route the PWM_OUT_TRIG0 signal to PWM_MUX_TRIG0..,1: Route the PWM_A output to the PWM_MUX_TRIG0 port."
bitfld.word 0x8 14. "PWBOT1,Mux Output Trigger 1 Source Select" "0: Route the PWM_OUT_TRIG1 signal to PWM_MUX_TRIG1..,1: Route the PWM_B output to the PWM_MUX_TRIG1 port."
newline
bitfld.word 0x8 12. "TRGFRQ,Trigger Frequency" "0: Trigger outputs are generated during every PWM..,1: Trigger outputs are generated only during the.."
hexmask.word.byte 0x8 0.--5. 1. "OUT_TRIG_EN,Output Trigger Enables"
line.word 0xA "SM2DISMAP0,Fault Disable Mapping Register 0"
hexmask.word.byte 0xA 8.--11. 1. "DIS0X,PWM_X Fault Disable Mask 0"
hexmask.word.byte 0xA 4.--7. 1. "DIS0B,PWM_B Fault Disable Mask 0"
newline
hexmask.word.byte 0xA 0.--3. 1. "DIS0A,PWM_A Fault Disable Mask 0"
group.word 0xF0++0x3
line.word 0x0 "SM2DTCNT0,Deadtime Count Register 0"
hexmask.word 0x0 0.--10. 1. "DTCNT0,Deadtime Count Register 0"
line.word 0x2 "SM2DTCNT1,Deadtime Count Register 1"
hexmask.word 0x2 0.--10. 1. "DTCNT1,Deadtime Count Register 1"
group.word 0xFC++0x3
line.word 0x0 "SM2CAPTCTRLX,Capture Control X Register"
rbitfld.word 0x0 13.--15. "CX1CNT,Capture X1 FIFO Word Count" "0,1,2,3,4,5,6,7"
rbitfld.word 0x0 10.--12. "CX0CNT,Capture X0 FIFO Word Count" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x0 8.--9. "CFXWM,Capture X FIFOs Water Mark" "0,1,2,3"
bitfld.word 0x0 7. "EDGCNTX_EN,Edge Counter X Enable" "0: Edge counter disabled and held in reset,1: Edge counter enabled"
newline
bitfld.word 0x0 6. "INP_SELX,Input Select X" "0: Raw PWM_X input signal selected as source.,1: Edge Counter"
bitfld.word 0x0 4.--5. "EDGX1,Edge X 1" "0: Disabled,1: Capture falling edges,2: Capture rising edges,3: Capture any edge"
newline
bitfld.word 0x0 2.--3. "EDGX0,Edge X 0" "0: Disabled,1: Capture falling edges,2: Capture rising edges,3: Capture any edge"
bitfld.word 0x0 1. "ONESHOTX,One Shot Mode Aux" "0: Free Running,1: One Shot"
newline
bitfld.word 0x0 0. "ARMX,Arm X" "0: Input capture operation is disabled.,1: Input capture operation as specified by.."
line.word 0x2 "SM2CAPTCOMPX,Capture Compare X Register"
hexmask.word.byte 0x2 8.--15. 1. "EDGCNTX,Edge Counter X"
hexmask.word.byte 0x2 0.--7. 1. "EDGCMPX,Edge Compare X"
rgroup.word 0x100++0x7
line.word 0x0 "SM2CVAL0,Capture Value 0 Register"
hexmask.word 0x0 0.--15. 1. "CAPTVAL0,Capture Value 0"
line.word 0x2 "SM2CVAL0CYC,Capture Value 0 Cycle Register"
hexmask.word.byte 0x2 0.--3. 1. "CVAL0CYC,Capture Value 0 Cycle"
line.word 0x4 "SM2CVAL1,Capture Value 1 Register"
hexmask.word 0x4 0.--15. 1. "CAPTVAL1,Capture Value 1"
line.word 0x6 "SM2CVAL1CYC,Capture Value 1 Cycle Register"
hexmask.word.byte 0x6 0.--3. 1. "CVAL1CYC,Capture Value 1 Cycle"
group.word 0x118++0x1
line.word 0x0 "SM2PHASEDLY,Phase Delay Register"
hexmask.word 0x0 0.--15. 1. "PHASEDLY,Initial Count Register Bits"
group.word 0x11E++0x1
line.word 0x0 "SM2CAPTFILTX,Capture PWM_X Input Filter Register"
bitfld.word 0x0 8.--10. "CAPTX_FILT_CNT,Input Capture Filter Count" "0,1,2,3,4,5,6,7"
hexmask.word.byte 0x0 0.--7. 1. "CAPTX_FILT_PER,Input Capture Filter Period"
group.word 0x180++0x15
line.word 0x0 "OUTEN,Output Enable Register"
bitfld.word 0x0 8.--10. "PWMA_EN,PWM_A Output Enables" "0,1,2,3,4,5,6,7"
bitfld.word 0x0 4.--6. "PWMB_EN,PWM_B Output Enables" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x0 0.--2. "PWMX_EN,PWM_X Output Enables" "0,1,2,3,4,5,6,7"
line.word 0x2 "MASK,Mask Register"
bitfld.word 0x2 12.--14. "UPDATE_MASK,Update Mask Bits Immediately" "0,1,2,3,4,5,6,7"
bitfld.word 0x2 8.--10. "MASKA,PWM_A Masks" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x2 4.--6. "MASKB,PWM_B Masks" "0,1,2,3,4,5,6,7"
bitfld.word 0x2 0.--2. "MASKX,PWM_X Masks" "0,1,2,3,4,5,6,7"
line.word 0x4 "SWCOUT,Software Controlled Output Register"
bitfld.word 0x4 5. "SM2OUT23,Submodule 2 Software Controlled Output 23" "0: A logic 0 is supplied to the deadtime generator..,1: A logic 1 is supplied to the deadtime generator.."
bitfld.word 0x4 4. "SM2OUT45,Submodule 2 Software Controlled Output 45" "0: A logic 0 is supplied to the deadtime generator..,1: A logic 1 is supplied to the deadtime generator.."
newline
bitfld.word 0x4 3. "SM1OUT23,Submodule 1 Software Controlled Output 23" "0: A logic 0 is supplied to the deadtime generator..,1: A logic 1 is supplied to the deadtime generator.."
bitfld.word 0x4 2. "SM1OUT45,Submodule 1 Software Controlled Output 45" "0: A logic 0 is supplied to the deadtime generator..,1: A logic 1 is supplied to the deadtime generator.."
newline
bitfld.word 0x4 1. "SM0OUT23,Submodule 0 Software Controlled Output 23" "0: A logic 0 is supplied to the deadtime generator..,1: A logic 1 is supplied to the deadtime generator.."
bitfld.word 0x4 0. "SM0OUT45,Submodule 0 Software Controlled Output 45" "0: A logic 0 is supplied to the deadtime generator..,1: A logic 1 is supplied to the deadtime generator.."
line.word 0x6 "DTSRCSEL,PWM Source Select Register"
bitfld.word 0x6 10.--11. "SM2SEL23,Submodule 2 PWM23 Control Select" "0: Generated SM2PWM23 signal used by the deadtime..,1: Inverted generated SM2PWM23 signal used by the..,2: SWCOUT[SM2OUT23] used by the deadtime logic.,3: PWM2_EXTA signal used by the deadtime logic."
bitfld.word 0x6 8.--9. "SM2SEL45,Submodule 2 PWM45 Control Select" "0: Generated SM2PWM45 signal used by the deadtime..,1: Inverted generated SM2PWM45 signal used by the..,2: SWCOUT[SM2OUT45] used by the deadtime logic.,?"
newline
bitfld.word 0x6 6.--7. "SM1SEL23,Submodule 1 PWM23 Control Select" "0: Generated SM1PWM23 signal used by the deadtime..,1: Inverted generated SM1PWM23 signal used by the..,2: SWCOUT[SM1OUT23] used by the deadtime logic.,3: PWM1_EXTA signal used by the deadtime logic."
bitfld.word 0x6 4.--5. "SM1SEL45,Submodule 1 PWM45 Control Select" "0: Generated SM1PWM45 signal used by the deadtime..,1: Inverted generated SM1PWM45 signal used by the..,2: SWCOUT[SM1OUT45] used by the deadtime logic.,?"
newline
bitfld.word 0x6 2.--3. "SM0SEL23,Submodule 0 PWM23 Control Select" "0: Generated SM0PWM23 signal used by the deadtime..,1: Inverted generated SM0PWM23 signal used by the..,2: SWCOUT[SM0OUT23] used by the deadtime logic.,3: PWM0_EXTA signal used by the deadtime logic."
bitfld.word 0x6 0.--1. "SM0SEL45,Submodule 0 PWM45 Control Select" "0: Generated SM0PWM45 signal used by the deadtime..,1: Inverted generated SM0PWM45 signal used by the..,2: SWCOUT[SM0OUT45] used by the deadtime logic.,?"
line.word 0x8 "MCTRL,Master Control Register"
bitfld.word 0x8 12.--14. "IPOL,Current Polarity" "0: PWM23 is used to generate complementary PWM pair..,1: PWM45 is used to generate complementary PWM pair..,?,?,?,?,?,?"
bitfld.word 0x8 8.--10. "RUN,Run" "0: PWM counter is stopped but PWM outputs hold the..,1: PWM counter is started in the corresponding..,?,?,?,?,?,?"
newline
bitfld.word 0x8 4.--6. "CLDOK,Clear Load Okay" "0,1,2,3,4,5,6,7"
bitfld.word 0x8 0.--2. "LDOK,Load Okay" "0: Do not load new values.,1: Load prescaler modulus and PWM values of the..,?,?,?,?,?,?"
line.word 0xA "MCTRL2,Master Control 2 Register"
bitfld.word 0xA 6.--7. "STRETCH_CNT_PRSC,Stretch IPBus clock count prescaler for mux0_trig/mux1_trig/out0_trig/out1_trig/pwma_trig/pwmb_trig" "0: Stretch count is zero no stretch.,1: Stretch..,2: Stretch..,3: Stretch.."
bitfld.word 0xA 2.--3. "WRPROT,Write protect" "0: Write protection off (default).,1: Write protection on.,2: Write protection off and locked until chip reset.,3: Write protection on and locked until chip reset."
line.word 0xC "FCTRL0,Fault Control Register"
hexmask.word.byte 0xC 12.--15. 1. "FLVL,Fault Level"
hexmask.word.byte 0xC 8.--11. 1. "FAUTO,Automatic Fault Clearing"
newline
hexmask.word.byte 0xC 4.--7. 1. "FSAFE,Fault Safety Mode"
hexmask.word.byte 0xC 0.--3. 1. "FIE,Fault Interrupt Enables"
line.word 0xE "FSTS0,Fault Status Register"
hexmask.word.byte 0xE 12.--15. 1. "FHALF,Half Cycle Fault Recovery"
hexmask.word.byte 0xE 8.--11. 1. "FFPIN,Filtered Fault Pins"
newline
hexmask.word.byte 0xE 4.--7. 1. "FFULL,Full Cycle"
hexmask.word.byte 0xE 0.--3. 1. "FFLAG,Fault Flags"
line.word 0x10 "FFILT0,Fault Filter Register"
bitfld.word 0x10 15. "GSTR,Fault Glitch Stretch Enable" "0: Fault input glitch stretching is disabled.,1: Input fault signals are stretched to at least 2.."
bitfld.word 0x10 8.--10. "FILT_CNT,Fault Filter Count" "0,1,2,3,4,5,6,7"
newline
hexmask.word.byte 0x10 0.--7. 1. "FILT_PER,Fault Filter Period"
line.word 0x12 "FTST0,Fault Test Register"
bitfld.word 0x12 0. "FTEST,Fault Test" "0: No fault,1: Cause a simulated fault"
line.word 0x14 "FCTRL20,Fault Control 2 Register"
hexmask.word.byte 0x14 0.--3. 1. "NOCOMB,No Combinational Path From Fault Input To PWM Output"
tree.end
endif
tree.end
tree "FMC (Flash Memory Controller)"
base ad:0x40094000
group.long 0x20++0x3
line.long 0x0 "REMAP,Data Remap"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x0 24.--28. 1. "LIMDP,LIMDP Remapping Address"
hexmask.long.byte 0x0 16.--20. 1. "LIM,LIM Remapping Address"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x0 24.--30. 1. "LIMDP,LIMDP Remapping Address"
endif
sif (cpuis("MC?A145*"))
hexmask.long.byte 0x0 24.--30. 1. "LIMDP,LIMDP Remapping Address"
endif
sif (cpuis("MC?A146*"))
hexmask.long.byte 0x0 24.--30. 1. "LIMDP,LIMDP Remapping Address"
endif
sif (cpuis("MC?A152*"))
hexmask.long.byte 0x0 24.--28. 1. "LIMDP,LIMDP Remapping Address"
endif
sif (cpuis("MC?A153*"))
hexmask.long.byte 0x0 24.--28. 1. "LIMDP,LIMDP Remapping Address"
endif
sif (cpuis("MC?A154*"))
hexmask.long.byte 0x0 24.--30. 1. "LIMDP,LIMDP Remapping Address"
endif
sif (cpuis("MC?A155*"))
hexmask.long.byte 0x0 24.--30. 1. "LIMDP,LIMDP Remapping Address"
newline
endif
sif (cpuis("MC?A156*"))
hexmask.long.byte 0x0 24.--30. 1. "LIMDP,LIMDP Remapping Address"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x0 16.--22. 1. "LIM,LIM Remapping Address"
endif
sif (cpuis("MC?A145*"))
hexmask.long.byte 0x0 16.--22. 1. "LIM,LIM Remapping Address"
endif
sif (cpuis("MC?A146*"))
hexmask.long.byte 0x0 16.--22. 1. "LIM,LIM Remapping Address"
endif
sif (cpuis("MC?A152*"))
hexmask.long.byte 0x0 16.--20. 1. "LIM,LIM Remapping Address"
endif
sif (cpuis("MC?A153*"))
hexmask.long.byte 0x0 16.--20. 1. "LIM,LIM Remapping Address"
endif
sif (cpuis("MC?A154*"))
hexmask.long.byte 0x0 16.--22. 1. "LIM,LIM Remapping Address"
endif
sif (cpuis("MC?A155*"))
hexmask.long.byte 0x0 16.--22. 1. "LIM,LIM Remapping Address"
endif
sif (cpuis("MC?A156*"))
hexmask.long.byte 0x0 16.--22. 1. "LIM,LIM Remapping Address"
newline
endif
bitfld.long 0x0 0. "REMAPLK,Remap Lock Enable" "0: Lock disabled: can write to REMAP,1: Lock enabled: cannot write to REMAP"
tree.end
tree "FMU (Flash Memory Module)"
base ad:0x40095000
group.long 0x0++0xB
line.long 0x0 "FSTAT,Flash Status Register"
eventfld.long 0x0 31. "PERDY,Program-Erase Ready Control/Status Flag" "0: Program or sector erase command operation not..,1: Program or sector erase command operation ready.."
rbitfld.long 0x0 24.--25. "PEWEN,Program-Erase Write Enable Control" "0: Writes are not enabled,1: Writes are enabled for one flash or IFR phrase..,2: Writes are enabled for one flash or IFR page..,?"
newline
rbitfld.long 0x0 17. "SALV_USED,Salvage Used for Erase operation" "0: Salvage not used during last operation,1: Salvage used during the last erase operation"
eventfld.long 0x0 16. "DFDIF,Double Bit Fault Detect Interrupt Flag" "0: Double bit fault not detected during a valid..,1: Double bit fault detected (or FCTRL[FDFD] is.."
newline
hexmask.long.byte 0x0 12.--15. 1. "CMDDID,Command domain ID"
rbitfld.long 0x0 11. "CMDP,Command protection status flag" "0: Command protection level and domain ID are stale,1: Command protection level (CMDPRT) and domain ID.."
newline
rbitfld.long 0x0 8.--9. "CMDPRT,Command protection level" "0: Secure normal access,1: Secure privileged access,2: Nonsecure normal access,3: Nonsecure privileged access"
eventfld.long 0x0 7. "CCIF,Command Complete Interrupt Flag" "0: Flash command initialization or power mode..,1: Flash command initialization or power mode.."
newline
eventfld.long 0x0 6. "CWSABT,Command Write Sequence Abort Flag" "0: Command write sequence not aborted,1: Command write sequence aborted"
eventfld.long 0x0 5. "ACCERR,Command Access Error Flag" "0: No access error detected,1: Access error detected"
newline
eventfld.long 0x0 4. "PVIOL,Command Protection Violation Flag" "0: No protection violation detected,1: Protection violation detected"
eventfld.long 0x0 2. "CMDABT,Command Abort Flag" "0: No command abort detected,1: Command abort detected"
newline
rbitfld.long 0x0 0. "FAIL,Command Fail Flag" "0: Error not detected,1: Error detected"
line.long 0x4 "FCNFG,Flash Configuration Register"
hexmask.long.byte 0x4 28.--31. 1. "ERSIEN1,Erase IFR Sector Enable - Block 1 (for dual block configs)"
hexmask.long.byte 0x4 24.--27. 1. "ERSIEN0,Erase IFR Sector Enable - Block 0"
newline
bitfld.long 0x4 16. "DFDIE,Double Bit Fault Detect Interrupt Enable" "0: Double bit fault detect interrupt disabled,1: Double bit fault detect interrupt enabled"
rbitfld.long 0x4 8. "ERSREQ,Mass Erase Request" "0: No request or request complete,1: Request to run the Mass Erase operation"
newline
bitfld.long 0x4 7. "CCIE,Command Complete Interrupt Enable" "0: Command complete interrupt disabled,1: Command complete interrupt enabled"
line.long 0x8 "FCTRL,Flash Control Register"
bitfld.long 0x8 24. "ABTREQ,Abort Request" "0: No request to abort a command write sequence,1: Request to abort a command write sequence"
bitfld.long 0x8 16. "FDFD,Force Double Bit Fault Detect" "0: FSTAT[DFDIF] sets only if a double bit fault is..,1: FSTAT[DFDIF] sets during any valid flash read.."
newline
bitfld.long 0x8 8. "LSACTIVE,Low speed active mode" "0: Full speed active mode requested,1: Low speed active mode requested"
hexmask.long.byte 0x8 0.--3. 1. "RWSC,Read Wait-State Control"
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x10)++0x3
line.long 0x0 "FCCOB$1,Flash Common Command Object Registers"
hexmask.long 0x0 0.--31. 1. "CCOBn,CCOBn"
repeat.end
tree.end
tree "FMU_TEST (Flash Memory Test Module)"
base ad:0x40096000
group.long 0x0++0xB
line.long 0x0 "FSTAT,Flash Status Register"
bitfld.long 0x0 31. "PERDY,Program/Erase Ready Control/Status Flag" "0: Program or sector erase command operation is not..,1: Program or sector erase command operation is.."
newline
bitfld.long 0x0 24.--25. "PEWEN,Program-Erase Write Enable Control" "0: Writes are not enabled,1: Writes are enabled for one flash or IFR phrase..,2: Writes are enabled for one flash or IFR page..,?"
newline
bitfld.long 0x0 17. "SALV_USED,Salvage Used for Erase operation" "0: Salvage not used during the last operation,1: Salvage used during the last erase operation"
newline
rbitfld.long 0x0 16. "DFDIF,Double Bit Fault Detect Interrupt Flag" "0: Double bit fault not detected during a valid..,1: Double bit fault detected (or FCTRL[FDFD] is.."
newline
hexmask.long.byte 0x0 12.--15. 1. "CMDDID,Command Domain ID"
newline
rbitfld.long 0x0 11. "CMDP,Command Protection Status Flag" "0: Command protection level and domain ID are stale,1: Command protection level (CMDPRT) and domain ID.."
newline
rbitfld.long 0x0 8.--9. "CMDPRT,Command Protection Level" "0: Secure normal access,1: Secure privileged access,2: Nonsecure normal access,3: Nonsecure privileged access"
newline
eventfld.long 0x0 7. "CCIF,Command Complete Interrupt Flag" "0: Flash command or initialization in progress,1: Flash command or initialization has completed"
newline
rbitfld.long 0x0 6. "CWSABT,Command Write Sequence Abort Flag" "0: Command write sequence not aborted,1: Command write sequence aborted"
newline
eventfld.long 0x0 5. "ACCERR,Command Access Error Flag" "0: No access error detected,1: Access error detected"
newline
eventfld.long 0x0 4. "PVIOL,Command Protection Violation Flag" "0: No protection violation detected,1: Protection violation detected"
newline
rbitfld.long 0x0 2. "CMDABT,Command Abort Flag" "0: No command abort detected,1: Command abort detected"
newline
bitfld.long 0x0 0. "FAIL,Command Fail Flag" "0: Error not detected,1: Error detected"
line.long 0x4 "FCNFG,Flash Configuration Register"
hexmask.long.byte 0x4 28.--31. 1. "ERSIEN1,Erase IFR Sector Enable - Block 1 (for dual block configs)"
newline
hexmask.long.byte 0x4 24.--27. 1. "ERSIEN0,Erase IFR Sector Enable - Block 0"
newline
rbitfld.long 0x4 16. "DFDIE,Double Bit Fault Detect Interrupt Enable" "0: Double bit fault detect interrupt disabled,1: Double bit fault detect interrupt enabled; an.."
newline
rbitfld.long 0x4 8. "ERSREQ,Mass Erase (Erase All) Request" "0: No request or request complete,1: Request to run the Mass Erase operation"
newline
rbitfld.long 0x4 7. "CCIE,Command Complete Interrupt Enable" "0: Command complete interrupt disabled,1: Command complete interrupt enabled. An interrupt.."
line.long 0x8 "FCTRL,Flash Control Register"
rbitfld.long 0x8 24. "ABTREQ,Abort Request" "0: No request to abort a command write sequence,1: Request to abort a command write sequence"
newline
rbitfld.long 0x8 16. "FDFD,Force Double Bit Fault Detect" "0: FSTAT[DFDIF] sets only if a double bit fault is..,1: FSTAT[DFDIF] sets during any valid flash read.."
newline
bitfld.long 0x8 8. "LSACTIVE,Low Speed Active Mode" "0: Full speed active mode requested,1: Low speed active mode requested"
newline
hexmask.long.byte 0x8 0.--3. 1. "RWSC,Read Wait-State Control"
rgroup.long 0xC++0x3
line.long 0x0 "FTEST,Flash Test Register"
bitfld.long 0x0 4. "TMELOCK,Test Mode Entry Lock" "0: FTEST register not locked from accepting writes,1: FTEST register locked from accepting writes"
newline
bitfld.long 0x0 3. "TMODE,Test Mode Status" "0: Test mode not active,1: Test mode active"
newline
bitfld.long 0x0 2. "TME,Test Mode Entry" "0: Test mode entry not requested,1: Test mode entry requested"
newline
bitfld.long 0x0 1. "TMEWR,Test Mode Entry Writable" "0: TME bit is not writable,1: TME bit is writable"
newline
bitfld.long 0x0 0. "TMECTL,Test Mode Entry Control" "0: FTEST register always reads 0 and writes to..,1: FTEST register is readable and can be written to.."
group.long 0x10++0x1F
line.long 0x0 "FCCOB0,Flash Command Control 0 Register"
hexmask.long.byte 0x0 0.--7. 1. "CMDCODE,Command code"
line.long 0x4 "FCCOB1,Flash Command Control 1 Register"
hexmask.long.byte 0x4 0.--7. 1. "CMDOPT,Command options"
line.long 0x8 "FCCOB2,Flash Command Control 2 Register"
hexmask.long 0x8 0.--31. 1. "CMDADDR,Command starting address"
line.long 0xC "FCCOB3,Flash Command Control 3 Register"
hexmask.long 0xC 0.--31. 1. "CMDADDRE,Command ending address"
line.long 0x10 "FCCOB4,Flash Command Control 4 Register"
hexmask.long 0x10 0.--31. 1. "CMDDATA0,Command data word 0"
line.long 0x14 "FCCOB5,Flash Command Control 5 Register"
hexmask.long 0x14 0.--31. 1. "CMDDATA1,Command data word 1"
line.long 0x18 "FCCOB6,Flash Command Control 6 Register"
hexmask.long 0x18 0.--31. 1. "CMDDATA2,Command data word 2"
line.long 0x1C "FCCOB7,Flash Command Control 7 Register"
hexmask.long 0x1C 0.--31. 1. "CMDDATA3,Command data word 3"
group.long 0x100++0x7
line.long 0x0 "RESET_STATUS,FMU Initialization Tracking Register"
bitfld.long 0x0 19. "RECALL_DATA_MISMATCH,Recall Data Mismatch" "0: Data read towards end of reset matched data read..,1: Data read towards end of reset did not match.."
newline
bitfld.long 0x0 18. "RST_PATCH_LD,Reset Patch Required" "0: No patch required to be loaded during reset,1: Patch loaded during reset"
newline
hexmask.long.byte 0x0 10.--17. 1. "SOC_TRIM_DF_ERR,ECC Double Fault during load of SoC Trim phrases"
newline
bitfld.long 0x0 9. "RST_DF_ERR,ECC Double Fault during Reset Recovery" "0: No double-bit faults detected during..,1: Double-bit ECC fault was detected during.."
newline
bitfld.long 0x0 8. "RST_SF_ERR,ECC Single Fault during Reset Recovery" "0: No single-bit faults detected during..,1: At least one single ECC fault was detected.."
newline
bitfld.long 0x0 7. "INIT_DONE,Initialization Done" "0: All initialization steps did not complete,1: All initialization steps completed"
newline
bitfld.long 0x0 6. "RPR_DONE,Array Repair Complete" "0: Repair registers have not been loaded,1: Repair registers have been loaded"
newline
bitfld.long 0x0 5. "SOC_TRIM_DONE,SoC Trim Complete" "0: SoC Trim registers have not been updated,1: All SoC Trim registers have been updated"
newline
bitfld.long 0x0 4. "SOC_TRIM_ECC,Status of the C0DE_C0DEh check for enabling ECC decoder during reads of SoC trim settings" "0: C0DE_C0DEh check failed,1: C0DE_C0DEh check passed"
newline
bitfld.long 0x0 3. "SOC_TRIM_EN,Status of the C0DE_C0DEh check to enable loading of the SoC trim settings" "0: C0DE_C0DEh check not attempted,1: C0DE_C0DEh check completed"
newline
bitfld.long 0x0 2. "FMU_PARM_DONE,FMU Register Load Complete" "0: FMU registers have not been loaded,1: FMU registers have been loaded"
newline
bitfld.long 0x0 1. "FMU_PARM_EN,Status of the C0DE_C0DEh check to enable loading of the FMU parameters" "0: C0DE_C0DEh check not attempted,1: C0DE_C0DEh check completed"
newline
bitfld.long 0x0 0. "ARY_TRIM_DONE,Array Trim Complete" "0: Recall register load operation has not been..,1: Recall register load operation has completed"
line.long 0x4 "MCTL,FMU Control Register"
bitfld.long 0x4 31. "OSC_H,Oscillator control" "0: Use APB clock,1: Use a known fixed-frequency clock e.g. 12 MHz"
newline
bitfld.long 0x4 29. "BIST_PWR_DIS,BIST Power Mode Disable" "0: BIST DFT logic has full control of SLM and LVE..,1: BIST DFT logic has no control of SLM and LVE;.."
newline
bitfld.long 0x4 26. "FMU_ECC_CTL,FMU ECC Control" "0: ECC is enabled for FMU program operations,1: ECC is disabled for FMU program operations"
newline
bitfld.long 0x4 25. "SOC_ECC_CTL,SOC ECC Control" "0: ECC is enabled for SOC read access,1: ECC is disabled for SOC read access"
newline
bitfld.long 0x4 24. "SALV_DIS,Salvage Disable" "0: Salvage enabled (ECC used during erase verify),1: Salvage disabled (ECC not used during erase.."
newline
bitfld.long 0x4 21. "SMWR_CTL,SMWR IP Control" "0: SMWR IP disabled,1: SMWR IP enabled"
newline
bitfld.long 0x4 20. "BIST_CTL,BIST IP Control" "0: BIST IP disabled,1: BIST IP enabled"
newline
bitfld.long 0x4 19. "SCAN_OBS,Scan Observability Control" "0: Normal functional behavior,1: Enables observation of signals that may.."
newline
bitfld.long 0x4 16. "ERSAACK,Mass Erase (Erase All) Acknowledge" "0: Mass Erase operation is not active (operation..,1: Mass Erase operation is active (controller.."
newline
hexmask.long.byte 0x4 12.--15. 1. "MRGRD1,Margin Read Setting for Erase"
newline
hexmask.long.byte 0x4 8.--11. 1. "MRGRD0,Margin Read Setting for Program"
newline
bitfld.long 0x4 7. "MRGRDDIS,Margin Read Disable" "0: Margin Read Settings are enabled,1: Margin Read Settings are disabled"
newline
bitfld.long 0x4 6. "CWSABTEN,Command Write Sequence Abort Enable" "0: CWS abort feature is disabled,1: CWS abort feature is enabled"
newline
bitfld.long 0x4 5. "RFCMDEN,RF Active Command Enable Control" "0: Flash commands blocked (CCIF not writable),1: Flash commands allowed"
newline
bitfld.long 0x4 4. "MASTER_REPAIR_EN,Master Repair Enable" "0: Repair disabled,1: Repair enable determined by bit 0 of each REPAIR.."
newline
bitfld.long 0x4 3. "LSACTWREN,LSACTIVE Write Enable" "0: Unrestricted write access allowed,1: Write access while CMP set must match CMDDID and.."
newline
bitfld.long 0x4 2. "LSACT_EN,LSACTIVE Feature Enable" "0: LSACTIVE feature disabled completely:..,1: LSACTIVE feature fully enabled and controllable.."
newline
bitfld.long 0x4 0. "COREHLD,Core Hold" "0: CPU access is allowed,1: CPU access must be blocked"
rgroup.long 0x108++0x3
line.long 0x0 "BSEL_GEN,FMU Block Select Generation Register"
bitfld.long 0x0 8.--9. "MBSEL_GEN,Generated MBSEL" "0,1,2,3"
newline
bitfld.long 0x0 0.--1. "SBSEL_GEN,Generated SBSEL" "0,1,2,3"
group.long 0x10C++0x3
line.long 0x0 "PWR_OPT,Power Mode Options Register"
bitfld.long 0x0 31. "PD_TIMER_EN,Power Down BIST Timer Enable" "0: BIST timer is not triggered during Power Down..,1: BIST timer is triggered during Power Down.."
newline
hexmask.long.word 0x0 16.--25. 1. "SLM_COUNT,Sleep Recovery Timer Count"
newline
hexmask.long.byte 0x0 0.--7. 1. "PD_CDIV,Power Down Clock Divider Setting"
rgroup.long 0x110++0x3
line.long 0x0 "CMD_CHECK,FMU Command Check Register"
bitfld.long 0x0 10. "ILLEGAL_CMD,Illegal Command" "0: Command is legal,1: Command is illegal"
newline
bitfld.long 0x0 9. "OPTION_FAIL,Option Check Fail" "0: Option check passes for read command or command..,1: Option check fails for read command"
newline
bitfld.long 0x0 8. "SCR_ALIGN_CHK,Sector Alignment Check" "0: No sector alignment check,1: Sector alignment check"
newline
bitfld.long 0x0 7. "RANGE_FAIL,Address Range Fail" "0: The address range is valid,1: The address range is invalid"
newline
bitfld.long 0x0 6. "ALL_CMD,All Blocks Command" "0: The command operates on a single flash block,1: The command operates on all flash blocks"
newline
bitfld.long 0x0 5. "IFR_CMD,IFR Command" "0: The command operates on a main flash address,1: The command operates on an IFR address"
newline
bitfld.long 0x0 4. "ADDR_FAIL,Address Fail" "0: The address is within the flash or IFR address..,1: The address is outside the flash or IFR address.."
newline
bitfld.long 0x0 3. "ALIGNFAIL_BLK,Block Alignment Fail" "0: The address is block-aligned,1: The address is not block-aligned"
newline
bitfld.long 0x0 2. "ALIGNFAIL_SCR,Sector Alignment Fail" "0: The address is sector-aligned,1: The address is not sector-aligned"
newline
bitfld.long 0x0 1. "ALIGNFAIL_PG,Page Alignment Fail" "0: The address is page-aligned,1: The address is not page-aligned"
newline
bitfld.long 0x0 0. "ALIGNFAIL_PHR,Phrase Alignment Fail" "0: The address is phrase-aligned,1: The address is not phrase-aligned"
group.long 0x120++0xB
line.long 0x0 "BSEL,FMU Block Select Register"
bitfld.long 0x0 8.--9. "MBSEL,Master Block Select" "0,1,2,3"
newline
bitfld.long 0x0 0.--1. "SBSEL,Slave Block Select" "0,1,2,3"
line.long 0x4 "MSIZE,FMU Memory Size Register"
hexmask.long.byte 0x4 0.--7. 1. "MAXADDR0,Size of Flash Block 0"
line.long 0x8 "FLASH_RD_ADD,Flash Read Address Register"
hexmask.long 0x8 0.--31. 1. "FLASH_RD_ADD,Flash Read Address"
group.long 0x130++0xB
line.long 0x0 "FLASH_STOP_ADD,Flash Stop Address Register"
hexmask.long 0x0 0.--31. 1. "FLASH_STOP_ADD,Flash Stop Address"
line.long 0x4 "FLASH_RD_CTRL,Flash Read Control Register"
bitfld.long 0x4 2. "SINGLE_RD,Single Flash Read" "0: Normal UINT operation,1: UINT configured for single cycle reads"
newline
bitfld.long 0x4 1. "WIDE_LOAD,Wide Load Enable" "0: Wide load mode disabled (default),1: Wide load mode enabled"
newline
bitfld.long 0x4 0. "FLASH_RD,Flash Read Enable" "0: Manual flash read not enabled.(default),1: Manual flash read enabled"
line.long 0x8 "MM_ADDR,Memory Map Address Register"
hexmask.long 0x8 0.--31. 1. "MM_ADDR,Memory Map Address"
group.long 0x140++0x3B
line.long 0x0 "MM_WDATA,Memory Map Write Data Register"
hexmask.long 0x0 0.--31. 1. "MM_WDATA,Memory Map Write Data"
line.long 0x4 "MM_CTL,Memory Map Control Register"
bitfld.long 0x4 3. "FORCE_SW_CLK,Force Switch Clock" "0: Switch clock not forced on (gated normally),1: Switch clock forced on"
newline
bitfld.long 0x4 2. "BIST_ON,BIST on" "0: BIST enable not forced by user interface,1: BIST enable control by user interface"
newline
bitfld.long 0x4 1. "MM_RD,Register R/W Control" "0: Write to register,1: Read register"
newline
bitfld.long 0x4 0. "MM_SEL,Register Access Enable" "0,1"
line.long 0x8 "UINT_CTL,User Interface Control Register"
bitfld.long 0x8 1. "DBERR,Double-Bit ECC Fault Detect" "0: No double-bit fault detected during UINT-driven..,1: Double-bit fault detected during UINT-driven.."
newline
bitfld.long 0x8 0. "SET_FAIL,Set Fail On Exit" "0: FAIL flag should not be set on command exit (no..,1: FAIL flag should be set on command exit"
line.long 0xC "RD_DATA0,Read Data 0 Register"
hexmask.long 0xC 0.--31. 1. "RD_DATA0,Read Data 0"
line.long 0x10 "RD_DATA1,Read Data 1 Register"
hexmask.long 0x10 0.--31. 1. "RD_DATA1,Read Data 1"
line.long 0x14 "RD_DATA2,Read Data 2 Register"
hexmask.long 0x14 0.--31. 1. "RD_DATA2,Read Data 2"
line.long 0x18 "RD_DATA3,Read Data 3 Register"
hexmask.long 0x18 0.--31. 1. "RD_DATA3,Read Data 3"
line.long 0x1C "PARITY,Parity Register"
hexmask.long.word 0x1C 0.--8. 1. "PARITY,Read data [136:128]"
line.long 0x20 "RD_PATH_CTRL_STATUS,Read Path Control and Status Register"
bitfld.long 0x20 31. "LAST_READ,Last Read" "0: Latest read not last in multi-address operation,1: Latest read last in multi-address operation"
newline
bitfld.long 0x20 30. "BIST_ECC_EN,BIST ECC Enable" "0: ECC correction disabled,1: ECC correction enabled"
newline
bitfld.long 0x20 29. "SMW_ARRAY1_SMW0_SEL,SMW_ARRAY1_SMW0_SEL" "0: Select block 0,1: Select block 1"
newline
bitfld.long 0x20 28. "CPY_PHRASE_EN,Copy Phrase Enable" "0: Copy Flash read data disabled,1: Copy Flash read data enabled"
newline
rbitfld.long 0x20 27. "SBERR_REG,Single-Bit Error" "0: Single-bit fault not detected,1: Single-bit fault detected on previous UINT flash.."
newline
rbitfld.long 0x20 26. "DBERR_REG,Double-Bit Error" "0: Double-bit fault not detected,1: Double-bit fault detected on previous UINT flash.."
newline
bitfld.long 0x20 25. "WR_PATH_ECC_EN,Write Path ECC Enable" "0: ECC encoding disabled,1: ECC encoding enabled"
newline
bitfld.long 0x20 24. "WR_PATH_EN,Write Path Enable" "0: Writes to BIST setting registers driven by..,1: Writes to BIST setting registers driven by SMW_DIN"
newline
hexmask.long.byte 0x20 20.--23. 1. "AD_SET,Multi-Cycle Address Setup Time"
newline
bitfld.long 0x20 19. "BIST_MUX_TO_SMW,BIST Mux to SMW" "0: BIST drives fields,1: SMW registers drive fields"
newline
bitfld.long 0x20 18. "CPY_PAR_EN,Copy Parity Enable" "0: Copy parity disabled,1: Copy parity enabled"
newline
bitfld.long 0x20 17. "MISR_EN,MISR Enable" "0: MISR option disabled (default),1: MISR option enabled"
newline
bitfld.long 0x20 16. "ECC_ENABLEB,ECC Decoder Control" "0: ECC decoder enabled (default),1: ECC decoder disabled"
newline
hexmask.long.byte 0x20 8.--15. 1. "SE_SIZE,SE Clock Periods"
newline
hexmask.long.byte 0x20 0.--7. 1. "RD_CAPT,Read Capture Clock Periods"
line.long 0x24 "SMW_DIN0,SMW DIN 0 Register"
hexmask.long 0x24 0.--31. 1. "SMW_DIN0,SMW DIN 0"
line.long 0x28 "SMW_DIN1,SMW DIN 1 Register"
hexmask.long 0x28 0.--31. 1. "SMW_DIN1,SMW DIN 1"
line.long 0x2C "SMW_DIN2,SMW DIN 2 Register"
hexmask.long 0x2C 0.--31. 1. "SMW_DIN2,SMW DIN 2"
line.long 0x30 "SMW_DIN3,SMW DIN 3 Register"
hexmask.long 0x30 0.--31. 1. "SMW_DIN3,SMW DIN 3"
line.long 0x34 "SMW_ADDR,SMW Address Register"
hexmask.long 0x34 0.--31. 1. "SMW_ADDR,SMW Address"
line.long 0x38 "SMW_CMD_WAIT,SMW Command and Wait Register"
bitfld.long 0x38 4. "WAIT_AUTO_SET,SMW Wait Auto Set" "0,1"
newline
bitfld.long 0x38 3. "WAIT_EN,SMW Wait Enable" "0: Wait feature disabled,1: Wait feature enabled"
newline
bitfld.long 0x38 0.--2. "CMD,SMW Command" "0: IDLE,1: ABORT,2: SME2 to one-shot mass erase,3: SME3 to sector erase on selected array,4: SMP1 to program phrase or page on selected array..,?,6: SMP2 to program phrase or page on selected array..,?"
rgroup.long 0x17C++0x3
line.long 0x0 "SMW_STATUS,SMW Status Register"
bitfld.long 0x0 2. "BIST_BUSY,BIST Busy" "0: BIST Command not active,1: BIST Command is active"
newline
bitfld.long 0x0 1. "SMW_BUSY,SMW Busy" "0: SMW command not active,1: SMW command is active"
newline
bitfld.long 0x0 0. "SMW_ERR,SMW Error" "0: Error not detected,1: Error detected"
group.long 0x180++0x7F
line.long 0x0 "SOCTRIM0_0,SoC Trim Phrase 0 Word 0 Register"
hexmask.long 0x0 0.--31. 1. "TRIM0_0,TRIM0_0"
line.long 0x4 "SOCTRIM0_1,SoC Trim Phrase 0 Word 1 Register"
hexmask.long 0x4 0.--31. 1. "TRIM0_1,TRIM0_1"
line.long 0x8 "SOCTRIM0_2,SoC Trim Phrase 0 Word 2 Register"
hexmask.long 0x8 0.--31. 1. "TRIM0_2,TRIM0_2"
line.long 0xC "SOCTRIM0_3,SoC Trim Phrase 0 Word 3 Register"
hexmask.long 0xC 0.--31. 1. "TRIM0_3,TRIM0_3"
line.long 0x10 "SOCTRIM1_0,SoC Trim Phrase 1 Word 0 Register"
hexmask.long 0x10 0.--31. 1. "TRIM1_0,TRIM1_0"
line.long 0x14 "SOCTRIM1_1,SoC Trim Phrase 1 Word 1 Register"
hexmask.long 0x14 0.--31. 1. "TRIM1_1,TRIM1_1"
line.long 0x18 "SOCTRIM1_2,SoC Trim Phrase 1 Word 2 Register"
hexmask.long 0x18 0.--31. 1. "TRIM1_2,TRIM1_2"
line.long 0x1C "SOCTRIM1_3,SoC Trim Phrase 1 Word 3 Register"
hexmask.long 0x1C 0.--31. 1. "TRIM1_3,TRIM1_3"
line.long 0x20 "SOCTRIM2_0,SoC Trim Phrase 2 Word 0 Register"
hexmask.long 0x20 0.--31. 1. "TRIM2_0,TRIM2_0"
line.long 0x24 "SOCTRIM2_1,SoC Trim Phrase 2 Word 1 Register"
hexmask.long 0x24 0.--31. 1. "TRIM2_1,TRIM2_1"
line.long 0x28 "SOCTRIM2_2,SoC Trim Phrase 2 Word 2 Register"
hexmask.long 0x28 0.--31. 1. "TRIM2_2,TRIM2_2"
line.long 0x2C "SOCTRIM2_3,SoC Trim Phrase 2 Word 3 Register"
hexmask.long 0x2C 0.--31. 1. "TRIM2_3,TRIM2_3"
line.long 0x30 "SOCTRIM3_0,SoC Trim Phrase 3 Word 0 Register"
hexmask.long 0x30 0.--31. 1. "TRIM3_0,TRIM3_0"
line.long 0x34 "SOCTRIM3_1,SoC Trim Phrase 3 Word 1 Register"
hexmask.long 0x34 0.--31. 1. "TRIM3_1,TRIM3_1"
line.long 0x38 "SOCTRIM3_2,SoC Trim Phrase 3 Word 2 Register"
hexmask.long 0x38 0.--31. 1. "TRIM3_2,TRIM3_2"
line.long 0x3C "SOCTRIM3_3,SoC Trim Phrase 3 Word 3 Register"
hexmask.long 0x3C 0.--31. 1. "TRIM3_3,TRIM3_3"
line.long 0x40 "SOCTRIM4_0,SoC Trim Phrase 4 Word 0 Register"
hexmask.long 0x40 0.--31. 1. "TRIM4_0,TRIM4_0"
line.long 0x44 "SOCTRIM4_1,SoC Trim Phrase 4 Word 1 Register"
hexmask.long 0x44 0.--31. 1. "TRIM4_1,TRIM4_1"
line.long 0x48 "SOCTRIM4_2,SoC Trim Phrase 4 Word 2 Register"
hexmask.long 0x48 0.--31. 1. "TRIM4_2,TRIM4_2"
line.long 0x4C "SOCTRIM4_3,SoC Trim Phrase 4 Word 3 Register"
hexmask.long 0x4C 0.--31. 1. "TRIM4_3,TRIM4_3"
line.long 0x50 "SOCTRIM5_0,SoC Trim Phrase 5 Word 0 Register"
hexmask.long 0x50 0.--31. 1. "TRIM5_0,TRIM5_0"
line.long 0x54 "SOCTRIM5_1,SoC Trim Phrase 5 Word 1 Register"
hexmask.long 0x54 0.--31. 1. "TRIM5_1,TRIM5_1"
line.long 0x58 "SOCTRIM5_2,SoC Trim Phrase 5 Word 2 Register"
hexmask.long 0x58 0.--31. 1. "TRIM5_2,TRIM5_2"
line.long 0x5C "SOCTRIM5_3,SoC Trim Phrase 5 Word 3 Register"
hexmask.long 0x5C 0.--31. 1. "TRIM5_3,TRIM5_3"
line.long 0x60 "SOCTRIM6_0,SoC Trim Phrase 6 Word 0 Register"
hexmask.long 0x60 0.--31. 1. "TRIM6_0,TRIM6_0"
line.long 0x64 "SOCTRIM6_1,SoC Trim Phrase 6 Word 1 Register"
hexmask.long 0x64 0.--31. 1. "TRIM6_1,TRIM6_1"
line.long 0x68 "SOCTRIM6_2,SoC Trim Phrase 6 Word 2 Register"
hexmask.long 0x68 0.--31. 1. "TRIM6_2,TRIM6_2"
line.long 0x6C "SOCTRIM6_3,SoC Trim Phrase 6 Word 3 Register"
hexmask.long 0x6C 0.--31. 1. "TRIM6_3,TRIM6_3"
line.long 0x70 "SOCTRIM7_0,SoC Trim Phrase 7 Word 0 Register"
hexmask.long 0x70 0.--31. 1. "TRIM7_0,TRIM7_0"
line.long 0x74 "SOCTRIM7_1,SoC Trim Phrase 7 Word 1 Register"
hexmask.long 0x74 0.--31. 1. "TRIM7_1,TRIM7_1"
line.long 0x78 "SOCTRIM7_2,SoC Trim Phrase 7 Word 2 Register"
hexmask.long 0x78 0.--31. 1. "TRIM7_2,TRIM7_2"
line.long 0x7C "SOCTRIM7_3,SoC Trim Phrase 7 Word 3 Register"
hexmask.long 0x7C 0.--31. 1. "TRIM7_3,TRIM7_3"
group.long 0x204++0x27
line.long 0x0 "R_IP_CONFIG,BIST Configuration Register"
bitfld.long 0x0 26. "ECCEN,BIST ECC Control" "0: Default mode (no ECC encode or decode),1: Enable ECC encode/decode"
newline
bitfld.long 0x0 24.--25. "SMWTST,SMWR DOUT Function Control" "0: Default,1: Enable SMWR self-test mode DOUT from macro will..,2: Enable SMWR self-test mode DOUT from macro will..,?"
newline
bitfld.long 0x0 23. "BIST_CLK_SEL,BIST Clock Select" "0,1"
newline
bitfld.long 0x0 22. "DBGCTL,Debug feature control" "0: Default,1: Enable debug feature to collect failure address.."
newline
bitfld.long 0x0 20.--21. "TSTCTL,BIST self-test control" "0: Default disable both BIST self-test and MISR,1: Enable BIST self-test mode DOUT from macro will..,2: Enable MISR,3: Enable both BIST self-test mode and MISR"
newline
hexmask.long.byte 0x0 15.--19. 1. "BIST_TVFY,Timer adjust for verify"
newline
bitfld.long 0x0 12.--14. "CDIVS,Number of clock cycles to generate short pulse" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 4.--11. 1. "BIST_CDIVL,Clock Divide Scalar for Long Pulse"
newline
bitfld.long 0x0 2.--3. "IPSEL1,Block 1 Select Control" "0: Unselect block 1,1: not used reserved,2: Enable block 1 test repair off (default),3: Enable block 1 test repair on"
newline
bitfld.long 0x0 0.--1. "IPSEL0,Block 0 Select Control" "0: Unselect block 0,1: not used reserved,2: Enable block 0 test repair off (default),3: Enable block 0 test repair on"
line.long 0x4 "R_TESTCODE,BIST Test Code Register"
hexmask.long.byte 0x4 0.--5. 1. "TESTCODE,Used to store test code information before running TMR-RST/TMRSET BIST command"
line.long 0x8 "R_DFT_CTRL,BIST DFT Control Register"
bitfld.long 0x8 14. "DFT_DATA_SRC,DFT Data Source" "0: {R_DATA_CTRL0 R_DATA_CTRL_EX[2:0] R_DATA_CTRL0..,1: {R_DATA_CTRL3 R_DATA_CTRL2_EX[2:0] R_DATA_CTRL2.."
newline
bitfld.long 0x8 12.--13. "CMP_MASK,Data Compare Mask" "0: Expected data is compared to DOUT,1: Expected data (only 0s are considered) are..,2: Expected data (only 1s are considered) are..,?"
newline
hexmask.long.byte 0x8 8.--11. 1. "DFT_DATA,DFT Data Pattern"
newline
hexmask.long.byte 0x8 4.--7. 1. "DFT_YADR,DFT YADR Pattern"
newline
hexmask.long.byte 0x8 0.--3. 1. "DFT_XADR,DFT XADR Pattern"
line.long 0xC "R_ADR_CTRL,BIST Address Control Register"
bitfld.long 0xC 21.--23. "PROG_ATTR,Program Attribute" "0: One YE pulse will program one data slice group,1: One YE pulse will program two data slice groups,2: One YE pulse will program three data slice..,3: One YE pulse will program four data slice groups,4: One YE pulse will program five data slice groups..,5: One YE pulse will program six data slice groups..,6: One YE pulse will program seven data slice..,7: One YE pulse will program eight data slice.."
newline
hexmask.long.byte 0xC 16.--20. 1. "YADR,BIST YADR"
newline
hexmask.long.word 0xC 4.--15. 1. "XADR,BIST XADR"
newline
hexmask.long.byte 0xC 0.--3. 1. "GRPSEL,Data Group Select"
line.long 0x10 "R_DATA_CTRL0,BIST Data Control 0 Register"
hexmask.long 0x10 0.--31. 1. "DATA0,BIST Data 0 Low"
line.long 0x14 "R_PIN_CTRL,BIST Pin Control Register"
bitfld.long 0x14 24. "HEM,HEM Control" "0,1"
newline
bitfld.long 0x14 23. "RECALL,Recall Trim Code" "0,1"
newline
bitfld.long 0x14 22. "SLM,Sleep Mode Enable" "0,1"
newline
bitfld.long 0x14 21. "NVSTR,NVM Store" "0,1"
newline
bitfld.long 0x14 20. "PROG,Program Mode" "0,1"
newline
bitfld.long 0x14 19. "ERASE,Erase Mode" "0,1"
newline
bitfld.long 0x14 18. "SE,Sense Amp Enable" "0,1"
newline
bitfld.long 0x14 17. "YE,Y Address Enable" "0,1"
newline
bitfld.long 0x14 16. "XE,X Address Enable" "0,1"
newline
bitfld.long 0x14 13.--15. "WMV,Medium Voltage Level" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x14 9.--12. 1. "WHV,High Voltage Level"
newline
bitfld.long 0x14 7.--8. "WIPGM,Program Current" "0,1,2,3"
newline
bitfld.long 0x14 6. "EV,Erase Verify Enable" "0,1"
newline
bitfld.long 0x14 5. "PV,Program Verify Enable" "0,1"
newline
bitfld.long 0x14 4. "LVE,Low Voltage Enable" "0,1"
newline
bitfld.long 0x14 3. "REDEN,Redundancy Block Enable" "0,1"
newline
bitfld.long 0x14 2. "IFREN1,IFR1 Enable" "0,1"
newline
bitfld.long 0x14 1. "IFREN,IFR Enable" "0,1"
newline
bitfld.long 0x14 0. "MAS1,Mass Erase" "0,1"
line.long 0x18 "R_CNT_LOOP_CTRL,BIST Loop Count Control Register"
hexmask.long.byte 0x18 18.--24. 1. "LOOPDLY,Loop Time Delay Scalar"
newline
bitfld.long 0x18 15.--17. "LOOPUNIT,Loop Time Unit" "0: Clock cycles,1: 0.5 usec,2: 1 usec,3: 10 usec,4: 100 usec,5: 1 msec,6: 10 msec,7: 100 msec"
newline
bitfld.long 0x18 12.--14. "LOOPOPT,Loop Option" "0: Loop is disabled; selected BIST operation is run..,1: Loop is enabled; XADR increments by 1 XADR..,2: Loop is enabled; YADR increments by 1 YADR..,3: Loop is enabled; XADR increments by 2 XADR..,4: Loop is enabled; XADR increments by sector XADR..,?,?,?"
newline
hexmask.long.word 0x18 0.--11. 1. "LOOPCNT,Loop Count Control"
line.long 0x1C "R_TIMER_CTRL,BIST Timer Control Register"
bitfld.long 0x1C 31. "TLVSDLY_L,Tlvs Time Delay Scalar Low" "0,1"
newline
bitfld.long 0x1C 28.--30. "TLVSUNIT,Tlvs Time Unit" "0: Clock cycles,1: 0.5 usec,2: 1 usec,3: 10 usec,4: 100 usec,5: 1 msec,6: 10 msec,7: 100 msec"
newline
hexmask.long.byte 0x1C 24.--27. 1. "TRCVDLY,Trcv Time Delay Scalar"
newline
bitfld.long 0x1C 21.--23. "TRCVUNIT,Trcv Time Unit" "0: Clock cycles,1: 0.5 usec,2: 1 usec,3: 10 usec,4: 100 usec,5: 1 msec,6: 10 msec,7: 100 msec"
newline
hexmask.long.byte 0x1C 17.--20. 1. "TPGSDLY,Tpgs Time Delay Scalar"
newline
bitfld.long 0x1C 14.--16. "TPGSUNIT,Tpgs Time Unit" "0: Clock cycles,1: 0.5 usec,2: 1 usec,3: 10 usec,4: 100 usec,5: 1 msec,6: 10 msec,7: 100 msec"
newline
hexmask.long.byte 0x1C 10.--13. 1. "TNVHDLY,Tnvh Time Delay Scalar"
newline
bitfld.long 0x1C 7.--9. "TNVHUNIT,Tnvh Time Unit" "0: Clock cycles,1: 0.5 usec,2: 1 usec,3: 10 usec,4: 100 usec,5: 1 msec,6: 10 msec,7: 100 msec"
newline
hexmask.long.byte 0x1C 3.--6. 1. "TNVSDLY,Tnvs Time Delay Scalar"
newline
bitfld.long 0x1C 0.--2. "TNVSUNIT,Tnvs Time Unit" "0: Clock cycles,1: 0.5 usec,2: 1 usec,3: 10 usec,4: 100 usec,5: 1 msec,6: 10 msec,7: 100 msec"
line.long 0x20 "R_TEST_CTRL,BIST Test Control Register"
bitfld.long 0x20 16. "DISABLE_IP1,BIST Disable IP1" "0,1"
newline
hexmask.long.word 0x20 6.--15. 1. "CMDINDEX,BIST Command Index (code)"
newline
bitfld.long 0x20 5. "STARTRUN,Run New BIST Operation" "0,1"
newline
bitfld.long 0x20 4. "DEBUGRUN,BIST Continue Debug Run" "0,1"
newline
rbitfld.long 0x20 3. "STATUS1,BIST status 1" "0: BIST test passed on flash block 1,1: BIST test failed on flash block 1"
newline
rbitfld.long 0x20 2. "STATUS0,BIST Status 0" "0: BIST test passed on flash block 0,1: BIST test failed on flash block 0"
newline
rbitfld.long 0x20 1. "DEBUG,BIST Debug Status" "0,1"
newline
rbitfld.long 0x20 0. "BUSY,BIST Busy Status" "0: BIST is idle,1: BIST is busy"
line.long 0x24 "R_ABORT_LOOP,BIST Abort Loop Register"
bitfld.long 0x24 0. "ABORT_LOOP,Abort Loop" "0: No effect,1: Abort BIST loop commands and force the loop.."
rgroup.long 0x22C++0x7
line.long 0x0 "R_ADR_QUERY,BIST Address Query Register"
hexmask.long.word 0x0 5.--16. 1. "XADRFAIL,Failing XADR"
newline
hexmask.long.byte 0x0 0.--4. 1. "YADRFAIL,Failing YADR"
line.long 0x4 "R_DOUT_QUERY0,BIST DOUT Query 0 Register"
hexmask.long 0x4 0.--31. 1. "DOUTFAIL,Failing DOUT Low"
rgroup.long 0x23C++0x3
line.long 0x0 "R_SMW_QUERY,BIST SMW Query Register"
hexmask.long.word 0x0 10.--18. 1. "SMWLAST,SMW Last Voltage Setting"
newline
hexmask.long.word 0x0 0.--9. 1. "SMWLOOP,SMW Total Loop Count"
group.long 0x240++0x1B
line.long 0x0 "R_SMW_SETTING0,BIST SMW Setting 0 Register"
hexmask.long 0x0 0.--30. 1. "SMWPARM0,SMW Parameter Set 0"
line.long 0x4 "R_SMW_SETTING1,BIST SMW Setting 1 Register"
hexmask.long 0x4 0.--27. 1. "SMWPARM1,SMW Parameter Set 1"
line.long 0x8 "R_SMP_WHV0,BIST SMP WHV Setting 0 Register"
hexmask.long 0x8 0.--31. 1. "SMPWHV0,SMP WHV Parameter Set 0"
line.long 0xC "R_SMP_WHV1,BIST SMP WHV Setting 1 Register"
hexmask.long 0xC 0.--31. 1. "SMPWHV1,SMP WHV Parameter Set 1"
line.long 0x10 "R_SME_WHV0,BIST SME WHV Setting 0 Register"
hexmask.long 0x10 0.--31. 1. "SMEWHV0,SME WHV Parameter Set 0"
line.long 0x14 "R_SME_WHV1,BIST SME WHV Setting 1 Register"
hexmask.long 0x14 0.--31. 1. "SMEWHV1,SME WHV Parameter Set 1"
line.long 0x18 "R_SMW_SETTING2,BIST SMW Setting 2 Register"
hexmask.long 0x18 0.--28. 1. "SMWPARM2,SMW Parameter Set 2"
rgroup.long 0x25C++0xB
line.long 0x0 "R_D_MISR0,BIST DIN MISR 0 Register"
hexmask.long 0x0 0.--31. 1. "DATASIG0,Data Signature"
line.long 0x4 "R_A_MISR0,BIST Address MISR 0 Register"
hexmask.long 0x4 0.--31. 1. "ADRSIG0,Address Signature"
line.long 0x8 "R_C_MISR0,BIST Control MISR 0 Register"
hexmask.long 0x8 0.--31. 1. "CTRLSIG0,Control Signature"
group.long 0x268++0xF
line.long 0x0 "R_SMW_SETTING3,BIST SMW Setting 3 Register"
hexmask.long.tbyte 0x0 0.--16. 1. "SMWPARM3,SMW Parameter Set 3"
line.long 0x4 "R_DATA_CTRL1,BIST Data Control 1 Register"
hexmask.long 0x4 0.--31. 1. "DATA1,BIST Data 1 Low"
line.long 0x8 "R_DATA_CTRL2,BIST Data Control 2 Register"
hexmask.long 0x8 0.--31. 1. "DATA2,BIST Data 2 Low"
line.long 0xC "R_DATA_CTRL3,BIST Data Control 3 Register"
hexmask.long 0xC 0.--31. 1. "DATA3,BIST Data 3 Low"
rgroup.long 0x280++0xF
line.long 0x0 "R_REPAIR0_0,BIST Repair 0 for Block 0 Register"
hexmask.long.byte 0x0 1.--8. 1. "RADR0_0,XADR for Repair 0 in Block 0"
newline
bitfld.long 0x0 0. "RDIS0_0,Control Repair 0 in Block 0." "0: Repair address is valid,1: Repair address is not valid"
line.long 0x4 "R_REPAIR0_1,BIST Repair 1 Block 0 Register"
hexmask.long.byte 0x4 1.--8. 1. "RADR0_1,XADR for Repair 1 in Block 0."
newline
bitfld.long 0x4 0. "RDIS0_1,Control Repair 1 in Block 0." "0: Repair address is valid,1: Repair address is not valid"
line.long 0x8 "R_REPAIR1_0,BIST Repair 0 Block 1 Register"
hexmask.long.byte 0x8 1.--8. 1. "RADR1_0,XADR for Repair 0 in Block 1."
newline
bitfld.long 0x8 0. "RDIS1_0,Control Repair 0 in Block 1." "0: Repair address is valid,1: Repair address is not valid"
line.long 0xC "R_REPAIR1_1,BIST Repair 1 Block 1 Register"
hexmask.long.byte 0xC 1.--8. 1. "RADR1_1,XADR for Repair 1 in Block 1."
newline
bitfld.long 0xC 0. "RDIS1_1,Control Repair 1 in Block 1." "0: Repair address is valid,1: Repair address is not valid"
group.long 0x314++0x3
line.long 0x0 "R_DATA_CTRL0_EX,BIST Data Control 0 Extension Register"
bitfld.long 0x0 0.--2. "DATA0X,BIST Data 0 High" "0,1,2,3,4,5,6,7"
group.long 0x320++0x3
line.long 0x0 "R_TIMER_CTRL_EX,BIST Timer Control Extension Register"
bitfld.long 0x0 0.--2. "TLVSDLY_H,Tlvs Time Delay Scalar High" "0,1,2,3,4,5,6,7"
rgroup.long 0x330++0x3
line.long 0x0 "R_DOUT_QUERY1,BIST DOUT Query 1 Register"
bitfld.long 0x0 0.--2. "DOUT,Failing DOUT High" "0,1,2,3,4,5,6,7"
rgroup.long 0x35C++0xB
line.long 0x0 "R_D_MISR1,BIST DIN MISR 1 Register"
hexmask.long.byte 0x0 0.--7. 1. "DATASIG1,MISR Data Signature High"
line.long 0x4 "R_A_MISR1,BIST Address MISR 1 Register"
hexmask.long.byte 0x4 0.--7. 1. "ADRSIG1,MISR Address Signature High"
line.long 0x8 "R_C_MISR1,BIST Control MISR 1 Register"
hexmask.long.byte 0x8 0.--7. 1. "CTRLSIG1,MISR Control Signature High"
group.long 0x36C++0xB
line.long 0x0 "R_DATA_CTRL1_EX,BIST Data Control 1 Extension Register"
bitfld.long 0x0 0.--2. "DATA1X,BIST Data 1 High" "0,1,2,3,4,5,6,7"
line.long 0x4 "R_DATA_CTRL2_EX,BIST Data Control 2 Extension Register"
bitfld.long 0x4 0.--2. "DATA2X,BIST Data 2 High" "0,1,2,3,4,5,6,7"
line.long 0x8 "R_DATA_CTRL3_EX,BIST Data Control 3 Extension Register"
bitfld.long 0x8 0.--2. "DATA3X,BIST Data 3 High" "0,1,2,3,4,5,6,7"
group.long 0x400++0x23
line.long 0x0 "SMW_TIMER_OPTION,SMW Timer Option Register"
hexmask.long.byte 0x0 8.--12. 1. "SMW_TVFY,Timer Adjust for Verify"
newline
hexmask.long.byte 0x0 0.--7. 1. "SMW_CDIVL,Clock Divide Scalar for Long Pulse"
line.long 0x4 "SMW_SETTING_OPTION0,SMW Setting Option 0 Register"
bitfld.long 0x4 28.--30. "IPGM_MISC,Program Current Control Misc" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x4 26.--27. "IPGM_END,Program Current Control Final" "0,1,2,3"
newline
bitfld.long 0x4 24.--25. "IPGM_INIT,Program Current Control Initial" "0,1,2,3"
newline
hexmask.long.byte 0x4 20.--23. 1. "MV_MISC,Medium Voltage Control Misc"
newline
bitfld.long 0x4 17.--19. "MV_END,Medium Voltage Level Select Final" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x4 14.--16. "MV_INIT,Medium Voltage Level Select Initial" "0,1,2,3,4,5,6,7"
line.long 0x8 "SMW_SETTING_OPTION2,SMW Setting Option 2 Register"
bitfld.long 0x8 28. "DIS_PRER,Disable pre-PV Read before First Program Shot" "0: Enable pre-PV read before first program shot,1: Disable pre-PV read before first program shot"
newline
bitfld.long 0x8 27. "MASK0_OPT,MASK0_OPT" "0: Mask programmed bits passing PV until extra shot,1: Always program bits even if they pass PV"
newline
bitfld.long 0x8 25.--26. "TPGM_OPT,Tpgm Option" "0: Fixed Tpgm for all shots except post shot,1: Increase Tpgm option by 1 for each loop until..,2: Increase Tpgm option by 1 for each loop until..,3: Unused"
newline
bitfld.long 0x8 23.--24. "VFY_OPT,Verify Option" "0: Skip verify for post shot only verify for all..,1: Skip verify for the 1st and post shots,2: Skip the 1st 2nd and post shots,3: Skip verify for all shots"
newline
bitfld.long 0x8 21.--22. "POST_TPGM,Post Tpgm Time" "0: 1 usec,1: 2 usec,2: 4 usec,3: 8 usec"
newline
bitfld.long 0x8 18.--20. "POST_TERS,Post Ters Time" "0: 50 usec,1: 100 usec,2: 200 usec,3: 300 usec,4: 500 usec,5: 1 msec,6: 1.5 msec,7: 2 msec"
newline
hexmask.long.byte 0x8 10.--17. 1. "WHV_CNTR,WHV Counter"
newline
bitfld.long 0x8 8.--9. "XTRA_PGM,Number of Post Shots for SMP" "0,1,2,3"
newline
bitfld.long 0x8 6.--7. "XTRA_ERS,Number of Post Shots for SME" "0,1,2,3"
newline
bitfld.long 0x8 3.--5. "TRCV_CTRL,Trcv Control" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x8 0.--2. "THVS_CTRL,Thvs control" "0,1,2,3,4,5,6,7"
line.long 0xC "SMW_SETTING_OPTION3,SMW Setting Option 3 Register"
hexmask.long.word 0xC 8.--16. 1. "HEM_MAX_ERS,HEM Max Erase Shot Count"
newline
hexmask.long.byte 0xC 0.--7. 1. "HEM_WHV_CNTR,WHV_COUNTER for HEM-erase Cycle"
line.long 0x10 "SMW_SMP_WHV_OPTION0,SMW SMP WHV Option 0 Register"
hexmask.long 0x10 0.--31. 1. "SMP_WHV_OPT0,Smart Program WHV Option Low"
line.long 0x14 "SMW_SME_WHV_OPTION0,SMW SME WHV Option 0 Register"
hexmask.long 0x14 0.--31. 1. "SME_WHV_OPT0,Smart Erase WHV Option Low"
line.long 0x18 "SMW_SETTING_OPTION1,SMW Setting Option 1 Register"
hexmask.long.byte 0x18 23.--27. 1. "MAX_PROG,Number of Program Shots"
newline
hexmask.long.word 0x18 14.--22. 1. "MAX_ERASE,Number of Erase Shots"
newline
bitfld.long 0x18 11.--13. "TPGS_CTRL,Tpgs Control" "0: 1 usec,1: 2 usec,2: 3 usec,3: 4 usec,4: 5 usec,5: 6 usec,6: 7 usec,7: 8 usec"
newline
bitfld.long 0x18 8.--10. "TNVH_CTRL,Tnvh Control" "0: 2 usec,1: 2.5 usec,2: 3 usec,3: 3.5 usec,4: 4 usec,5: 4.5 usec,6: 5 usec,7: 5.5 usec"
newline
bitfld.long 0x18 5.--7. "TNVS_CTRL,Tnvs Control" "0: 5 usec,1: 8 usec,2: 11 usec,3: 14 usec,4: 17 usec,5: 20 usec,6: 23 usec,7: 26 usec"
newline
bitfld.long 0x18 3.--4. "TPGM_CTRL,Tpgm Control" "0: 1 usec,1: 2 usec,2: 4 usec,3: 8 usec"
newline
bitfld.long 0x18 0.--2. "TERS_CTRL0,Ters Control" "0: 50 usec,1: 100 usec,2: 200 usec,3: 300 usec,4: 500 usec,5: 1 msec,6: 1.5 msec,7: 2 msec"
line.long 0x1C "SMW_SMP_WHV_OPTION1,SMW SMP WHV Option 1 Register"
hexmask.long 0x1C 0.--31. 1. "SMP_WHV_OPT1,Smart Program WHV Option High"
line.long 0x20 "SMW_SME_WHV_OPTION1,SMW SME WHV Option 1 Register"
hexmask.long 0x20 0.--31. 1. "SME_WHV_OPT1,Smart Erase WHV Option High"
group.long 0x500++0xF
line.long 0x0 "REPAIR0_0,FMU Repair 0 Block 0 Register"
hexmask.long.byte 0x0 1.--8. 1. "RADR0_0,RADR0_0"
newline
bitfld.long 0x0 0. "RDIS0_0,RDIS0_0" "0: Repair address is valid,1: Repair address is not valid"
line.long 0x4 "REPAIR0_1,FMU Repair 1 Block 0 Register"
hexmask.long.byte 0x4 1.--8. 1. "RADR0_1,RADR0_1"
newline
bitfld.long 0x4 0. "RDIS0_1,RDIS0_1" "0: Repair address is valid,1: Repair address is not valid"
line.long 0x8 "REPAIR1_0,FMU Repair 0 Block 1 Register"
hexmask.long.byte 0x8 1.--8. 1. "RADR1_0,RADR1_0"
newline
bitfld.long 0x8 0. "RDIS1_0,RDIS1_0" "0: Repair address is valid,1: Repair address is not valid"
line.long 0xC "REPAIR1_1,FMU Repair 1 Block 1 Register"
hexmask.long.byte 0xC 1.--8. 1. "RADR1_1,RADR1_1"
newline
bitfld.long 0xC 0. "RDIS1_1,RDIS1_1" "0: Repair address is valid,1: Repair address is not valid"
group.long 0x600++0x7
line.long 0x0 "SMW_HB_SIGNALS,SMW HB Signals Register"
bitfld.long 0x0 8. "USER_HEM,High Endurance Enable" "0: HEM input to SMW / BIST PIN_CTRL[24] is driven LOW,1: HEM input to SMW / BIST PIN_CTRL[24] is driven.."
newline
bitfld.long 0x0 7. "USER_REDEN,Repair Read Enable" "0: REDEN input to the flash array is driven LOW,1: REDEN input to the flash array is driven HIGH"
newline
bitfld.long 0x0 6. "USER_IFREN,IFR Enable" "0: IFREN input to the flash array is driven LOW,1: IFREN input to the flash array is driven HIGH"
newline
bitfld.long 0x0 5. "USER_EV,Erase Verify" "0: EV input to the flash array is driven LOW,1: EV input to the flash array is driven HIGH"
newline
bitfld.long 0x0 4. "USER_PV,Program Verify" "0: PV input to the flash array is driven LOW,1: PV input to the flash array is driven HIGH"
newline
bitfld.long 0x0 3. "USER_IFREN1,IFR1 Enable" "0: IFREN1 input to the flash array is driven LOW,1: IFREN1 input to the flash array is driven HIGH"
newline
bitfld.long 0x0 0.--2. "SMW_ARRAY,SMW Region Select" "0: Main array,1: IFR space only or main (and REDEN space) with..,2: IFR1 space,?,4: REDEN space,?,?,?"
line.long 0x4 "BIST_DUMP_CTRL,BIST Datadump Control Register"
bitfld.long 0x4 23. "DATADUMP_MRGTYPE,Data Dump Margin Type" "0: DIN method used,1: TM method used"
newline
bitfld.long 0x4 22. "DATADUMP_MRGEN,Data Dump Margin Enable" "0: Normal read pulse shape,1: Margin read pulse shape"
newline
bitfld.long 0x4 20.--21. "DATADUMP_PATT,Data Dump Pattern Select" "0: All ones,1: All zeroes,2: Checkerboard,3: Inverse checkerboard"
newline
bitfld.long 0x4 19. "DATADUMP_TRIG,Data Dump Trigger" "0,1"
newline
bitfld.long 0x4 18. "DATADUMP,Data Dump Enable" "0,1"
newline
bitfld.long 0x4 17. "BIST_FAIL,BIST Fail" "0: The last BIST operation completed successfully..,1: The last BIST operation failed"
newline
bitfld.long 0x4 16. "BIST_DONE,BIST Done" "0: The BIST (or data dump) is running,1: The BIST (or data dump) has completed"
group.long 0x60C++0x1B
line.long 0x0 "ATX_PIN_CTRL,ATX Pin Control Register"
hexmask.long.byte 0x0 0.--7. 1. "TM_TO_ATX,TM to ATX"
line.long 0x4 "FAILCNT,Fail Count Register"
hexmask.long 0x4 0.--31. 1. "FAILCNT,Fail Count"
line.long 0x8 "PGM_PULSE_CNT0,Block 0 Program Pulse Count Register"
hexmask.long 0x8 0.--31. 1. "PGM_CNT0,Program Pulse Count"
line.long 0xC "PGM_PULSE_CNT1,Block 1 Program Pulse Count Register"
hexmask.long 0xC 0.--31. 1. "PGM_CNT1,Program Pulse Count"
line.long 0x10 "ERS_PULSE_CNT,Erase Pulse Count Register"
hexmask.long.word 0x10 16.--31. 1. "ERS_CNT1,Block 1 Erase Pulse Count"
newline
hexmask.long.word 0x10 0.--15. 1. "ERS_CNT0,Block 0 Erase Pulse Count"
line.long 0x14 "MAX_PULSE_CNT,Maximum Pulse Count Register"
hexmask.long.byte 0x14 27.--31. 1. "MAX_PGM_CNT,Maximum Program Pulse Count"
newline
hexmask.long.word 0x14 16.--24. 1. "MAX_ERS_CNT,Maximum Erase Pulse Count"
newline
hexmask.long.word 0x14 0.--8. 1. "LAST_PCNT,Last SMW Operation's Pulse Count"
line.long 0x18 "PORT_CTRL,Port Control Register"
bitfld.long 0x18 2.--3. "BSDO_SEL,BIST Serial Data Output Select" "0: Select internal bist_sdo signal from current..,1: Select ipt_bist_done signal from current module..,2: Select ipt_bist_sdo signal from other module..,3: Select ipt_bist_done signal from other module.."
newline
bitfld.long 0x18 0.--1. "BDONE_SEL,BIST Done Select" "0: Select internal bist_done signal from current..,1: Select ipt_bist_fail signal from current module..,2: Select ipt_bist_done signal from other module..,3: Select AND of internal bist_done signal from.."
tree.end
tree "FREQME (Frequency Measurement)"
base ad:0x40009000
rgroup.long 0x0++0x3
line.long 0x0 "CTRL_R,Control (in Read mode)"
bitfld.long 0x0 31. "MEASURE_IN_PROGRESS,Measurement In Progress" "0: Complete,1: In progress"
hexmask.long 0x0 0.--30. 1. "RESULT,Indicates the measurement result-either the target clock counter value (for Frequency Measurement mode) or pulse width measurement (for Pulse Width Measurement mode)"
wgroup.long 0x0++0x3
line.long 0x0 "CTRL_W,Control (in Write mode)"
bitfld.long 0x0 31. "MEASURE_IN_PROGRESS,Measurement In Progress" "0: Terminates measurement,1: Initiates measurement"
bitfld.long 0x0 30. "CONTINUOUS_MODE_EN,Continuous Mode Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x0 14. "RESULT_READY_INT_EN,Result Ready Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x0 13. "GT_MAX_INT_EN,Greater Than Maximum Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x0 12. "LT_MIN_INT_EN,Less Than Minimum Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x0 9. "PULSE_POL,Pulse Polarity" "0: High period,1: Low period"
newline
bitfld.long 0x0 8. "PULSE_MODE,Pulse Width Measurement Mode Select" "0: Frequency Measurement mode,1: Pulse Width Measurement mode"
hexmask.long.byte 0x0 0.--4. 1. "REF_SCALE,Reference Clock Scaling Factor"
group.long 0x4++0xB
line.long 0x0 "CTRLSTAT,Control Status"
rbitfld.long 0x0 31. "MEASURE_IN_PROGRESS,Measurement in Progress Status" "0: Not in progress,1: In progress"
rbitfld.long 0x0 30. "CONTINUOUS_MODE_EN,Continuous Mode Enable Status" "0: Disabled,1: Enabled"
newline
eventfld.long 0x0 26. "RESULT_READY_STAT,Result Ready Status" "0: Not complete,1: Complete"
eventfld.long 0x0 25. "GT_MAX_STAT,Greater Than Maximum Result Status" "0: Less than MAX[MAX_VALUE],1: Greater than MAX[MAX_VALUE]"
newline
eventfld.long 0x0 24. "LT_MIN_STAT,Less Than Minimum Results Status" "0: Greater than MIN[MIN_VALUE],1: Less than MIN[MIN_VALUE]"
rbitfld.long 0x0 14. "RESULT_READY_INT_EN,Result Ready Interrupt Enable" "0: Disabled,1: Enabled"
newline
rbitfld.long 0x0 13. "GT_MAX_INT_EN,Greater Than Maximum Interrupt Enable" "0: Disabled,1: Enabled"
rbitfld.long 0x0 12. "LT_MIN_INT_EN,Less Than Minimum Interrupt Enable" "0: Disabled,1: Enabled"
newline
rbitfld.long 0x0 9. "PULSE_POL,Pulse Polarity" "0: High period,1: Low period"
rbitfld.long 0x0 8. "PULSE_MODE,Pulse Mode" "0: Frequency Measurement mode,1: Pulse Width Measurement mode"
newline
hexmask.long.byte 0x0 0.--4. 1. "REF_SCALE,Reference Scale"
line.long 0x4 "MIN,Minimum"
hexmask.long 0x4 0.--30. 1. "MIN_VALUE,Minimum Value"
line.long 0x8 "MAX,Maximum"
hexmask.long 0x8 0.--30. 1. "MAX_VALUE,Maximum Value"
tree.end
tree "GLIKEY"
base ad:0x40091D00
group.long 0x0++0xB
line.long 0x0 "CTRL_0,Control Register 0 SFR"
hexmask.long.word 0x0 19.--31. 1. "RESERVED31,Reserved for Future Use"
bitfld.long 0x0 18. "SFT_RST,Soft reset for the core reset (SFR configuration will be preseved).This register reads as 0" "0: No effect,1: Triggers the soft reset"
newline
bitfld.long 0x0 16.--17. "WR_EN_0,Write Enable 0" "0,1,2,3"
hexmask.long.byte 0x0 8.--15. 1. "RESERVED15,Reserved for Future Use"
newline
hexmask.long.byte 0x0 0.--7. 1. "WRITE_INDEX,Write Index"
line.long 0x4 "CTRL_1,Control Regsiter 1 SFR"
hexmask.long.word 0x4 22.--31. 1. "RESERVED31,Reserved for Future Use"
hexmask.long.byte 0x4 18.--21. 1. "SFR_LOCK,LOCK register for GLIKEY"
newline
bitfld.long 0x4 16.--17. "WR_EN_1,Write Enable One" "0,1,2,3"
hexmask.long.byte 0x4 8.--15. 1. "RESERVED15,Reserved for Future Use"
newline
hexmask.long.byte 0x4 0.--7. 1. "READ_INDEX,Index status Writing an index value to this register will request the block to return the lock status of this index."
line.long 0x8 "INTR_CTRL,Interrupt Control"
hexmask.long 0x8 3.--31. 1. "RESERVED31,Reserved for Future Use"
bitfld.long 0x8 2. "INT_SET,Interrupt Set. Writing a 1 to this register asserts the interrupt. This register reads as 0" "0: No effect,1: Triggers interrupt"
newline
bitfld.long 0x8 1. "INT_CLR,Interrupt Clear. Writing a 1 to this register creates a single interrupt clear pulse. This register reads as 0" "0,1"
bitfld.long 0x8 0. "INT_EN,Interrupt Enable. Writing a 1 Interrupt asserts on Interrupt output port" "0,1"
rgroup.long 0xC++0x3
line.long 0x0 "STATUS,Status"
hexmask.long.word 0x0 19.--31. 1. "FSM_STATE,Status of FSM"
hexmask.long.word 0x0 5.--18. 1. "RESERVED18,Reserved for Future Use"
newline
bitfld.long 0x0 2.--4. "ERROR_STATUS,Status of the Error" "0: No error,1: FSM error has occurred,2: Write index out of the bound (OOB) error,3: Write index OOB and FSM error,4: Read index OOB error,?,6: Write index and read index OOB error,7: Read index OOB write index OOB and FSM error"
bitfld.long 0x0 1. "LOCK_STATUS,Provides the current lock status of indexes." "0: Current read index is not locked,1: Current read index is locked"
newline
bitfld.long 0x0 0. "INT_STATUS,Interrupt Status." "0: No effect,1: Triggers interrupt"
rgroup.long 0xFC++0x3
line.long 0x0 "VERSION,IP Version"
hexmask.long.byte 0x0 19.--26. 1. "INDEX_CONFIG,Configured number of addressable indexes"
bitfld.long 0x0 18. "FSM_CONFIG,0:4 step 1:8 step" "0: 4 step,1: 8 step"
tree.end
tree "HSADC (High-Speed Analog-to-Digital Converter)"
base ad:0x0
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*")||cpuis("MC?A144*"))
tree "ADC0"
base ad:0x400AF000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID Register"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
bitfld.long 0x0 12.--14. "NUM_FIFO,Number of FIFOs" "0: N/A,1: This design supports one result FIFO.,2: This design supports two result FIFOs.,3: This design supports three result FIFOs.,4: This design supports four result FIFOs.,?,?,?"
bitfld.long 0x0 11. "NUM_SEC,Number of Single Ended Outputs Supported" "0: This design supports one single ended conversion..,1: This design supports two simultaneous single.."
newline
bitfld.long 0x0 10. "CALOFSI,Calibration Function Implemented" "0: Calibration Not Implemented.,1: Calibration Implemented."
bitfld.long 0x0 9. "IADCKI,Internal ADC Clock Implemented" "0: Internal clock source not implemented.,1: Internal clock source (and CFG[ADCKEN]).."
newline
bitfld.long 0x0 8. "VR1RNGI,Voltage Reference 1 Range Control Bit Implemented" "0: Range control not required. CFG[VREF1RNG] is not..,1: Range control required. CFG[VREF1RNG] is.."
bitfld.long 0x0 4.--6. "CSW,Channel Scale Width" "0: Channel scaling not supported.,1: Channel scaling supported. 1-bit CSCALE control..,?,?,?,?,6: Channel scaling supported. 6-bit CSCALE control..,?"
newline
bitfld.long 0x0 3. "MVI,Multi Vref Implemented" "0: Single voltage reference high (VREFH) input..,1: Multiple voltage reference high (VREFH) inputs.."
bitfld.long 0x0 1. "DIFFEN,Differential Supported" "0: Differential operation not supported.,1: Differential operation supported."
newline
bitfld.long 0x0 0. "RES,Resolution" "0: Up to 12-bit single ended resolution supported..,1: Up to 16-bit single ended resolution supported.."
line.long 0x4 "PARAM,Parameter Register"
hexmask.long.byte 0x4 24.--31. 1. "CMD_NUM,Command Buffer Number"
hexmask.long.byte 0x4 16.--23. 1. "CV_NUM,Compare Value Number"
newline
hexmask.long.byte 0x4 8.--15. 1. "FIFOSIZE,Result FIFO Depth"
hexmask.long.byte 0x4 0.--7. 1. "TRIG_NUM,Trigger Number"
group.long 0x10++0x17
line.long 0x0 "CTRL,Control Register"
hexmask.long.byte 0x0 16.--19. 1. "CAL_AVGS,Auto-Calibration Averages"
bitfld.long 0x0 8. "RSTFIFO0,Reset FIFO 0" "0: No effect.,1: FIFO 0 is reset."
newline
bitfld.long 0x0 6. "CALHS,High Speed Mode Trim Request" "0: No request for high speed mode trim has been made,1: Request for high speed mode trim has been made"
bitfld.long 0x0 4. "CALOFS,Offset Calibration Request" "0: No request for offset calibration has been made,1: Request for offset calibration function"
newline
bitfld.long 0x0 3. "CAL_REQ,Auto-Calibration Request" "0: No request for hardware calibration has been made,1: A request for hardware calibration has been made"
bitfld.long 0x0 2. "DOZEN,Doze Enable" "0: ADC is enabled in low power mode.,1: ADC is disabled in low power mode."
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: ADC logic is not reset.,1: ADC logic is reset."
bitfld.long 0x0 0. "ADCEN,ADC Enable" "0: ADC is disabled.,1: ADC is enabled."
line.long 0x4 "STAT,Status Register"
rbitfld.long 0x4 24.--26. "CMDACT,Command Active" "0: No command is currently in progress.,1: Command 1 currently being executed.,2: Command 2 currently being executed.,3: Associated command number is currently being..,4: Associated command number is currently being..,5: Associated command number is currently being..,6: Associated command number is currently being..,7: Associated command number is currently being.."
rbitfld.long 0x4 16.--17. "TRGACT,Trigger Active" "0: Command (sequence) associated with Trigger 0..,1: Command (sequence) associated with Trigger 1..,2: Command (sequence) associated with Trigger 2..,3: Command (sequence) associated with Trigger 3.."
newline
rbitfld.long 0x4 11. "ADC_ACTIVE,ADC Active" "0: The ADC is IDLE. There are no pending triggers..,1: The ADC is processing a conversion running.."
rbitfld.long 0x4 10. "CAL_RDY,Calibration Ready" "0: Calibration is incomplete or hasn't been ran.,1: The ADC is calibrated."
newline
eventfld.long 0x4 9. "TCOMP_INT,Interrupt Flag For Trigger Completion" "0: Either IE[TCOMP_IE] is set to 0 or no trigger..,1: Trigger sequence has been completed and all data.."
eventfld.long 0x4 8. "TEXC_INT,Interrupt Flag For High Priority Trigger Exception" "0: No trigger exceptions have occurred.,1: A trigger exception has occurred and is pending.."
newline
eventfld.long 0x4 1. "FOF0,Result FIFO 0 Overflow Flag" "0: No result FIFO 0 overflow has occurred since the..,1: At least one result FIFO 0 overflow has occurred.."
rbitfld.long 0x4 0. "RDY0,Result FIFO 0 Ready Flag" "0: Result FIFO 0 data level not above watermark..,1: Result FIFO 0 holding data above watermark level."
line.long 0x8 "IE,Interrupt Enable Register"
hexmask.long.byte 0x8 16.--19. 1. "TCOMP_IE,Trigger Completion Interrupt Enable"
bitfld.long 0x8 8. "TEXC_IE,Trigger Exception Interrupt Enable" "0: Trigger exception interrupts are disabled.,1: Trigger exception interrupts are enabled."
newline
bitfld.long 0x8 1. "FOFIE0,Result FIFO 0 Overflow Interrupt Enable" "0: FIFO 0 overflow interrupts are not enabled.,1: FIFO 0 overflow interrupts are enabled."
bitfld.long 0x8 0. "FWMIE0,FIFO 0 Watermark Interrupt Enable" "0: FIFO 0 watermark interrupts are not enabled.,1: FIFO 0 watermark interrupts are enabled."
line.long 0xC "DE,DMA Enable Register"
bitfld.long 0xC 0. "FWMDE0,FIFO 0 Watermark DMA Enable" "0: DMA request disabled.,1: DMA request enabled."
line.long 0x10 "CFG,Configuration Register"
bitfld.long 0x10 28. "PWREN,ADC Analog Pre-Enable" "0: ADC analog circuits are only enabled while..,1: ADC analog circuits are pre-enabled and ready to.."
hexmask.long.byte 0x10 16.--23. 1. "PUDLY,Power Up Delay"
newline
bitfld.long 0x10 10. "HPT_EXDI,High Priority Trigger Exception Disable" "0: High priority trigger exceptions are enabled.,1: High priority trigger exceptions are disabled."
bitfld.long 0x10 9. "TCMDRES,Trigger Command Resume" "0: Trigger sequences interrupted by a high priority..,1: Trigger sequences interrupted by a high priority.."
newline
bitfld.long 0x10 8. "TRES,Trigger Resume Enable" "0: Trigger sequences interrupted by a high priority..,1: Trigger sequences interrupted by a high priority.."
bitfld.long 0x10 6.--7. "REFSEL,Voltage Reference Selection" "0: (Default) Option 1 setting.,1: Option 2 setting.,2: Option 3 setting.,?"
newline
bitfld.long 0x10 5. "PWRSEL,Power Configuration Select" "0: Low power,1: High power"
bitfld.long 0x10 0.--1. "TPRICTRL,ADC Trigger Priority Control" "0: If a higher priority trigger is detected during..,1: If a higher priority trigger is received during..,2: If a higher priority trigger is received during..,?"
line.long 0x14 "PAUSE,Pause Register"
bitfld.long 0x14 31. "PAUSEEN,PAUSE Option Enable" "0: Pause operation disabled,1: Pause operation enabled"
hexmask.long.word 0x14 0.--8. 1. "PAUSEDLY,Pause Delay"
group.long 0x34++0x7
line.long 0x0 "SWTRIG,Software Trigger Register"
bitfld.long 0x0 3. "SWT3,Software Trigger 3 Event" "0: No trigger 3 event generated.,1: Trigger 3 event generated."
bitfld.long 0x0 2. "SWT2,Software Trigger 2 Event" "0: No trigger 2 event generated.,1: Trigger 2 event generated."
newline
bitfld.long 0x0 1. "SWT1,Software Trigger 1 Event" "0: No trigger 1 event generated.,1: Trigger 1 event generated."
bitfld.long 0x0 0. "SWT0,Software Trigger 0 Event" "0: No trigger 0 event generated.,1: Trigger 0 event generated."
line.long 0x4 "TSTAT,Trigger Status Register"
hexmask.long.byte 0x4 16.--19. 1. "TCOMP_FLAG,Trigger Completion Flag"
hexmask.long.byte 0x4 0.--3. 1. "TEXC_NUM,Trigger Exception Number"
group.long 0x40++0x3
line.long 0x0 "OFSTRIM,Offset Trim Register"
hexmask.long.word 0x0 0.--9. 1. "OFSTRIM,Trim for Offset"
group.long 0x48++0x3
line.long 0x0 "HSTRIM,High Speed Trim Register"
hexmask.long.byte 0x0 0.--4. 1. "HSTRIM,Trim for High Speed Conversions"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0xA0)++0x3
line.long 0x0 "TCTRL[$1],Trigger Control Register"
bitfld.long 0x0 24.--26. "TCMD,Trigger Command Select" "0: Not a valid selection from the command buffer.,1: CMD1 is executed,2: Corresponding CMD is executed,3: Corresponding CMD is executed,4: Corresponding CMD is executed,5: Corresponding CMD is executed,6: Corresponding CMD is executed,7: CMD7 is executed"
bitfld.long 0x0 23. "TSYNC,Trigger Synchronous Select" "0,1"
newline
hexmask.long.byte 0x0 16.--19. 1. "TDLY,Trigger Delay Select"
bitfld.long 0x0 15. "RSYNC,Trigger Resync" "0,1"
newline
bitfld.long 0x0 8.--9. "TPRI,Trigger Priority Setting" "0: Set to highest priority Level 1,1: Set to corresponding priority level,2: Set to corresponding priority level,3: Set to lowest priority Level 4"
bitfld.long 0x0 0. "HTEN,Trigger Enable" "0: Hardware trigger source disabled,1: Hardware trigger source enabled"
repeat.end
group.long 0xE0++0x3
line.long 0x0 "FCTRL0,FIFO Control Register"
bitfld.long 0x0 16.--18. "FWMARK,Watermark Level Selection" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--3. 1. "FCOUNT,Result FIFO Counter"
rgroup.long 0xF0++0x3
line.long 0x0 "GCC0,Gain Calibration Control"
bitfld.long 0x0 24. "RDY,Gain Calibration Value Valid" "0: The GAIN_CAL value is invalid. Run the hardware..,1: The GAIN_CAL value is valid. GAIN_CAL should be.."
hexmask.long.word 0x0 0.--15. 1. "GAIN_CAL,Gain Calibration Value"
group.long 0xF8++0x3
line.long 0x0 "GCR0,Gain Calculation Result"
bitfld.long 0x0 24. "RDY,Gain Calculation Ready" "0: The GCALR value is invalid.,1: The GCALR value is valid."
hexmask.long.tbyte 0x0 0.--16. 1. "GCALR,Gain Calculation Result"
group.long 0x100++0x37
line.long 0x0 "CMDL1,Command Low Buffer Register"
bitfld.long 0x0 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x0 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x0 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x4 "CMDH1,Command High Buffer Register"
bitfld.long 0x4 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x4 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x4 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x4 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x4 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x4 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x4 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x8 "CMDL2,Command Low Buffer Register"
bitfld.long 0x8 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x8 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x8 0.--4. 1. "ADCH,Input Channel Select"
line.long 0xC "CMDH2,Command High Buffer Register"
bitfld.long 0xC 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0xC 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0xC 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0xC 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0xC 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0xC 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0xC 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x10 "CMDL3,Command Low Buffer Register"
bitfld.long 0x10 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x10 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x10 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x14 "CMDH3,Command High Buffer Register"
bitfld.long 0x14 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x14 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x14 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x14 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x14 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x14 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x14 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x18 "CMDL4,Command Low Buffer Register"
bitfld.long 0x18 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x18 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x18 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x1C "CMDH4,Command High Buffer Register"
bitfld.long 0x1C 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x1C 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x1C 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x1C 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x1C 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x1C 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x1C 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x20 "CMDL5,Command Low Buffer Register"
bitfld.long 0x20 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x20 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x20 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x24 "CMDH5,Command High Buffer Register"
bitfld.long 0x24 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x24 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x24 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x24 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x24 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x24 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x24 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x28 "CMDL6,Command Low Buffer Register"
bitfld.long 0x28 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x28 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x28 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x2C "CMDH6,Command High Buffer Register"
bitfld.long 0x2C 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x2C 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x2C 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x2C 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x2C 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x2C 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x2C 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x30 "CMDL7,Command Low Buffer Register"
bitfld.long 0x30 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x30 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x30 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x34 "CMDH7,Command High Buffer Register"
bitfld.long 0x34 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x34 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x34 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x34 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x34 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x34 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x34 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
repeat 15. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x200)++0x3
line.long 0x0 "CV$1,Compare Value Register"
hexmask.long.word 0x0 16.--31. 1. "CVH,Compare Value High"
hexmask.long.word 0x0 0.--15. 1. "CVL,Compare Value Low"
repeat.end
repeat 33. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x400)++0x3
line.long 0x0 "CAL_GAR[$1],Calibration General A-Side Registers"
hexmask.long.word 0x0 0.--15. 1. "CAL_GAR_VAL,Calibration General A Side Register Element"
repeat.end
endif
rgroup.long 0x300++0x3
line.long 0x0 "RESFIFO0,Data Result FIFO Register"
bitfld.long 0x0 31. "VALID,FIFO Entry is Valid" "0: FIFO is empty. Discard any read from RESFIFO.,1: FIFO record read from RESFIFO is valid."
bitfld.long 0x0 24.--26. "CMDSRC,Command Buffer Source" "0: Not a valid value CMDSRC value for a dataword in..,1: CMD1 buffer used as control settings for this..,2: Corresponding command buffer used as control..,3: Corresponding command buffer used as control..,4: Corresponding command buffer used as control..,5: Corresponding command buffer used as control..,6: Corresponding command buffer used as control..,7: CMD7 buffer used as control settings for this.."
newline
hexmask.long.byte 0x0 20.--23. 1. "LOOPCNT,Loop Count Value"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
bitfld.long 0x0 16.--17. "TSRC,Trigger Source" "0: Trigger source 0 initiated this conversion.,1: Trigger source 1 initiated this conversion.,2: Corresponding trigger source initiated this..,3: Trigger source 3 initiated this conversion."
newline
endif
sif (cpuis("MC?A144*"))
bitfld.long 0x0 16.--17. "TSRC,Trigger Source" "0: Trigger source 0 initiated this conversion.,1: Trigger source 1 initiated this conversion.,2: Trigger source 2 initiated this conversion.,3: Trigger source 3 initiated this conversion."
endif
hexmask.long.word 0x0 0.--15. 1. "D,Data Result"
group.long 0xFF8++0x3
line.long 0x0 "CFG2,Configuration 2 Register"
bitfld.long 0x0 12.--13. "TUNE,Tune Mode register" "0,1,2,3"
bitfld.long 0x0 10. "HSEXTRA,High Speed Extra register" "0: No extra cycle added,1: Extra cycle added"
newline
bitfld.long 0x0 9. "HS,High Speed Enable register" "0: High speed conversion mode disabled,1: High speed conversion mode enabled"
bitfld.long 0x0 8. "JLEFT,Justified Left Enable register" "0,1"
sif (cpuis("MC?A144*"))
repeat 7. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x200)++0x3
line.long 0x0 "CV$1,Compare Value Register"
hexmask.long.word 0x0 16.--31. 1. "CVH,Compare Value High"
hexmask.long.word 0x0 0.--15. 1. "CVL,Compare Value Low"
repeat.end
endif
sif (cpuis("MC?A144*"))
repeat 34. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x400)++0x3
line.long 0x0 "CAL_GAR[$1],Calibration General A-Side Registers"
hexmask.long.word 0x0 0.--15. 1. "CAL_GAR_VAL,Calibration General A Side Register Element"
repeat.end
endif
tree.end
endif
sif (cpuis("MC?A145*"))
tree "ADC0"
base ad:0x400AF000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID Register"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
bitfld.long 0x0 12.--14. "NUM_FIFO,Number of FIFOs" "0: N/A,1: This design supports one result FIFO.,2: This design supports two result FIFOs.,3: This design supports three result FIFOs.,4: This design supports four result FIFOs.,?,?,?"
bitfld.long 0x0 11. "NUM_SEC,Number of Single Ended Outputs Supported" "0: This design supports one single ended conversion..,1: This design supports two simultaneous single.."
newline
bitfld.long 0x0 10. "CALOFSI,Calibration Function Implemented" "0: Calibration Not Implemented.,1: Calibration Implemented."
bitfld.long 0x0 9. "IADCKI,Internal ADC Clock Implemented" "0: Internal clock source not implemented.,1: Internal clock source (and CFG[ADCKEN]).."
newline
bitfld.long 0x0 8. "VR1RNGI,Voltage Reference 1 Range Control Bit Implemented" "0: Range control not required. CFG[VREF1RNG] is not..,1: Range control required. CFG[VREF1RNG] is.."
bitfld.long 0x0 4.--6. "CSW,Channel Scale Width" "0: Channel scaling not supported.,1: Channel scaling supported. 1-bit CSCALE control..,?,?,?,?,6: Channel scaling supported. 6-bit CSCALE control..,?"
newline
bitfld.long 0x0 3. "MVI,Multi Vref Implemented" "0: Single voltage reference high (VREFH) input..,1: Multiple voltage reference high (VREFH) inputs.."
bitfld.long 0x0 1. "DIFFEN,Differential Supported" "0: Differential operation not supported.,1: Differential operation supported."
newline
bitfld.long 0x0 0. "RES,Resolution" "0: Up to 12-bit single ended resolution supported..,1: Up to 16-bit single ended resolution supported.."
line.long 0x4 "PARAM,Parameter Register"
hexmask.long.byte 0x4 24.--31. 1. "CMD_NUM,Command Buffer Number"
hexmask.long.byte 0x4 16.--23. 1. "CV_NUM,Compare Value Number"
newline
hexmask.long.byte 0x4 8.--15. 1. "FIFOSIZE,Result FIFO Depth"
hexmask.long.byte 0x4 0.--7. 1. "TRIG_NUM,Trigger Number"
group.long 0x10++0x17
line.long 0x0 "CTRL,Control Register"
hexmask.long.byte 0x0 16.--19. 1. "CAL_AVGS,Auto-Calibration Averages"
bitfld.long 0x0 8. "RSTFIFO0,Reset FIFO 0" "0: No effect.,1: FIFO 0 is reset."
newline
bitfld.long 0x0 6. "CALHS,High Speed Mode Trim Request" "0: No request for high speed mode trim has been made,1: Request for high speed mode trim has been made"
bitfld.long 0x0 4. "CALOFS,Offset Calibration Request" "0: No request for offset calibration has been made,1: Request for offset calibration function"
newline
bitfld.long 0x0 3. "CAL_REQ,Auto-Calibration Request" "0: No request for hardware calibration has been made,1: A request for hardware calibration has been made"
bitfld.long 0x0 2. "DOZEN,Doze Enable" "0: ADC is enabled in low power mode.,1: ADC is disabled in low power mode."
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: ADC logic is not reset.,1: ADC logic is reset."
bitfld.long 0x0 0. "ADCEN,ADC Enable" "0: ADC is disabled.,1: ADC is enabled."
line.long 0x4 "STAT,Status Register"
rbitfld.long 0x4 24.--26. "CMDACT,Command Active" "0: No command is currently in progress.,1: Command 1 currently being executed.,2: Command 2 currently being executed.,3: Associated command number is currently being..,4: Associated command number is currently being..,5: Associated command number is currently being..,6: Associated command number is currently being..,7: Associated command number is currently being.."
rbitfld.long 0x4 16.--17. "TRGACT,Trigger Active" "0: Command (sequence) associated with Trigger 0..,1: Command (sequence) associated with Trigger 1..,2: Command (sequence) associated with Trigger 2..,3: Command (sequence) associated with Trigger 3.."
newline
rbitfld.long 0x4 11. "ADC_ACTIVE,ADC Active" "0: The ADC is IDLE. There are no pending triggers..,1: The ADC is processing a conversion running.."
rbitfld.long 0x4 10. "CAL_RDY,Calibration Ready" "0: Calibration is incomplete or hasn't been ran.,1: The ADC is calibrated."
newline
eventfld.long 0x4 9. "TCOMP_INT,Interrupt Flag For Trigger Completion" "0: Either IE[TCOMP_IE] is set to 0 or no trigger..,1: Trigger sequence has been completed and all data.."
eventfld.long 0x4 8. "TEXC_INT,Interrupt Flag For High Priority Trigger Exception" "0: No trigger exceptions have occurred.,1: A trigger exception has occurred and is pending.."
newline
eventfld.long 0x4 1. "FOF0,Result FIFO 0 Overflow Flag" "0: No result FIFO 0 overflow has occurred since the..,1: At least one result FIFO 0 overflow has occurred.."
rbitfld.long 0x4 0. "RDY0,Result FIFO 0 Ready Flag" "0: Result FIFO 0 data level not above watermark..,1: Result FIFO 0 holding data above watermark level."
line.long 0x8 "IE,Interrupt Enable Register"
hexmask.long.byte 0x8 16.--19. 1. "TCOMP_IE,Trigger Completion Interrupt Enable"
bitfld.long 0x8 8. "TEXC_IE,Trigger Exception Interrupt Enable" "0: Trigger exception interrupts are disabled.,1: Trigger exception interrupts are enabled."
newline
bitfld.long 0x8 1. "FOFIE0,Result FIFO 0 Overflow Interrupt Enable" "0: FIFO 0 overflow interrupts are not enabled.,1: FIFO 0 overflow interrupts are enabled."
bitfld.long 0x8 0. "FWMIE0,FIFO 0 Watermark Interrupt Enable" "0: FIFO 0 watermark interrupts are not enabled.,1: FIFO 0 watermark interrupts are enabled."
line.long 0xC "DE,DMA Enable Register"
bitfld.long 0xC 0. "FWMDE0,FIFO 0 Watermark DMA Enable" "0: DMA request disabled.,1: DMA request enabled."
line.long 0x10 "CFG,Configuration Register"
bitfld.long 0x10 28. "PWREN,ADC Analog Pre-Enable" "0: ADC analog circuits are only enabled while..,1: ADC analog circuits are pre-enabled and ready to.."
hexmask.long.byte 0x10 16.--23. 1. "PUDLY,Power Up Delay"
newline
bitfld.long 0x10 10. "HPT_EXDI,High Priority Trigger Exception Disable" "0: High priority trigger exceptions are enabled.,1: High priority trigger exceptions are disabled."
bitfld.long 0x10 9. "TCMDRES,Trigger Command Resume" "0: Trigger sequences interrupted by a high priority..,1: Trigger sequences interrupted by a high priority.."
newline
bitfld.long 0x10 8. "TRES,Trigger Resume Enable" "0: Trigger sequences interrupted by a high priority..,1: Trigger sequences interrupted by a high priority.."
bitfld.long 0x10 6.--7. "REFSEL,Voltage Reference Selection" "0: (Default) Option 1 setting.,1: Option 2 setting.,2: Option 3 setting.,?"
newline
bitfld.long 0x10 5. "PWRSEL,Power Configuration Select" "0: Low power,1: High power"
bitfld.long 0x10 0.--1. "TPRICTRL,ADC Trigger Priority Control" "0: If a higher priority trigger is detected during..,1: If a higher priority trigger is received during..,2: If a higher priority trigger is received during..,?"
line.long 0x14 "PAUSE,Pause Register"
bitfld.long 0x14 31. "PAUSEEN,PAUSE Option Enable" "0: Pause operation disabled,1: Pause operation enabled"
hexmask.long.word 0x14 0.--8. 1. "PAUSEDLY,Pause Delay"
group.long 0x34++0x7
line.long 0x0 "SWTRIG,Software Trigger Register"
bitfld.long 0x0 3. "SWT3,Software Trigger 3 Event" "0: No trigger 3 event generated.,1: Trigger 3 event generated."
bitfld.long 0x0 2. "SWT2,Software Trigger 2 Event" "0: No trigger 2 event generated.,1: Trigger 2 event generated."
newline
bitfld.long 0x0 1. "SWT1,Software Trigger 1 Event" "0: No trigger 1 event generated.,1: Trigger 1 event generated."
bitfld.long 0x0 0. "SWT0,Software Trigger 0 Event" "0: No trigger 0 event generated.,1: Trigger 0 event generated."
line.long 0x4 "TSTAT,Trigger Status Register"
hexmask.long.byte 0x4 16.--19. 1. "TCOMP_FLAG,Trigger Completion Flag"
hexmask.long.byte 0x4 0.--3. 1. "TEXC_NUM,Trigger Exception Number"
group.long 0x40++0x3
line.long 0x0 "OFSTRIM,Offset Trim Register"
hexmask.long.word 0x0 0.--9. 1. "OFSTRIM,Trim for Offset"
group.long 0x48++0x3
line.long 0x0 "HSTRIM,High Speed Trim Register"
hexmask.long.byte 0x0 0.--4. 1. "HSTRIM,Trim for High Speed Conversions"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0xA0)++0x3
line.long 0x0 "TCTRL[$1],Trigger Control Register"
bitfld.long 0x0 24.--26. "TCMD,Trigger Command Select" "0: Not a valid selection from the command buffer.,1: CMD1 is executed,2: Corresponding CMD is executed,3: Corresponding CMD is executed,4: Corresponding CMD is executed,5: Corresponding CMD is executed,6: Corresponding CMD is executed,7: CMD7 is executed"
bitfld.long 0x0 23. "TSYNC,Trigger Synchronous Select" "0,1"
newline
hexmask.long.byte 0x0 16.--19. 1. "TDLY,Trigger Delay Select"
bitfld.long 0x0 15. "RSYNC,Trigger Resync" "0,1"
newline
bitfld.long 0x0 8.--9. "TPRI,Trigger Priority Setting" "0: Set to highest priority Level 1,1: Set to corresponding priority level,2: Set to corresponding priority level,3: Set to lowest priority Level 4"
bitfld.long 0x0 0. "HTEN,Trigger Enable" "0: Hardware trigger source disabled,1: Hardware trigger source enabled"
repeat.end
group.long 0xE0++0x3
line.long 0x0 "FCTRL0,FIFO Control Register"
bitfld.long 0x0 16.--18. "FWMARK,Watermark Level Selection" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--3. 1. "FCOUNT,Result FIFO Counter"
rgroup.long 0xF0++0x3
line.long 0x0 "GCC0,Gain Calibration Control"
bitfld.long 0x0 24. "RDY,Gain Calibration Value Valid" "0: The GAIN_CAL value is invalid. Run the hardware..,1: The GAIN_CAL value is valid. GAIN_CAL should be.."
hexmask.long.word 0x0 0.--15. 1. "GAIN_CAL,Gain Calibration Value"
group.long 0xF8++0x3
line.long 0x0 "GCR0,Gain Calculation Result"
bitfld.long 0x0 24. "RDY,Gain Calculation Ready" "0: The GCALR value is invalid.,1: The GCALR value is valid."
hexmask.long.tbyte 0x0 0.--16. 1. "GCALR,Gain Calculation Result"
group.long 0x100++0x37
line.long 0x0 "CMDL1,Command Low Buffer Register"
bitfld.long 0x0 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x0 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x0 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x4 "CMDH1,Command High Buffer Register"
bitfld.long 0x4 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x4 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x4 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x4 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x4 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x4 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x4 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x8 "CMDL2,Command Low Buffer Register"
bitfld.long 0x8 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x8 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x8 0.--4. 1. "ADCH,Input Channel Select"
line.long 0xC "CMDH2,Command High Buffer Register"
bitfld.long 0xC 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0xC 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0xC 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0xC 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0xC 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0xC 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0xC 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x10 "CMDL3,Command Low Buffer Register"
bitfld.long 0x10 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x10 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x10 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x14 "CMDH3,Command High Buffer Register"
bitfld.long 0x14 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x14 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x14 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x14 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x14 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x14 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x14 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x18 "CMDL4,Command Low Buffer Register"
bitfld.long 0x18 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x18 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x18 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x1C "CMDH4,Command High Buffer Register"
bitfld.long 0x1C 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x1C 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x1C 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x1C 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x1C 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x1C 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x1C 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x20 "CMDL5,Command Low Buffer Register"
bitfld.long 0x20 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x20 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x20 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x24 "CMDH5,Command High Buffer Register"
bitfld.long 0x24 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x24 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x24 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x24 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x24 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x24 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x24 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x28 "CMDL6,Command Low Buffer Register"
bitfld.long 0x28 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x28 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x28 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x2C "CMDH6,Command High Buffer Register"
bitfld.long 0x2C 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x2C 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x2C 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x2C 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x2C 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x2C 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x2C 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x30 "CMDL7,Command Low Buffer Register"
bitfld.long 0x30 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x30 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x30 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x34 "CMDH7,Command High Buffer Register"
bitfld.long 0x34 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x34 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x34 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x34 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x34 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x34 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x34 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
repeat 7. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x200)++0x3
line.long 0x0 "CV$1,Compare Value Register"
hexmask.long.word 0x0 16.--31. 1. "CVH,Compare Value High"
hexmask.long.word 0x0 0.--15. 1. "CVL,Compare Value Low"
repeat.end
rgroup.long 0x300++0x3
line.long 0x0 "RESFIFO0,Data Result FIFO Register"
bitfld.long 0x0 31. "VALID,FIFO Entry is Valid" "0: FIFO is empty. Discard any read from RESFIFO.,1: FIFO record read from RESFIFO is valid."
bitfld.long 0x0 24.--26. "CMDSRC,Command Buffer Source" "0: Not a valid value CMDSRC value for a dataword in..,1: CMD1 buffer used as control settings for this..,2: Corresponding command buffer used as control..,3: Corresponding command buffer used as control..,4: Corresponding command buffer used as control..,5: Corresponding command buffer used as control..,6: Corresponding command buffer used as control..,7: CMD7 buffer used as control settings for this.."
newline
hexmask.long.byte 0x0 20.--23. 1. "LOOPCNT,Loop Count Value"
bitfld.long 0x0 16.--17. "TSRC,Trigger Source" "0: Trigger source 0 initiated this conversion.,1: Trigger source 1 initiated this conversion.,2: Trigger source 2 initiated this conversion.,3: Trigger source 3 initiated this conversion."
newline
hexmask.long.word 0x0 0.--15. 1. "D,Data Result"
repeat 34. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x400)++0x3
line.long 0x0 "CAL_GAR[$1],Calibration General A-Side Registers"
hexmask.long.word 0x0 0.--15. 1. "CAL_GAR_VAL,Calibration General A Side Register Element"
repeat.end
group.long 0xFF8++0x3
line.long 0x0 "CFG2,Configuration 2 Register"
bitfld.long 0x0 12.--13. "TUNE,Tune Mode register" "0,1,2,3"
bitfld.long 0x0 10. "HSEXTRA,High Speed Extra register" "0: No extra cycle added,1: Extra cycle added"
newline
bitfld.long 0x0 9. "HS,High Speed Enable register" "0: High speed conversion mode disabled,1: High speed conversion mode enabled"
bitfld.long 0x0 8. "JLEFT,Justified Left Enable register" "0,1"
tree.end
endif
sif (cpuis("MC?A146*"))
tree "ADC0"
base ad:0x400AF000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID Register"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
bitfld.long 0x0 12.--14. "NUM_FIFO,Number of FIFOs" "0: N/A,1: This design supports one result FIFO.,2: This design supports two result FIFOs.,3: This design supports three result FIFOs.,4: This design supports four result FIFOs.,?,?,?"
bitfld.long 0x0 11. "NUM_SEC,Number of Single Ended Outputs Supported" "0: This design supports one single ended conversion..,1: This design supports two simultaneous single.."
newline
bitfld.long 0x0 10. "CALOFSI,Calibration Function Implemented" "0: Calibration Not Implemented.,1: Calibration Implemented."
bitfld.long 0x0 9. "IADCKI,Internal ADC Clock Implemented" "0: Internal clock source not implemented.,1: Internal clock source (and CFG[ADCKEN]).."
newline
bitfld.long 0x0 8. "VR1RNGI,Voltage Reference 1 Range Control Bit Implemented" "0: Range control not required. CFG[VREF1RNG] is not..,1: Range control required. CFG[VREF1RNG] is.."
bitfld.long 0x0 4.--6. "CSW,Channel Scale Width" "0: Channel scaling not supported.,1: Channel scaling supported. 1-bit CSCALE control..,?,?,?,?,6: Channel scaling supported. 6-bit CSCALE control..,?"
newline
bitfld.long 0x0 3. "MVI,Multi Vref Implemented" "0: Single voltage reference high (VREFH) input..,1: Multiple voltage reference high (VREFH) inputs.."
bitfld.long 0x0 1. "DIFFEN,Differential Supported" "0: Differential operation not supported.,1: Differential operation supported."
newline
bitfld.long 0x0 0. "RES,Resolution" "0: Up to 12-bit single ended resolution supported..,1: Up to 16-bit single ended resolution supported.."
line.long 0x4 "PARAM,Parameter Register"
hexmask.long.byte 0x4 24.--31. 1. "CMD_NUM,Command Buffer Number"
hexmask.long.byte 0x4 16.--23. 1. "CV_NUM,Compare Value Number"
newline
hexmask.long.byte 0x4 8.--15. 1. "FIFOSIZE,Result FIFO Depth"
hexmask.long.byte 0x4 0.--7. 1. "TRIG_NUM,Trigger Number"
group.long 0x10++0x17
line.long 0x0 "CTRL,Control Register"
hexmask.long.byte 0x0 16.--19. 1. "CAL_AVGS,Auto-Calibration Averages"
bitfld.long 0x0 8. "RSTFIFO0,Reset FIFO 0" "0: No effect.,1: FIFO 0 is reset."
newline
bitfld.long 0x0 6. "CALHS,High Speed Mode Trim Request" "0: No request for high speed mode trim has been made,1: Request for high speed mode trim has been made"
bitfld.long 0x0 4. "CALOFS,Offset Calibration Request" "0: No request for offset calibration has been made,1: Request for offset calibration function"
newline
bitfld.long 0x0 3. "CAL_REQ,Auto-Calibration Request" "0: No request for hardware calibration has been made,1: A request for hardware calibration has been made"
bitfld.long 0x0 2. "DOZEN,Doze Enable" "0: ADC is enabled in low power mode.,1: ADC is disabled in low power mode."
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: ADC logic is not reset.,1: ADC logic is reset."
bitfld.long 0x0 0. "ADCEN,ADC Enable" "0: ADC is disabled.,1: ADC is enabled."
line.long 0x4 "STAT,Status Register"
rbitfld.long 0x4 24.--26. "CMDACT,Command Active" "0: No command is currently in progress.,1: Command 1 currently being executed.,2: Command 2 currently being executed.,3: Associated command number is currently being..,4: Associated command number is currently being..,5: Associated command number is currently being..,6: Associated command number is currently being..,7: Associated command number is currently being.."
rbitfld.long 0x4 16.--17. "TRGACT,Trigger Active" "0: Command (sequence) associated with Trigger 0..,1: Command (sequence) associated with Trigger 1..,2: Command (sequence) associated with Trigger 2..,3: Command (sequence) associated with Trigger 3.."
newline
rbitfld.long 0x4 11. "ADC_ACTIVE,ADC Active" "0: The ADC is IDLE. There are no pending triggers..,1: The ADC is processing a conversion running.."
rbitfld.long 0x4 10. "CAL_RDY,Calibration Ready" "0: Calibration is incomplete or hasn't been ran.,1: The ADC is calibrated."
newline
eventfld.long 0x4 9. "TCOMP_INT,Interrupt Flag For Trigger Completion" "0: Either IE[TCOMP_IE] is set to 0 or no trigger..,1: Trigger sequence has been completed and all data.."
eventfld.long 0x4 8. "TEXC_INT,Interrupt Flag For High Priority Trigger Exception" "0: No trigger exceptions have occurred.,1: A trigger exception has occurred and is pending.."
newline
eventfld.long 0x4 1. "FOF0,Result FIFO 0 Overflow Flag" "0: No result FIFO 0 overflow has occurred since the..,1: At least one result FIFO 0 overflow has occurred.."
rbitfld.long 0x4 0. "RDY0,Result FIFO 0 Ready Flag" "0: Result FIFO 0 data level not above watermark..,1: Result FIFO 0 holding data above watermark level."
line.long 0x8 "IE,Interrupt Enable Register"
hexmask.long.byte 0x8 16.--19. 1. "TCOMP_IE,Trigger Completion Interrupt Enable"
bitfld.long 0x8 8. "TEXC_IE,Trigger Exception Interrupt Enable" "0: Trigger exception interrupts are disabled.,1: Trigger exception interrupts are enabled."
newline
bitfld.long 0x8 1. "FOFIE0,Result FIFO 0 Overflow Interrupt Enable" "0: FIFO 0 overflow interrupts are not enabled.,1: FIFO 0 overflow interrupts are enabled."
bitfld.long 0x8 0. "FWMIE0,FIFO 0 Watermark Interrupt Enable" "0: FIFO 0 watermark interrupts are not enabled.,1: FIFO 0 watermark interrupts are enabled."
line.long 0xC "DE,DMA Enable Register"
bitfld.long 0xC 0. "FWMDE0,FIFO 0 Watermark DMA Enable" "0: DMA request disabled.,1: DMA request enabled."
line.long 0x10 "CFG,Configuration Register"
bitfld.long 0x10 28. "PWREN,ADC Analog Pre-Enable" "0: ADC analog circuits are only enabled while..,1: ADC analog circuits are pre-enabled and ready to.."
hexmask.long.byte 0x10 16.--23. 1. "PUDLY,Power Up Delay"
newline
bitfld.long 0x10 10. "HPT_EXDI,High Priority Trigger Exception Disable" "0: High priority trigger exceptions are enabled.,1: High priority trigger exceptions are disabled."
bitfld.long 0x10 9. "TCMDRES,Trigger Command Resume" "0: Trigger sequences interrupted by a high priority..,1: Trigger sequences interrupted by a high priority.."
newline
bitfld.long 0x10 8. "TRES,Trigger Resume Enable" "0: Trigger sequences interrupted by a high priority..,1: Trigger sequences interrupted by a high priority.."
bitfld.long 0x10 6.--7. "REFSEL,Voltage Reference Selection" "0: (Default) Option 1 setting.,1: Option 2 setting.,2: Option 3 setting.,?"
newline
bitfld.long 0x10 5. "PWRSEL,Power Configuration Select" "0: Low power,1: High power"
bitfld.long 0x10 0.--1. "TPRICTRL,ADC Trigger Priority Control" "0: If a higher priority trigger is detected during..,1: If a higher priority trigger is received during..,2: If a higher priority trigger is received during..,?"
line.long 0x14 "PAUSE,Pause Register"
bitfld.long 0x14 31. "PAUSEEN,PAUSE Option Enable" "0: Pause operation disabled,1: Pause operation enabled"
hexmask.long.word 0x14 0.--8. 1. "PAUSEDLY,Pause Delay"
group.long 0x34++0x7
line.long 0x0 "SWTRIG,Software Trigger Register"
bitfld.long 0x0 3. "SWT3,Software Trigger 3 Event" "0: No trigger 3 event generated.,1: Trigger 3 event generated."
bitfld.long 0x0 2. "SWT2,Software Trigger 2 Event" "0: No trigger 2 event generated.,1: Trigger 2 event generated."
newline
bitfld.long 0x0 1. "SWT1,Software Trigger 1 Event" "0: No trigger 1 event generated.,1: Trigger 1 event generated."
bitfld.long 0x0 0. "SWT0,Software Trigger 0 Event" "0: No trigger 0 event generated.,1: Trigger 0 event generated."
line.long 0x4 "TSTAT,Trigger Status Register"
hexmask.long.byte 0x4 16.--19. 1. "TCOMP_FLAG,Trigger Completion Flag"
hexmask.long.byte 0x4 0.--3. 1. "TEXC_NUM,Trigger Exception Number"
group.long 0x40++0x3
line.long 0x0 "OFSTRIM,Offset Trim Register"
hexmask.long.word 0x0 0.--9. 1. "OFSTRIM,Trim for Offset"
group.long 0x48++0x3
line.long 0x0 "HSTRIM,High Speed Trim Register"
hexmask.long.byte 0x0 0.--4. 1. "HSTRIM,Trim for High Speed Conversions"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0xA0)++0x3
line.long 0x0 "TCTRL[$1],Trigger Control Register"
bitfld.long 0x0 24.--26. "TCMD,Trigger Command Select" "0: Not a valid selection from the command buffer.,1: CMD1 is executed,2: Corresponding CMD is executed,3: Corresponding CMD is executed,4: Corresponding CMD is executed,5: Corresponding CMD is executed,6: Corresponding CMD is executed,7: CMD7 is executed"
bitfld.long 0x0 23. "TSYNC,Trigger Synchronous Select" "0,1"
newline
hexmask.long.byte 0x0 16.--19. 1. "TDLY,Trigger Delay Select"
bitfld.long 0x0 15. "RSYNC,Trigger Resync" "0,1"
newline
bitfld.long 0x0 8.--9. "TPRI,Trigger Priority Setting" "0: Set to highest priority Level 1,1: Set to corresponding priority level,2: Set to corresponding priority level,3: Set to lowest priority Level 4"
bitfld.long 0x0 0. "HTEN,Trigger Enable" "0: Hardware trigger source disabled,1: Hardware trigger source enabled"
repeat.end
group.long 0xE0++0x3
line.long 0x0 "FCTRL0,FIFO Control Register"
bitfld.long 0x0 16.--18. "FWMARK,Watermark Level Selection" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--3. 1. "FCOUNT,Result FIFO Counter"
rgroup.long 0xF0++0x3
line.long 0x0 "GCC0,Gain Calibration Control"
bitfld.long 0x0 24. "RDY,Gain Calibration Value Valid" "0: The GAIN_CAL value is invalid. Run the hardware..,1: The GAIN_CAL value is valid. GAIN_CAL should be.."
hexmask.long.word 0x0 0.--15. 1. "GAIN_CAL,Gain Calibration Value"
group.long 0xF8++0x3
line.long 0x0 "GCR0,Gain Calculation Result"
bitfld.long 0x0 24. "RDY,Gain Calculation Ready" "0: The GCALR value is invalid.,1: The GCALR value is valid."
hexmask.long.tbyte 0x0 0.--16. 1. "GCALR,Gain Calculation Result"
group.long 0x100++0x37
line.long 0x0 "CMDL1,Command Low Buffer Register"
bitfld.long 0x0 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x0 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x0 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x4 "CMDH1,Command High Buffer Register"
bitfld.long 0x4 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x4 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x4 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x4 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x4 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x4 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x4 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x8 "CMDL2,Command Low Buffer Register"
bitfld.long 0x8 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x8 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x8 0.--4. 1. "ADCH,Input Channel Select"
line.long 0xC "CMDH2,Command High Buffer Register"
bitfld.long 0xC 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0xC 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0xC 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0xC 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0xC 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0xC 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0xC 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x10 "CMDL3,Command Low Buffer Register"
bitfld.long 0x10 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x10 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x10 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x14 "CMDH3,Command High Buffer Register"
bitfld.long 0x14 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x14 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x14 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x14 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x14 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x14 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x14 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x18 "CMDL4,Command Low Buffer Register"
bitfld.long 0x18 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x18 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x18 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x1C "CMDH4,Command High Buffer Register"
bitfld.long 0x1C 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x1C 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x1C 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x1C 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x1C 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x1C 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x1C 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x20 "CMDL5,Command Low Buffer Register"
bitfld.long 0x20 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x20 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x20 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x24 "CMDH5,Command High Buffer Register"
bitfld.long 0x24 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x24 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x24 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x24 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x24 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x24 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x24 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x28 "CMDL6,Command Low Buffer Register"
bitfld.long 0x28 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x28 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x28 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x2C "CMDH6,Command High Buffer Register"
bitfld.long 0x2C 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x2C 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x2C 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x2C 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x2C 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x2C 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x2C 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x30 "CMDL7,Command Low Buffer Register"
bitfld.long 0x30 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x30 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x30 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x34 "CMDH7,Command High Buffer Register"
bitfld.long 0x34 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x34 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x34 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x34 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x34 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x34 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x34 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
repeat 7. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x200)++0x3
line.long 0x0 "CV$1,Compare Value Register"
hexmask.long.word 0x0 16.--31. 1. "CVH,Compare Value High"
hexmask.long.word 0x0 0.--15. 1. "CVL,Compare Value Low"
repeat.end
rgroup.long 0x300++0x3
line.long 0x0 "RESFIFO0,Data Result FIFO Register"
bitfld.long 0x0 31. "VALID,FIFO Entry is Valid" "0: FIFO is empty. Discard any read from RESFIFO.,1: FIFO record read from RESFIFO is valid."
bitfld.long 0x0 24.--26. "CMDSRC,Command Buffer Source" "0: Not a valid value CMDSRC value for a dataword in..,1: CMD1 buffer used as control settings for this..,2: Corresponding command buffer used as control..,3: Corresponding command buffer used as control..,4: Corresponding command buffer used as control..,5: Corresponding command buffer used as control..,6: Corresponding command buffer used as control..,7: CMD7 buffer used as control settings for this.."
newline
hexmask.long.byte 0x0 20.--23. 1. "LOOPCNT,Loop Count Value"
bitfld.long 0x0 16.--17. "TSRC,Trigger Source" "0: Trigger source 0 initiated this conversion.,1: Trigger source 1 initiated this conversion.,2: Trigger source 2 initiated this conversion.,3: Trigger source 3 initiated this conversion."
newline
hexmask.long.word 0x0 0.--15. 1. "D,Data Result"
repeat 34. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x400)++0x3
line.long 0x0 "CAL_GAR[$1],Calibration General A-Side Registers"
hexmask.long.word 0x0 0.--15. 1. "CAL_GAR_VAL,Calibration General A Side Register Element"
repeat.end
group.long 0xFF8++0x3
line.long 0x0 "CFG2,Configuration 2 Register"
bitfld.long 0x0 12.--13. "TUNE,Tune Mode register" "0,1,2,3"
bitfld.long 0x0 10. "HSEXTRA,High Speed Extra register" "0: No extra cycle added,1: Extra cycle added"
newline
bitfld.long 0x0 9. "HS,High Speed Enable register" "0: High speed conversion mode disabled,1: High speed conversion mode enabled"
bitfld.long 0x0 8. "JLEFT,Justified Left Enable register" "0,1"
tree.end
endif
sif (cpuis("MC?A152*"))
tree "ADC0"
base ad:0x400AF000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID Register"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
bitfld.long 0x0 12.--14. "NUM_FIFO,Number of FIFOs" "0: N/A,1: This design supports one result FIFO.,2: This design supports two result FIFOs.,3: This design supports three result FIFOs.,4: This design supports four result FIFOs.,?,?,?"
bitfld.long 0x0 11. "NUM_SEC,Number of Single Ended Outputs Supported" "0: This design supports one single ended conversion..,1: This design supports two simultaneous single.."
newline
bitfld.long 0x0 10. "CALOFSI,Calibration Function Implemented" "0: Calibration Not Implemented.,1: Calibration Implemented."
bitfld.long 0x0 9. "IADCKI,Internal ADC Clock Implemented" "0: Internal clock source not implemented.,1: Internal clock source (and CFG[ADCKEN]).."
newline
bitfld.long 0x0 8. "VR1RNGI,Voltage Reference 1 Range Control Bit Implemented" "0: Range control not required. CFG[VREF1RNG] is not..,1: Range control required. CFG[VREF1RNG] is.."
bitfld.long 0x0 4.--6. "CSW,Channel Scale Width" "0: Channel scaling not supported.,1: Channel scaling supported. 1-bit CSCALE control..,?,?,?,?,6: Channel scaling supported. 6-bit CSCALE control..,?"
newline
bitfld.long 0x0 3. "MVI,Multi Vref Implemented" "0: Single voltage reference high (VREFH) input..,1: Multiple voltage reference high (VREFH) inputs.."
bitfld.long 0x0 1. "DIFFEN,Differential Supported" "0: Differential operation not supported.,1: Differential operation supported."
newline
bitfld.long 0x0 0. "RES,Resolution" "0: Up to 12-bit single ended resolution supported..,1: Up to 16-bit single ended resolution supported.."
line.long 0x4 "PARAM,Parameter Register"
hexmask.long.byte 0x4 24.--31. 1. "CMD_NUM,Command Buffer Number"
hexmask.long.byte 0x4 16.--23. 1. "CV_NUM,Compare Value Number"
newline
hexmask.long.byte 0x4 8.--15. 1. "FIFOSIZE,Result FIFO Depth"
hexmask.long.byte 0x4 0.--7. 1. "TRIG_NUM,Trigger Number"
group.long 0x10++0x17
line.long 0x0 "CTRL,Control Register"
hexmask.long.byte 0x0 16.--19. 1. "CAL_AVGS,Auto-Calibration Averages"
bitfld.long 0x0 8. "RSTFIFO0,Reset FIFO 0" "0: No effect.,1: FIFO 0 is reset."
newline
bitfld.long 0x0 6. "CALHS,High Speed Mode Trim Request" "0: No request for high speed mode trim has been made,1: Request for high speed mode trim has been made"
bitfld.long 0x0 4. "CALOFS,Offset Calibration Request" "0: No request for offset calibration has been made,1: Request for offset calibration function"
newline
bitfld.long 0x0 3. "CAL_REQ,Auto-Calibration Request" "0: No request for hardware calibration has been made,1: A request for hardware calibration has been made"
bitfld.long 0x0 2. "DOZEN,Doze Enable" "0: ADC is enabled in low power mode.,1: ADC is disabled in low power mode."
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: ADC logic is not reset.,1: ADC logic is reset."
bitfld.long 0x0 0. "ADCEN,ADC Enable" "0: ADC is disabled.,1: ADC is enabled."
line.long 0x4 "STAT,Status Register"
rbitfld.long 0x4 24.--26. "CMDACT,Command Active" "0: No command is currently in progress.,1: Command 1 currently being executed.,2: Command 2 currently being executed.,3: Associated command number is currently being..,4: Associated command number is currently being..,5: Associated command number is currently being..,6: Associated command number is currently being..,7: Associated command number is currently being.."
rbitfld.long 0x4 16.--17. "TRGACT,Trigger Active" "0: Command (sequence) associated with Trigger 0..,1: Command (sequence) associated with Trigger 1..,2: Command (sequence) associated with Trigger 2..,3: Command (sequence) associated with Trigger 3.."
newline
rbitfld.long 0x4 11. "ADC_ACTIVE,ADC Active" "0: The ADC is IDLE. There are no pending triggers..,1: The ADC is processing a conversion running.."
rbitfld.long 0x4 10. "CAL_RDY,Calibration Ready" "0: Calibration is incomplete or hasn't been ran.,1: The ADC is calibrated."
newline
eventfld.long 0x4 9. "TCOMP_INT,Interrupt Flag For Trigger Completion" "0: Either IE[TCOMP_IE] is set to 0 or no trigger..,1: Trigger sequence has been completed and all data.."
eventfld.long 0x4 8. "TEXC_INT,Interrupt Flag For High Priority Trigger Exception" "0: No trigger exceptions have occurred.,1: A trigger exception has occurred and is pending.."
newline
eventfld.long 0x4 1. "FOF0,Result FIFO 0 Overflow Flag" "0: No result FIFO 0 overflow has occurred since the..,1: At least one result FIFO 0 overflow has occurred.."
rbitfld.long 0x4 0. "RDY0,Result FIFO 0 Ready Flag" "0: Result FIFO 0 data level not above watermark..,1: Result FIFO 0 holding data above watermark level."
line.long 0x8 "IE,Interrupt Enable Register"
hexmask.long.byte 0x8 16.--19. 1. "TCOMP_IE,Trigger Completion Interrupt Enable"
bitfld.long 0x8 8. "TEXC_IE,Trigger Exception Interrupt Enable" "0: Trigger exception interrupts are disabled.,1: Trigger exception interrupts are enabled."
newline
bitfld.long 0x8 1. "FOFIE0,Result FIFO 0 Overflow Interrupt Enable" "0: FIFO 0 overflow interrupts are not enabled.,1: FIFO 0 overflow interrupts are enabled."
bitfld.long 0x8 0. "FWMIE0,FIFO 0 Watermark Interrupt Enable" "0: FIFO 0 watermark interrupts are not enabled.,1: FIFO 0 watermark interrupts are enabled."
line.long 0xC "DE,DMA Enable Register"
bitfld.long 0xC 0. "FWMDE0,FIFO 0 Watermark DMA Enable" "0: DMA request disabled.,1: DMA request enabled."
line.long 0x10 "CFG,Configuration Register"
bitfld.long 0x10 28. "PWREN,ADC Analog Pre-Enable" "0: ADC analog circuits are only enabled while..,1: ADC analog circuits are pre-enabled and ready to.."
hexmask.long.byte 0x10 16.--23. 1. "PUDLY,Power Up Delay"
newline
bitfld.long 0x10 10. "HPT_EXDI,High Priority Trigger Exception Disable" "0: High priority trigger exceptions are enabled.,1: High priority trigger exceptions are disabled."
bitfld.long 0x10 9. "TCMDRES,Trigger Command Resume" "0: Trigger sequences interrupted by a high priority..,1: Trigger sequences interrupted by a high priority.."
newline
bitfld.long 0x10 8. "TRES,Trigger Resume Enable" "0: Trigger sequences interrupted by a high priority..,1: Trigger sequences interrupted by a high priority.."
bitfld.long 0x10 6.--7. "REFSEL,Voltage Reference Selection" "0: (Default) Option 1 setting.,1: Option 2 setting.,2: Option 3 setting.,?"
newline
bitfld.long 0x10 5. "PWRSEL,Power Configuration Select" "0: Low power,1: High power"
bitfld.long 0x10 0.--1. "TPRICTRL,ADC Trigger Priority Control" "0: If a higher priority trigger is detected during..,1: If a higher priority trigger is received during..,2: If a higher priority trigger is received during..,?"
line.long 0x14 "PAUSE,Pause Register"
bitfld.long 0x14 31. "PAUSEEN,PAUSE Option Enable" "0: Pause operation disabled,1: Pause operation enabled"
hexmask.long.word 0x14 0.--8. 1. "PAUSEDLY,Pause Delay"
group.long 0x34++0x7
line.long 0x0 "SWTRIG,Software Trigger Register"
bitfld.long 0x0 3. "SWT3,Software Trigger 3 Event" "0: No trigger 3 event generated.,1: Trigger 3 event generated."
bitfld.long 0x0 2. "SWT2,Software Trigger 2 Event" "0: No trigger 2 event generated.,1: Trigger 2 event generated."
newline
bitfld.long 0x0 1. "SWT1,Software Trigger 1 Event" "0: No trigger 1 event generated.,1: Trigger 1 event generated."
bitfld.long 0x0 0. "SWT0,Software Trigger 0 Event" "0: No trigger 0 event generated.,1: Trigger 0 event generated."
line.long 0x4 "TSTAT,Trigger Status Register"
hexmask.long.byte 0x4 16.--19. 1. "TCOMP_FLAG,Trigger Completion Flag"
hexmask.long.byte 0x4 0.--3. 1. "TEXC_NUM,Trigger Exception Number"
group.long 0x40++0x3
line.long 0x0 "OFSTRIM,Offset Trim Register"
hexmask.long.word 0x0 0.--9. 1. "OFSTRIM,Trim for Offset"
group.long 0x48++0x3
line.long 0x0 "HSTRIM,High Speed Trim Register"
hexmask.long.byte 0x0 0.--4. 1. "HSTRIM,Trim for High Speed Conversions"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0xA0)++0x3
line.long 0x0 "TCTRL[$1],Trigger Control Register"
bitfld.long 0x0 24.--26. "TCMD,Trigger Command Select" "0: Not a valid selection from the command buffer.,1: CMD1 is executed,2: Corresponding CMD is executed,3: Corresponding CMD is executed,4: Corresponding CMD is executed,5: Corresponding CMD is executed,6: Corresponding CMD is executed,7: CMD7 is executed"
bitfld.long 0x0 23. "TSYNC,Trigger Synchronous Select" "0,1"
newline
hexmask.long.byte 0x0 16.--19. 1. "TDLY,Trigger Delay Select"
bitfld.long 0x0 15. "RSYNC,Trigger Resync" "0,1"
newline
bitfld.long 0x0 8.--9. "TPRI,Trigger Priority Setting" "0: Set to highest priority Level 1,1: Set to corresponding priority level,2: Set to corresponding priority level,3: Set to lowest priority Level 4"
bitfld.long 0x0 0. "HTEN,Trigger Enable" "0: Hardware trigger source disabled,1: Hardware trigger source enabled"
repeat.end
group.long 0xE0++0x3
line.long 0x0 "FCTRL0,FIFO Control Register"
bitfld.long 0x0 16.--18. "FWMARK,Watermark Level Selection" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--3. 1. "FCOUNT,Result FIFO Counter"
rgroup.long 0xF0++0x3
line.long 0x0 "GCC0,Gain Calibration Control"
bitfld.long 0x0 24. "RDY,Gain Calibration Value Valid" "0: The GAIN_CAL value is invalid. Run the hardware..,1: The GAIN_CAL value is valid. GAIN_CAL should be.."
hexmask.long.word 0x0 0.--15. 1. "GAIN_CAL,Gain Calibration Value"
group.long 0xF8++0x3
line.long 0x0 "GCR0,Gain Calculation Result"
bitfld.long 0x0 24. "RDY,Gain Calculation Ready" "0: The GCALR value is invalid.,1: The GCALR value is valid."
hexmask.long.tbyte 0x0 0.--16. 1. "GCALR,Gain Calculation Result"
group.long 0x100++0x37
line.long 0x0 "CMDL1,Command Low Buffer Register"
bitfld.long 0x0 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x0 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x0 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x4 "CMDH1,Command High Buffer Register"
bitfld.long 0x4 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x4 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x4 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x4 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x4 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x4 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x4 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x8 "CMDL2,Command Low Buffer Register"
bitfld.long 0x8 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x8 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x8 0.--4. 1. "ADCH,Input Channel Select"
line.long 0xC "CMDH2,Command High Buffer Register"
bitfld.long 0xC 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0xC 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0xC 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0xC 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0xC 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0xC 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0xC 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x10 "CMDL3,Command Low Buffer Register"
bitfld.long 0x10 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x10 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x10 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x14 "CMDH3,Command High Buffer Register"
bitfld.long 0x14 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x14 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x14 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x14 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x14 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x14 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x14 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x18 "CMDL4,Command Low Buffer Register"
bitfld.long 0x18 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x18 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x18 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x1C "CMDH4,Command High Buffer Register"
bitfld.long 0x1C 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x1C 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x1C 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x1C 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x1C 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x1C 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x1C 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x20 "CMDL5,Command Low Buffer Register"
bitfld.long 0x20 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x20 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x20 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x24 "CMDH5,Command High Buffer Register"
bitfld.long 0x24 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x24 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x24 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x24 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x24 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x24 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x24 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x28 "CMDL6,Command Low Buffer Register"
bitfld.long 0x28 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x28 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x28 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x2C "CMDH6,Command High Buffer Register"
bitfld.long 0x2C 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x2C 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x2C 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x2C 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x2C 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x2C 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x2C 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x30 "CMDL7,Command Low Buffer Register"
bitfld.long 0x30 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x30 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x30 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x34 "CMDH7,Command High Buffer Register"
bitfld.long 0x34 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x34 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x34 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x34 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x34 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x34 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x34 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
repeat 15. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x200)++0x3
line.long 0x0 "CV$1,Compare Value Register"
hexmask.long.word 0x0 16.--31. 1. "CVH,Compare Value High"
hexmask.long.word 0x0 0.--15. 1. "CVL,Compare Value Low"
repeat.end
rgroup.long 0x300++0x3
line.long 0x0 "RESFIFO0,Data Result FIFO Register"
bitfld.long 0x0 31. "VALID,FIFO Entry is Valid" "0: FIFO is empty. Discard any read from RESFIFO.,1: FIFO record read from RESFIFO is valid."
bitfld.long 0x0 24.--26. "CMDSRC,Command Buffer Source" "0: Not a valid value CMDSRC value for a dataword in..,1: CMD1 buffer used as control settings for this..,2: Corresponding command buffer used as control..,3: Corresponding command buffer used as control..,4: Corresponding command buffer used as control..,5: Corresponding command buffer used as control..,6: Corresponding command buffer used as control..,7: CMD7 buffer used as control settings for this.."
newline
hexmask.long.byte 0x0 20.--23. 1. "LOOPCNT,Loop Count Value"
bitfld.long 0x0 16.--17. "TSRC,Trigger Source" "0: Trigger source 0 initiated this conversion.,1: Trigger source 1 initiated this conversion.,2: Corresponding trigger source initiated this..,3: Trigger source 3 initiated this conversion."
newline
hexmask.long.word 0x0 0.--15. 1. "D,Data Result"
repeat 33. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x400)++0x3
line.long 0x0 "CAL_GAR[$1],Calibration General A-Side Registers"
hexmask.long.word 0x0 0.--15. 1. "CAL_GAR_VAL,Calibration General A Side Register Element"
repeat.end
group.long 0xFF8++0x3
line.long 0x0 "CFG2,Configuration 2 Register"
bitfld.long 0x0 12.--13. "TUNE,Tune Mode register" "0,1,2,3"
bitfld.long 0x0 10. "HSEXTRA,High Speed Extra register" "0: No extra cycle added,1: Extra cycle added"
newline
bitfld.long 0x0 9. "HS,High Speed Enable register" "0: High speed conversion mode disabled,1: High speed conversion mode enabled"
bitfld.long 0x0 8. "JLEFT,Justified Left Enable register" "0,1"
tree.end
endif
sif (cpuis("MC?A153*"))
tree "ADC0"
base ad:0x400AF000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID Register"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
bitfld.long 0x0 12.--14. "NUM_FIFO,Number of FIFOs" "0: N/A,1: This design supports one result FIFO.,2: This design supports two result FIFOs.,3: This design supports three result FIFOs.,4: This design supports four result FIFOs.,?,?,?"
bitfld.long 0x0 11. "NUM_SEC,Number of Single Ended Outputs Supported" "0: This design supports one single ended conversion..,1: This design supports two simultaneous single.."
newline
bitfld.long 0x0 10. "CALOFSI,Calibration Function Implemented" "0: Calibration Not Implemented.,1: Calibration Implemented."
bitfld.long 0x0 9. "IADCKI,Internal ADC Clock Implemented" "0: Internal clock source not implemented.,1: Internal clock source (and CFG[ADCKEN]).."
newline
bitfld.long 0x0 8. "VR1RNGI,Voltage Reference 1 Range Control Bit Implemented" "0: Range control not required. CFG[VREF1RNG] is not..,1: Range control required. CFG[VREF1RNG] is.."
bitfld.long 0x0 4.--6. "CSW,Channel Scale Width" "0: Channel scaling not supported.,1: Channel scaling supported. 1-bit CSCALE control..,?,?,?,?,6: Channel scaling supported. 6-bit CSCALE control..,?"
newline
bitfld.long 0x0 3. "MVI,Multi Vref Implemented" "0: Single voltage reference high (VREFH) input..,1: Multiple voltage reference high (VREFH) inputs.."
bitfld.long 0x0 1. "DIFFEN,Differential Supported" "0: Differential operation not supported.,1: Differential operation supported."
newline
bitfld.long 0x0 0. "RES,Resolution" "0: Up to 12-bit single ended resolution supported..,1: Up to 16-bit single ended resolution supported.."
line.long 0x4 "PARAM,Parameter Register"
hexmask.long.byte 0x4 24.--31. 1. "CMD_NUM,Command Buffer Number"
hexmask.long.byte 0x4 16.--23. 1. "CV_NUM,Compare Value Number"
newline
hexmask.long.byte 0x4 8.--15. 1. "FIFOSIZE,Result FIFO Depth"
hexmask.long.byte 0x4 0.--7. 1. "TRIG_NUM,Trigger Number"
group.long 0x10++0x17
line.long 0x0 "CTRL,Control Register"
hexmask.long.byte 0x0 16.--19. 1. "CAL_AVGS,Auto-Calibration Averages"
bitfld.long 0x0 8. "RSTFIFO0,Reset FIFO 0" "0: No effect.,1: FIFO 0 is reset."
newline
bitfld.long 0x0 6. "CALHS,High Speed Mode Trim Request" "0: No request for high speed mode trim has been made,1: Request for high speed mode trim has been made"
bitfld.long 0x0 4. "CALOFS,Offset Calibration Request" "0: No request for offset calibration has been made,1: Request for offset calibration function"
newline
bitfld.long 0x0 3. "CAL_REQ,Auto-Calibration Request" "0: No request for hardware calibration has been made,1: A request for hardware calibration has been made"
bitfld.long 0x0 2. "DOZEN,Doze Enable" "0: ADC is enabled in low power mode.,1: ADC is disabled in low power mode."
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: ADC logic is not reset.,1: ADC logic is reset."
bitfld.long 0x0 0. "ADCEN,ADC Enable" "0: ADC is disabled.,1: ADC is enabled."
line.long 0x4 "STAT,Status Register"
rbitfld.long 0x4 24.--26. "CMDACT,Command Active" "0: No command is currently in progress.,1: Command 1 currently being executed.,2: Command 2 currently being executed.,3: Associated command number is currently being..,4: Associated command number is currently being..,5: Associated command number is currently being..,6: Associated command number is currently being..,7: Associated command number is currently being.."
rbitfld.long 0x4 16.--17. "TRGACT,Trigger Active" "0: Command (sequence) associated with Trigger 0..,1: Command (sequence) associated with Trigger 1..,2: Command (sequence) associated with Trigger 2..,3: Command (sequence) associated with Trigger 3.."
newline
rbitfld.long 0x4 11. "ADC_ACTIVE,ADC Active" "0: The ADC is IDLE. There are no pending triggers..,1: The ADC is processing a conversion running.."
rbitfld.long 0x4 10. "CAL_RDY,Calibration Ready" "0: Calibration is incomplete or hasn't been ran.,1: The ADC is calibrated."
newline
eventfld.long 0x4 9. "TCOMP_INT,Interrupt Flag For Trigger Completion" "0: Either IE[TCOMP_IE] is set to 0 or no trigger..,1: Trigger sequence has been completed and all data.."
eventfld.long 0x4 8. "TEXC_INT,Interrupt Flag For High Priority Trigger Exception" "0: No trigger exceptions have occurred.,1: A trigger exception has occurred and is pending.."
newline
eventfld.long 0x4 1. "FOF0,Result FIFO 0 Overflow Flag" "0: No result FIFO 0 overflow has occurred since the..,1: At least one result FIFO 0 overflow has occurred.."
rbitfld.long 0x4 0. "RDY0,Result FIFO 0 Ready Flag" "0: Result FIFO 0 data level not above watermark..,1: Result FIFO 0 holding data above watermark level."
line.long 0x8 "IE,Interrupt Enable Register"
hexmask.long.byte 0x8 16.--19. 1. "TCOMP_IE,Trigger Completion Interrupt Enable"
bitfld.long 0x8 8. "TEXC_IE,Trigger Exception Interrupt Enable" "0: Trigger exception interrupts are disabled.,1: Trigger exception interrupts are enabled."
newline
bitfld.long 0x8 1. "FOFIE0,Result FIFO 0 Overflow Interrupt Enable" "0: FIFO 0 overflow interrupts are not enabled.,1: FIFO 0 overflow interrupts are enabled."
bitfld.long 0x8 0. "FWMIE0,FIFO 0 Watermark Interrupt Enable" "0: FIFO 0 watermark interrupts are not enabled.,1: FIFO 0 watermark interrupts are enabled."
line.long 0xC "DE,DMA Enable Register"
bitfld.long 0xC 0. "FWMDE0,FIFO 0 Watermark DMA Enable" "0: DMA request disabled.,1: DMA request enabled."
line.long 0x10 "CFG,Configuration Register"
bitfld.long 0x10 28. "PWREN,ADC Analog Pre-Enable" "0: ADC analog circuits are only enabled while..,1: ADC analog circuits are pre-enabled and ready to.."
hexmask.long.byte 0x10 16.--23. 1. "PUDLY,Power Up Delay"
newline
bitfld.long 0x10 10. "HPT_EXDI,High Priority Trigger Exception Disable" "0: High priority trigger exceptions are enabled.,1: High priority trigger exceptions are disabled."
bitfld.long 0x10 9. "TCMDRES,Trigger Command Resume" "0: Trigger sequences interrupted by a high priority..,1: Trigger sequences interrupted by a high priority.."
newline
bitfld.long 0x10 8. "TRES,Trigger Resume Enable" "0: Trigger sequences interrupted by a high priority..,1: Trigger sequences interrupted by a high priority.."
bitfld.long 0x10 6.--7. "REFSEL,Voltage Reference Selection" "0: (Default) Option 1 setting.,1: Option 2 setting.,2: Option 3 setting.,?"
newline
bitfld.long 0x10 5. "PWRSEL,Power Configuration Select" "0: Low power,1: High power"
bitfld.long 0x10 0.--1. "TPRICTRL,ADC Trigger Priority Control" "0: If a higher priority trigger is detected during..,1: If a higher priority trigger is received during..,2: If a higher priority trigger is received during..,?"
line.long 0x14 "PAUSE,Pause Register"
bitfld.long 0x14 31. "PAUSEEN,PAUSE Option Enable" "0: Pause operation disabled,1: Pause operation enabled"
hexmask.long.word 0x14 0.--8. 1. "PAUSEDLY,Pause Delay"
group.long 0x34++0x7
line.long 0x0 "SWTRIG,Software Trigger Register"
bitfld.long 0x0 3. "SWT3,Software Trigger 3 Event" "0: No trigger 3 event generated.,1: Trigger 3 event generated."
bitfld.long 0x0 2. "SWT2,Software Trigger 2 Event" "0: No trigger 2 event generated.,1: Trigger 2 event generated."
newline
bitfld.long 0x0 1. "SWT1,Software Trigger 1 Event" "0: No trigger 1 event generated.,1: Trigger 1 event generated."
bitfld.long 0x0 0. "SWT0,Software Trigger 0 Event" "0: No trigger 0 event generated.,1: Trigger 0 event generated."
line.long 0x4 "TSTAT,Trigger Status Register"
hexmask.long.byte 0x4 16.--19. 1. "TCOMP_FLAG,Trigger Completion Flag"
hexmask.long.byte 0x4 0.--3. 1. "TEXC_NUM,Trigger Exception Number"
group.long 0x40++0x3
line.long 0x0 "OFSTRIM,Offset Trim Register"
hexmask.long.word 0x0 0.--9. 1. "OFSTRIM,Trim for Offset"
group.long 0x48++0x3
line.long 0x0 "HSTRIM,High Speed Trim Register"
hexmask.long.byte 0x0 0.--4. 1. "HSTRIM,Trim for High Speed Conversions"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0xA0)++0x3
line.long 0x0 "TCTRL[$1],Trigger Control Register"
bitfld.long 0x0 24.--26. "TCMD,Trigger Command Select" "0: Not a valid selection from the command buffer.,1: CMD1 is executed,2: Corresponding CMD is executed,3: Corresponding CMD is executed,4: Corresponding CMD is executed,5: Corresponding CMD is executed,6: Corresponding CMD is executed,7: CMD7 is executed"
bitfld.long 0x0 23. "TSYNC,Trigger Synchronous Select" "0,1"
newline
hexmask.long.byte 0x0 16.--19. 1. "TDLY,Trigger Delay Select"
bitfld.long 0x0 15. "RSYNC,Trigger Resync" "0,1"
newline
bitfld.long 0x0 8.--9. "TPRI,Trigger Priority Setting" "0: Set to highest priority Level 1,1: Set to corresponding priority level,2: Set to corresponding priority level,3: Set to lowest priority Level 4"
bitfld.long 0x0 0. "HTEN,Trigger Enable" "0: Hardware trigger source disabled,1: Hardware trigger source enabled"
repeat.end
group.long 0xE0++0x3
line.long 0x0 "FCTRL0,FIFO Control Register"
bitfld.long 0x0 16.--18. "FWMARK,Watermark Level Selection" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--3. 1. "FCOUNT,Result FIFO Counter"
rgroup.long 0xF0++0x3
line.long 0x0 "GCC0,Gain Calibration Control"
bitfld.long 0x0 24. "RDY,Gain Calibration Value Valid" "0: The GAIN_CAL value is invalid. Run the hardware..,1: The GAIN_CAL value is valid. GAIN_CAL should be.."
hexmask.long.word 0x0 0.--15. 1. "GAIN_CAL,Gain Calibration Value"
group.long 0xF8++0x3
line.long 0x0 "GCR0,Gain Calculation Result"
bitfld.long 0x0 24. "RDY,Gain Calculation Ready" "0: The GCALR value is invalid.,1: The GCALR value is valid."
hexmask.long.tbyte 0x0 0.--16. 1. "GCALR,Gain Calculation Result"
group.long 0x100++0x37
line.long 0x0 "CMDL1,Command Low Buffer Register"
bitfld.long 0x0 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x0 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x0 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x4 "CMDH1,Command High Buffer Register"
bitfld.long 0x4 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x4 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x4 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x4 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x4 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x4 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x4 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x8 "CMDL2,Command Low Buffer Register"
bitfld.long 0x8 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x8 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x8 0.--4. 1. "ADCH,Input Channel Select"
line.long 0xC "CMDH2,Command High Buffer Register"
bitfld.long 0xC 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0xC 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0xC 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0xC 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0xC 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0xC 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0xC 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x10 "CMDL3,Command Low Buffer Register"
bitfld.long 0x10 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x10 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x10 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x14 "CMDH3,Command High Buffer Register"
bitfld.long 0x14 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x14 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x14 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x14 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x14 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x14 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x14 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x18 "CMDL4,Command Low Buffer Register"
bitfld.long 0x18 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x18 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x18 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x1C "CMDH4,Command High Buffer Register"
bitfld.long 0x1C 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x1C 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x1C 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x1C 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x1C 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x1C 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x1C 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x20 "CMDL5,Command Low Buffer Register"
bitfld.long 0x20 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x20 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x20 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x24 "CMDH5,Command High Buffer Register"
bitfld.long 0x24 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x24 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x24 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x24 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x24 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x24 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x24 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x28 "CMDL6,Command Low Buffer Register"
bitfld.long 0x28 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x28 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x28 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x2C "CMDH6,Command High Buffer Register"
bitfld.long 0x2C 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x2C 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x2C 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x2C 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x2C 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x2C 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x2C 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x30 "CMDL7,Command Low Buffer Register"
bitfld.long 0x30 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x30 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x30 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x34 "CMDH7,Command High Buffer Register"
bitfld.long 0x34 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x34 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x34 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x34 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x34 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x34 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x34 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
repeat 15. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x200)++0x3
line.long 0x0 "CV$1,Compare Value Register"
hexmask.long.word 0x0 16.--31. 1. "CVH,Compare Value High"
hexmask.long.word 0x0 0.--15. 1. "CVL,Compare Value Low"
repeat.end
rgroup.long 0x300++0x3
line.long 0x0 "RESFIFO0,Data Result FIFO Register"
bitfld.long 0x0 31. "VALID,FIFO Entry is Valid" "0: FIFO is empty. Discard any read from RESFIFO.,1: FIFO record read from RESFIFO is valid."
bitfld.long 0x0 24.--26. "CMDSRC,Command Buffer Source" "0: Not a valid value CMDSRC value for a dataword in..,1: CMD1 buffer used as control settings for this..,2: Corresponding command buffer used as control..,3: Corresponding command buffer used as control..,4: Corresponding command buffer used as control..,5: Corresponding command buffer used as control..,6: Corresponding command buffer used as control..,7: CMD7 buffer used as control settings for this.."
newline
hexmask.long.byte 0x0 20.--23. 1. "LOOPCNT,Loop Count Value"
bitfld.long 0x0 16.--17. "TSRC,Trigger Source" "0: Trigger source 0 initiated this conversion.,1: Trigger source 1 initiated this conversion.,2: Corresponding trigger source initiated this..,3: Trigger source 3 initiated this conversion."
newline
hexmask.long.word 0x0 0.--15. 1. "D,Data Result"
repeat 33. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x400)++0x3
line.long 0x0 "CAL_GAR[$1],Calibration General A-Side Registers"
hexmask.long.word 0x0 0.--15. 1. "CAL_GAR_VAL,Calibration General A Side Register Element"
repeat.end
group.long 0xFF8++0x3
line.long 0x0 "CFG2,Configuration 2 Register"
bitfld.long 0x0 12.--13. "TUNE,Tune Mode register" "0,1,2,3"
bitfld.long 0x0 10. "HSEXTRA,High Speed Extra register" "0: No extra cycle added,1: Extra cycle added"
newline
bitfld.long 0x0 9. "HS,High Speed Enable register" "0: High speed conversion mode disabled,1: High speed conversion mode enabled"
bitfld.long 0x0 8. "JLEFT,Justified Left Enable register" "0,1"
tree.end
endif
sif (cpuis("MC?A154*"))
tree "ADC0"
base ad:0x400AF000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID Register"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
bitfld.long 0x0 12.--14. "NUM_FIFO,Number of FIFOs" "0: N/A,1: This design supports one result FIFO.,2: This design supports two result FIFOs.,3: This design supports three result FIFOs.,4: This design supports four result FIFOs.,?,?,?"
bitfld.long 0x0 11. "NUM_SEC,Number of Single Ended Outputs Supported" "0: This design supports one single ended conversion..,1: This design supports two simultaneous single.."
newline
bitfld.long 0x0 10. "CALOFSI,Calibration Function Implemented" "0: Calibration Not Implemented.,1: Calibration Implemented."
bitfld.long 0x0 9. "IADCKI,Internal ADC Clock Implemented" "0: Internal clock source not implemented.,1: Internal clock source (and CFG[ADCKEN]).."
newline
bitfld.long 0x0 8. "VR1RNGI,Voltage Reference 1 Range Control Bit Implemented" "0: Range control not required. CFG[VREF1RNG] is not..,1: Range control required. CFG[VREF1RNG] is.."
bitfld.long 0x0 4.--6. "CSW,Channel Scale Width" "0: Channel scaling not supported.,1: Channel scaling supported. 1-bit CSCALE control..,?,?,?,?,6: Channel scaling supported. 6-bit CSCALE control..,?"
newline
bitfld.long 0x0 3. "MVI,Multi Vref Implemented" "0: Single voltage reference high (VREFH) input..,1: Multiple voltage reference high (VREFH) inputs.."
bitfld.long 0x0 1. "DIFFEN,Differential Supported" "0: Differential operation not supported.,1: Differential operation supported."
newline
bitfld.long 0x0 0. "RES,Resolution" "0: Up to 12-bit single ended resolution supported..,1: Up to 16-bit single ended resolution supported.."
line.long 0x4 "PARAM,Parameter Register"
hexmask.long.byte 0x4 24.--31. 1. "CMD_NUM,Command Buffer Number"
hexmask.long.byte 0x4 16.--23. 1. "CV_NUM,Compare Value Number"
newline
hexmask.long.byte 0x4 8.--15. 1. "FIFOSIZE,Result FIFO Depth"
hexmask.long.byte 0x4 0.--7. 1. "TRIG_NUM,Trigger Number"
group.long 0x10++0x17
line.long 0x0 "CTRL,Control Register"
hexmask.long.byte 0x0 16.--19. 1. "CAL_AVGS,Auto-Calibration Averages"
bitfld.long 0x0 8. "RSTFIFO0,Reset FIFO 0" "0: No effect.,1: FIFO 0 is reset."
newline
bitfld.long 0x0 6. "CALHS,High Speed Mode Trim Request" "0: No request for high speed mode trim has been made,1: Request for high speed mode trim has been made"
bitfld.long 0x0 4. "CALOFS,Offset Calibration Request" "0: No request for offset calibration has been made,1: Request for offset calibration function"
newline
bitfld.long 0x0 3. "CAL_REQ,Auto-Calibration Request" "0: No request for hardware calibration has been made,1: A request for hardware calibration has been made"
bitfld.long 0x0 2. "DOZEN,Doze Enable" "0: ADC is enabled in low power mode.,1: ADC is disabled in low power mode."
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: ADC logic is not reset.,1: ADC logic is reset."
bitfld.long 0x0 0. "ADCEN,ADC Enable" "0: ADC is disabled.,1: ADC is enabled."
line.long 0x4 "STAT,Status Register"
rbitfld.long 0x4 24.--26. "CMDACT,Command Active" "0: No command is currently in progress.,1: Command 1 currently being executed.,2: Command 2 currently being executed.,3: Associated command number is currently being..,4: Associated command number is currently being..,5: Associated command number is currently being..,6: Associated command number is currently being..,7: Associated command number is currently being.."
rbitfld.long 0x4 16.--17. "TRGACT,Trigger Active" "0: Command (sequence) associated with Trigger 0..,1: Command (sequence) associated with Trigger 1..,2: Command (sequence) associated with Trigger 2..,3: Command (sequence) associated with Trigger 3.."
newline
rbitfld.long 0x4 11. "ADC_ACTIVE,ADC Active" "0: The ADC is IDLE. There are no pending triggers..,1: The ADC is processing a conversion running.."
rbitfld.long 0x4 10. "CAL_RDY,Calibration Ready" "0: Calibration is incomplete or hasn't been ran.,1: The ADC is calibrated."
newline
eventfld.long 0x4 9. "TCOMP_INT,Interrupt Flag For Trigger Completion" "0: Either IE[TCOMP_IE] is set to 0 or no trigger..,1: Trigger sequence has been completed and all data.."
eventfld.long 0x4 8. "TEXC_INT,Interrupt Flag For High Priority Trigger Exception" "0: No trigger exceptions have occurred.,1: A trigger exception has occurred and is pending.."
newline
eventfld.long 0x4 1. "FOF0,Result FIFO 0 Overflow Flag" "0: No result FIFO 0 overflow has occurred since the..,1: At least one result FIFO 0 overflow has occurred.."
rbitfld.long 0x4 0. "RDY0,Result FIFO 0 Ready Flag" "0: Result FIFO 0 data level not above watermark..,1: Result FIFO 0 holding data above watermark level."
line.long 0x8 "IE,Interrupt Enable Register"
hexmask.long.byte 0x8 16.--19. 1. "TCOMP_IE,Trigger Completion Interrupt Enable"
bitfld.long 0x8 8. "TEXC_IE,Trigger Exception Interrupt Enable" "0: Trigger exception interrupts are disabled.,1: Trigger exception interrupts are enabled."
newline
bitfld.long 0x8 1. "FOFIE0,Result FIFO 0 Overflow Interrupt Enable" "0: FIFO 0 overflow interrupts are not enabled.,1: FIFO 0 overflow interrupts are enabled."
bitfld.long 0x8 0. "FWMIE0,FIFO 0 Watermark Interrupt Enable" "0: FIFO 0 watermark interrupts are not enabled.,1: FIFO 0 watermark interrupts are enabled."
line.long 0xC "DE,DMA Enable Register"
bitfld.long 0xC 0. "FWMDE0,FIFO 0 Watermark DMA Enable" "0: DMA request disabled.,1: DMA request enabled."
line.long 0x10 "CFG,Configuration Register"
bitfld.long 0x10 28. "PWREN,ADC Analog Pre-Enable" "0: ADC analog circuits are only enabled while..,1: ADC analog circuits are pre-enabled and ready to.."
hexmask.long.byte 0x10 16.--23. 1. "PUDLY,Power Up Delay"
newline
bitfld.long 0x10 10. "HPT_EXDI,High Priority Trigger Exception Disable" "0: High priority trigger exceptions are enabled.,1: High priority trigger exceptions are disabled."
bitfld.long 0x10 9. "TCMDRES,Trigger Command Resume" "0: Trigger sequences interrupted by a high priority..,1: Trigger sequences interrupted by a high priority.."
newline
bitfld.long 0x10 8. "TRES,Trigger Resume Enable" "0: Trigger sequences interrupted by a high priority..,1: Trigger sequences interrupted by a high priority.."
bitfld.long 0x10 6.--7. "REFSEL,Voltage Reference Selection" "0: (Default) Option 1 setting.,1: Option 2 setting.,2: Option 3 setting.,?"
newline
bitfld.long 0x10 5. "PWRSEL,Power Configuration Select" "0: Low power,1: High power"
bitfld.long 0x10 0.--1. "TPRICTRL,ADC Trigger Priority Control" "0: If a higher priority trigger is detected during..,1: If a higher priority trigger is received during..,2: If a higher priority trigger is received during..,?"
line.long 0x14 "PAUSE,Pause Register"
bitfld.long 0x14 31. "PAUSEEN,PAUSE Option Enable" "0: Pause operation disabled,1: Pause operation enabled"
hexmask.long.word 0x14 0.--8. 1. "PAUSEDLY,Pause Delay"
group.long 0x34++0x7
line.long 0x0 "SWTRIG,Software Trigger Register"
bitfld.long 0x0 3. "SWT3,Software Trigger 3 Event" "0: No trigger 3 event generated.,1: Trigger 3 event generated."
bitfld.long 0x0 2. "SWT2,Software Trigger 2 Event" "0: No trigger 2 event generated.,1: Trigger 2 event generated."
newline
bitfld.long 0x0 1. "SWT1,Software Trigger 1 Event" "0: No trigger 1 event generated.,1: Trigger 1 event generated."
bitfld.long 0x0 0. "SWT0,Software Trigger 0 Event" "0: No trigger 0 event generated.,1: Trigger 0 event generated."
line.long 0x4 "TSTAT,Trigger Status Register"
hexmask.long.byte 0x4 16.--19. 1. "TCOMP_FLAG,Trigger Completion Flag"
hexmask.long.byte 0x4 0.--3. 1. "TEXC_NUM,Trigger Exception Number"
group.long 0x40++0x3
line.long 0x0 "OFSTRIM,Offset Trim Register"
hexmask.long.word 0x0 0.--9. 1. "OFSTRIM,Trim for Offset"
group.long 0x48++0x3
line.long 0x0 "HSTRIM,High Speed Trim Register"
hexmask.long.byte 0x0 0.--4. 1. "HSTRIM,Trim for High Speed Conversions"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0xA0)++0x3
line.long 0x0 "TCTRL[$1],Trigger Control Register"
bitfld.long 0x0 24.--26. "TCMD,Trigger Command Select" "0: Not a valid selection from the command buffer.,1: CMD1 is executed,2: Corresponding CMD is executed,3: Corresponding CMD is executed,4: Corresponding CMD is executed,5: Corresponding CMD is executed,6: Corresponding CMD is executed,7: CMD7 is executed"
bitfld.long 0x0 23. "TSYNC,Trigger Synchronous Select" "0,1"
newline
hexmask.long.byte 0x0 16.--19. 1. "TDLY,Trigger Delay Select"
bitfld.long 0x0 15. "RSYNC,Trigger Resync" "0,1"
newline
bitfld.long 0x0 8.--9. "TPRI,Trigger Priority Setting" "0: Set to highest priority Level 1,1: Set to corresponding priority level,2: Set to corresponding priority level,3: Set to lowest priority Level 4"
bitfld.long 0x0 0. "HTEN,Trigger Enable" "0: Hardware trigger source disabled,1: Hardware trigger source enabled"
repeat.end
group.long 0xE0++0x3
line.long 0x0 "FCTRL0,FIFO Control Register"
bitfld.long 0x0 16.--18. "FWMARK,Watermark Level Selection" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--3. 1. "FCOUNT,Result FIFO Counter"
rgroup.long 0xF0++0x3
line.long 0x0 "GCC0,Gain Calibration Control"
bitfld.long 0x0 24. "RDY,Gain Calibration Value Valid" "0: The GAIN_CAL value is invalid. Run the hardware..,1: The GAIN_CAL value is valid. GAIN_CAL should be.."
hexmask.long.word 0x0 0.--15. 1. "GAIN_CAL,Gain Calibration Value"
group.long 0xF8++0x3
line.long 0x0 "GCR0,Gain Calculation Result"
bitfld.long 0x0 24. "RDY,Gain Calculation Ready" "0: The GCALR value is invalid.,1: The GCALR value is valid."
hexmask.long.tbyte 0x0 0.--16. 1. "GCALR,Gain Calculation Result"
group.long 0x100++0x37
line.long 0x0 "CMDL1,Command Low Buffer Register"
bitfld.long 0x0 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x0 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x0 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x4 "CMDH1,Command High Buffer Register"
bitfld.long 0x4 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x4 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x4 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x4 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x4 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x4 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x4 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x8 "CMDL2,Command Low Buffer Register"
bitfld.long 0x8 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x8 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x8 0.--4. 1. "ADCH,Input Channel Select"
line.long 0xC "CMDH2,Command High Buffer Register"
bitfld.long 0xC 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0xC 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0xC 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0xC 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0xC 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0xC 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0xC 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x10 "CMDL3,Command Low Buffer Register"
bitfld.long 0x10 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x10 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x10 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x14 "CMDH3,Command High Buffer Register"
bitfld.long 0x14 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x14 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x14 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x14 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x14 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x14 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x14 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x18 "CMDL4,Command Low Buffer Register"
bitfld.long 0x18 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x18 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x18 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x1C "CMDH4,Command High Buffer Register"
bitfld.long 0x1C 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x1C 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x1C 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x1C 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x1C 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x1C 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x1C 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x20 "CMDL5,Command Low Buffer Register"
bitfld.long 0x20 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x20 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x20 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x24 "CMDH5,Command High Buffer Register"
bitfld.long 0x24 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x24 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x24 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x24 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x24 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x24 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x24 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x28 "CMDL6,Command Low Buffer Register"
bitfld.long 0x28 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x28 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x28 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x2C "CMDH6,Command High Buffer Register"
bitfld.long 0x2C 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x2C 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x2C 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x2C 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x2C 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x2C 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x2C 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x30 "CMDL7,Command Low Buffer Register"
bitfld.long 0x30 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x30 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x30 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x34 "CMDH7,Command High Buffer Register"
bitfld.long 0x34 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x34 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x34 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x34 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x34 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x34 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x34 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
repeat 7. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x200)++0x3
line.long 0x0 "CV$1,Compare Value Register"
hexmask.long.word 0x0 16.--31. 1. "CVH,Compare Value High"
hexmask.long.word 0x0 0.--15. 1. "CVL,Compare Value Low"
repeat.end
rgroup.long 0x300++0x3
line.long 0x0 "RESFIFO0,Data Result FIFO Register"
bitfld.long 0x0 31. "VALID,FIFO Entry is Valid" "0: FIFO is empty. Discard any read from RESFIFO.,1: FIFO record read from RESFIFO is valid."
bitfld.long 0x0 24.--26. "CMDSRC,Command Buffer Source" "0: Not a valid value CMDSRC value for a dataword in..,1: CMD1 buffer used as control settings for this..,2: Corresponding command buffer used as control..,3: Corresponding command buffer used as control..,4: Corresponding command buffer used as control..,5: Corresponding command buffer used as control..,6: Corresponding command buffer used as control..,7: CMD7 buffer used as control settings for this.."
newline
hexmask.long.byte 0x0 20.--23. 1. "LOOPCNT,Loop Count Value"
bitfld.long 0x0 16.--17. "TSRC,Trigger Source" "0: Trigger source 0 initiated this conversion.,1: Trigger source 1 initiated this conversion.,2: Trigger source 2 initiated this conversion.,3: Trigger source 3 initiated this conversion."
newline
hexmask.long.word 0x0 0.--15. 1. "D,Data Result"
repeat 34. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x400)++0x3
line.long 0x0 "CAL_GAR[$1],Calibration General A-Side Registers"
hexmask.long.word 0x0 0.--15. 1. "CAL_GAR_VAL,Calibration General A Side Register Element"
repeat.end
group.long 0xFF8++0x3
line.long 0x0 "CFG2,Configuration 2 Register"
bitfld.long 0x0 12.--13. "TUNE,Tune Mode register" "0,1,2,3"
bitfld.long 0x0 10. "HSEXTRA,High Speed Extra register" "0: No extra cycle added,1: Extra cycle added"
newline
bitfld.long 0x0 9. "HS,High Speed Enable register" "0: High speed conversion mode disabled,1: High speed conversion mode enabled"
bitfld.long 0x0 8. "JLEFT,Justified Left Enable register" "0,1"
tree.end
endif
sif (cpuis("MC?A155*"))
tree "ADC0"
base ad:0x400AF000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID Register"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
bitfld.long 0x0 12.--14. "NUM_FIFO,Number of FIFOs" "0: N/A,1: This design supports one result FIFO.,2: This design supports two result FIFOs.,3: This design supports three result FIFOs.,4: This design supports four result FIFOs.,?,?,?"
bitfld.long 0x0 11. "NUM_SEC,Number of Single Ended Outputs Supported" "0: This design supports one single ended conversion..,1: This design supports two simultaneous single.."
newline
bitfld.long 0x0 10. "CALOFSI,Calibration Function Implemented" "0: Calibration Not Implemented.,1: Calibration Implemented."
bitfld.long 0x0 9. "IADCKI,Internal ADC Clock Implemented" "0: Internal clock source not implemented.,1: Internal clock source (and CFG[ADCKEN]).."
newline
bitfld.long 0x0 8. "VR1RNGI,Voltage Reference 1 Range Control Bit Implemented" "0: Range control not required. CFG[VREF1RNG] is not..,1: Range control required. CFG[VREF1RNG] is.."
bitfld.long 0x0 4.--6. "CSW,Channel Scale Width" "0: Channel scaling not supported.,1: Channel scaling supported. 1-bit CSCALE control..,?,?,?,?,6: Channel scaling supported. 6-bit CSCALE control..,?"
newline
bitfld.long 0x0 3. "MVI,Multi Vref Implemented" "0: Single voltage reference high (VREFH) input..,1: Multiple voltage reference high (VREFH) inputs.."
bitfld.long 0x0 1. "DIFFEN,Differential Supported" "0: Differential operation not supported.,1: Differential operation supported."
newline
bitfld.long 0x0 0. "RES,Resolution" "0: Up to 12-bit single ended resolution supported..,1: Up to 16-bit single ended resolution supported.."
line.long 0x4 "PARAM,Parameter Register"
hexmask.long.byte 0x4 24.--31. 1. "CMD_NUM,Command Buffer Number"
hexmask.long.byte 0x4 16.--23. 1. "CV_NUM,Compare Value Number"
newline
hexmask.long.byte 0x4 8.--15. 1. "FIFOSIZE,Result FIFO Depth"
hexmask.long.byte 0x4 0.--7. 1. "TRIG_NUM,Trigger Number"
group.long 0x10++0x17
line.long 0x0 "CTRL,Control Register"
hexmask.long.byte 0x0 16.--19. 1. "CAL_AVGS,Auto-Calibration Averages"
bitfld.long 0x0 8. "RSTFIFO0,Reset FIFO 0" "0: No effect.,1: FIFO 0 is reset."
newline
bitfld.long 0x0 6. "CALHS,High Speed Mode Trim Request" "0: No request for high speed mode trim has been made,1: Request for high speed mode trim has been made"
bitfld.long 0x0 4. "CALOFS,Offset Calibration Request" "0: No request for offset calibration has been made,1: Request for offset calibration function"
newline
bitfld.long 0x0 3. "CAL_REQ,Auto-Calibration Request" "0: No request for hardware calibration has been made,1: A request for hardware calibration has been made"
bitfld.long 0x0 2. "DOZEN,Doze Enable" "0: ADC is enabled in low power mode.,1: ADC is disabled in low power mode."
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: ADC logic is not reset.,1: ADC logic is reset."
bitfld.long 0x0 0. "ADCEN,ADC Enable" "0: ADC is disabled.,1: ADC is enabled."
line.long 0x4 "STAT,Status Register"
rbitfld.long 0x4 24.--26. "CMDACT,Command Active" "0: No command is currently in progress.,1: Command 1 currently being executed.,2: Command 2 currently being executed.,3: Associated command number is currently being..,4: Associated command number is currently being..,5: Associated command number is currently being..,6: Associated command number is currently being..,7: Associated command number is currently being.."
rbitfld.long 0x4 16.--17. "TRGACT,Trigger Active" "0: Command (sequence) associated with Trigger 0..,1: Command (sequence) associated with Trigger 1..,2: Command (sequence) associated with Trigger 2..,3: Command (sequence) associated with Trigger 3.."
newline
rbitfld.long 0x4 11. "ADC_ACTIVE,ADC Active" "0: The ADC is IDLE. There are no pending triggers..,1: The ADC is processing a conversion running.."
rbitfld.long 0x4 10. "CAL_RDY,Calibration Ready" "0: Calibration is incomplete or hasn't been ran.,1: The ADC is calibrated."
newline
eventfld.long 0x4 9. "TCOMP_INT,Interrupt Flag For Trigger Completion" "0: Either IE[TCOMP_IE] is set to 0 or no trigger..,1: Trigger sequence has been completed and all data.."
eventfld.long 0x4 8. "TEXC_INT,Interrupt Flag For High Priority Trigger Exception" "0: No trigger exceptions have occurred.,1: A trigger exception has occurred and is pending.."
newline
eventfld.long 0x4 1. "FOF0,Result FIFO 0 Overflow Flag" "0: No result FIFO 0 overflow has occurred since the..,1: At least one result FIFO 0 overflow has occurred.."
rbitfld.long 0x4 0. "RDY0,Result FIFO 0 Ready Flag" "0: Result FIFO 0 data level not above watermark..,1: Result FIFO 0 holding data above watermark level."
line.long 0x8 "IE,Interrupt Enable Register"
hexmask.long.byte 0x8 16.--19. 1. "TCOMP_IE,Trigger Completion Interrupt Enable"
bitfld.long 0x8 8. "TEXC_IE,Trigger Exception Interrupt Enable" "0: Trigger exception interrupts are disabled.,1: Trigger exception interrupts are enabled."
newline
bitfld.long 0x8 1. "FOFIE0,Result FIFO 0 Overflow Interrupt Enable" "0: FIFO 0 overflow interrupts are not enabled.,1: FIFO 0 overflow interrupts are enabled."
bitfld.long 0x8 0. "FWMIE0,FIFO 0 Watermark Interrupt Enable" "0: FIFO 0 watermark interrupts are not enabled.,1: FIFO 0 watermark interrupts are enabled."
line.long 0xC "DE,DMA Enable Register"
bitfld.long 0xC 0. "FWMDE0,FIFO 0 Watermark DMA Enable" "0: DMA request disabled.,1: DMA request enabled."
line.long 0x10 "CFG,Configuration Register"
bitfld.long 0x10 28. "PWREN,ADC Analog Pre-Enable" "0: ADC analog circuits are only enabled while..,1: ADC analog circuits are pre-enabled and ready to.."
hexmask.long.byte 0x10 16.--23. 1. "PUDLY,Power Up Delay"
newline
bitfld.long 0x10 10. "HPT_EXDI,High Priority Trigger Exception Disable" "0: High priority trigger exceptions are enabled.,1: High priority trigger exceptions are disabled."
bitfld.long 0x10 9. "TCMDRES,Trigger Command Resume" "0: Trigger sequences interrupted by a high priority..,1: Trigger sequences interrupted by a high priority.."
newline
bitfld.long 0x10 8. "TRES,Trigger Resume Enable" "0: Trigger sequences interrupted by a high priority..,1: Trigger sequences interrupted by a high priority.."
bitfld.long 0x10 6.--7. "REFSEL,Voltage Reference Selection" "0: (Default) Option 1 setting.,1: Option 2 setting.,2: Option 3 setting.,?"
newline
bitfld.long 0x10 5. "PWRSEL,Power Configuration Select" "0: Low power,1: High power"
bitfld.long 0x10 0.--1. "TPRICTRL,ADC Trigger Priority Control" "0: If a higher priority trigger is detected during..,1: If a higher priority trigger is received during..,2: If a higher priority trigger is received during..,?"
line.long 0x14 "PAUSE,Pause Register"
bitfld.long 0x14 31. "PAUSEEN,PAUSE Option Enable" "0: Pause operation disabled,1: Pause operation enabled"
hexmask.long.word 0x14 0.--8. 1. "PAUSEDLY,Pause Delay"
group.long 0x34++0x7
line.long 0x0 "SWTRIG,Software Trigger Register"
bitfld.long 0x0 3. "SWT3,Software Trigger 3 Event" "0: No trigger 3 event generated.,1: Trigger 3 event generated."
bitfld.long 0x0 2. "SWT2,Software Trigger 2 Event" "0: No trigger 2 event generated.,1: Trigger 2 event generated."
newline
bitfld.long 0x0 1. "SWT1,Software Trigger 1 Event" "0: No trigger 1 event generated.,1: Trigger 1 event generated."
bitfld.long 0x0 0. "SWT0,Software Trigger 0 Event" "0: No trigger 0 event generated.,1: Trigger 0 event generated."
line.long 0x4 "TSTAT,Trigger Status Register"
hexmask.long.byte 0x4 16.--19. 1. "TCOMP_FLAG,Trigger Completion Flag"
hexmask.long.byte 0x4 0.--3. 1. "TEXC_NUM,Trigger Exception Number"
group.long 0x40++0x3
line.long 0x0 "OFSTRIM,Offset Trim Register"
hexmask.long.word 0x0 0.--9. 1. "OFSTRIM,Trim for Offset"
group.long 0x48++0x3
line.long 0x0 "HSTRIM,High Speed Trim Register"
hexmask.long.byte 0x0 0.--4. 1. "HSTRIM,Trim for High Speed Conversions"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0xA0)++0x3
line.long 0x0 "TCTRL[$1],Trigger Control Register"
bitfld.long 0x0 24.--26. "TCMD,Trigger Command Select" "0: Not a valid selection from the command buffer.,1: CMD1 is executed,2: Corresponding CMD is executed,3: Corresponding CMD is executed,4: Corresponding CMD is executed,5: Corresponding CMD is executed,6: Corresponding CMD is executed,7: CMD7 is executed"
bitfld.long 0x0 23. "TSYNC,Trigger Synchronous Select" "0,1"
newline
hexmask.long.byte 0x0 16.--19. 1. "TDLY,Trigger Delay Select"
bitfld.long 0x0 15. "RSYNC,Trigger Resync" "0,1"
newline
bitfld.long 0x0 8.--9. "TPRI,Trigger Priority Setting" "0: Set to highest priority Level 1,1: Set to corresponding priority level,2: Set to corresponding priority level,3: Set to lowest priority Level 4"
bitfld.long 0x0 0. "HTEN,Trigger Enable" "0: Hardware trigger source disabled,1: Hardware trigger source enabled"
repeat.end
group.long 0xE0++0x3
line.long 0x0 "FCTRL0,FIFO Control Register"
bitfld.long 0x0 16.--18. "FWMARK,Watermark Level Selection" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--3. 1. "FCOUNT,Result FIFO Counter"
rgroup.long 0xF0++0x3
line.long 0x0 "GCC0,Gain Calibration Control"
bitfld.long 0x0 24. "RDY,Gain Calibration Value Valid" "0: The GAIN_CAL value is invalid. Run the hardware..,1: The GAIN_CAL value is valid. GAIN_CAL should be.."
hexmask.long.word 0x0 0.--15. 1. "GAIN_CAL,Gain Calibration Value"
group.long 0xF8++0x3
line.long 0x0 "GCR0,Gain Calculation Result"
bitfld.long 0x0 24. "RDY,Gain Calculation Ready" "0: The GCALR value is invalid.,1: The GCALR value is valid."
hexmask.long.tbyte 0x0 0.--16. 1. "GCALR,Gain Calculation Result"
group.long 0x100++0x37
line.long 0x0 "CMDL1,Command Low Buffer Register"
bitfld.long 0x0 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x0 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x0 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x4 "CMDH1,Command High Buffer Register"
bitfld.long 0x4 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x4 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x4 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x4 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x4 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x4 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x4 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x8 "CMDL2,Command Low Buffer Register"
bitfld.long 0x8 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x8 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x8 0.--4. 1. "ADCH,Input Channel Select"
line.long 0xC "CMDH2,Command High Buffer Register"
bitfld.long 0xC 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0xC 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0xC 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0xC 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0xC 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0xC 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0xC 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x10 "CMDL3,Command Low Buffer Register"
bitfld.long 0x10 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x10 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x10 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x14 "CMDH3,Command High Buffer Register"
bitfld.long 0x14 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x14 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x14 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x14 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x14 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x14 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x14 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x18 "CMDL4,Command Low Buffer Register"
bitfld.long 0x18 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x18 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x18 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x1C "CMDH4,Command High Buffer Register"
bitfld.long 0x1C 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x1C 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x1C 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x1C 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x1C 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x1C 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x1C 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x20 "CMDL5,Command Low Buffer Register"
bitfld.long 0x20 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x20 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x20 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x24 "CMDH5,Command High Buffer Register"
bitfld.long 0x24 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x24 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x24 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x24 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x24 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x24 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x24 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x28 "CMDL6,Command Low Buffer Register"
bitfld.long 0x28 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x28 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x28 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x2C "CMDH6,Command High Buffer Register"
bitfld.long 0x2C 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x2C 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x2C 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x2C 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x2C 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x2C 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x2C 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x30 "CMDL7,Command Low Buffer Register"
bitfld.long 0x30 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x30 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x30 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x34 "CMDH7,Command High Buffer Register"
bitfld.long 0x34 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x34 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x34 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x34 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x34 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x34 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x34 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
repeat 7. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x200)++0x3
line.long 0x0 "CV$1,Compare Value Register"
hexmask.long.word 0x0 16.--31. 1. "CVH,Compare Value High"
hexmask.long.word 0x0 0.--15. 1. "CVL,Compare Value Low"
repeat.end
rgroup.long 0x300++0x3
line.long 0x0 "RESFIFO0,Data Result FIFO Register"
bitfld.long 0x0 31. "VALID,FIFO Entry is Valid" "0: FIFO is empty. Discard any read from RESFIFO.,1: FIFO record read from RESFIFO is valid."
bitfld.long 0x0 24.--26. "CMDSRC,Command Buffer Source" "0: Not a valid value CMDSRC value for a dataword in..,1: CMD1 buffer used as control settings for this..,2: Corresponding command buffer used as control..,3: Corresponding command buffer used as control..,4: Corresponding command buffer used as control..,5: Corresponding command buffer used as control..,6: Corresponding command buffer used as control..,7: CMD7 buffer used as control settings for this.."
newline
hexmask.long.byte 0x0 20.--23. 1. "LOOPCNT,Loop Count Value"
bitfld.long 0x0 16.--17. "TSRC,Trigger Source" "0: Trigger source 0 initiated this conversion.,1: Trigger source 1 initiated this conversion.,2: Trigger source 2 initiated this conversion.,3: Trigger source 3 initiated this conversion."
newline
hexmask.long.word 0x0 0.--15. 1. "D,Data Result"
repeat 34. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x400)++0x3
line.long 0x0 "CAL_GAR[$1],Calibration General A-Side Registers"
hexmask.long.word 0x0 0.--15. 1. "CAL_GAR_VAL,Calibration General A Side Register Element"
repeat.end
group.long 0xFF8++0x3
line.long 0x0 "CFG2,Configuration 2 Register"
bitfld.long 0x0 12.--13. "TUNE,Tune Mode register" "0,1,2,3"
bitfld.long 0x0 10. "HSEXTRA,High Speed Extra register" "0: No extra cycle added,1: Extra cycle added"
newline
bitfld.long 0x0 9. "HS,High Speed Enable register" "0: High speed conversion mode disabled,1: High speed conversion mode enabled"
bitfld.long 0x0 8. "JLEFT,Justified Left Enable register" "0,1"
tree.end
endif
sif (cpuis("MC?A156*"))
tree "ADC0"
base ad:0x400AF000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID Register"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
bitfld.long 0x0 12.--14. "NUM_FIFO,Number of FIFOs" "0: N/A,1: This design supports one result FIFO.,2: This design supports two result FIFOs.,3: This design supports three result FIFOs.,4: This design supports four result FIFOs.,?,?,?"
bitfld.long 0x0 11. "NUM_SEC,Number of Single Ended Outputs Supported" "0: This design supports one single ended conversion..,1: This design supports two simultaneous single.."
newline
bitfld.long 0x0 10. "CALOFSI,Calibration Function Implemented" "0: Calibration Not Implemented.,1: Calibration Implemented."
bitfld.long 0x0 9. "IADCKI,Internal ADC Clock Implemented" "0: Internal clock source not implemented.,1: Internal clock source (and CFG[ADCKEN]).."
newline
bitfld.long 0x0 8. "VR1RNGI,Voltage Reference 1 Range Control Bit Implemented" "0: Range control not required. CFG[VREF1RNG] is not..,1: Range control required. CFG[VREF1RNG] is.."
bitfld.long 0x0 4.--6. "CSW,Channel Scale Width" "0: Channel scaling not supported.,1: Channel scaling supported. 1-bit CSCALE control..,?,?,?,?,6: Channel scaling supported. 6-bit CSCALE control..,?"
newline
bitfld.long 0x0 3. "MVI,Multi Vref Implemented" "0: Single voltage reference high (VREFH) input..,1: Multiple voltage reference high (VREFH) inputs.."
bitfld.long 0x0 1. "DIFFEN,Differential Supported" "0: Differential operation not supported.,1: Differential operation supported."
newline
bitfld.long 0x0 0. "RES,Resolution" "0: Up to 12-bit single ended resolution supported..,1: Up to 16-bit single ended resolution supported.."
line.long 0x4 "PARAM,Parameter Register"
hexmask.long.byte 0x4 24.--31. 1. "CMD_NUM,Command Buffer Number"
hexmask.long.byte 0x4 16.--23. 1. "CV_NUM,Compare Value Number"
newline
hexmask.long.byte 0x4 8.--15. 1. "FIFOSIZE,Result FIFO Depth"
hexmask.long.byte 0x4 0.--7. 1. "TRIG_NUM,Trigger Number"
group.long 0x10++0x17
line.long 0x0 "CTRL,Control Register"
hexmask.long.byte 0x0 16.--19. 1. "CAL_AVGS,Auto-Calibration Averages"
bitfld.long 0x0 8. "RSTFIFO0,Reset FIFO 0" "0: No effect.,1: FIFO 0 is reset."
newline
bitfld.long 0x0 6. "CALHS,High Speed Mode Trim Request" "0: No request for high speed mode trim has been made,1: Request for high speed mode trim has been made"
bitfld.long 0x0 4. "CALOFS,Offset Calibration Request" "0: No request for offset calibration has been made,1: Request for offset calibration function"
newline
bitfld.long 0x0 3. "CAL_REQ,Auto-Calibration Request" "0: No request for hardware calibration has been made,1: A request for hardware calibration has been made"
bitfld.long 0x0 2. "DOZEN,Doze Enable" "0: ADC is enabled in low power mode.,1: ADC is disabled in low power mode."
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: ADC logic is not reset.,1: ADC logic is reset."
bitfld.long 0x0 0. "ADCEN,ADC Enable" "0: ADC is disabled.,1: ADC is enabled."
line.long 0x4 "STAT,Status Register"
rbitfld.long 0x4 24.--26. "CMDACT,Command Active" "0: No command is currently in progress.,1: Command 1 currently being executed.,2: Command 2 currently being executed.,3: Associated command number is currently being..,4: Associated command number is currently being..,5: Associated command number is currently being..,6: Associated command number is currently being..,7: Associated command number is currently being.."
rbitfld.long 0x4 16.--17. "TRGACT,Trigger Active" "0: Command (sequence) associated with Trigger 0..,1: Command (sequence) associated with Trigger 1..,2: Command (sequence) associated with Trigger 2..,3: Command (sequence) associated with Trigger 3.."
newline
rbitfld.long 0x4 11. "ADC_ACTIVE,ADC Active" "0: The ADC is IDLE. There are no pending triggers..,1: The ADC is processing a conversion running.."
rbitfld.long 0x4 10. "CAL_RDY,Calibration Ready" "0: Calibration is incomplete or hasn't been ran.,1: The ADC is calibrated."
newline
eventfld.long 0x4 9. "TCOMP_INT,Interrupt Flag For Trigger Completion" "0: Either IE[TCOMP_IE] is set to 0 or no trigger..,1: Trigger sequence has been completed and all data.."
eventfld.long 0x4 8. "TEXC_INT,Interrupt Flag For High Priority Trigger Exception" "0: No trigger exceptions have occurred.,1: A trigger exception has occurred and is pending.."
newline
eventfld.long 0x4 1. "FOF0,Result FIFO 0 Overflow Flag" "0: No result FIFO 0 overflow has occurred since the..,1: At least one result FIFO 0 overflow has occurred.."
rbitfld.long 0x4 0. "RDY0,Result FIFO 0 Ready Flag" "0: Result FIFO 0 data level not above watermark..,1: Result FIFO 0 holding data above watermark level."
line.long 0x8 "IE,Interrupt Enable Register"
hexmask.long.byte 0x8 16.--19. 1. "TCOMP_IE,Trigger Completion Interrupt Enable"
bitfld.long 0x8 8. "TEXC_IE,Trigger Exception Interrupt Enable" "0: Trigger exception interrupts are disabled.,1: Trigger exception interrupts are enabled."
newline
bitfld.long 0x8 1. "FOFIE0,Result FIFO 0 Overflow Interrupt Enable" "0: FIFO 0 overflow interrupts are not enabled.,1: FIFO 0 overflow interrupts are enabled."
bitfld.long 0x8 0. "FWMIE0,FIFO 0 Watermark Interrupt Enable" "0: FIFO 0 watermark interrupts are not enabled.,1: FIFO 0 watermark interrupts are enabled."
line.long 0xC "DE,DMA Enable Register"
bitfld.long 0xC 0. "FWMDE0,FIFO 0 Watermark DMA Enable" "0: DMA request disabled.,1: DMA request enabled."
line.long 0x10 "CFG,Configuration Register"
bitfld.long 0x10 28. "PWREN,ADC Analog Pre-Enable" "0: ADC analog circuits are only enabled while..,1: ADC analog circuits are pre-enabled and ready to.."
hexmask.long.byte 0x10 16.--23. 1. "PUDLY,Power Up Delay"
newline
bitfld.long 0x10 10. "HPT_EXDI,High Priority Trigger Exception Disable" "0: High priority trigger exceptions are enabled.,1: High priority trigger exceptions are disabled."
bitfld.long 0x10 9. "TCMDRES,Trigger Command Resume" "0: Trigger sequences interrupted by a high priority..,1: Trigger sequences interrupted by a high priority.."
newline
bitfld.long 0x10 8. "TRES,Trigger Resume Enable" "0: Trigger sequences interrupted by a high priority..,1: Trigger sequences interrupted by a high priority.."
bitfld.long 0x10 6.--7. "REFSEL,Voltage Reference Selection" "0: (Default) Option 1 setting.,1: Option 2 setting.,2: Option 3 setting.,?"
newline
bitfld.long 0x10 5. "PWRSEL,Power Configuration Select" "0: Low power,1: High power"
bitfld.long 0x10 0.--1. "TPRICTRL,ADC Trigger Priority Control" "0: If a higher priority trigger is detected during..,1: If a higher priority trigger is received during..,2: If a higher priority trigger is received during..,?"
line.long 0x14 "PAUSE,Pause Register"
bitfld.long 0x14 31. "PAUSEEN,PAUSE Option Enable" "0: Pause operation disabled,1: Pause operation enabled"
hexmask.long.word 0x14 0.--8. 1. "PAUSEDLY,Pause Delay"
group.long 0x34++0x7
line.long 0x0 "SWTRIG,Software Trigger Register"
bitfld.long 0x0 3. "SWT3,Software Trigger 3 Event" "0: No trigger 3 event generated.,1: Trigger 3 event generated."
bitfld.long 0x0 2. "SWT2,Software Trigger 2 Event" "0: No trigger 2 event generated.,1: Trigger 2 event generated."
newline
bitfld.long 0x0 1. "SWT1,Software Trigger 1 Event" "0: No trigger 1 event generated.,1: Trigger 1 event generated."
bitfld.long 0x0 0. "SWT0,Software Trigger 0 Event" "0: No trigger 0 event generated.,1: Trigger 0 event generated."
line.long 0x4 "TSTAT,Trigger Status Register"
hexmask.long.byte 0x4 16.--19. 1. "TCOMP_FLAG,Trigger Completion Flag"
hexmask.long.byte 0x4 0.--3. 1. "TEXC_NUM,Trigger Exception Number"
group.long 0x40++0x3
line.long 0x0 "OFSTRIM,Offset Trim Register"
hexmask.long.word 0x0 0.--9. 1. "OFSTRIM,Trim for Offset"
group.long 0x48++0x3
line.long 0x0 "HSTRIM,High Speed Trim Register"
hexmask.long.byte 0x0 0.--4. 1. "HSTRIM,Trim for High Speed Conversions"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0xA0)++0x3
line.long 0x0 "TCTRL[$1],Trigger Control Register"
bitfld.long 0x0 24.--26. "TCMD,Trigger Command Select" "0: Not a valid selection from the command buffer.,1: CMD1 is executed,2: Corresponding CMD is executed,3: Corresponding CMD is executed,4: Corresponding CMD is executed,5: Corresponding CMD is executed,6: Corresponding CMD is executed,7: CMD7 is executed"
bitfld.long 0x0 23. "TSYNC,Trigger Synchronous Select" "0,1"
newline
hexmask.long.byte 0x0 16.--19. 1. "TDLY,Trigger Delay Select"
bitfld.long 0x0 15. "RSYNC,Trigger Resync" "0,1"
newline
bitfld.long 0x0 8.--9. "TPRI,Trigger Priority Setting" "0: Set to highest priority Level 1,1: Set to corresponding priority level,2: Set to corresponding priority level,3: Set to lowest priority Level 4"
bitfld.long 0x0 0. "HTEN,Trigger Enable" "0: Hardware trigger source disabled,1: Hardware trigger source enabled"
repeat.end
group.long 0xE0++0x3
line.long 0x0 "FCTRL0,FIFO Control Register"
bitfld.long 0x0 16.--18. "FWMARK,Watermark Level Selection" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--3. 1. "FCOUNT,Result FIFO Counter"
rgroup.long 0xF0++0x3
line.long 0x0 "GCC0,Gain Calibration Control"
bitfld.long 0x0 24. "RDY,Gain Calibration Value Valid" "0: The GAIN_CAL value is invalid. Run the hardware..,1: The GAIN_CAL value is valid. GAIN_CAL should be.."
hexmask.long.word 0x0 0.--15. 1. "GAIN_CAL,Gain Calibration Value"
group.long 0xF8++0x3
line.long 0x0 "GCR0,Gain Calculation Result"
bitfld.long 0x0 24. "RDY,Gain Calculation Ready" "0: The GCALR value is invalid.,1: The GCALR value is valid."
hexmask.long.tbyte 0x0 0.--16. 1. "GCALR,Gain Calculation Result"
group.long 0x100++0x37
line.long 0x0 "CMDL1,Command Low Buffer Register"
bitfld.long 0x0 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x0 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x0 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x4 "CMDH1,Command High Buffer Register"
bitfld.long 0x4 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x4 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x4 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x4 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x4 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x4 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x4 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x8 "CMDL2,Command Low Buffer Register"
bitfld.long 0x8 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x8 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x8 0.--4. 1. "ADCH,Input Channel Select"
line.long 0xC "CMDH2,Command High Buffer Register"
bitfld.long 0xC 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0xC 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0xC 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0xC 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0xC 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0xC 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0xC 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x10 "CMDL3,Command Low Buffer Register"
bitfld.long 0x10 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x10 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x10 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x14 "CMDH3,Command High Buffer Register"
bitfld.long 0x14 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x14 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x14 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x14 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x14 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x14 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x14 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x18 "CMDL4,Command Low Buffer Register"
bitfld.long 0x18 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x18 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x18 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x1C "CMDH4,Command High Buffer Register"
bitfld.long 0x1C 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x1C 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x1C 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x1C 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x1C 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x1C 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x1C 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x20 "CMDL5,Command Low Buffer Register"
bitfld.long 0x20 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x20 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x20 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x24 "CMDH5,Command High Buffer Register"
bitfld.long 0x24 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x24 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x24 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x24 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x24 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x24 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x24 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x28 "CMDL6,Command Low Buffer Register"
bitfld.long 0x28 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x28 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x28 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x2C "CMDH6,Command High Buffer Register"
bitfld.long 0x2C 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x2C 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x2C 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x2C 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x2C 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x2C 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x2C 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x30 "CMDL7,Command Low Buffer Register"
bitfld.long 0x30 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x30 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x30 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x34 "CMDH7,Command High Buffer Register"
bitfld.long 0x34 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x34 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x34 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x34 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x34 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x34 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x34 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
repeat 7. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x200)++0x3
line.long 0x0 "CV$1,Compare Value Register"
hexmask.long.word 0x0 16.--31. 1. "CVH,Compare Value High"
hexmask.long.word 0x0 0.--15. 1. "CVL,Compare Value Low"
repeat.end
rgroup.long 0x300++0x3
line.long 0x0 "RESFIFO0,Data Result FIFO Register"
bitfld.long 0x0 31. "VALID,FIFO Entry is Valid" "0: FIFO is empty. Discard any read from RESFIFO.,1: FIFO record read from RESFIFO is valid."
bitfld.long 0x0 24.--26. "CMDSRC,Command Buffer Source" "0: Not a valid value CMDSRC value for a dataword in..,1: CMD1 buffer used as control settings for this..,2: Corresponding command buffer used as control..,3: Corresponding command buffer used as control..,4: Corresponding command buffer used as control..,5: Corresponding command buffer used as control..,6: Corresponding command buffer used as control..,7: CMD7 buffer used as control settings for this.."
newline
hexmask.long.byte 0x0 20.--23. 1. "LOOPCNT,Loop Count Value"
bitfld.long 0x0 16.--17. "TSRC,Trigger Source" "0: Trigger source 0 initiated this conversion.,1: Trigger source 1 initiated this conversion.,2: Trigger source 2 initiated this conversion.,3: Trigger source 3 initiated this conversion."
newline
hexmask.long.word 0x0 0.--15. 1. "D,Data Result"
repeat 34. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x400)++0x3
line.long 0x0 "CAL_GAR[$1],Calibration General A-Side Registers"
hexmask.long.word 0x0 0.--15. 1. "CAL_GAR_VAL,Calibration General A Side Register Element"
repeat.end
group.long 0xFF8++0x3
line.long 0x0 "CFG2,Configuration 2 Register"
bitfld.long 0x0 12.--13. "TUNE,Tune Mode register" "0,1,2,3"
bitfld.long 0x0 10. "HSEXTRA,High Speed Extra register" "0: No extra cycle added,1: Extra cycle added"
newline
bitfld.long 0x0 9. "HS,High Speed Enable register" "0: High speed conversion mode disabled,1: High speed conversion mode enabled"
bitfld.long 0x0 8. "JLEFT,Justified Left Enable register" "0,1"
tree.end
endif
sif (cpuis("MC?A144*"))
tree "ADC1"
base ad:0x400B0000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID Register"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
bitfld.long 0x0 12.--14. "NUM_FIFO,Number of FIFOs" "0: N/A,1: This design supports one result FIFO.,2: This design supports two result FIFOs.,3: This design supports three result FIFOs.,4: This design supports four result FIFOs.,?,?,?"
bitfld.long 0x0 11. "NUM_SEC,Number of Single Ended Outputs Supported" "0: This design supports one single ended conversion..,1: This design supports two simultaneous single.."
newline
bitfld.long 0x0 10. "CALOFSI,Calibration Function Implemented" "0: Calibration Not Implemented.,1: Calibration Implemented."
bitfld.long 0x0 9. "IADCKI,Internal ADC Clock Implemented" "0: Internal clock source not implemented.,1: Internal clock source (and CFG[ADCKEN]).."
newline
bitfld.long 0x0 8. "VR1RNGI,Voltage Reference 1 Range Control Bit Implemented" "0: Range control not required. CFG[VREF1RNG] is not..,1: Range control required. CFG[VREF1RNG] is.."
bitfld.long 0x0 4.--6. "CSW,Channel Scale Width" "0: Channel scaling not supported.,1: Channel scaling supported. 1-bit CSCALE control..,?,?,?,?,6: Channel scaling supported. 6-bit CSCALE control..,?"
newline
bitfld.long 0x0 3. "MVI,Multi Vref Implemented" "0: Single voltage reference high (VREFH) input..,1: Multiple voltage reference high (VREFH) inputs.."
bitfld.long 0x0 1. "DIFFEN,Differential Supported" "0: Differential operation not supported.,1: Differential operation supported."
newline
bitfld.long 0x0 0. "RES,Resolution" "0: Up to 12-bit single ended resolution supported..,1: Up to 16-bit single ended resolution supported.."
line.long 0x4 "PARAM,Parameter Register"
hexmask.long.byte 0x4 24.--31. 1. "CMD_NUM,Command Buffer Number"
hexmask.long.byte 0x4 16.--23. 1. "CV_NUM,Compare Value Number"
newline
hexmask.long.byte 0x4 8.--15. 1. "FIFOSIZE,Result FIFO Depth"
hexmask.long.byte 0x4 0.--7. 1. "TRIG_NUM,Trigger Number"
group.long 0x10++0x17
line.long 0x0 "CTRL,Control Register"
hexmask.long.byte 0x0 16.--19. 1. "CAL_AVGS,Auto-Calibration Averages"
bitfld.long 0x0 8. "RSTFIFO0,Reset FIFO 0" "0: No effect.,1: FIFO 0 is reset."
newline
bitfld.long 0x0 6. "CALHS,High Speed Mode Trim Request" "0: No request for high speed mode trim has been made,1: Request for high speed mode trim has been made"
bitfld.long 0x0 4. "CALOFS,Offset Calibration Request" "0: No request for offset calibration has been made,1: Request for offset calibration function"
newline
bitfld.long 0x0 3. "CAL_REQ,Auto-Calibration Request" "0: No request for hardware calibration has been made,1: A request for hardware calibration has been made"
bitfld.long 0x0 2. "DOZEN,Doze Enable" "0: ADC is enabled in low power mode.,1: ADC is disabled in low power mode."
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: ADC logic is not reset.,1: ADC logic is reset."
bitfld.long 0x0 0. "ADCEN,ADC Enable" "0: ADC is disabled.,1: ADC is enabled."
line.long 0x4 "STAT,Status Register"
rbitfld.long 0x4 24.--26. "CMDACT,Command Active" "0: No command is currently in progress.,1: Command 1 currently being executed.,2: Command 2 currently being executed.,3: Associated command number is currently being..,4: Associated command number is currently being..,5: Associated command number is currently being..,6: Associated command number is currently being..,7: Associated command number is currently being.."
rbitfld.long 0x4 16.--17. "TRGACT,Trigger Active" "0: Command (sequence) associated with Trigger 0..,1: Command (sequence) associated with Trigger 1..,2: Command (sequence) associated with Trigger 2..,3: Command (sequence) associated with Trigger 3.."
newline
rbitfld.long 0x4 11. "ADC_ACTIVE,ADC Active" "0: The ADC is IDLE. There are no pending triggers..,1: The ADC is processing a conversion running.."
rbitfld.long 0x4 10. "CAL_RDY,Calibration Ready" "0: Calibration is incomplete or hasn't been ran.,1: The ADC is calibrated."
newline
eventfld.long 0x4 9. "TCOMP_INT,Interrupt Flag For Trigger Completion" "0: Either IE[TCOMP_IE] is set to 0 or no trigger..,1: Trigger sequence has been completed and all data.."
eventfld.long 0x4 8. "TEXC_INT,Interrupt Flag For High Priority Trigger Exception" "0: No trigger exceptions have occurred.,1: A trigger exception has occurred and is pending.."
newline
eventfld.long 0x4 1. "FOF0,Result FIFO 0 Overflow Flag" "0: No result FIFO 0 overflow has occurred since the..,1: At least one result FIFO 0 overflow has occurred.."
rbitfld.long 0x4 0. "RDY0,Result FIFO 0 Ready Flag" "0: Result FIFO 0 data level not above watermark..,1: Result FIFO 0 holding data above watermark level."
line.long 0x8 "IE,Interrupt Enable Register"
hexmask.long.byte 0x8 16.--19. 1. "TCOMP_IE,Trigger Completion Interrupt Enable"
bitfld.long 0x8 8. "TEXC_IE,Trigger Exception Interrupt Enable" "0: Trigger exception interrupts are disabled.,1: Trigger exception interrupts are enabled."
newline
bitfld.long 0x8 1. "FOFIE0,Result FIFO 0 Overflow Interrupt Enable" "0: FIFO 0 overflow interrupts are not enabled.,1: FIFO 0 overflow interrupts are enabled."
bitfld.long 0x8 0. "FWMIE0,FIFO 0 Watermark Interrupt Enable" "0: FIFO 0 watermark interrupts are not enabled.,1: FIFO 0 watermark interrupts are enabled."
line.long 0xC "DE,DMA Enable Register"
bitfld.long 0xC 0. "FWMDE0,FIFO 0 Watermark DMA Enable" "0: DMA request disabled.,1: DMA request enabled."
line.long 0x10 "CFG,Configuration Register"
bitfld.long 0x10 28. "PWREN,ADC Analog Pre-Enable" "0: ADC analog circuits are only enabled while..,1: ADC analog circuits are pre-enabled and ready to.."
hexmask.long.byte 0x10 16.--23. 1. "PUDLY,Power Up Delay"
newline
bitfld.long 0x10 10. "HPT_EXDI,High Priority Trigger Exception Disable" "0: High priority trigger exceptions are enabled.,1: High priority trigger exceptions are disabled."
bitfld.long 0x10 9. "TCMDRES,Trigger Command Resume" "0: Trigger sequences interrupted by a high priority..,1: Trigger sequences interrupted by a high priority.."
newline
bitfld.long 0x10 8. "TRES,Trigger Resume Enable" "0: Trigger sequences interrupted by a high priority..,1: Trigger sequences interrupted by a high priority.."
bitfld.long 0x10 6.--7. "REFSEL,Voltage Reference Selection" "0: (Default) Option 1 setting.,1: Option 2 setting.,2: Option 3 setting.,?"
newline
bitfld.long 0x10 5. "PWRSEL,Power Configuration Select" "0: Low power,1: High power"
bitfld.long 0x10 0.--1. "TPRICTRL,ADC Trigger Priority Control" "0: If a higher priority trigger is detected during..,1: If a higher priority trigger is received during..,2: If a higher priority trigger is received during..,?"
line.long 0x14 "PAUSE,Pause Register"
bitfld.long 0x14 31. "PAUSEEN,PAUSE Option Enable" "0: Pause operation disabled,1: Pause operation enabled"
hexmask.long.word 0x14 0.--8. 1. "PAUSEDLY,Pause Delay"
group.long 0x34++0x7
line.long 0x0 "SWTRIG,Software Trigger Register"
bitfld.long 0x0 3. "SWT3,Software Trigger 3 Event" "0: No trigger 3 event generated.,1: Trigger 3 event generated."
bitfld.long 0x0 2. "SWT2,Software Trigger 2 Event" "0: No trigger 2 event generated.,1: Trigger 2 event generated."
newline
bitfld.long 0x0 1. "SWT1,Software Trigger 1 Event" "0: No trigger 1 event generated.,1: Trigger 1 event generated."
bitfld.long 0x0 0. "SWT0,Software Trigger 0 Event" "0: No trigger 0 event generated.,1: Trigger 0 event generated."
line.long 0x4 "TSTAT,Trigger Status Register"
hexmask.long.byte 0x4 16.--19. 1. "TCOMP_FLAG,Trigger Completion Flag"
hexmask.long.byte 0x4 0.--3. 1. "TEXC_NUM,Trigger Exception Number"
group.long 0x40++0x3
line.long 0x0 "OFSTRIM,Offset Trim Register"
hexmask.long.word 0x0 0.--9. 1. "OFSTRIM,Trim for Offset"
group.long 0x48++0x3
line.long 0x0 "HSTRIM,High Speed Trim Register"
hexmask.long.byte 0x0 0.--4. 1. "HSTRIM,Trim for High Speed Conversions"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0xA0)++0x3
line.long 0x0 "TCTRL[$1],Trigger Control Register"
bitfld.long 0x0 24.--26. "TCMD,Trigger Command Select" "0: Not a valid selection from the command buffer.,1: CMD1 is executed,2: Corresponding CMD is executed,3: Corresponding CMD is executed,4: Corresponding CMD is executed,5: Corresponding CMD is executed,6: Corresponding CMD is executed,7: CMD7 is executed"
bitfld.long 0x0 23. "TSYNC,Trigger Synchronous Select" "0,1"
newline
hexmask.long.byte 0x0 16.--19. 1. "TDLY,Trigger Delay Select"
bitfld.long 0x0 15. "RSYNC,Trigger Resync" "0,1"
newline
bitfld.long 0x0 8.--9. "TPRI,Trigger Priority Setting" "0: Set to highest priority Level 1,1: Set to corresponding priority level,2: Set to corresponding priority level,3: Set to lowest priority Level 4"
bitfld.long 0x0 0. "HTEN,Trigger Enable" "0: Hardware trigger source disabled,1: Hardware trigger source enabled"
repeat.end
group.long 0xE0++0x3
line.long 0x0 "FCTRL0,FIFO Control Register"
bitfld.long 0x0 16.--18. "FWMARK,Watermark Level Selection" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--3. 1. "FCOUNT,Result FIFO Counter"
rgroup.long 0xF0++0x3
line.long 0x0 "GCC0,Gain Calibration Control"
bitfld.long 0x0 24. "RDY,Gain Calibration Value Valid" "0: The GAIN_CAL value is invalid. Run the hardware..,1: The GAIN_CAL value is valid. GAIN_CAL should be.."
hexmask.long.word 0x0 0.--15. 1. "GAIN_CAL,Gain Calibration Value"
group.long 0xF8++0x3
line.long 0x0 "GCR0,Gain Calculation Result"
bitfld.long 0x0 24. "RDY,Gain Calculation Ready" "0: The GCALR value is invalid.,1: The GCALR value is valid."
hexmask.long.tbyte 0x0 0.--16. 1. "GCALR,Gain Calculation Result"
group.long 0x100++0x37
line.long 0x0 "CMDL1,Command Low Buffer Register"
bitfld.long 0x0 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x0 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x0 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x4 "CMDH1,Command High Buffer Register"
bitfld.long 0x4 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x4 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x4 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x4 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x4 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x4 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x4 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x8 "CMDL2,Command Low Buffer Register"
bitfld.long 0x8 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x8 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x8 0.--4. 1. "ADCH,Input Channel Select"
line.long 0xC "CMDH2,Command High Buffer Register"
bitfld.long 0xC 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0xC 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0xC 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0xC 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0xC 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0xC 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0xC 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x10 "CMDL3,Command Low Buffer Register"
bitfld.long 0x10 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x10 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x10 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x14 "CMDH3,Command High Buffer Register"
bitfld.long 0x14 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x14 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x14 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x14 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x14 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x14 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x14 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x18 "CMDL4,Command Low Buffer Register"
bitfld.long 0x18 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x18 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x18 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x1C "CMDH4,Command High Buffer Register"
bitfld.long 0x1C 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x1C 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x1C 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x1C 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x1C 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x1C 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x1C 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x20 "CMDL5,Command Low Buffer Register"
bitfld.long 0x20 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x20 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x20 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x24 "CMDH5,Command High Buffer Register"
bitfld.long 0x24 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x24 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x24 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x24 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x24 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x24 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x24 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x28 "CMDL6,Command Low Buffer Register"
bitfld.long 0x28 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x28 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x28 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x2C "CMDH6,Command High Buffer Register"
bitfld.long 0x2C 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x2C 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x2C 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x2C 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x2C 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x2C 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x2C 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x30 "CMDL7,Command Low Buffer Register"
bitfld.long 0x30 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x30 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x30 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x34 "CMDH7,Command High Buffer Register"
bitfld.long 0x34 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x34 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x34 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x34 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x34 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x34 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x34 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
repeat 7. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x200)++0x3
line.long 0x0 "CV$1,Compare Value Register"
hexmask.long.word 0x0 16.--31. 1. "CVH,Compare Value High"
hexmask.long.word 0x0 0.--15. 1. "CVL,Compare Value Low"
repeat.end
rgroup.long 0x300++0x3
line.long 0x0 "RESFIFO0,Data Result FIFO Register"
bitfld.long 0x0 31. "VALID,FIFO Entry is Valid" "0: FIFO is empty. Discard any read from RESFIFO.,1: FIFO record read from RESFIFO is valid."
bitfld.long 0x0 24.--26. "CMDSRC,Command Buffer Source" "0: Not a valid value CMDSRC value for a dataword in..,1: CMD1 buffer used as control settings for this..,2: Corresponding command buffer used as control..,3: Corresponding command buffer used as control..,4: Corresponding command buffer used as control..,5: Corresponding command buffer used as control..,6: Corresponding command buffer used as control..,7: CMD7 buffer used as control settings for this.."
newline
hexmask.long.byte 0x0 20.--23. 1. "LOOPCNT,Loop Count Value"
bitfld.long 0x0 16.--17. "TSRC,Trigger Source" "0: Trigger source 0 initiated this conversion.,1: Trigger source 1 initiated this conversion.,2: Trigger source 2 initiated this conversion.,3: Trigger source 3 initiated this conversion."
newline
hexmask.long.word 0x0 0.--15. 1. "D,Data Result"
repeat 34. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x400)++0x3
line.long 0x0 "CAL_GAR[$1],Calibration General A-Side Registers"
hexmask.long.word 0x0 0.--15. 1. "CAL_GAR_VAL,Calibration General A Side Register Element"
repeat.end
group.long 0xFF8++0x3
line.long 0x0 "CFG2,Configuration 2 Register"
bitfld.long 0x0 12.--13. "TUNE,Tune Mode register" "0,1,2,3"
bitfld.long 0x0 10. "HSEXTRA,High Speed Extra register" "0: No extra cycle added,1: Extra cycle added"
newline
bitfld.long 0x0 9. "HS,High Speed Enable register" "0: High speed conversion mode disabled,1: High speed conversion mode enabled"
bitfld.long 0x0 8. "JLEFT,Justified Left Enable register" "0,1"
tree.end
endif
sif (cpuis("MC?A145*"))
tree "ADC1"
base ad:0x400B0000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID Register"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
bitfld.long 0x0 12.--14. "NUM_FIFO,Number of FIFOs" "0: N/A,1: This design supports one result FIFO.,2: This design supports two result FIFOs.,3: This design supports three result FIFOs.,4: This design supports four result FIFOs.,?,?,?"
bitfld.long 0x0 11. "NUM_SEC,Number of Single Ended Outputs Supported" "0: This design supports one single ended conversion..,1: This design supports two simultaneous single.."
newline
bitfld.long 0x0 10. "CALOFSI,Calibration Function Implemented" "0: Calibration Not Implemented.,1: Calibration Implemented."
bitfld.long 0x0 9. "IADCKI,Internal ADC Clock Implemented" "0: Internal clock source not implemented.,1: Internal clock source (and CFG[ADCKEN]).."
newline
bitfld.long 0x0 8. "VR1RNGI,Voltage Reference 1 Range Control Bit Implemented" "0: Range control not required. CFG[VREF1RNG] is not..,1: Range control required. CFG[VREF1RNG] is.."
bitfld.long 0x0 4.--6. "CSW,Channel Scale Width" "0: Channel scaling not supported.,1: Channel scaling supported. 1-bit CSCALE control..,?,?,?,?,6: Channel scaling supported. 6-bit CSCALE control..,?"
newline
bitfld.long 0x0 3. "MVI,Multi Vref Implemented" "0: Single voltage reference high (VREFH) input..,1: Multiple voltage reference high (VREFH) inputs.."
bitfld.long 0x0 1. "DIFFEN,Differential Supported" "0: Differential operation not supported.,1: Differential operation supported."
newline
bitfld.long 0x0 0. "RES,Resolution" "0: Up to 12-bit single ended resolution supported..,1: Up to 16-bit single ended resolution supported.."
line.long 0x4 "PARAM,Parameter Register"
hexmask.long.byte 0x4 24.--31. 1. "CMD_NUM,Command Buffer Number"
hexmask.long.byte 0x4 16.--23. 1. "CV_NUM,Compare Value Number"
newline
hexmask.long.byte 0x4 8.--15. 1. "FIFOSIZE,Result FIFO Depth"
hexmask.long.byte 0x4 0.--7. 1. "TRIG_NUM,Trigger Number"
group.long 0x10++0x17
line.long 0x0 "CTRL,Control Register"
hexmask.long.byte 0x0 16.--19. 1. "CAL_AVGS,Auto-Calibration Averages"
bitfld.long 0x0 8. "RSTFIFO0,Reset FIFO 0" "0: No effect.,1: FIFO 0 is reset."
newline
bitfld.long 0x0 6. "CALHS,High Speed Mode Trim Request" "0: No request for high speed mode trim has been made,1: Request for high speed mode trim has been made"
bitfld.long 0x0 4. "CALOFS,Offset Calibration Request" "0: No request for offset calibration has been made,1: Request for offset calibration function"
newline
bitfld.long 0x0 3. "CAL_REQ,Auto-Calibration Request" "0: No request for hardware calibration has been made,1: A request for hardware calibration has been made"
bitfld.long 0x0 2. "DOZEN,Doze Enable" "0: ADC is enabled in low power mode.,1: ADC is disabled in low power mode."
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: ADC logic is not reset.,1: ADC logic is reset."
bitfld.long 0x0 0. "ADCEN,ADC Enable" "0: ADC is disabled.,1: ADC is enabled."
line.long 0x4 "STAT,Status Register"
rbitfld.long 0x4 24.--26. "CMDACT,Command Active" "0: No command is currently in progress.,1: Command 1 currently being executed.,2: Command 2 currently being executed.,3: Associated command number is currently being..,4: Associated command number is currently being..,5: Associated command number is currently being..,6: Associated command number is currently being..,7: Associated command number is currently being.."
rbitfld.long 0x4 16.--17. "TRGACT,Trigger Active" "0: Command (sequence) associated with Trigger 0..,1: Command (sequence) associated with Trigger 1..,2: Command (sequence) associated with Trigger 2..,3: Command (sequence) associated with Trigger 3.."
newline
rbitfld.long 0x4 11. "ADC_ACTIVE,ADC Active" "0: The ADC is IDLE. There are no pending triggers..,1: The ADC is processing a conversion running.."
rbitfld.long 0x4 10. "CAL_RDY,Calibration Ready" "0: Calibration is incomplete or hasn't been ran.,1: The ADC is calibrated."
newline
eventfld.long 0x4 9. "TCOMP_INT,Interrupt Flag For Trigger Completion" "0: Either IE[TCOMP_IE] is set to 0 or no trigger..,1: Trigger sequence has been completed and all data.."
eventfld.long 0x4 8. "TEXC_INT,Interrupt Flag For High Priority Trigger Exception" "0: No trigger exceptions have occurred.,1: A trigger exception has occurred and is pending.."
newline
eventfld.long 0x4 1. "FOF0,Result FIFO 0 Overflow Flag" "0: No result FIFO 0 overflow has occurred since the..,1: At least one result FIFO 0 overflow has occurred.."
rbitfld.long 0x4 0. "RDY0,Result FIFO 0 Ready Flag" "0: Result FIFO 0 data level not above watermark..,1: Result FIFO 0 holding data above watermark level."
line.long 0x8 "IE,Interrupt Enable Register"
hexmask.long.byte 0x8 16.--19. 1. "TCOMP_IE,Trigger Completion Interrupt Enable"
bitfld.long 0x8 8. "TEXC_IE,Trigger Exception Interrupt Enable" "0: Trigger exception interrupts are disabled.,1: Trigger exception interrupts are enabled."
newline
bitfld.long 0x8 1. "FOFIE0,Result FIFO 0 Overflow Interrupt Enable" "0: FIFO 0 overflow interrupts are not enabled.,1: FIFO 0 overflow interrupts are enabled."
bitfld.long 0x8 0. "FWMIE0,FIFO 0 Watermark Interrupt Enable" "0: FIFO 0 watermark interrupts are not enabled.,1: FIFO 0 watermark interrupts are enabled."
line.long 0xC "DE,DMA Enable Register"
bitfld.long 0xC 0. "FWMDE0,FIFO 0 Watermark DMA Enable" "0: DMA request disabled.,1: DMA request enabled."
line.long 0x10 "CFG,Configuration Register"
bitfld.long 0x10 28. "PWREN,ADC Analog Pre-Enable" "0: ADC analog circuits are only enabled while..,1: ADC analog circuits are pre-enabled and ready to.."
hexmask.long.byte 0x10 16.--23. 1. "PUDLY,Power Up Delay"
newline
bitfld.long 0x10 10. "HPT_EXDI,High Priority Trigger Exception Disable" "0: High priority trigger exceptions are enabled.,1: High priority trigger exceptions are disabled."
bitfld.long 0x10 9. "TCMDRES,Trigger Command Resume" "0: Trigger sequences interrupted by a high priority..,1: Trigger sequences interrupted by a high priority.."
newline
bitfld.long 0x10 8. "TRES,Trigger Resume Enable" "0: Trigger sequences interrupted by a high priority..,1: Trigger sequences interrupted by a high priority.."
bitfld.long 0x10 6.--7. "REFSEL,Voltage Reference Selection" "0: (Default) Option 1 setting.,1: Option 2 setting.,2: Option 3 setting.,?"
newline
bitfld.long 0x10 5. "PWRSEL,Power Configuration Select" "0: Low power,1: High power"
bitfld.long 0x10 0.--1. "TPRICTRL,ADC Trigger Priority Control" "0: If a higher priority trigger is detected during..,1: If a higher priority trigger is received during..,2: If a higher priority trigger is received during..,?"
line.long 0x14 "PAUSE,Pause Register"
bitfld.long 0x14 31. "PAUSEEN,PAUSE Option Enable" "0: Pause operation disabled,1: Pause operation enabled"
hexmask.long.word 0x14 0.--8. 1. "PAUSEDLY,Pause Delay"
group.long 0x34++0x7
line.long 0x0 "SWTRIG,Software Trigger Register"
bitfld.long 0x0 3. "SWT3,Software Trigger 3 Event" "0: No trigger 3 event generated.,1: Trigger 3 event generated."
bitfld.long 0x0 2. "SWT2,Software Trigger 2 Event" "0: No trigger 2 event generated.,1: Trigger 2 event generated."
newline
bitfld.long 0x0 1. "SWT1,Software Trigger 1 Event" "0: No trigger 1 event generated.,1: Trigger 1 event generated."
bitfld.long 0x0 0. "SWT0,Software Trigger 0 Event" "0: No trigger 0 event generated.,1: Trigger 0 event generated."
line.long 0x4 "TSTAT,Trigger Status Register"
hexmask.long.byte 0x4 16.--19. 1. "TCOMP_FLAG,Trigger Completion Flag"
hexmask.long.byte 0x4 0.--3. 1. "TEXC_NUM,Trigger Exception Number"
group.long 0x40++0x3
line.long 0x0 "OFSTRIM,Offset Trim Register"
hexmask.long.word 0x0 0.--9. 1. "OFSTRIM,Trim for Offset"
group.long 0x48++0x3
line.long 0x0 "HSTRIM,High Speed Trim Register"
hexmask.long.byte 0x0 0.--4. 1. "HSTRIM,Trim for High Speed Conversions"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0xA0)++0x3
line.long 0x0 "TCTRL[$1],Trigger Control Register"
bitfld.long 0x0 24.--26. "TCMD,Trigger Command Select" "0: Not a valid selection from the command buffer.,1: CMD1 is executed,2: Corresponding CMD is executed,3: Corresponding CMD is executed,4: Corresponding CMD is executed,5: Corresponding CMD is executed,6: Corresponding CMD is executed,7: CMD7 is executed"
bitfld.long 0x0 23. "TSYNC,Trigger Synchronous Select" "0,1"
newline
hexmask.long.byte 0x0 16.--19. 1. "TDLY,Trigger Delay Select"
bitfld.long 0x0 15. "RSYNC,Trigger Resync" "0,1"
newline
bitfld.long 0x0 8.--9. "TPRI,Trigger Priority Setting" "0: Set to highest priority Level 1,1: Set to corresponding priority level,2: Set to corresponding priority level,3: Set to lowest priority Level 4"
bitfld.long 0x0 0. "HTEN,Trigger Enable" "0: Hardware trigger source disabled,1: Hardware trigger source enabled"
repeat.end
group.long 0xE0++0x3
line.long 0x0 "FCTRL0,FIFO Control Register"
bitfld.long 0x0 16.--18. "FWMARK,Watermark Level Selection" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--3. 1. "FCOUNT,Result FIFO Counter"
rgroup.long 0xF0++0x3
line.long 0x0 "GCC0,Gain Calibration Control"
bitfld.long 0x0 24. "RDY,Gain Calibration Value Valid" "0: The GAIN_CAL value is invalid. Run the hardware..,1: The GAIN_CAL value is valid. GAIN_CAL should be.."
hexmask.long.word 0x0 0.--15. 1. "GAIN_CAL,Gain Calibration Value"
group.long 0xF8++0x3
line.long 0x0 "GCR0,Gain Calculation Result"
bitfld.long 0x0 24. "RDY,Gain Calculation Ready" "0: The GCALR value is invalid.,1: The GCALR value is valid."
hexmask.long.tbyte 0x0 0.--16. 1. "GCALR,Gain Calculation Result"
group.long 0x100++0x37
line.long 0x0 "CMDL1,Command Low Buffer Register"
bitfld.long 0x0 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x0 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x0 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x4 "CMDH1,Command High Buffer Register"
bitfld.long 0x4 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x4 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x4 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x4 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x4 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x4 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x4 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x8 "CMDL2,Command Low Buffer Register"
bitfld.long 0x8 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x8 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x8 0.--4. 1. "ADCH,Input Channel Select"
line.long 0xC "CMDH2,Command High Buffer Register"
bitfld.long 0xC 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0xC 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0xC 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0xC 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0xC 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0xC 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0xC 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x10 "CMDL3,Command Low Buffer Register"
bitfld.long 0x10 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x10 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x10 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x14 "CMDH3,Command High Buffer Register"
bitfld.long 0x14 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x14 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x14 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x14 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x14 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x14 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x14 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x18 "CMDL4,Command Low Buffer Register"
bitfld.long 0x18 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x18 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x18 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x1C "CMDH4,Command High Buffer Register"
bitfld.long 0x1C 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x1C 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x1C 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x1C 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x1C 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x1C 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x1C 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x20 "CMDL5,Command Low Buffer Register"
bitfld.long 0x20 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x20 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x20 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x24 "CMDH5,Command High Buffer Register"
bitfld.long 0x24 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x24 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x24 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x24 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x24 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x24 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x24 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x28 "CMDL6,Command Low Buffer Register"
bitfld.long 0x28 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x28 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x28 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x2C "CMDH6,Command High Buffer Register"
bitfld.long 0x2C 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x2C 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x2C 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x2C 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x2C 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x2C 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x2C 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x30 "CMDL7,Command Low Buffer Register"
bitfld.long 0x30 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x30 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x30 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x34 "CMDH7,Command High Buffer Register"
bitfld.long 0x34 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x34 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x34 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x34 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x34 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x34 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x34 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
repeat 7. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x200)++0x3
line.long 0x0 "CV$1,Compare Value Register"
hexmask.long.word 0x0 16.--31. 1. "CVH,Compare Value High"
hexmask.long.word 0x0 0.--15. 1. "CVL,Compare Value Low"
repeat.end
rgroup.long 0x300++0x3
line.long 0x0 "RESFIFO0,Data Result FIFO Register"
bitfld.long 0x0 31. "VALID,FIFO Entry is Valid" "0: FIFO is empty. Discard any read from RESFIFO.,1: FIFO record read from RESFIFO is valid."
bitfld.long 0x0 24.--26. "CMDSRC,Command Buffer Source" "0: Not a valid value CMDSRC value for a dataword in..,1: CMD1 buffer used as control settings for this..,2: Corresponding command buffer used as control..,3: Corresponding command buffer used as control..,4: Corresponding command buffer used as control..,5: Corresponding command buffer used as control..,6: Corresponding command buffer used as control..,7: CMD7 buffer used as control settings for this.."
newline
hexmask.long.byte 0x0 20.--23. 1. "LOOPCNT,Loop Count Value"
bitfld.long 0x0 16.--17. "TSRC,Trigger Source" "0: Trigger source 0 initiated this conversion.,1: Trigger source 1 initiated this conversion.,2: Trigger source 2 initiated this conversion.,3: Trigger source 3 initiated this conversion."
newline
hexmask.long.word 0x0 0.--15. 1. "D,Data Result"
repeat 34. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x400)++0x3
line.long 0x0 "CAL_GAR[$1],Calibration General A-Side Registers"
hexmask.long.word 0x0 0.--15. 1. "CAL_GAR_VAL,Calibration General A Side Register Element"
repeat.end
group.long 0xFF8++0x3
line.long 0x0 "CFG2,Configuration 2 Register"
bitfld.long 0x0 12.--13. "TUNE,Tune Mode register" "0,1,2,3"
bitfld.long 0x0 10. "HSEXTRA,High Speed Extra register" "0: No extra cycle added,1: Extra cycle added"
newline
bitfld.long 0x0 9. "HS,High Speed Enable register" "0: High speed conversion mode disabled,1: High speed conversion mode enabled"
bitfld.long 0x0 8. "JLEFT,Justified Left Enable register" "0,1"
tree.end
endif
sif (cpuis("MC?A146*"))
tree "ADC1"
base ad:0x400B0000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID Register"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
bitfld.long 0x0 12.--14. "NUM_FIFO,Number of FIFOs" "0: N/A,1: This design supports one result FIFO.,2: This design supports two result FIFOs.,3: This design supports three result FIFOs.,4: This design supports four result FIFOs.,?,?,?"
bitfld.long 0x0 11. "NUM_SEC,Number of Single Ended Outputs Supported" "0: This design supports one single ended conversion..,1: This design supports two simultaneous single.."
newline
bitfld.long 0x0 10. "CALOFSI,Calibration Function Implemented" "0: Calibration Not Implemented.,1: Calibration Implemented."
bitfld.long 0x0 9. "IADCKI,Internal ADC Clock Implemented" "0: Internal clock source not implemented.,1: Internal clock source (and CFG[ADCKEN]).."
newline
bitfld.long 0x0 8. "VR1RNGI,Voltage Reference 1 Range Control Bit Implemented" "0: Range control not required. CFG[VREF1RNG] is not..,1: Range control required. CFG[VREF1RNG] is.."
bitfld.long 0x0 4.--6. "CSW,Channel Scale Width" "0: Channel scaling not supported.,1: Channel scaling supported. 1-bit CSCALE control..,?,?,?,?,6: Channel scaling supported. 6-bit CSCALE control..,?"
newline
bitfld.long 0x0 3. "MVI,Multi Vref Implemented" "0: Single voltage reference high (VREFH) input..,1: Multiple voltage reference high (VREFH) inputs.."
bitfld.long 0x0 1. "DIFFEN,Differential Supported" "0: Differential operation not supported.,1: Differential operation supported."
newline
bitfld.long 0x0 0. "RES,Resolution" "0: Up to 12-bit single ended resolution supported..,1: Up to 16-bit single ended resolution supported.."
line.long 0x4 "PARAM,Parameter Register"
hexmask.long.byte 0x4 24.--31. 1. "CMD_NUM,Command Buffer Number"
hexmask.long.byte 0x4 16.--23. 1. "CV_NUM,Compare Value Number"
newline
hexmask.long.byte 0x4 8.--15. 1. "FIFOSIZE,Result FIFO Depth"
hexmask.long.byte 0x4 0.--7. 1. "TRIG_NUM,Trigger Number"
group.long 0x10++0x17
line.long 0x0 "CTRL,Control Register"
hexmask.long.byte 0x0 16.--19. 1. "CAL_AVGS,Auto-Calibration Averages"
bitfld.long 0x0 8. "RSTFIFO0,Reset FIFO 0" "0: No effect.,1: FIFO 0 is reset."
newline
bitfld.long 0x0 6. "CALHS,High Speed Mode Trim Request" "0: No request for high speed mode trim has been made,1: Request for high speed mode trim has been made"
bitfld.long 0x0 4. "CALOFS,Offset Calibration Request" "0: No request for offset calibration has been made,1: Request for offset calibration function"
newline
bitfld.long 0x0 3. "CAL_REQ,Auto-Calibration Request" "0: No request for hardware calibration has been made,1: A request for hardware calibration has been made"
bitfld.long 0x0 2. "DOZEN,Doze Enable" "0: ADC is enabled in low power mode.,1: ADC is disabled in low power mode."
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: ADC logic is not reset.,1: ADC logic is reset."
bitfld.long 0x0 0. "ADCEN,ADC Enable" "0: ADC is disabled.,1: ADC is enabled."
line.long 0x4 "STAT,Status Register"
rbitfld.long 0x4 24.--26. "CMDACT,Command Active" "0: No command is currently in progress.,1: Command 1 currently being executed.,2: Command 2 currently being executed.,3: Associated command number is currently being..,4: Associated command number is currently being..,5: Associated command number is currently being..,6: Associated command number is currently being..,7: Associated command number is currently being.."
rbitfld.long 0x4 16.--17. "TRGACT,Trigger Active" "0: Command (sequence) associated with Trigger 0..,1: Command (sequence) associated with Trigger 1..,2: Command (sequence) associated with Trigger 2..,3: Command (sequence) associated with Trigger 3.."
newline
rbitfld.long 0x4 11. "ADC_ACTIVE,ADC Active" "0: The ADC is IDLE. There are no pending triggers..,1: The ADC is processing a conversion running.."
rbitfld.long 0x4 10. "CAL_RDY,Calibration Ready" "0: Calibration is incomplete or hasn't been ran.,1: The ADC is calibrated."
newline
eventfld.long 0x4 9. "TCOMP_INT,Interrupt Flag For Trigger Completion" "0: Either IE[TCOMP_IE] is set to 0 or no trigger..,1: Trigger sequence has been completed and all data.."
eventfld.long 0x4 8. "TEXC_INT,Interrupt Flag For High Priority Trigger Exception" "0: No trigger exceptions have occurred.,1: A trigger exception has occurred and is pending.."
newline
eventfld.long 0x4 1. "FOF0,Result FIFO 0 Overflow Flag" "0: No result FIFO 0 overflow has occurred since the..,1: At least one result FIFO 0 overflow has occurred.."
rbitfld.long 0x4 0. "RDY0,Result FIFO 0 Ready Flag" "0: Result FIFO 0 data level not above watermark..,1: Result FIFO 0 holding data above watermark level."
line.long 0x8 "IE,Interrupt Enable Register"
hexmask.long.byte 0x8 16.--19. 1. "TCOMP_IE,Trigger Completion Interrupt Enable"
bitfld.long 0x8 8. "TEXC_IE,Trigger Exception Interrupt Enable" "0: Trigger exception interrupts are disabled.,1: Trigger exception interrupts are enabled."
newline
bitfld.long 0x8 1. "FOFIE0,Result FIFO 0 Overflow Interrupt Enable" "0: FIFO 0 overflow interrupts are not enabled.,1: FIFO 0 overflow interrupts are enabled."
bitfld.long 0x8 0. "FWMIE0,FIFO 0 Watermark Interrupt Enable" "0: FIFO 0 watermark interrupts are not enabled.,1: FIFO 0 watermark interrupts are enabled."
line.long 0xC "DE,DMA Enable Register"
bitfld.long 0xC 0. "FWMDE0,FIFO 0 Watermark DMA Enable" "0: DMA request disabled.,1: DMA request enabled."
line.long 0x10 "CFG,Configuration Register"
bitfld.long 0x10 28. "PWREN,ADC Analog Pre-Enable" "0: ADC analog circuits are only enabled while..,1: ADC analog circuits are pre-enabled and ready to.."
hexmask.long.byte 0x10 16.--23. 1. "PUDLY,Power Up Delay"
newline
bitfld.long 0x10 10. "HPT_EXDI,High Priority Trigger Exception Disable" "0: High priority trigger exceptions are enabled.,1: High priority trigger exceptions are disabled."
bitfld.long 0x10 9. "TCMDRES,Trigger Command Resume" "0: Trigger sequences interrupted by a high priority..,1: Trigger sequences interrupted by a high priority.."
newline
bitfld.long 0x10 8. "TRES,Trigger Resume Enable" "0: Trigger sequences interrupted by a high priority..,1: Trigger sequences interrupted by a high priority.."
bitfld.long 0x10 6.--7. "REFSEL,Voltage Reference Selection" "0: (Default) Option 1 setting.,1: Option 2 setting.,2: Option 3 setting.,?"
newline
bitfld.long 0x10 5. "PWRSEL,Power Configuration Select" "0: Low power,1: High power"
bitfld.long 0x10 0.--1. "TPRICTRL,ADC Trigger Priority Control" "0: If a higher priority trigger is detected during..,1: If a higher priority trigger is received during..,2: If a higher priority trigger is received during..,?"
line.long 0x14 "PAUSE,Pause Register"
bitfld.long 0x14 31. "PAUSEEN,PAUSE Option Enable" "0: Pause operation disabled,1: Pause operation enabled"
hexmask.long.word 0x14 0.--8. 1. "PAUSEDLY,Pause Delay"
group.long 0x34++0x7
line.long 0x0 "SWTRIG,Software Trigger Register"
bitfld.long 0x0 3. "SWT3,Software Trigger 3 Event" "0: No trigger 3 event generated.,1: Trigger 3 event generated."
bitfld.long 0x0 2. "SWT2,Software Trigger 2 Event" "0: No trigger 2 event generated.,1: Trigger 2 event generated."
newline
bitfld.long 0x0 1. "SWT1,Software Trigger 1 Event" "0: No trigger 1 event generated.,1: Trigger 1 event generated."
bitfld.long 0x0 0. "SWT0,Software Trigger 0 Event" "0: No trigger 0 event generated.,1: Trigger 0 event generated."
line.long 0x4 "TSTAT,Trigger Status Register"
hexmask.long.byte 0x4 16.--19. 1. "TCOMP_FLAG,Trigger Completion Flag"
hexmask.long.byte 0x4 0.--3. 1. "TEXC_NUM,Trigger Exception Number"
group.long 0x40++0x3
line.long 0x0 "OFSTRIM,Offset Trim Register"
hexmask.long.word 0x0 0.--9. 1. "OFSTRIM,Trim for Offset"
group.long 0x48++0x3
line.long 0x0 "HSTRIM,High Speed Trim Register"
hexmask.long.byte 0x0 0.--4. 1. "HSTRIM,Trim for High Speed Conversions"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0xA0)++0x3
line.long 0x0 "TCTRL[$1],Trigger Control Register"
bitfld.long 0x0 24.--26. "TCMD,Trigger Command Select" "0: Not a valid selection from the command buffer.,1: CMD1 is executed,2: Corresponding CMD is executed,3: Corresponding CMD is executed,4: Corresponding CMD is executed,5: Corresponding CMD is executed,6: Corresponding CMD is executed,7: CMD7 is executed"
bitfld.long 0x0 23. "TSYNC,Trigger Synchronous Select" "0,1"
newline
hexmask.long.byte 0x0 16.--19. 1. "TDLY,Trigger Delay Select"
bitfld.long 0x0 15. "RSYNC,Trigger Resync" "0,1"
newline
bitfld.long 0x0 8.--9. "TPRI,Trigger Priority Setting" "0: Set to highest priority Level 1,1: Set to corresponding priority level,2: Set to corresponding priority level,3: Set to lowest priority Level 4"
bitfld.long 0x0 0. "HTEN,Trigger Enable" "0: Hardware trigger source disabled,1: Hardware trigger source enabled"
repeat.end
group.long 0xE0++0x3
line.long 0x0 "FCTRL0,FIFO Control Register"
bitfld.long 0x0 16.--18. "FWMARK,Watermark Level Selection" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--3. 1. "FCOUNT,Result FIFO Counter"
rgroup.long 0xF0++0x3
line.long 0x0 "GCC0,Gain Calibration Control"
bitfld.long 0x0 24. "RDY,Gain Calibration Value Valid" "0: The GAIN_CAL value is invalid. Run the hardware..,1: The GAIN_CAL value is valid. GAIN_CAL should be.."
hexmask.long.word 0x0 0.--15. 1. "GAIN_CAL,Gain Calibration Value"
group.long 0xF8++0x3
line.long 0x0 "GCR0,Gain Calculation Result"
bitfld.long 0x0 24. "RDY,Gain Calculation Ready" "0: The GCALR value is invalid.,1: The GCALR value is valid."
hexmask.long.tbyte 0x0 0.--16. 1. "GCALR,Gain Calculation Result"
group.long 0x100++0x37
line.long 0x0 "CMDL1,Command Low Buffer Register"
bitfld.long 0x0 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x0 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x0 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x4 "CMDH1,Command High Buffer Register"
bitfld.long 0x4 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x4 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x4 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x4 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x4 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x4 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x4 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x8 "CMDL2,Command Low Buffer Register"
bitfld.long 0x8 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x8 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x8 0.--4. 1. "ADCH,Input Channel Select"
line.long 0xC "CMDH2,Command High Buffer Register"
bitfld.long 0xC 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0xC 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0xC 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0xC 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0xC 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0xC 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0xC 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x10 "CMDL3,Command Low Buffer Register"
bitfld.long 0x10 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x10 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x10 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x14 "CMDH3,Command High Buffer Register"
bitfld.long 0x14 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x14 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x14 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x14 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x14 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x14 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x14 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x18 "CMDL4,Command Low Buffer Register"
bitfld.long 0x18 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x18 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x18 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x1C "CMDH4,Command High Buffer Register"
bitfld.long 0x1C 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x1C 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x1C 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x1C 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x1C 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x1C 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x1C 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x20 "CMDL5,Command Low Buffer Register"
bitfld.long 0x20 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x20 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x20 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x24 "CMDH5,Command High Buffer Register"
bitfld.long 0x24 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x24 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x24 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x24 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x24 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x24 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x24 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x28 "CMDL6,Command Low Buffer Register"
bitfld.long 0x28 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x28 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x28 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x2C "CMDH6,Command High Buffer Register"
bitfld.long 0x2C 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x2C 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x2C 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x2C 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x2C 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x2C 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x2C 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x30 "CMDL7,Command Low Buffer Register"
bitfld.long 0x30 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x30 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x30 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x34 "CMDH7,Command High Buffer Register"
bitfld.long 0x34 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x34 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x34 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x34 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x34 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x34 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x34 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
repeat 7. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x200)++0x3
line.long 0x0 "CV$1,Compare Value Register"
hexmask.long.word 0x0 16.--31. 1. "CVH,Compare Value High"
hexmask.long.word 0x0 0.--15. 1. "CVL,Compare Value Low"
repeat.end
rgroup.long 0x300++0x3
line.long 0x0 "RESFIFO0,Data Result FIFO Register"
bitfld.long 0x0 31. "VALID,FIFO Entry is Valid" "0: FIFO is empty. Discard any read from RESFIFO.,1: FIFO record read from RESFIFO is valid."
bitfld.long 0x0 24.--26. "CMDSRC,Command Buffer Source" "0: Not a valid value CMDSRC value for a dataword in..,1: CMD1 buffer used as control settings for this..,2: Corresponding command buffer used as control..,3: Corresponding command buffer used as control..,4: Corresponding command buffer used as control..,5: Corresponding command buffer used as control..,6: Corresponding command buffer used as control..,7: CMD7 buffer used as control settings for this.."
newline
hexmask.long.byte 0x0 20.--23. 1. "LOOPCNT,Loop Count Value"
bitfld.long 0x0 16.--17. "TSRC,Trigger Source" "0: Trigger source 0 initiated this conversion.,1: Trigger source 1 initiated this conversion.,2: Trigger source 2 initiated this conversion.,3: Trigger source 3 initiated this conversion."
newline
hexmask.long.word 0x0 0.--15. 1. "D,Data Result"
repeat 34. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x400)++0x3
line.long 0x0 "CAL_GAR[$1],Calibration General A-Side Registers"
hexmask.long.word 0x0 0.--15. 1. "CAL_GAR_VAL,Calibration General A Side Register Element"
repeat.end
group.long 0xFF8++0x3
line.long 0x0 "CFG2,Configuration 2 Register"
bitfld.long 0x0 12.--13. "TUNE,Tune Mode register" "0,1,2,3"
bitfld.long 0x0 10. "HSEXTRA,High Speed Extra register" "0: No extra cycle added,1: Extra cycle added"
newline
bitfld.long 0x0 9. "HS,High Speed Enable register" "0: High speed conversion mode disabled,1: High speed conversion mode enabled"
bitfld.long 0x0 8. "JLEFT,Justified Left Enable register" "0,1"
tree.end
endif
sif (cpuis("MC?A154*"))
tree "ADC1"
base ad:0x400B0000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID Register"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
bitfld.long 0x0 12.--14. "NUM_FIFO,Number of FIFOs" "0: N/A,1: This design supports one result FIFO.,2: This design supports two result FIFOs.,3: This design supports three result FIFOs.,4: This design supports four result FIFOs.,?,?,?"
bitfld.long 0x0 11. "NUM_SEC,Number of Single Ended Outputs Supported" "0: This design supports one single ended conversion..,1: This design supports two simultaneous single.."
newline
bitfld.long 0x0 10. "CALOFSI,Calibration Function Implemented" "0: Calibration Not Implemented.,1: Calibration Implemented."
bitfld.long 0x0 9. "IADCKI,Internal ADC Clock Implemented" "0: Internal clock source not implemented.,1: Internal clock source (and CFG[ADCKEN]).."
newline
bitfld.long 0x0 8. "VR1RNGI,Voltage Reference 1 Range Control Bit Implemented" "0: Range control not required. CFG[VREF1RNG] is not..,1: Range control required. CFG[VREF1RNG] is.."
bitfld.long 0x0 4.--6. "CSW,Channel Scale Width" "0: Channel scaling not supported.,1: Channel scaling supported. 1-bit CSCALE control..,?,?,?,?,6: Channel scaling supported. 6-bit CSCALE control..,?"
newline
bitfld.long 0x0 3. "MVI,Multi Vref Implemented" "0: Single voltage reference high (VREFH) input..,1: Multiple voltage reference high (VREFH) inputs.."
bitfld.long 0x0 1. "DIFFEN,Differential Supported" "0: Differential operation not supported.,1: Differential operation supported."
newline
bitfld.long 0x0 0. "RES,Resolution" "0: Up to 12-bit single ended resolution supported..,1: Up to 16-bit single ended resolution supported.."
line.long 0x4 "PARAM,Parameter Register"
hexmask.long.byte 0x4 24.--31. 1. "CMD_NUM,Command Buffer Number"
hexmask.long.byte 0x4 16.--23. 1. "CV_NUM,Compare Value Number"
newline
hexmask.long.byte 0x4 8.--15. 1. "FIFOSIZE,Result FIFO Depth"
hexmask.long.byte 0x4 0.--7. 1. "TRIG_NUM,Trigger Number"
group.long 0x10++0x17
line.long 0x0 "CTRL,Control Register"
hexmask.long.byte 0x0 16.--19. 1. "CAL_AVGS,Auto-Calibration Averages"
bitfld.long 0x0 8. "RSTFIFO0,Reset FIFO 0" "0: No effect.,1: FIFO 0 is reset."
newline
bitfld.long 0x0 6. "CALHS,High Speed Mode Trim Request" "0: No request for high speed mode trim has been made,1: Request for high speed mode trim has been made"
bitfld.long 0x0 4. "CALOFS,Offset Calibration Request" "0: No request for offset calibration has been made,1: Request for offset calibration function"
newline
bitfld.long 0x0 3. "CAL_REQ,Auto-Calibration Request" "0: No request for hardware calibration has been made,1: A request for hardware calibration has been made"
bitfld.long 0x0 2. "DOZEN,Doze Enable" "0: ADC is enabled in low power mode.,1: ADC is disabled in low power mode."
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: ADC logic is not reset.,1: ADC logic is reset."
bitfld.long 0x0 0. "ADCEN,ADC Enable" "0: ADC is disabled.,1: ADC is enabled."
line.long 0x4 "STAT,Status Register"
rbitfld.long 0x4 24.--26. "CMDACT,Command Active" "0: No command is currently in progress.,1: Command 1 currently being executed.,2: Command 2 currently being executed.,3: Associated command number is currently being..,4: Associated command number is currently being..,5: Associated command number is currently being..,6: Associated command number is currently being..,7: Associated command number is currently being.."
rbitfld.long 0x4 16.--17. "TRGACT,Trigger Active" "0: Command (sequence) associated with Trigger 0..,1: Command (sequence) associated with Trigger 1..,2: Command (sequence) associated with Trigger 2..,3: Command (sequence) associated with Trigger 3.."
newline
rbitfld.long 0x4 11. "ADC_ACTIVE,ADC Active" "0: The ADC is IDLE. There are no pending triggers..,1: The ADC is processing a conversion running.."
rbitfld.long 0x4 10. "CAL_RDY,Calibration Ready" "0: Calibration is incomplete or hasn't been ran.,1: The ADC is calibrated."
newline
eventfld.long 0x4 9. "TCOMP_INT,Interrupt Flag For Trigger Completion" "0: Either IE[TCOMP_IE] is set to 0 or no trigger..,1: Trigger sequence has been completed and all data.."
eventfld.long 0x4 8. "TEXC_INT,Interrupt Flag For High Priority Trigger Exception" "0: No trigger exceptions have occurred.,1: A trigger exception has occurred and is pending.."
newline
eventfld.long 0x4 1. "FOF0,Result FIFO 0 Overflow Flag" "0: No result FIFO 0 overflow has occurred since the..,1: At least one result FIFO 0 overflow has occurred.."
rbitfld.long 0x4 0. "RDY0,Result FIFO 0 Ready Flag" "0: Result FIFO 0 data level not above watermark..,1: Result FIFO 0 holding data above watermark level."
line.long 0x8 "IE,Interrupt Enable Register"
hexmask.long.byte 0x8 16.--19. 1. "TCOMP_IE,Trigger Completion Interrupt Enable"
bitfld.long 0x8 8. "TEXC_IE,Trigger Exception Interrupt Enable" "0: Trigger exception interrupts are disabled.,1: Trigger exception interrupts are enabled."
newline
bitfld.long 0x8 1. "FOFIE0,Result FIFO 0 Overflow Interrupt Enable" "0: FIFO 0 overflow interrupts are not enabled.,1: FIFO 0 overflow interrupts are enabled."
bitfld.long 0x8 0. "FWMIE0,FIFO 0 Watermark Interrupt Enable" "0: FIFO 0 watermark interrupts are not enabled.,1: FIFO 0 watermark interrupts are enabled."
line.long 0xC "DE,DMA Enable Register"
bitfld.long 0xC 0. "FWMDE0,FIFO 0 Watermark DMA Enable" "0: DMA request disabled.,1: DMA request enabled."
line.long 0x10 "CFG,Configuration Register"
bitfld.long 0x10 28. "PWREN,ADC Analog Pre-Enable" "0: ADC analog circuits are only enabled while..,1: ADC analog circuits are pre-enabled and ready to.."
hexmask.long.byte 0x10 16.--23. 1. "PUDLY,Power Up Delay"
newline
bitfld.long 0x10 10. "HPT_EXDI,High Priority Trigger Exception Disable" "0: High priority trigger exceptions are enabled.,1: High priority trigger exceptions are disabled."
bitfld.long 0x10 9. "TCMDRES,Trigger Command Resume" "0: Trigger sequences interrupted by a high priority..,1: Trigger sequences interrupted by a high priority.."
newline
bitfld.long 0x10 8. "TRES,Trigger Resume Enable" "0: Trigger sequences interrupted by a high priority..,1: Trigger sequences interrupted by a high priority.."
bitfld.long 0x10 6.--7. "REFSEL,Voltage Reference Selection" "0: (Default) Option 1 setting.,1: Option 2 setting.,2: Option 3 setting.,?"
newline
bitfld.long 0x10 5. "PWRSEL,Power Configuration Select" "0: Low power,1: High power"
bitfld.long 0x10 0.--1. "TPRICTRL,ADC Trigger Priority Control" "0: If a higher priority trigger is detected during..,1: If a higher priority trigger is received during..,2: If a higher priority trigger is received during..,?"
line.long 0x14 "PAUSE,Pause Register"
bitfld.long 0x14 31. "PAUSEEN,PAUSE Option Enable" "0: Pause operation disabled,1: Pause operation enabled"
hexmask.long.word 0x14 0.--8. 1. "PAUSEDLY,Pause Delay"
group.long 0x34++0x7
line.long 0x0 "SWTRIG,Software Trigger Register"
bitfld.long 0x0 3. "SWT3,Software Trigger 3 Event" "0: No trigger 3 event generated.,1: Trigger 3 event generated."
bitfld.long 0x0 2. "SWT2,Software Trigger 2 Event" "0: No trigger 2 event generated.,1: Trigger 2 event generated."
newline
bitfld.long 0x0 1. "SWT1,Software Trigger 1 Event" "0: No trigger 1 event generated.,1: Trigger 1 event generated."
bitfld.long 0x0 0. "SWT0,Software Trigger 0 Event" "0: No trigger 0 event generated.,1: Trigger 0 event generated."
line.long 0x4 "TSTAT,Trigger Status Register"
hexmask.long.byte 0x4 16.--19. 1. "TCOMP_FLAG,Trigger Completion Flag"
hexmask.long.byte 0x4 0.--3. 1. "TEXC_NUM,Trigger Exception Number"
group.long 0x40++0x3
line.long 0x0 "OFSTRIM,Offset Trim Register"
hexmask.long.word 0x0 0.--9. 1. "OFSTRIM,Trim for Offset"
group.long 0x48++0x3
line.long 0x0 "HSTRIM,High Speed Trim Register"
hexmask.long.byte 0x0 0.--4. 1. "HSTRIM,Trim for High Speed Conversions"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0xA0)++0x3
line.long 0x0 "TCTRL[$1],Trigger Control Register"
bitfld.long 0x0 24.--26. "TCMD,Trigger Command Select" "0: Not a valid selection from the command buffer.,1: CMD1 is executed,2: Corresponding CMD is executed,3: Corresponding CMD is executed,4: Corresponding CMD is executed,5: Corresponding CMD is executed,6: Corresponding CMD is executed,7: CMD7 is executed"
bitfld.long 0x0 23. "TSYNC,Trigger Synchronous Select" "0,1"
newline
hexmask.long.byte 0x0 16.--19. 1. "TDLY,Trigger Delay Select"
bitfld.long 0x0 15. "RSYNC,Trigger Resync" "0,1"
newline
bitfld.long 0x0 8.--9. "TPRI,Trigger Priority Setting" "0: Set to highest priority Level 1,1: Set to corresponding priority level,2: Set to corresponding priority level,3: Set to lowest priority Level 4"
bitfld.long 0x0 0. "HTEN,Trigger Enable" "0: Hardware trigger source disabled,1: Hardware trigger source enabled"
repeat.end
group.long 0xE0++0x3
line.long 0x0 "FCTRL0,FIFO Control Register"
bitfld.long 0x0 16.--18. "FWMARK,Watermark Level Selection" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--3. 1. "FCOUNT,Result FIFO Counter"
rgroup.long 0xF0++0x3
line.long 0x0 "GCC0,Gain Calibration Control"
bitfld.long 0x0 24. "RDY,Gain Calibration Value Valid" "0: The GAIN_CAL value is invalid. Run the hardware..,1: The GAIN_CAL value is valid. GAIN_CAL should be.."
hexmask.long.word 0x0 0.--15. 1. "GAIN_CAL,Gain Calibration Value"
group.long 0xF8++0x3
line.long 0x0 "GCR0,Gain Calculation Result"
bitfld.long 0x0 24. "RDY,Gain Calculation Ready" "0: The GCALR value is invalid.,1: The GCALR value is valid."
hexmask.long.tbyte 0x0 0.--16. 1. "GCALR,Gain Calculation Result"
group.long 0x100++0x37
line.long 0x0 "CMDL1,Command Low Buffer Register"
bitfld.long 0x0 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x0 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x0 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x4 "CMDH1,Command High Buffer Register"
bitfld.long 0x4 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x4 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x4 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x4 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x4 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x4 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x4 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x8 "CMDL2,Command Low Buffer Register"
bitfld.long 0x8 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x8 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x8 0.--4. 1. "ADCH,Input Channel Select"
line.long 0xC "CMDH2,Command High Buffer Register"
bitfld.long 0xC 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0xC 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0xC 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0xC 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0xC 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0xC 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0xC 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x10 "CMDL3,Command Low Buffer Register"
bitfld.long 0x10 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x10 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x10 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x14 "CMDH3,Command High Buffer Register"
bitfld.long 0x14 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x14 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x14 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x14 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x14 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x14 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x14 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x18 "CMDL4,Command Low Buffer Register"
bitfld.long 0x18 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x18 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x18 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x1C "CMDH4,Command High Buffer Register"
bitfld.long 0x1C 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x1C 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x1C 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x1C 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x1C 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x1C 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x1C 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x20 "CMDL5,Command Low Buffer Register"
bitfld.long 0x20 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x20 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x20 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x24 "CMDH5,Command High Buffer Register"
bitfld.long 0x24 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x24 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x24 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x24 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x24 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x24 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x24 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x28 "CMDL6,Command Low Buffer Register"
bitfld.long 0x28 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x28 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x28 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x2C "CMDH6,Command High Buffer Register"
bitfld.long 0x2C 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x2C 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x2C 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x2C 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x2C 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x2C 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x2C 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x30 "CMDL7,Command Low Buffer Register"
bitfld.long 0x30 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x30 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x30 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x34 "CMDH7,Command High Buffer Register"
bitfld.long 0x34 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x34 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x34 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x34 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x34 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x34 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x34 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
repeat 7. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x200)++0x3
line.long 0x0 "CV$1,Compare Value Register"
hexmask.long.word 0x0 16.--31. 1. "CVH,Compare Value High"
hexmask.long.word 0x0 0.--15. 1. "CVL,Compare Value Low"
repeat.end
rgroup.long 0x300++0x3
line.long 0x0 "RESFIFO0,Data Result FIFO Register"
bitfld.long 0x0 31. "VALID,FIFO Entry is Valid" "0: FIFO is empty. Discard any read from RESFIFO.,1: FIFO record read from RESFIFO is valid."
bitfld.long 0x0 24.--26. "CMDSRC,Command Buffer Source" "0: Not a valid value CMDSRC value for a dataword in..,1: CMD1 buffer used as control settings for this..,2: Corresponding command buffer used as control..,3: Corresponding command buffer used as control..,4: Corresponding command buffer used as control..,5: Corresponding command buffer used as control..,6: Corresponding command buffer used as control..,7: CMD7 buffer used as control settings for this.."
newline
hexmask.long.byte 0x0 20.--23. 1. "LOOPCNT,Loop Count Value"
bitfld.long 0x0 16.--17. "TSRC,Trigger Source" "0: Trigger source 0 initiated this conversion.,1: Trigger source 1 initiated this conversion.,2: Trigger source 2 initiated this conversion.,3: Trigger source 3 initiated this conversion."
newline
hexmask.long.word 0x0 0.--15. 1. "D,Data Result"
repeat 34. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x400)++0x3
line.long 0x0 "CAL_GAR[$1],Calibration General A-Side Registers"
hexmask.long.word 0x0 0.--15. 1. "CAL_GAR_VAL,Calibration General A Side Register Element"
repeat.end
group.long 0xFF8++0x3
line.long 0x0 "CFG2,Configuration 2 Register"
bitfld.long 0x0 12.--13. "TUNE,Tune Mode register" "0,1,2,3"
bitfld.long 0x0 10. "HSEXTRA,High Speed Extra register" "0: No extra cycle added,1: Extra cycle added"
newline
bitfld.long 0x0 9. "HS,High Speed Enable register" "0: High speed conversion mode disabled,1: High speed conversion mode enabled"
bitfld.long 0x0 8. "JLEFT,Justified Left Enable register" "0,1"
tree.end
endif
sif (cpuis("MC?A155*"))
tree "ADC1"
base ad:0x400B0000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID Register"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
bitfld.long 0x0 12.--14. "NUM_FIFO,Number of FIFOs" "0: N/A,1: This design supports one result FIFO.,2: This design supports two result FIFOs.,3: This design supports three result FIFOs.,4: This design supports four result FIFOs.,?,?,?"
bitfld.long 0x0 11. "NUM_SEC,Number of Single Ended Outputs Supported" "0: This design supports one single ended conversion..,1: This design supports two simultaneous single.."
newline
bitfld.long 0x0 10. "CALOFSI,Calibration Function Implemented" "0: Calibration Not Implemented.,1: Calibration Implemented."
bitfld.long 0x0 9. "IADCKI,Internal ADC Clock Implemented" "0: Internal clock source not implemented.,1: Internal clock source (and CFG[ADCKEN]).."
newline
bitfld.long 0x0 8. "VR1RNGI,Voltage Reference 1 Range Control Bit Implemented" "0: Range control not required. CFG[VREF1RNG] is not..,1: Range control required. CFG[VREF1RNG] is.."
bitfld.long 0x0 4.--6. "CSW,Channel Scale Width" "0: Channel scaling not supported.,1: Channel scaling supported. 1-bit CSCALE control..,?,?,?,?,6: Channel scaling supported. 6-bit CSCALE control..,?"
newline
bitfld.long 0x0 3. "MVI,Multi Vref Implemented" "0: Single voltage reference high (VREFH) input..,1: Multiple voltage reference high (VREFH) inputs.."
bitfld.long 0x0 1. "DIFFEN,Differential Supported" "0: Differential operation not supported.,1: Differential operation supported."
newline
bitfld.long 0x0 0. "RES,Resolution" "0: Up to 12-bit single ended resolution supported..,1: Up to 16-bit single ended resolution supported.."
line.long 0x4 "PARAM,Parameter Register"
hexmask.long.byte 0x4 24.--31. 1. "CMD_NUM,Command Buffer Number"
hexmask.long.byte 0x4 16.--23. 1. "CV_NUM,Compare Value Number"
newline
hexmask.long.byte 0x4 8.--15. 1. "FIFOSIZE,Result FIFO Depth"
hexmask.long.byte 0x4 0.--7. 1. "TRIG_NUM,Trigger Number"
group.long 0x10++0x17
line.long 0x0 "CTRL,Control Register"
hexmask.long.byte 0x0 16.--19. 1. "CAL_AVGS,Auto-Calibration Averages"
bitfld.long 0x0 8. "RSTFIFO0,Reset FIFO 0" "0: No effect.,1: FIFO 0 is reset."
newline
bitfld.long 0x0 6. "CALHS,High Speed Mode Trim Request" "0: No request for high speed mode trim has been made,1: Request for high speed mode trim has been made"
bitfld.long 0x0 4. "CALOFS,Offset Calibration Request" "0: No request for offset calibration has been made,1: Request for offset calibration function"
newline
bitfld.long 0x0 3. "CAL_REQ,Auto-Calibration Request" "0: No request for hardware calibration has been made,1: A request for hardware calibration has been made"
bitfld.long 0x0 2. "DOZEN,Doze Enable" "0: ADC is enabled in low power mode.,1: ADC is disabled in low power mode."
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: ADC logic is not reset.,1: ADC logic is reset."
bitfld.long 0x0 0. "ADCEN,ADC Enable" "0: ADC is disabled.,1: ADC is enabled."
line.long 0x4 "STAT,Status Register"
rbitfld.long 0x4 24.--26. "CMDACT,Command Active" "0: No command is currently in progress.,1: Command 1 currently being executed.,2: Command 2 currently being executed.,3: Associated command number is currently being..,4: Associated command number is currently being..,5: Associated command number is currently being..,6: Associated command number is currently being..,7: Associated command number is currently being.."
rbitfld.long 0x4 16.--17. "TRGACT,Trigger Active" "0: Command (sequence) associated with Trigger 0..,1: Command (sequence) associated with Trigger 1..,2: Command (sequence) associated with Trigger 2..,3: Command (sequence) associated with Trigger 3.."
newline
rbitfld.long 0x4 11. "ADC_ACTIVE,ADC Active" "0: The ADC is IDLE. There are no pending triggers..,1: The ADC is processing a conversion running.."
rbitfld.long 0x4 10. "CAL_RDY,Calibration Ready" "0: Calibration is incomplete or hasn't been ran.,1: The ADC is calibrated."
newline
eventfld.long 0x4 9. "TCOMP_INT,Interrupt Flag For Trigger Completion" "0: Either IE[TCOMP_IE] is set to 0 or no trigger..,1: Trigger sequence has been completed and all data.."
eventfld.long 0x4 8. "TEXC_INT,Interrupt Flag For High Priority Trigger Exception" "0: No trigger exceptions have occurred.,1: A trigger exception has occurred and is pending.."
newline
eventfld.long 0x4 1. "FOF0,Result FIFO 0 Overflow Flag" "0: No result FIFO 0 overflow has occurred since the..,1: At least one result FIFO 0 overflow has occurred.."
rbitfld.long 0x4 0. "RDY0,Result FIFO 0 Ready Flag" "0: Result FIFO 0 data level not above watermark..,1: Result FIFO 0 holding data above watermark level."
line.long 0x8 "IE,Interrupt Enable Register"
hexmask.long.byte 0x8 16.--19. 1. "TCOMP_IE,Trigger Completion Interrupt Enable"
bitfld.long 0x8 8. "TEXC_IE,Trigger Exception Interrupt Enable" "0: Trigger exception interrupts are disabled.,1: Trigger exception interrupts are enabled."
newline
bitfld.long 0x8 1. "FOFIE0,Result FIFO 0 Overflow Interrupt Enable" "0: FIFO 0 overflow interrupts are not enabled.,1: FIFO 0 overflow interrupts are enabled."
bitfld.long 0x8 0. "FWMIE0,FIFO 0 Watermark Interrupt Enable" "0: FIFO 0 watermark interrupts are not enabled.,1: FIFO 0 watermark interrupts are enabled."
line.long 0xC "DE,DMA Enable Register"
bitfld.long 0xC 0. "FWMDE0,FIFO 0 Watermark DMA Enable" "0: DMA request disabled.,1: DMA request enabled."
line.long 0x10 "CFG,Configuration Register"
bitfld.long 0x10 28. "PWREN,ADC Analog Pre-Enable" "0: ADC analog circuits are only enabled while..,1: ADC analog circuits are pre-enabled and ready to.."
hexmask.long.byte 0x10 16.--23. 1. "PUDLY,Power Up Delay"
newline
bitfld.long 0x10 10. "HPT_EXDI,High Priority Trigger Exception Disable" "0: High priority trigger exceptions are enabled.,1: High priority trigger exceptions are disabled."
bitfld.long 0x10 9. "TCMDRES,Trigger Command Resume" "0: Trigger sequences interrupted by a high priority..,1: Trigger sequences interrupted by a high priority.."
newline
bitfld.long 0x10 8. "TRES,Trigger Resume Enable" "0: Trigger sequences interrupted by a high priority..,1: Trigger sequences interrupted by a high priority.."
bitfld.long 0x10 6.--7. "REFSEL,Voltage Reference Selection" "0: (Default) Option 1 setting.,1: Option 2 setting.,2: Option 3 setting.,?"
newline
bitfld.long 0x10 5. "PWRSEL,Power Configuration Select" "0: Low power,1: High power"
bitfld.long 0x10 0.--1. "TPRICTRL,ADC Trigger Priority Control" "0: If a higher priority trigger is detected during..,1: If a higher priority trigger is received during..,2: If a higher priority trigger is received during..,?"
line.long 0x14 "PAUSE,Pause Register"
bitfld.long 0x14 31. "PAUSEEN,PAUSE Option Enable" "0: Pause operation disabled,1: Pause operation enabled"
hexmask.long.word 0x14 0.--8. 1. "PAUSEDLY,Pause Delay"
group.long 0x34++0x7
line.long 0x0 "SWTRIG,Software Trigger Register"
bitfld.long 0x0 3. "SWT3,Software Trigger 3 Event" "0: No trigger 3 event generated.,1: Trigger 3 event generated."
bitfld.long 0x0 2. "SWT2,Software Trigger 2 Event" "0: No trigger 2 event generated.,1: Trigger 2 event generated."
newline
bitfld.long 0x0 1. "SWT1,Software Trigger 1 Event" "0: No trigger 1 event generated.,1: Trigger 1 event generated."
bitfld.long 0x0 0. "SWT0,Software Trigger 0 Event" "0: No trigger 0 event generated.,1: Trigger 0 event generated."
line.long 0x4 "TSTAT,Trigger Status Register"
hexmask.long.byte 0x4 16.--19. 1. "TCOMP_FLAG,Trigger Completion Flag"
hexmask.long.byte 0x4 0.--3. 1. "TEXC_NUM,Trigger Exception Number"
group.long 0x40++0x3
line.long 0x0 "OFSTRIM,Offset Trim Register"
hexmask.long.word 0x0 0.--9. 1. "OFSTRIM,Trim for Offset"
group.long 0x48++0x3
line.long 0x0 "HSTRIM,High Speed Trim Register"
hexmask.long.byte 0x0 0.--4. 1. "HSTRIM,Trim for High Speed Conversions"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0xA0)++0x3
line.long 0x0 "TCTRL[$1],Trigger Control Register"
bitfld.long 0x0 24.--26. "TCMD,Trigger Command Select" "0: Not a valid selection from the command buffer.,1: CMD1 is executed,2: Corresponding CMD is executed,3: Corresponding CMD is executed,4: Corresponding CMD is executed,5: Corresponding CMD is executed,6: Corresponding CMD is executed,7: CMD7 is executed"
bitfld.long 0x0 23. "TSYNC,Trigger Synchronous Select" "0,1"
newline
hexmask.long.byte 0x0 16.--19. 1. "TDLY,Trigger Delay Select"
bitfld.long 0x0 15. "RSYNC,Trigger Resync" "0,1"
newline
bitfld.long 0x0 8.--9. "TPRI,Trigger Priority Setting" "0: Set to highest priority Level 1,1: Set to corresponding priority level,2: Set to corresponding priority level,3: Set to lowest priority Level 4"
bitfld.long 0x0 0. "HTEN,Trigger Enable" "0: Hardware trigger source disabled,1: Hardware trigger source enabled"
repeat.end
group.long 0xE0++0x3
line.long 0x0 "FCTRL0,FIFO Control Register"
bitfld.long 0x0 16.--18. "FWMARK,Watermark Level Selection" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--3. 1. "FCOUNT,Result FIFO Counter"
rgroup.long 0xF0++0x3
line.long 0x0 "GCC0,Gain Calibration Control"
bitfld.long 0x0 24. "RDY,Gain Calibration Value Valid" "0: The GAIN_CAL value is invalid. Run the hardware..,1: The GAIN_CAL value is valid. GAIN_CAL should be.."
hexmask.long.word 0x0 0.--15. 1. "GAIN_CAL,Gain Calibration Value"
group.long 0xF8++0x3
line.long 0x0 "GCR0,Gain Calculation Result"
bitfld.long 0x0 24. "RDY,Gain Calculation Ready" "0: The GCALR value is invalid.,1: The GCALR value is valid."
hexmask.long.tbyte 0x0 0.--16. 1. "GCALR,Gain Calculation Result"
group.long 0x100++0x37
line.long 0x0 "CMDL1,Command Low Buffer Register"
bitfld.long 0x0 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x0 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x0 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x4 "CMDH1,Command High Buffer Register"
bitfld.long 0x4 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x4 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x4 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x4 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x4 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x4 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x4 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x8 "CMDL2,Command Low Buffer Register"
bitfld.long 0x8 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x8 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x8 0.--4. 1. "ADCH,Input Channel Select"
line.long 0xC "CMDH2,Command High Buffer Register"
bitfld.long 0xC 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0xC 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0xC 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0xC 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0xC 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0xC 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0xC 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x10 "CMDL3,Command Low Buffer Register"
bitfld.long 0x10 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x10 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x10 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x14 "CMDH3,Command High Buffer Register"
bitfld.long 0x14 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x14 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x14 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x14 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x14 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x14 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x14 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x18 "CMDL4,Command Low Buffer Register"
bitfld.long 0x18 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x18 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x18 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x1C "CMDH4,Command High Buffer Register"
bitfld.long 0x1C 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x1C 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x1C 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x1C 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x1C 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x1C 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x1C 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x20 "CMDL5,Command Low Buffer Register"
bitfld.long 0x20 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x20 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x20 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x24 "CMDH5,Command High Buffer Register"
bitfld.long 0x24 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x24 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x24 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x24 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x24 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x24 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x24 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x28 "CMDL6,Command Low Buffer Register"
bitfld.long 0x28 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x28 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x28 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x2C "CMDH6,Command High Buffer Register"
bitfld.long 0x2C 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x2C 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x2C 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x2C 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x2C 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x2C 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x2C 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x30 "CMDL7,Command Low Buffer Register"
bitfld.long 0x30 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x30 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x30 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x34 "CMDH7,Command High Buffer Register"
bitfld.long 0x34 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x34 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x34 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x34 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x34 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x34 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x34 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
repeat 7. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x200)++0x3
line.long 0x0 "CV$1,Compare Value Register"
hexmask.long.word 0x0 16.--31. 1. "CVH,Compare Value High"
hexmask.long.word 0x0 0.--15. 1. "CVL,Compare Value Low"
repeat.end
rgroup.long 0x300++0x3
line.long 0x0 "RESFIFO0,Data Result FIFO Register"
bitfld.long 0x0 31. "VALID,FIFO Entry is Valid" "0: FIFO is empty. Discard any read from RESFIFO.,1: FIFO record read from RESFIFO is valid."
bitfld.long 0x0 24.--26. "CMDSRC,Command Buffer Source" "0: Not a valid value CMDSRC value for a dataword in..,1: CMD1 buffer used as control settings for this..,2: Corresponding command buffer used as control..,3: Corresponding command buffer used as control..,4: Corresponding command buffer used as control..,5: Corresponding command buffer used as control..,6: Corresponding command buffer used as control..,7: CMD7 buffer used as control settings for this.."
newline
hexmask.long.byte 0x0 20.--23. 1. "LOOPCNT,Loop Count Value"
bitfld.long 0x0 16.--17. "TSRC,Trigger Source" "0: Trigger source 0 initiated this conversion.,1: Trigger source 1 initiated this conversion.,2: Trigger source 2 initiated this conversion.,3: Trigger source 3 initiated this conversion."
newline
hexmask.long.word 0x0 0.--15. 1. "D,Data Result"
repeat 34. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x400)++0x3
line.long 0x0 "CAL_GAR[$1],Calibration General A-Side Registers"
hexmask.long.word 0x0 0.--15. 1. "CAL_GAR_VAL,Calibration General A Side Register Element"
repeat.end
group.long 0xFF8++0x3
line.long 0x0 "CFG2,Configuration 2 Register"
bitfld.long 0x0 12.--13. "TUNE,Tune Mode register" "0,1,2,3"
bitfld.long 0x0 10. "HSEXTRA,High Speed Extra register" "0: No extra cycle added,1: Extra cycle added"
newline
bitfld.long 0x0 9. "HS,High Speed Enable register" "0: High speed conversion mode disabled,1: High speed conversion mode enabled"
bitfld.long 0x0 8. "JLEFT,Justified Left Enable register" "0,1"
tree.end
endif
sif (cpuis("MC?A156*"))
tree "ADC1"
base ad:0x400B0000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID Register"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
bitfld.long 0x0 12.--14. "NUM_FIFO,Number of FIFOs" "0: N/A,1: This design supports one result FIFO.,2: This design supports two result FIFOs.,3: This design supports three result FIFOs.,4: This design supports four result FIFOs.,?,?,?"
bitfld.long 0x0 11. "NUM_SEC,Number of Single Ended Outputs Supported" "0: This design supports one single ended conversion..,1: This design supports two simultaneous single.."
newline
bitfld.long 0x0 10. "CALOFSI,Calibration Function Implemented" "0: Calibration Not Implemented.,1: Calibration Implemented."
bitfld.long 0x0 9. "IADCKI,Internal ADC Clock Implemented" "0: Internal clock source not implemented.,1: Internal clock source (and CFG[ADCKEN]).."
newline
bitfld.long 0x0 8. "VR1RNGI,Voltage Reference 1 Range Control Bit Implemented" "0: Range control not required. CFG[VREF1RNG] is not..,1: Range control required. CFG[VREF1RNG] is.."
bitfld.long 0x0 4.--6. "CSW,Channel Scale Width" "0: Channel scaling not supported.,1: Channel scaling supported. 1-bit CSCALE control..,?,?,?,?,6: Channel scaling supported. 6-bit CSCALE control..,?"
newline
bitfld.long 0x0 3. "MVI,Multi Vref Implemented" "0: Single voltage reference high (VREFH) input..,1: Multiple voltage reference high (VREFH) inputs.."
bitfld.long 0x0 1. "DIFFEN,Differential Supported" "0: Differential operation not supported.,1: Differential operation supported."
newline
bitfld.long 0x0 0. "RES,Resolution" "0: Up to 12-bit single ended resolution supported..,1: Up to 16-bit single ended resolution supported.."
line.long 0x4 "PARAM,Parameter Register"
hexmask.long.byte 0x4 24.--31. 1. "CMD_NUM,Command Buffer Number"
hexmask.long.byte 0x4 16.--23. 1. "CV_NUM,Compare Value Number"
newline
hexmask.long.byte 0x4 8.--15. 1. "FIFOSIZE,Result FIFO Depth"
hexmask.long.byte 0x4 0.--7. 1. "TRIG_NUM,Trigger Number"
group.long 0x10++0x17
line.long 0x0 "CTRL,Control Register"
hexmask.long.byte 0x0 16.--19. 1. "CAL_AVGS,Auto-Calibration Averages"
bitfld.long 0x0 8. "RSTFIFO0,Reset FIFO 0" "0: No effect.,1: FIFO 0 is reset."
newline
bitfld.long 0x0 6. "CALHS,High Speed Mode Trim Request" "0: No request for high speed mode trim has been made,1: Request for high speed mode trim has been made"
bitfld.long 0x0 4. "CALOFS,Offset Calibration Request" "0: No request for offset calibration has been made,1: Request for offset calibration function"
newline
bitfld.long 0x0 3. "CAL_REQ,Auto-Calibration Request" "0: No request for hardware calibration has been made,1: A request for hardware calibration has been made"
bitfld.long 0x0 2. "DOZEN,Doze Enable" "0: ADC is enabled in low power mode.,1: ADC is disabled in low power mode."
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: ADC logic is not reset.,1: ADC logic is reset."
bitfld.long 0x0 0. "ADCEN,ADC Enable" "0: ADC is disabled.,1: ADC is enabled."
line.long 0x4 "STAT,Status Register"
rbitfld.long 0x4 24.--26. "CMDACT,Command Active" "0: No command is currently in progress.,1: Command 1 currently being executed.,2: Command 2 currently being executed.,3: Associated command number is currently being..,4: Associated command number is currently being..,5: Associated command number is currently being..,6: Associated command number is currently being..,7: Associated command number is currently being.."
rbitfld.long 0x4 16.--17. "TRGACT,Trigger Active" "0: Command (sequence) associated with Trigger 0..,1: Command (sequence) associated with Trigger 1..,2: Command (sequence) associated with Trigger 2..,3: Command (sequence) associated with Trigger 3.."
newline
rbitfld.long 0x4 11. "ADC_ACTIVE,ADC Active" "0: The ADC is IDLE. There are no pending triggers..,1: The ADC is processing a conversion running.."
rbitfld.long 0x4 10. "CAL_RDY,Calibration Ready" "0: Calibration is incomplete or hasn't been ran.,1: The ADC is calibrated."
newline
eventfld.long 0x4 9. "TCOMP_INT,Interrupt Flag For Trigger Completion" "0: Either IE[TCOMP_IE] is set to 0 or no trigger..,1: Trigger sequence has been completed and all data.."
eventfld.long 0x4 8. "TEXC_INT,Interrupt Flag For High Priority Trigger Exception" "0: No trigger exceptions have occurred.,1: A trigger exception has occurred and is pending.."
newline
eventfld.long 0x4 1. "FOF0,Result FIFO 0 Overflow Flag" "0: No result FIFO 0 overflow has occurred since the..,1: At least one result FIFO 0 overflow has occurred.."
rbitfld.long 0x4 0. "RDY0,Result FIFO 0 Ready Flag" "0: Result FIFO 0 data level not above watermark..,1: Result FIFO 0 holding data above watermark level."
line.long 0x8 "IE,Interrupt Enable Register"
hexmask.long.byte 0x8 16.--19. 1. "TCOMP_IE,Trigger Completion Interrupt Enable"
bitfld.long 0x8 8. "TEXC_IE,Trigger Exception Interrupt Enable" "0: Trigger exception interrupts are disabled.,1: Trigger exception interrupts are enabled."
newline
bitfld.long 0x8 1. "FOFIE0,Result FIFO 0 Overflow Interrupt Enable" "0: FIFO 0 overflow interrupts are not enabled.,1: FIFO 0 overflow interrupts are enabled."
bitfld.long 0x8 0. "FWMIE0,FIFO 0 Watermark Interrupt Enable" "0: FIFO 0 watermark interrupts are not enabled.,1: FIFO 0 watermark interrupts are enabled."
line.long 0xC "DE,DMA Enable Register"
bitfld.long 0xC 0. "FWMDE0,FIFO 0 Watermark DMA Enable" "0: DMA request disabled.,1: DMA request enabled."
line.long 0x10 "CFG,Configuration Register"
bitfld.long 0x10 28. "PWREN,ADC Analog Pre-Enable" "0: ADC analog circuits are only enabled while..,1: ADC analog circuits are pre-enabled and ready to.."
hexmask.long.byte 0x10 16.--23. 1. "PUDLY,Power Up Delay"
newline
bitfld.long 0x10 10. "HPT_EXDI,High Priority Trigger Exception Disable" "0: High priority trigger exceptions are enabled.,1: High priority trigger exceptions are disabled."
bitfld.long 0x10 9. "TCMDRES,Trigger Command Resume" "0: Trigger sequences interrupted by a high priority..,1: Trigger sequences interrupted by a high priority.."
newline
bitfld.long 0x10 8. "TRES,Trigger Resume Enable" "0: Trigger sequences interrupted by a high priority..,1: Trigger sequences interrupted by a high priority.."
bitfld.long 0x10 6.--7. "REFSEL,Voltage Reference Selection" "0: (Default) Option 1 setting.,1: Option 2 setting.,2: Option 3 setting.,?"
newline
bitfld.long 0x10 5. "PWRSEL,Power Configuration Select" "0: Low power,1: High power"
bitfld.long 0x10 0.--1. "TPRICTRL,ADC Trigger Priority Control" "0: If a higher priority trigger is detected during..,1: If a higher priority trigger is received during..,2: If a higher priority trigger is received during..,?"
line.long 0x14 "PAUSE,Pause Register"
bitfld.long 0x14 31. "PAUSEEN,PAUSE Option Enable" "0: Pause operation disabled,1: Pause operation enabled"
hexmask.long.word 0x14 0.--8. 1. "PAUSEDLY,Pause Delay"
group.long 0x34++0x7
line.long 0x0 "SWTRIG,Software Trigger Register"
bitfld.long 0x0 3. "SWT3,Software Trigger 3 Event" "0: No trigger 3 event generated.,1: Trigger 3 event generated."
bitfld.long 0x0 2. "SWT2,Software Trigger 2 Event" "0: No trigger 2 event generated.,1: Trigger 2 event generated."
newline
bitfld.long 0x0 1. "SWT1,Software Trigger 1 Event" "0: No trigger 1 event generated.,1: Trigger 1 event generated."
bitfld.long 0x0 0. "SWT0,Software Trigger 0 Event" "0: No trigger 0 event generated.,1: Trigger 0 event generated."
line.long 0x4 "TSTAT,Trigger Status Register"
hexmask.long.byte 0x4 16.--19. 1. "TCOMP_FLAG,Trigger Completion Flag"
hexmask.long.byte 0x4 0.--3. 1. "TEXC_NUM,Trigger Exception Number"
group.long 0x40++0x3
line.long 0x0 "OFSTRIM,Offset Trim Register"
hexmask.long.word 0x0 0.--9. 1. "OFSTRIM,Trim for Offset"
group.long 0x48++0x3
line.long 0x0 "HSTRIM,High Speed Trim Register"
hexmask.long.byte 0x0 0.--4. 1. "HSTRIM,Trim for High Speed Conversions"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0xA0)++0x3
line.long 0x0 "TCTRL[$1],Trigger Control Register"
bitfld.long 0x0 24.--26. "TCMD,Trigger Command Select" "0: Not a valid selection from the command buffer.,1: CMD1 is executed,2: Corresponding CMD is executed,3: Corresponding CMD is executed,4: Corresponding CMD is executed,5: Corresponding CMD is executed,6: Corresponding CMD is executed,7: CMD7 is executed"
bitfld.long 0x0 23. "TSYNC,Trigger Synchronous Select" "0,1"
newline
hexmask.long.byte 0x0 16.--19. 1. "TDLY,Trigger Delay Select"
bitfld.long 0x0 15. "RSYNC,Trigger Resync" "0,1"
newline
bitfld.long 0x0 8.--9. "TPRI,Trigger Priority Setting" "0: Set to highest priority Level 1,1: Set to corresponding priority level,2: Set to corresponding priority level,3: Set to lowest priority Level 4"
bitfld.long 0x0 0. "HTEN,Trigger Enable" "0: Hardware trigger source disabled,1: Hardware trigger source enabled"
repeat.end
group.long 0xE0++0x3
line.long 0x0 "FCTRL0,FIFO Control Register"
bitfld.long 0x0 16.--18. "FWMARK,Watermark Level Selection" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--3. 1. "FCOUNT,Result FIFO Counter"
rgroup.long 0xF0++0x3
line.long 0x0 "GCC0,Gain Calibration Control"
bitfld.long 0x0 24. "RDY,Gain Calibration Value Valid" "0: The GAIN_CAL value is invalid. Run the hardware..,1: The GAIN_CAL value is valid. GAIN_CAL should be.."
hexmask.long.word 0x0 0.--15. 1. "GAIN_CAL,Gain Calibration Value"
group.long 0xF8++0x3
line.long 0x0 "GCR0,Gain Calculation Result"
bitfld.long 0x0 24. "RDY,Gain Calculation Ready" "0: The GCALR value is invalid.,1: The GCALR value is valid."
hexmask.long.tbyte 0x0 0.--16. 1. "GCALR,Gain Calculation Result"
group.long 0x100++0x37
line.long 0x0 "CMDL1,Command Low Buffer Register"
bitfld.long 0x0 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x0 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x0 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x4 "CMDH1,Command High Buffer Register"
bitfld.long 0x4 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x4 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x4 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x4 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x4 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x4 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x4 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x8 "CMDL2,Command Low Buffer Register"
bitfld.long 0x8 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x8 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x8 0.--4. 1. "ADCH,Input Channel Select"
line.long 0xC "CMDH2,Command High Buffer Register"
bitfld.long 0xC 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0xC 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0xC 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0xC 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0xC 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0xC 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0xC 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x10 "CMDL3,Command Low Buffer Register"
bitfld.long 0x10 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x10 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x10 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x14 "CMDH3,Command High Buffer Register"
bitfld.long 0x14 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x14 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x14 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x14 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x14 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x14 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x14 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x18 "CMDL4,Command Low Buffer Register"
bitfld.long 0x18 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x18 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x18 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x1C "CMDH4,Command High Buffer Register"
bitfld.long 0x1C 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x1C 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x1C 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x1C 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x1C 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x1C 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x1C 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x20 "CMDL5,Command Low Buffer Register"
bitfld.long 0x20 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x20 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x20 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x24 "CMDH5,Command High Buffer Register"
bitfld.long 0x24 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x24 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x24 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x24 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x24 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x24 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x24 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x28 "CMDL6,Command Low Buffer Register"
bitfld.long 0x28 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x28 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x28 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x2C "CMDH6,Command High Buffer Register"
bitfld.long 0x2C 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x2C 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x2C 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x2C 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x2C 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x2C 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x2C 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
line.long 0x30 "CMDL7,Command Low Buffer Register"
bitfld.long 0x30 7. "MODE,Select Resolution of Conversions" "0: Standard resolution. Single-ended 12-bit..,1: High resolution. Single-ended 16-bit conversion."
rbitfld.long 0x30 5.--6. "CTYPE,Conversion Type" "0: Single-Ended Mode. Only A side channel is..,?,?,?"
newline
hexmask.long.byte 0x30 0.--4. 1. "ADCH,Input Channel Select"
line.long 0x34 "CMDH7,Command High Buffer Register"
bitfld.long 0x34 24.--26. "NEXT,Next Command Select" "0: No next command defined. Terminate conversions..,1: Select CMD1 command buffer register as next..,2: Select corresponding CMD command buffer register..,3: Select corresponding CMD command buffer register..,4: Select corresponding CMD command buffer register..,5: Select corresponding CMD command buffer register..,6: Select corresponding CMD command buffer register..,7: Select CMD7 command buffer register as next.."
hexmask.long.byte 0x34 16.--19. 1. "LOOP,Loop Count Select"
newline
hexmask.long.byte 0x34 12.--15. 1. "AVGS,Hardware Average Select"
bitfld.long 0x34 8.--10. "STS,Sample Time Select" "0: Minimum sample time of 3.5 ADCK cycles.,1: 3.5 + 21 ADCK cycles; 5.5 ADCK cycles total..,2: 3.5 + 22 ADCK cycles; 7.5 ADCK cycles total..,3: 3.5 + 23 ADCK cycles; 11.5 ADCK cycles total..,4: 3.5 + 24 ADCK cycles; 19.5 ADCK cycles total..,5: 3.5 + 25 ADCK cycles; 35.5 ADCK cycles total..,6: 3.5 + 26 ADCK cycles; 67.5 ADCK cycles total..,7: 3.5 + 27 ADCK cycles; 131.5 ADCK cycles total.."
newline
bitfld.long 0x34 7. "LWI,Loop with Increment" "0: Auto channel increment disabled,1: Auto channel increment enabled"
bitfld.long 0x34 2. "WAIT_TRIG,Wait for Trigger Assertion before Execution." "0: This command will be automatically executed.,1: The active trigger must be asserted again before.."
newline
bitfld.long 0x34 0.--1. "CMPEN,Compare Function Enable" "0: Compare disabled.,?,2: Compare enabled. Store on true.,3: Compare enabled. Repeat channel acquisition.."
repeat 7. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x200)++0x3
line.long 0x0 "CV$1,Compare Value Register"
hexmask.long.word 0x0 16.--31. 1. "CVH,Compare Value High"
hexmask.long.word 0x0 0.--15. 1. "CVL,Compare Value Low"
repeat.end
rgroup.long 0x300++0x3
line.long 0x0 "RESFIFO0,Data Result FIFO Register"
bitfld.long 0x0 31. "VALID,FIFO Entry is Valid" "0: FIFO is empty. Discard any read from RESFIFO.,1: FIFO record read from RESFIFO is valid."
bitfld.long 0x0 24.--26. "CMDSRC,Command Buffer Source" "0: Not a valid value CMDSRC value for a dataword in..,1: CMD1 buffer used as control settings for this..,2: Corresponding command buffer used as control..,3: Corresponding command buffer used as control..,4: Corresponding command buffer used as control..,5: Corresponding command buffer used as control..,6: Corresponding command buffer used as control..,7: CMD7 buffer used as control settings for this.."
newline
hexmask.long.byte 0x0 20.--23. 1. "LOOPCNT,Loop Count Value"
bitfld.long 0x0 16.--17. "TSRC,Trigger Source" "0: Trigger source 0 initiated this conversion.,1: Trigger source 1 initiated this conversion.,2: Trigger source 2 initiated this conversion.,3: Trigger source 3 initiated this conversion."
newline
hexmask.long.word 0x0 0.--15. 1. "D,Data Result"
repeat 34. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x400)++0x3
line.long 0x0 "CAL_GAR[$1],Calibration General A-Side Registers"
hexmask.long.word 0x0 0.--15. 1. "CAL_GAR_VAL,Calibration General A Side Register Element"
repeat.end
group.long 0xFF8++0x3
line.long 0x0 "CFG2,Configuration 2 Register"
bitfld.long 0x0 12.--13. "TUNE,Tune Mode register" "0,1,2,3"
bitfld.long 0x0 10. "HSEXTRA,High Speed Extra register" "0: No extra cycle added,1: Extra cycle added"
newline
bitfld.long 0x0 9. "HS,High Speed Enable register" "0: High speed conversion mode disabled,1: High speed conversion mode enabled"
bitfld.long 0x0 8. "JLEFT,Justified Left Enable register" "0,1"
tree.end
endif
tree.end
tree "I3C (Improved Inter-Integrated Circuit)"
base ad:0x40002000
group.long 0x0++0x17
line.long 0x0 "MCONFIG,Controller Configuration"
hexmask.long.byte 0x0 28.--31. 1. "I2CBAUD,I2C Baud Rate"
bitfld.long 0x0 25.--27. "SKEW,Skew" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 24. "ODHPP,Open Drain High Push-Pull" "0: ODHPP disabled. Open-Drain SCL High half-clock..,1: ODHPP enabled. Open-Drain High SCL half-lock.."
hexmask.long.byte 0x0 16.--23. 1. "ODBAUD,Open Drain Baud Rate"
newline
hexmask.long.byte 0x0 12.--15. 1. "PPLOW,Push-Pull Low"
hexmask.long.byte 0x0 8.--11. 1. "PPBAUD,Push-Pull Baud Rate"
newline
bitfld.long 0x0 6. "ODSTOP,Open Drain Stop" "0: Disable open-drain stop. ODSTOP must be disabled..,1: Enable open-drain stop. STOP is emitted at.."
bitfld.long 0x0 4.--5. "HKEEP,High-Keeper" "0: NONE,1: WIRED_IN,2: PASSIVE_SDA,3: PASSIVE_ON_SDA_SCL"
newline
bitfld.long 0x0 3. "DISTO,Disable Timeout" "0: Timeout enabled,1: Timeout disabled if timeout is configured"
bitfld.long 0x0 0.--1. "MSTENA,Controller Enable" "0: CONTROLLER_OFF,1: CONTROLLER_ON,2: CONTROLLER_CAPABLE,3: I2C_CONTROLLER_MODE"
line.long 0x4 "SCONFIG,Target Configuration"
hexmask.long.byte 0x4 25.--31. 1. "SADDR,Static Address"
hexmask.long.byte 0x4 16.--23. 1. "BAMATCH,Bus Available Match"
newline
bitfld.long 0x4 9. "OFFLINE,Offline" "0: Disable,1: Enables wait to ensure the bus is not in HDR mode."
bitfld.long 0x4 4. "HDROK,HDR OK" "0: Disable HDR OK.,1: Enable HDR OK. Allow HDR-DDR and/or HDR-BT.."
newline
bitfld.long 0x4 3. "S0IGNORE,Ignore TE0/TE1 Errors" "0: Do not ignore TE0/TE1 errors,1: Ignore TE0/TE1 errors. Target does not detect.."
bitfld.long 0x4 2. "MATCHSS,Match START or STOP" "0: Match START or STOP disable,1: Match START or STOP enable. START and STOP.."
newline
bitfld.long 0x4 1. "NACK,Not Acknowledge" "0: Always NACK disable,1: Always NACK enable. The target rejects all.."
bitfld.long 0x4 0. "SLVENA,Target Enable" "0: Target ignores the I2C or I3C bus,1: Target can operate on the I2C or I3C bus"
line.long 0x8 "SSTATUS,Target Status"
rbitfld.long 0x8 30.--31. "TIMECTRL,Time Control" "0: NO_TIME_CONTROL,1: SYNC_MODE,2: ASYNC_MODE,3: BOTHSYNCASYNC"
rbitfld.long 0x8 28.--29. "ACTSTATE,Activity State from Common Command Codes (CCC)" "0: NO_LATENCY,1: LATENCY_1MS,2: LATENCY_100MS,3: LATENCY_10S"
newline
rbitfld.long 0x8 27. "HJDIS,Hot-Join Disabled" "0: Hot-Join not disabled,1: Hot-Join disabled"
rbitfld.long 0x8 25. "MRDIS,Controller Requests Are Disabled" "0: Controller Requests not disabled,1: Controller Requests disabled"
newline
rbitfld.long 0x8 24. "IBIDIS,In-Band Interrupts Are Disabled" "0: In-Band Interrupts not disabled,1: In-Band Interrupts disabled"
rbitfld.long 0x8 20.--21. "EVDET,Event Details" "0: NONE,1: NO_REQUEST,2: NACKED,3: ACKED"
newline
eventfld.long 0x8 18. "EVENT,Event" "0: No event has occurred.,1: An IBI CR or HJ has occurred."
eventfld.long 0x8 17. "CHANDLED,Common Command Code Handled" "0: CCC handling not in progress.,1: CCC handling in progress."
newline
eventfld.long 0x8 16. "HDRMATCH,High Data Rate Command Match" "0: HDR command did not match.,1: HDR command matched the I3C Dynamic Address of.."
rbitfld.long 0x8 15. "ERRWARN,Error Warning" "0,1"
newline
eventfld.long 0x8 14. "CCC,Common Command Code" "0: No CCC received.,1: CCC received."
eventfld.long 0x8 13. "DACHG,Dynamic Address Change" "0: No DA change detected.,1: DA change detected. The target DA has been.."
newline
rbitfld.long 0x8 12. "TXNOTFULL,Transmit Buffer Is Not Full" "0: Transmit buffer full,1: Transmit buffer not full"
rbitfld.long 0x8 11. "RX_PEND,Received Message Pending" "0: No received message is pending.,1: Received message is pending."
newline
eventfld.long 0x8 10. "STOP,Stop" "0: No STOP detected.,1: Stopped state detected. A STOP state was present.."
eventfld.long 0x8 9. "MATCHED,Matched" "0: No header matched.,1: An incoming header matched the I3C Dynamic or.."
newline
eventfld.long 0x8 8. "START,Start" "0: No START seen.,1: A START or repeated START was seen after the.."
rbitfld.long 0x8 6. "STHDR,Status High Data Rate" "0: I3C bus not in HDR-DDR mode,1: The I3C bus is in HDR-DDR mode regardless of.."
newline
rbitfld.long 0x8 5. "STDAA,Status Dynamic Address Assignment" "0: Not in ENTDAA mode.,1: I3C bus is in Enter Dynamic Address Assignment.."
rbitfld.long 0x8 4. "STREQWR,Status Request Write" "0: REQ in process is not SDR write data from the..,1: REQ in process is SDR write data from the.."
newline
rbitfld.long 0x8 3. "STREQRD,Status Request Read" "0: REQ in process is not an SDR read from this..,1: The REQ in process is an SDR read from this.."
rbitfld.long 0x8 2. "STCCCH,Status Common Command Code Handler" "0: No CCC message is being handled.,1: A CCC message is being handled automatically."
newline
rbitfld.long 0x8 1. "STMSG,Status message" "0: Bus target not listening or responding.,1: This bus target is listening to the bus traffic.."
rbitfld.long 0x8 0. "STNOTSTOP,Status Not Stop" "0: I3C module is in a STOP condition.,1: The bus is busy (has activity)."
line.long 0xC "SCTRL,Target Control"
hexmask.long.byte 0xC 24.--31. 1. "VENDINFO,Vendor Information"
bitfld.long 0xC 20.--21. "ACTSTATE,Activity State of Target" "0,1,2,3"
newline
hexmask.long.byte 0xC 16.--19. 1. "PENDINT,Pending Interrupt"
hexmask.long.byte 0xC 8.--15. 1. "IBIDATA,In-Band Interrupt Data"
newline
bitfld.long 0xC 3. "EXTDATA,Extended Data" "0: Extended data disabled.,1: Extended data enabled. After IBIDATA is emitted.."
bitfld.long 0xC 0.--1. "EVENT,Event" "0: NORMAL_MODE,1: IBI,2: CONTROLLER_REQUEST,3: HOT_JOIN_REQUEST"
line.long 0x10 "SINTSET,Target Interrupt Set"
bitfld.long 0x10 18. "EVENT,Event Interrupt Enable" "0: Disable Event interrupt,1: Enable Event interrupt"
bitfld.long 0x10 17. "CHANDLED,Common Command Code (CCC) Interrupt Enable" "0: Disable CCC Handled interrupt,1: Enable CCC Handled interrupt"
newline
bitfld.long 0x10 16. "DDRMATCHED,Double Data Rate Interrupt Enable" "0: Disable DDR interrupt,1: Enable DDR interrupt"
bitfld.long 0x10 15. "ERRWARN,Error or Warning Interrupt Enable" "0: Disable error or warning interrupt,1: Enable error or warning interrupt"
newline
bitfld.long 0x10 14. "CCC,Common Command Code (CCC) Interrupt Enable" "0: Disable CCC interrupt,1: Enable CCC interrupt"
bitfld.long 0x10 13. "DACHG,Dynamic Address Change Interrupt Enable" "0: Disable DA Change interrupt,1: Enable DA Change interrupt"
newline
bitfld.long 0x10 12. "TXSEND,Transmit Interrupt Enable" "0: Disable Transmit interrupt,1: Enable Transmit interrupt"
bitfld.long 0x10 11. "RXPEND,Receive Interrupt Enable" "0: Disable Receive interrupt,1: Enable Receive interrupt"
newline
bitfld.long 0x10 10. "STOP,Stop Interrupt Enable" "0: Disable STOP interrupt,1: Enable STOP interrupt"
bitfld.long 0x10 9. "MATCHED,Match Interrupt Enable" "0: Disable match interrupt,1: Enable match interrupt"
newline
bitfld.long 0x10 8. "START,Start Interrupt Enable" "0: Disable START interrupt,1: Enable START interrupt"
line.long 0x14 "SINTCLR,Target Interrupt Clear"
eventfld.long 0x14 18. "EVENT,EVENT Interrupt Enable Clear" "0,1"
eventfld.long 0x14 17. "CHANDLED,CHANDLED Interrupt Enable Clear" "0,1"
newline
eventfld.long 0x14 16. "DDRMATCHED,DDRMATCHED Interrupt Enable Clear" "0,1"
eventfld.long 0x14 15. "ERRWARN,ERRWARN Interrupt Enable Clear" "0,1"
newline
eventfld.long 0x14 14. "CCC,CCC Interrupt Enable Clear" "0,1"
eventfld.long 0x14 13. "DACHG,DACHG Interrupt Enable Clear" "0,1"
newline
eventfld.long 0x14 12. "TXSEND,TXSEND Interrupt Enable Clear" "0,1"
eventfld.long 0x14 11. "RXPEND,RXPEND Interrupt Enable Clear" "0,1"
newline
eventfld.long 0x14 10. "STOP,STOP Interrupt Enable Clear" "0,1"
eventfld.long 0x14 9. "MATCHED,MATCHED Interrupt Enable Clear" "0,1"
newline
eventfld.long 0x14 8. "START,START Interrupt Enable Clear" "0,1"
rgroup.long 0x18++0x3
line.long 0x0 "SINTMASKED,Target Interrupt Mask"
bitfld.long 0x0 18. "EVENT,EVENT Interrupt Mask" "0,1"
bitfld.long 0x0 17. "CHANDLED,CHANDLED Interrupt Mask" "0,1"
newline
bitfld.long 0x0 16. "DDRMATCHED,DDRMATCHED Interrupt Mask" "0,1"
bitfld.long 0x0 15. "ERRWARN,ERRWARN Interrupt Mask" "0,1"
newline
bitfld.long 0x0 14. "CCC,CCC Interrupt Mask" "0,1"
bitfld.long 0x0 13. "DACHG,DACHG Interrupt Mask" "0,1"
newline
bitfld.long 0x0 12. "TXSEND,TXSEND Interrupt Mask" "0,1"
bitfld.long 0x0 11. "RXPEND,RXPEND Interrupt Mask" "0,1"
newline
bitfld.long 0x0 10. "STOP,STOP Interrupt Mask" "0,1"
bitfld.long 0x0 9. "MATCHED,MATCHED Interrupt Mask" "0,1"
newline
bitfld.long 0x0 8. "START,START interrupt mask" "0,1"
group.long 0x1C++0x7
line.long 0x0 "SERRWARN,Target Errors and Warnings"
eventfld.long 0x0 17. "OWRITE,Over-write Error" "0: No Overwrite error,1: Overwrite error"
eventfld.long 0x0 16. "OREAD,Over-read Error" "0: No Over-read error,1: Over-read error"
newline
eventfld.long 0x0 11. "S0S1,TE0 or TE1 Error" "0: No TE0 or TE1 error,1: TE0 or TE1 error"
eventfld.long 0x0 10. "HCRC,HDR-DDR CRC Error" "0: No HDR-DDR CRC error,1: HDR-DDR CRC error"
newline
eventfld.long 0x0 9. "HPAR,HDR Parity Error" "0: No HDR Parity error,1: HDR Parity error"
eventfld.long 0x0 8. "SPAR,SDR Parity Error" "0: No SDR Parity error,1: SDR Parity error"
newline
eventfld.long 0x0 4. "INVSTART,Invalid Start Error" "0: No invalid start error,1: Invalid start error"
eventfld.long 0x0 3. "TERM,Terminated Error" "0: No terminated error,1: Terminated error"
newline
eventfld.long 0x0 2. "URUNNACK,Underrun and Not Acknowledged (NACKED) Error" "0: No underrun and not acknowledged error,1: Underrun and not acknowledged error"
eventfld.long 0x0 1. "URUN,Underrun Error" "0: No underrun error,1: Underrun error"
newline
eventfld.long 0x0 0. "ORUN,Overrun Error" "0: No overrun error,1: Overrun error"
line.long 0x4 "SDMACTRL,Target DMA Control"
bitfld.long 0x4 4.--5. "DMAWIDTH,Width of DMA Operations" "0: Byte,1: Byte,2: Half word (16 bits),?"
bitfld.long 0x4 2.--3. "DMATB,DMA Write (To-bus) Trigger" "0: DMA not used,1: DMA enabled for one frame (ended by DMA or..,2: DMA enabled until turned off,?"
newline
bitfld.long 0x4 0.--1. "DMAFB,DMA Read (From-bus) Trigger" "0: DMA not used,1: DMA is enabled for one frame,2: DMA enabled until turned off,?"
group.long 0x2C++0x3
line.long 0x0 "SDATACTRL,Target Data Control"
rbitfld.long 0x0 31. "RXEMPTY,Receive Is Empty" "0: Not empty,1: Empty"
rbitfld.long 0x0 30. "TXFULL,Transmit Is Full" "0: Not full,1: Full"
newline
hexmask.long.byte 0x0 24.--28. 1. "RXCOUNT,Count of Bytes in Receive"
hexmask.long.byte 0x0 16.--20. 1. "TXCOUNT,Count of Bytes in Transmit"
newline
bitfld.long 0x0 6.--7. "RXTRIG,Receive Trigger Level" "0: Trigger when not empty,1: Trigger when 1/4 or more full,2: Trigger when 1/2 or more full,3: Trigger when 3/4 or more full"
bitfld.long 0x0 4.--5. "TXTRIG,Transmit Trigger Level" "0: Trigger when empty,1: Trigger when 1/4 full or less,2: Trigger when 1/2 full or less,3: Default. Trigger when 1 less than full or less"
newline
bitfld.long 0x0 3. "UNLOCK,Unlock" "0: RXTRIG and TXTRIG fields cannot be changed on a..,1: RXTRIG and TXTRIG fields can be changed on a.."
bitfld.long 0x0 1. "FLUSHFB,Flush the From-bus Buffer or FIFO" "0,1"
newline
bitfld.long 0x0 0. "FLUSHTB,Flush the To-bus Buffer or FIFO" "0,1"
wgroup.long 0x30++0xF
line.long 0x0 "SWDATAB,Target Write Data Byte"
bitfld.long 0x0 16. "END_ALSO,End Also" "0: Not the end. There are more bytes in the message.,1: End. This bit marks the last byte of the message."
bitfld.long 0x0 8. "END,End" "0: Not the end. There are more bytes in the message.,1: End. This bit marks the last byte of the message."
newline
hexmask.long.byte 0x0 0.--7. 1. "DATA,Data"
line.long 0x4 "SWDATABE,Target Write Data Byte End"
hexmask.long.byte 0x4 0.--7. 1. "DATA,Data"
line.long 0x8 "SWDATAH,Target Write Data Half-word"
bitfld.long 0x8 16. "END,End of message" "0: Not the end. There are more bytes in the message.,1: End. This bit marks the last byte of the message."
hexmask.long.byte 0x8 8.--15. 1. "DATA1,Data 1"
newline
hexmask.long.byte 0x8 0.--7. 1. "DATA0,Data 0"
line.long 0xC "SWDATAHE,Target Write Data Half-word End"
hexmask.long.byte 0xC 8.--15. 1. "DATA1,Data 1"
hexmask.long.byte 0xC 0.--7. 1. "DATA0,Data 0"
rgroup.long 0x40++0x3
line.long 0x0 "SRDATAB,Target Read Data Byte"
hexmask.long.byte 0x0 0.--7. 1. "DATA0,Data 0"
rgroup.long 0x48++0x3
line.long 0x0 "SRDATAH,Target Read Data Halfword"
hexmask.long.byte 0x0 8.--15. 1. "MSB,The second byte read from the target"
hexmask.long.byte 0x0 0.--7. 1. "LSB,The first byte read from the target"
wgroup.long 0x54++0x3
line.long 0x0 "SWDATAB1,Target Write Data Byte"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Data"
wgroup.long 0x54++0x3
line.long 0x0 "SWDATAH1,Target Write Data Halfword"
hexmask.long.word 0x0 0.--15. 1. "DATA,Data"
rgroup.long 0x5C++0x7
line.long 0x0 "SCAPABILITIES2,Target Capabilities 2"
bitfld.long 0x0 23. "SSTWR,Target-Target(s)-Tunnel Write Capable" "0: Not write capable,1: Write capable"
bitfld.long 0x0 22. "SSTSUB,Target-Target(s)-Tunnel Subscriber Capable" "0: Not subscriber capable,1: Subscriber capable"
newline
bitfld.long 0x0 21. "AASA,Supports SETAASA" "0: Does not support SETAASA,1: Supports SETAASA"
bitfld.long 0x0 18.--19. "GROUP,Group" "0: Does not supports v1.1 Group addressing,1: Supports one group,2: Supports two groups,3: Supports three groups"
newline
bitfld.long 0x0 17. "SLVRST,Target Reset" "0: Does not support Target Reset,1: Supports Target Reset"
bitfld.long 0x0 9. "IBIXREG,In-Band Interrupt Extended Register" "0: Does not support extended registers for IBIs,1: Supports extended registers for IBIs"
newline
bitfld.long 0x0 8. "IBIEXT,In-Band Interrupt EXTDATA" "0: Does not support IBIEXT,1: Supports IBIEXT"
bitfld.long 0x0 6. "I2CDEVID,I2C Device ID" "0: Does not support I2C device ID,1: Supports I2C device ID"
newline
bitfld.long 0x0 5. "I2CRST,I2C Software Reset" "0: Does not support I2C software reset,1: Supports I2C software reset"
bitfld.long 0x0 4. "I2C10B,I2C 10-bit Address" "0: Does not support 10-bit I2C address,1: Supports 10-bit I2C address"
newline
hexmask.long.byte 0x0 0.--3. 1. "MAPCNT,Map Count"
line.long 0x4 "SCAPABILITIES,Target Capabilities"
bitfld.long 0x4 31. "DMA,Direct Memory Access" "0: Not supported,1: Supported"
bitfld.long 0x4 30. "INT,Interrupts" "0: Not supported,1: Supported"
newline
bitfld.long 0x4 28.--29. "FIFORX,FIFO Receive" "0: Two or three,1: Four,2: Eight,3: 16 or larger"
bitfld.long 0x4 26.--27. "FIFOTX,FIFO Transmit" "0: Two,1: Four,2: Eight,3: 16 or larger"
newline
bitfld.long 0x4 23.--25. "EXTFIFO,External FIFO" "0: No external FIFO is available,1: Standard available or free external FIFO,2: Request track external FIFO,?,?,?,?,?"
bitfld.long 0x4 21. "TIMECTRL,Time Control" "0: No time control enabled,1: At least one time-control type supported"
newline
hexmask.long.byte 0x4 16.--20. 1. "IBI_MR_HJ,In-Band Interrupts Controller Requests Hot-Join Events"
hexmask.long.byte 0x4 12.--15. 1. "CCCHANDLE,Common Command Codes Handling"
newline
bitfld.long 0x4 10.--11. "SADDR,Static Address" "0: No static address,1: Static address is fixed in hardware,2: Hardware controls the static address dynamically..,3: SCONFIG register supplies the static address"
bitfld.long 0x4 9. "MASTER,Controller" "0: Not supported,1: Supported"
newline
bitfld.long 0x4 6.--7. "HDRSUPP,High Data Rate Support" "0: No HDR modes supported,1: Double Data Rate mode supported,?,?"
hexmask.long.byte 0x4 2.--5. 1. "IDREG,ID Register"
newline
bitfld.long 0x4 0.--1. "IDENA,ID 48b Handler" "0: Application,1: Hardware,2: Hardware but the I3C module instance handles ID..,3: A part number register (PARTNO)"
group.long 0x64++0x17
line.long 0x0 "SDYNADDR,Target Dynamic Address"
hexmask.long.word 0x0 16.--31. 1. "KEY,Key"
bitfld.long 0x0 13.--15. "SA10B,10bit Static Address" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 12. "MAPSA,Map a Static Address" "0,1"
hexmask.long.byte 0x0 1.--7. 1. "DADDR,Dynamic Address"
newline
bitfld.long 0x0 0. "DAVALID,Dynamic Address Valid" "0: DANOTASSIGNED: a Dynamic Address is not assigned,1: DAASSIGNED: a Dynamic Address is assigned"
line.long 0x4 "SMAXLIMITS,Target Maximum Limits"
hexmask.long.word 0x4 16.--27. 1. "MAXWR,Maximum Write Length"
hexmask.long.word 0x4 0.--11. 1. "MAXRD,Maximum Read Length"
line.long 0x8 "SIDPARTNO,Target ID Part Number"
hexmask.long 0x8 0.--31. 1. "PARTNO,Part number"
line.long 0xC "SIDEXT,Target ID Extension"
hexmask.long.byte 0xC 16.--23. 1. "BCR,Bus Characteristics Register"
hexmask.long.byte 0xC 8.--15. 1. "DCR,Device Characteristic Register"
line.long 0x10 "SVENDORID,Target Vendor ID"
hexmask.long.word 0x10 0.--14. 1. "VID,Vendor ID"
line.long 0x14 "STCCLOCK,Target Time Control Clock"
hexmask.long.byte 0x14 8.--15. 1. "FREQ,Clock Frequency"
hexmask.long.byte 0x14 0.--7. 1. "ACCURACY,Clock Accuracy"
rgroup.long 0x7C++0x3
line.long 0x0 "SMSGMAPADDR,Target Message Map Address"
hexmask.long.byte 0x0 16.--19. 1. "MAPLASTM2,Matched Previous Index 2"
hexmask.long.byte 0x0 8.--11. 1. "MAPLASTM1,Matched Previous Address Index 1"
newline
bitfld.long 0x0 4. "LASTSTATIC,Last Static Address Matched" "0: I3C dynamic address,1: I2C static address"
hexmask.long.byte 0x0 0.--3. 1. "MAPLAST,Matched Address Index"
group.long 0x80++0x17
line.long 0x0 "MCONFIG_EXT,Controller Extended Configuration"
bitfld.long 0x0 18.--19. "I3C_CASR_DEL,I3C CAS Delay After Repeated START" "0: No Delay,1: Increases SCL clock period by 1/2.,2: Increases SCL clock period by 1.,3: Increases SCL clock period by 1 1/2."
bitfld.long 0x0 16.--17. "I3C_CAS_DEL,I3C CAS Delay after START" "0: No Delay,1: Increases SCL clock period by 1/2.,2: Increases SCL clock period by 1.,3: Increases SCL clock period by 1 1/2."
line.long 0x4 "MCTRL,Controller Control"
hexmask.long.byte 0x4 16.--23. 1. "RDTERM,Read Terminate Counter"
hexmask.long.byte 0x4 9.--15. 1. "ADDR,Address"
newline
bitfld.long 0x4 8. "DIR,Direction" "0: Write,1: Read"
bitfld.long 0x4 6.--7. "IBIRESP,In-Band Interrupt Response" "0: ACK (acknowledge),1: NACK (reject),2: Acknowledge with mandatory byte,3: Manual"
newline
bitfld.long 0x4 4.--5. "TYPE,Bus Type with EmitStartAddr" "0: I3C,1: I2C,2: DDR,?"
bitfld.long 0x4 0.--2. "REQUEST,Request" "0: NONE,1: EMITSTARTADDR,2: EMITSTOP,3: IBIACKNACK,4: PROCESSDAA,?,6: Force Exit and Target Reset,7: AUTOIBI"
line.long 0x8 "MSTATUS,Controller Status"
hexmask.long.byte 0x8 24.--30. 1. "IBIADDR,IBI Address"
eventfld.long 0x8 19. "NOWMASTER,Module Is Now Controller" "0: Module has not become controller,1: Module has become controller"
newline
rbitfld.long 0x8 15. "ERRWARN,Error Or Warning" "0: No error or warning,1: Error or warning"
eventfld.long 0x8 13. "IBIWON,In-Band Interrupt (IBI) Won" "0: No IBI arbitration won,1: IBI arbitration won"
newline
rbitfld.long 0x8 12. "TXNOTFULL,TX Buffer or FIFO Not Full" "0: Receive buffer or FIFO full,1: Receive buffer or FIFO not full"
rbitfld.long 0x8 11. "RXPEND,RXPEND" "0: No receive message pending,1: Receive message pending"
newline
eventfld.long 0x8 10. "COMPLETE,Complete" "0: Not complete,1: Complete"
eventfld.long 0x8 9. "MCTRLDONE,Controller Control Done" "0: Not done,1: Done"
newline
eventfld.long 0x8 8. "SLVSTART,Target Start" "0: Target not requesting START,1: Target requesting START"
rbitfld.long 0x8 6.--7. "IBITYPE,In-Band Interrupt (IBI) Type" "0: NONE,1: In-Band Interrupt,2: Controller Request,3: Hot-Join"
newline
rbitfld.long 0x8 5. "NACKED,Not Acknowledged" "0: Not NACKed,1: NACKed (not acknowledged)"
rbitfld.long 0x8 4. "BETWEEN,Between" "0: Inactive,1: Active"
newline
rbitfld.long 0x8 0.--2. "STATE,State Of The Controller" "0: IDLE,1: SLVREQ,2: MSGSDR,3: NORMACT,4: MSGDDR,5: DAA,6: IBIACK,7: IBIRCV"
line.long 0xC "MIBIRULES,Controller In-band Interrupt Registry and Rules"
bitfld.long 0xC 31. "NOBYTE,No IBI byte" "0: With mandatory IBI byte,1: Without mandatory IBI byte"
bitfld.long 0xC 30. "MSB0,Most Significant Address Bit Is 0" "0: MSB is not 0.,1: For all I3C dynamic addresses MSB is 0."
newline
hexmask.long.byte 0xC 24.--29. 1. "ADDR4,ADDR4"
hexmask.long.byte 0xC 18.--23. 1. "ADDR3,ADDR3"
newline
hexmask.long.byte 0xC 12.--17. 1. "ADDR2,ADDR2"
hexmask.long.byte 0xC 6.--11. 1. "ADDR1,ADDR1"
newline
hexmask.long.byte 0xC 0.--5. 1. "ADDR0,ADDR0"
line.long 0x10 "MINTSET,Controller Interrupt Set"
bitfld.long 0x10 19. "NOWMASTER,Now Controller (now this I3C module is a controller) Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 15. "ERRWARN,Error or Warning (ERRWARN) Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 13. "IBIWON,In-Band Interrupt (IBI) Won Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 12. "TXNOTFULL,Transmit Buffer/FIFO is not full interrupt enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 11. "RXPEND,Receive Pending Interrupt Enable" "0,1"
bitfld.long 0x10 10. "COMPLETE,Completed Message Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 9. "MCTRLDONE,Controller Control Done Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 8. "SLVSTART,Target Start Interrupt Enable" "0: Disable,1: Enable"
line.long 0x14 "MINTCLR,Controller Interrupt Clear"
eventfld.long 0x14 19. "NOWMASTER,NOWCONTROLLER Interrupt Enable Clear" "0: No effect,1: Corresponding interrupt enable becomes 0"
eventfld.long 0x14 15. "ERRWARN,ERRWARN Interrupt Enable Clear" "0: No effect,1: Corresponding interrupt enable becomes 0"
newline
eventfld.long 0x14 13. "IBIWON,IBIWON Interrupt Enable Clear" "0: No effect,1: Corresponding interrupt enable becomes 0"
eventfld.long 0x14 12. "TXNOTFULL,TXNOTFULL Interrupt Enable Clear" "0: No effect,1: Corresponding interrupt enable becomes 0"
newline
eventfld.long 0x14 11. "RXPEND,RXPEND Interrupt Enable Clear" "0: No effect,1: Corresponding interrupt enable becomes 0"
eventfld.long 0x14 10. "COMPLETE,COMPLETE Interrupt Enable Clear" "0: No effect,1: Corresponding interrupt enable becomes 0"
newline
eventfld.long 0x14 9. "MCTRLDONE,MCTRLDONE Interrupt Enable Clear" "0: No effect,1: Corresponding interrupt enable becomes 0"
eventfld.long 0x14 8. "SLVSTART,SLVSTART Interrupt Enable Clear" "0: No effect,1: Corresponding interrupt enable becomes 0"
rgroup.long 0x98++0x3
line.long 0x0 "MINTMASKED,Controller Interrupt Mask"
bitfld.long 0x0 19. "NOWMASTER,NOWCONTROLLER Interrupt Mask" "0: Interrupt not enabled and/or not active,1: Interrupt enabled and active"
bitfld.long 0x0 15. "ERRWARN,ERRWARN Interrupt Mask" "0: Interrupt not enabled and/or not active,1: Interrupt enabled and active"
newline
bitfld.long 0x0 13. "IBIWON,IBIWON Interrupt Mask" "0: Interrupt not enabled and/or not active,1: Interrupt enabled and active"
bitfld.long 0x0 12. "TXNOTFULL,TXNOTFULL Interrupt Mask" "0: Interrupt not enabled and/or not active,1: Interrupt enabled and active"
newline
bitfld.long 0x0 11. "RXPEND,RXPEND Interrupt Mask" "0,1"
bitfld.long 0x0 10. "COMPLETE,COMPLETE Interrupt Mask" "0: Interrupt not enabled and/or not active,1: Interrupt enabled and active"
newline
bitfld.long 0x0 9. "MCTRLDONE,MCTRLDONE Interrupt Mask" "0: Interrupt not enabled and/or not active,1: Interrupt enabled and active"
bitfld.long 0x0 8. "SLVSTART,SLVSTART Interrupt Mask" "0: Interrupt not enabled and/or not active,1: Interrupt enabled and active"
group.long 0x9C++0x7
line.long 0x0 "MERRWARN,Controller Errors and Warnings"
eventfld.long 0x0 20. "TIMEOUT,Timeout Error" "0: No error,1: Error"
eventfld.long 0x0 19. "INVREQ,Invalid Request Error" "0: No error,1: Error"
newline
eventfld.long 0x0 18. "MSGERR,Message Error" "0: No error,1: Error"
eventfld.long 0x0 17. "OWRITE,Over-write Error" "0: No error,1: Error"
newline
eventfld.long 0x0 16. "OREAD,Over-read Error" "0: No error,1: Error"
eventfld.long 0x0 10. "HCRC,High Data Rate CRC Error" "0: No error,1: Error"
newline
eventfld.long 0x0 9. "HPAR,High Data Rate Parity" "0: No error,1: Error"
eventfld.long 0x0 4. "TERM,Terminate Error" "0: No error,1: Error"
newline
eventfld.long 0x0 3. "WRABT,Write Abort Error" "0: No error,1: Error"
eventfld.long 0x0 2. "NACK,Not Acknowledge Error" "0: No error,1: Error"
newline
eventfld.long 0x0 1. "URUN,Underrun error" "0: No error,1: Error"
line.long 0x4 "MDMACTRL,Controller DMA Control"
bitfld.long 0x4 4.--5. "DMAWIDTH,DMA Width" "0: Byte,1: Byte,2: Halfword (16 bits),?"
bitfld.long 0x4 2.--3. "DMATB,DMA To Bus" "0: DMA is not used,1: Enable DMA for one frame (ended by DMA or..,2: Enable DMA until DMA is turned off,?"
newline
bitfld.long 0x4 0.--1. "DMAFB,DMA From Bus" "0: DMA is not used,1: Enable DMA for one frame,2: Enable DMA until DMA is turned off,?"
group.long 0xAC++0x3
line.long 0x0 "MDATACTRL,Controller Data Control"
rbitfld.long 0x0 31. "RXEMPTY,Receive Is Empty" "0: Receive FIFO or buffer is not yet empty.,1: Receive FIFO or buffer is empty."
rbitfld.long 0x0 30. "TXFULL,Transmit Is Full" "0: Transmit FIFO or buffer is not yet full.,1: Transmit FIFO or buffer is full."
newline
hexmask.long.byte 0x0 24.--28. 1. "RXCOUNT,Receive Byte Count"
hexmask.long.byte 0x0 16.--20. 1. "TXCOUNT,Transmit Byte Count"
newline
bitfld.long 0x0 6.--7. "RXTRIG,Receive Trigger Level" "0: Trigger when not empty,1: Trigger when 1/4 full or more,2: Trigger when 1/2 full or more,3: Trigger when 3/4 full or more"
bitfld.long 0x0 4.--5. "TXTRIG,Transmit Trigger Level" "0: Trigger when empty,1: Trigger when 1/4 full or less,2: Trigger when 1/2 full or less,3: Default. Trigger when 1 less than full or less"
newline
bitfld.long 0x0 3. "UNLOCK,Unlock" "0: Locked. RXTRIG and TXTRIG fields cannot be..,1: Unlocked. RXTRIG and TXTRIG fields can be.."
bitfld.long 0x0 1. "FLUSHFB,Flush From-bus Buffer or FIFO" "0: No action,1: Flush the buffer"
newline
bitfld.long 0x0 0. "FLUSHTB,Flush To-bus Buffer or FIFO" "0: No action,1: Flush the buffer"
wgroup.long 0xB0++0xF
line.long 0x0 "MWDATAB,Controller Write Data Byte"
bitfld.long 0x0 16. "END_ALSO,End of Message Also" "0: Not the end. More bytes are assumed to be in the..,1: End. The END bit marks the last byte of the.."
bitfld.long 0x0 8. "END,End of Message" "0: Not the end. More bytes are assumed to be in the..,1: End. The END bit marks the last byte of the.."
newline
hexmask.long.byte 0x0 0.--7. 1. "VALUE,Data Byte"
line.long 0x4 "MWDATABE,Controller Write Data Byte End"
hexmask.long.byte 0x4 0.--7. 1. "VALUE,Data"
line.long 0x8 "MWDATAH,Controller Write Data Halfword"
bitfld.long 0x8 16. "END,End of message" "0: Not the end. More bytes are assumed to be in the..,1: End. The END bit marks the last byte of the.."
hexmask.long.byte 0x8 8.--15. 1. "DATA1,Data Byte 1"
newline
hexmask.long.byte 0x8 0.--7. 1. "DATA0,Data Byte 0"
line.long 0xC "MWDATAHE,Controller Write Data Halfword End"
hexmask.long.byte 0xC 8.--15. 1. "DATA1,Data Byte 1"
hexmask.long.byte 0xC 0.--7. 1. "DATA0,Data Byte 0"
rgroup.long 0xC0++0x3
line.long 0x0 "MRDATAB,Controller Read Data Byte"
hexmask.long.byte 0x0 0.--7. 1. "VALUE,Value"
rgroup.long 0xC8++0x3
line.long 0x0 "MRDATAH,Controller Read Data Halfword"
hexmask.long.byte 0x0 8.--15. 1. "MSB,MSB"
hexmask.long.byte 0x0 0.--7. 1. "LSB,LSB"
wgroup.long 0xCC++0x3
line.long 0x0 "MWDATAB1,Controller Write Byte Data 1(to bus)"
hexmask.long.byte 0x0 0.--7. 1. "VALUE,Value"
wgroup.long 0xCC++0x7
line.long 0x0 "MWDATAH1,Controller Write Halfword Data (to bus)"
hexmask.long.word 0x0 0.--15. 1. "VALUE,Value"
line.long 0x4 "MWMSG_SDR_CONTROL,Controller Write Message Control in SDR mode"
hexmask.long.byte 0x4 11.--15. 1. "LEN,Length"
bitfld.long 0x4 10. "I2C,I2C" "0: I3C message,1: I2C message"
newline
bitfld.long 0x4 8. "END,End of SDR Message" "0: Not the end. SDR message ends waiting for a new..,1: End. SDR message ends at the STOP."
hexmask.long.byte 0x4 1.--7. 1. "ADDR,Address"
newline
bitfld.long 0x4 0. "DIR,Direction" "0: Write,1: Read"
wgroup.long 0xD0++0x3
line.long 0x0 "MWMSG_SDR_DATA,Controller Write Message Data in SDR mode"
hexmask.long.word 0x0 0.--15. 1. "DATA16B,Data"
rgroup.long 0xD4++0x3
line.long 0x0 "MRMSG_SDR,Controller Read Message in SDR mode"
hexmask.long.word 0x0 0.--15. 1. "DATA,Data"
wgroup.long 0xD8++0x3
line.long 0x0 "MWMSG_DDR_CONTROL,Controller Write Message in DDR mode: First Control Word"
hexmask.long.word 0x0 0.--15. 1. "ADDRCMD,Address Command"
wgroup.long 0xD8++0x3
line.long 0x0 "MWMSG_DDR_CONTROL2,Controller Write Message in DDR mode Control 2"
bitfld.long 0x0 14. "END,End of message" "0: Not the end. DDR message ends waiting for a new..,1: End. DDR message ends on HDR Exit."
hexmask.long.word 0x0 0.--9. 1. "LEN,Length of Message"
wgroup.long 0xD8++0x3
line.long 0x0 "MWMSG_DDR_DATA,Controller Write Message Data in DDR mode"
hexmask.long.word 0x0 0.--15. 1. "DATA16B,Data"
rgroup.long 0xDC++0x3
line.long 0x0 "MRMSG_DDR,Controller Read Message in DDR mode"
hexmask.long.word 0x0 0.--15. 1. "DATA,Data"
group.long 0xE4++0x3
line.long 0x0 "MDYNADDR,Controller Dynamic Address"
hexmask.long.byte 0x0 1.--7. 1. "DADDR,Dynamic address"
bitfld.long 0x0 0. "DAVALID,Dynamic address valid" "0: No valid DA assigned,1: Valid DA assigned"
rgroup.long 0x11C++0x3
line.long 0x0 "SMAPCTRL0,Map Feature Control 0"
bitfld.long 0x0 8.--10. "CAUSE,Cause" "0: No information. This value occurs when not..,1: Set using ENTDAA,2: Set using SETDASA SETAASA or SETNEWDA,3: Cleared using RSTDAA,4: Auto MAP change happened last. The change may..,?,?,?"
hexmask.long.byte 0x0 1.--7. 1. "DA,Dynamic Address"
newline
bitfld.long 0x0 0. "ENA,Enable Primary Dynamic Address" "0: Disable,1: Enable"
group.long 0x140++0x7
line.long 0x0 "IBIEXT1,Extended IBI Data 1"
hexmask.long.byte 0x0 24.--31. 1. "EXT3,Extra byte 3"
hexmask.long.byte 0x0 16.--23. 1. "EXT2,Extra byte 2"
newline
hexmask.long.byte 0x0 8.--15. 1. "EXT1,Extra byte 1"
rbitfld.long 0x0 4.--6. "MAX,Maximum" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0.--2. "CNT,Count" "0,1,2,3,4,5,6,7"
line.long 0x4 "IBIEXT2,Extended IBI Data 2"
hexmask.long.byte 0x4 24.--31. 1. "EXT7,Extra byte 7"
hexmask.long.byte 0x4 16.--23. 1. "EXT6,Extra byte 6"
newline
hexmask.long.byte 0x4 8.--15. 1. "EXT5,Extra byte 5"
hexmask.long.byte 0x4 0.--7. 1. "EXT4,Extra byte 4"
rgroup.long 0xFFC++0x3
line.long 0x0 "SID,Target Module ID"
hexmask.long 0x0 0.--31. 1. "ID,ID"
tree.end
tree "INPUTMUX (Input Multiplexing)"
base ad:0x40001000
group.long 0x30++0x3
line.long 0x0 "TIMER0TRIG,Trigger register for TIMER0"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER0"
endif
sif (cpuis("MC?A145*"))
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER0"
newline
endif
sif (cpuis("MC?A146*"))
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER0"
endif
sif (cpuis("MC?A152*"))
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER0"
newline
endif
sif (cpuis("MC?A153*"))
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER0"
endif
sif (cpuis("MC?A154*"))
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER0"
newline
endif
sif (cpuis("MC?A155*"))
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER0"
endif
sif (cpuis("MC?A156*"))
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER0"
endif
group.long 0x50++0x3
line.long 0x0 "TIMER1TRIG,Trigger register for TIMER1"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER0"
endif
sif (cpuis("MC?A145*"))
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER1"
newline
endif
sif (cpuis("MC?A146*"))
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER1"
endif
sif (cpuis("MC?A152*"))
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER0"
newline
endif
sif (cpuis("MC?A153*"))
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER0"
endif
sif (cpuis("MC?A154*"))
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER1"
newline
endif
sif (cpuis("MC?A155*"))
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER1"
endif
sif (cpuis("MC?A156*"))
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER1"
endif
group.long 0x70++0x3
line.long 0x0 "TIMER2TRIG,Trigger register for TIMER2 inputs"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER0"
endif
sif (cpuis("MC?A145*"))
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER2"
newline
endif
sif (cpuis("MC?A146*"))
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER2"
endif
sif (cpuis("MC?A152*"))
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER0"
newline
endif
sif (cpuis("MC?A153*"))
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER0"
endif
sif (cpuis("MC?A154*"))
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER2"
newline
endif
sif (cpuis("MC?A155*"))
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER2"
endif
sif (cpuis("MC?A156*"))
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER2"
endif
group.long 0x180++0x7
line.long 0x0 "FREQMEAS_REF,Selection for frequency measurement reference clock"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x0 0.--4. 1. "INP,Clock source number (binary value) for frequency measure function target clock."
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x0 0.--6. 1. "INP,Clock source number (binary value) for frequency measure function target clock."
newline
endif
sif (cpuis("MC?A145*"))
hexmask.long.byte 0x0 0.--6. 1. "INP,Clock source number (binary value) for frequency measure function target clock."
endif
sif (cpuis("MC?A146*"))
hexmask.long.byte 0x0 0.--6. 1. "INP,Clock source number (binary value) for frequency measure function target clock."
newline
endif
sif (cpuis("MC?A152*"))
hexmask.long.byte 0x0 0.--4. 1. "INP,Clock source number (binary value) for frequency measure function target clock."
endif
sif (cpuis("MC?A153*"))
hexmask.long.byte 0x0 0.--4. 1. "INP,Clock source number (binary value) for frequency measure function target clock."
newline
endif
sif (cpuis("MC?A154*"))
hexmask.long.byte 0x0 0.--6. 1. "INP,Clock source number (binary value) for frequency measure function target clock."
endif
sif (cpuis("MC?A155*"))
hexmask.long.byte 0x0 0.--6. 1. "INP,Clock source number (binary value) for frequency measure function target clock."
newline
endif
sif (cpuis("MC?A156*"))
hexmask.long.byte 0x0 0.--6. 1. "INP,Clock source number (binary value) for frequency measure function target clock."
endif
line.long 0x4 "FREQMEAS_TAR,Selection for frequency measurement reference clock"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x4 0.--4. 1. "INP,Clock source number (binary value) for frequency measure function target clock."
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x4 0.--6. 1. "INP,Clock source number (binary value) for frequency measure function target clock."
newline
endif
sif (cpuis("MC?A145*"))
hexmask.long.byte 0x4 0.--6. 1. "INP,Clock source number (binary value) for frequency measure function target clock."
endif
sif (cpuis("MC?A146*"))
hexmask.long.byte 0x4 0.--6. 1. "INP,Clock source number (binary value) for frequency measure function target clock."
newline
endif
sif (cpuis("MC?A152*"))
hexmask.long.byte 0x4 0.--4. 1. "INP,Clock source number (binary value) for frequency measure function target clock."
endif
sif (cpuis("MC?A153*"))
hexmask.long.byte 0x4 0.--4. 1. "INP,Clock source number (binary value) for frequency measure function target clock."
newline
endif
sif (cpuis("MC?A154*"))
hexmask.long.byte 0x4 0.--6. 1. "INP,Clock source number (binary value) for frequency measure function target clock."
endif
sif (cpuis("MC?A155*"))
hexmask.long.byte 0x4 0.--6. 1. "INP,Clock source number (binary value) for frequency measure function target clock."
newline
endif
sif (cpuis("MC?A156*"))
hexmask.long.byte 0x4 0.--6. 1. "INP,Clock source number (binary value) for frequency measure function target clock."
endif
group.long 0x260++0x3
line.long 0x0 "CMP0_TRIG,CMP0 input connections"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,CMP0 input trigger"
endif
sif (cpuis("MC?A145*"))
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,CMP0 input trigger"
newline
endif
sif (cpuis("MC?A146*"))
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,CMP0 input trigger"
endif
sif (cpuis("MC?A152*"))
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,CMP0 input trigger"
newline
endif
sif (cpuis("MC?A153*"))
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,CMP0 input trigger"
endif
sif (cpuis("MC?A154*"))
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,CMP0 input trigger"
newline
endif
sif (cpuis("MC?A155*"))
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,CMP0 input trigger"
endif
sif (cpuis("MC?A156*"))
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,CMP0 input trigger"
endif
group.long 0x360++0x1F
line.long 0x0 "QDC0_TRIG,QDC0 Trigger Input Connections"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,QDC0 input connections"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x0 0.--6. 1. "INP,QDC0 input connections"
newline
endif
sif (cpuis("MC?A145*"))
hexmask.long.byte 0x0 0.--6. 1. "INP,QDC0 input connections"
endif
sif (cpuis("MC?A146*"))
hexmask.long.byte 0x0 0.--6. 1. "INP,QDC0 input connections"
newline
endif
sif (cpuis("MC?A152*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,QDC0 input connections"
endif
sif (cpuis("MC?A153*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,QDC0 input connections"
newline
endif
sif (cpuis("MC?A154*"))
hexmask.long.byte 0x0 0.--6. 1. "INP,QDC0 input connections"
endif
sif (cpuis("MC?A155*"))
hexmask.long.byte 0x0 0.--6. 1. "INP,QDC0 input connections"
newline
endif
sif (cpuis("MC?A156*"))
hexmask.long.byte 0x0 0.--6. 1. "INP,QDC0 input connections"
endif
line.long 0x4 "QDC0_HOME,QDC0 Trigger Input Connections"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x4 0.--5. 1. "INP,QDC0 input connections"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x4 0.--6. 1. "INP,QDC0 input connections"
newline
endif
sif (cpuis("MC?A145*"))
hexmask.long.byte 0x4 0.--6. 1. "INP,QDC0 input connections"
endif
sif (cpuis("MC?A146*"))
hexmask.long.byte 0x4 0.--6. 1. "INP,QDC0 input connections"
newline
endif
sif (cpuis("MC?A152*"))
hexmask.long.byte 0x4 0.--5. 1. "INP,QDC0 input connections"
endif
sif (cpuis("MC?A153*"))
hexmask.long.byte 0x4 0.--5. 1. "INP,QDC0 input connections"
newline
endif
sif (cpuis("MC?A154*"))
hexmask.long.byte 0x4 0.--6. 1. "INP,QDC0 input connections"
endif
sif (cpuis("MC?A155*"))
hexmask.long.byte 0x4 0.--6. 1. "INP,QDC0 input connections"
newline
endif
sif (cpuis("MC?A156*"))
hexmask.long.byte 0x4 0.--6. 1. "INP,QDC0 input connections"
endif
line.long 0x8 "QDC0_INDEX,QDC0 Trigger Input Connections"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x8 0.--5. 1. "INP,QDC0 input connections"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x8 0.--6. 1. "INP,QDC0 input connections"
newline
endif
sif (cpuis("MC?A145*"))
hexmask.long.byte 0x8 0.--6. 1. "INP,QDC0 input connections"
endif
sif (cpuis("MC?A146*"))
hexmask.long.byte 0x8 0.--6. 1. "INP,QDC0 input connections"
newline
endif
sif (cpuis("MC?A152*"))
hexmask.long.byte 0x8 0.--5. 1. "INP,QDC0 input connections"
endif
sif (cpuis("MC?A153*"))
hexmask.long.byte 0x8 0.--5. 1. "INP,QDC0 input connections"
newline
endif
sif (cpuis("MC?A154*"))
hexmask.long.byte 0x8 0.--6. 1. "INP,QDC0 input connections"
endif
sif (cpuis("MC?A155*"))
hexmask.long.byte 0x8 0.--6. 1. "INP,QDC0 input connections"
newline
endif
sif (cpuis("MC?A156*"))
hexmask.long.byte 0x8 0.--6. 1. "INP,QDC0 input connections"
endif
line.long 0xC "QDC0_PHASEB,QDC0 Trigger Input Connections"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0xC 0.--5. 1. "INP,QDC0 input connections"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0xC 0.--6. 1. "INP,QDC0 input connections"
newline
endif
sif (cpuis("MC?A145*"))
hexmask.long.byte 0xC 0.--6. 1. "INP,QDC0 input connections"
endif
sif (cpuis("MC?A146*"))
hexmask.long.byte 0xC 0.--6. 1. "INP,QDC0 input connections"
newline
endif
sif (cpuis("MC?A152*"))
hexmask.long.byte 0xC 0.--5. 1. "INP,QDC0 input connections"
endif
sif (cpuis("MC?A153*"))
hexmask.long.byte 0xC 0.--5. 1. "INP,QDC0 input connections"
newline
endif
sif (cpuis("MC?A154*"))
hexmask.long.byte 0xC 0.--6. 1. "INP,QDC0 input connections"
endif
sif (cpuis("MC?A155*"))
hexmask.long.byte 0xC 0.--6. 1. "INP,QDC0 input connections"
newline
endif
sif (cpuis("MC?A156*"))
hexmask.long.byte 0xC 0.--6. 1. "INP,QDC0 input connections"
endif
line.long 0x10 "QDC0_PHASEA,QDC0 Trigger Input Connections"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x10 0.--5. 1. "INP,QDC0 input connections"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x10 0.--6. 1. "INP,QDC0 input connections"
newline
endif
sif (cpuis("MC?A145*"))
hexmask.long.byte 0x10 0.--6. 1. "INP,QDC0 input connections"
endif
sif (cpuis("MC?A146*"))
hexmask.long.byte 0x10 0.--6. 1. "INP,QDC0 input connections"
newline
endif
sif (cpuis("MC?A152*"))
hexmask.long.byte 0x10 0.--5. 1. "INP,QDC0 input connections"
endif
sif (cpuis("MC?A153*"))
hexmask.long.byte 0x10 0.--5. 1. "INP,QDC0 input connections"
newline
endif
sif (cpuis("MC?A154*"))
hexmask.long.byte 0x10 0.--6. 1. "INP,QDC0 input connections"
endif
sif (cpuis("MC?A155*"))
hexmask.long.byte 0x10 0.--6. 1. "INP,QDC0 input connections"
newline
endif
sif (cpuis("MC?A156*"))
hexmask.long.byte 0x10 0.--6. 1. "INP,QDC0 input connections"
endif
line.long 0x14 "QDC0_ICAP1,QDC0 Trigger Input Connections"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x14 0.--5. 1. "INP,QDC0 input connections"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x14 0.--6. 1. "INP,QDC0 input connections"
newline
endif
sif (cpuis("MC?A145*"))
hexmask.long.byte 0x14 0.--6. 1. "INP,QDC0 input connections"
endif
sif (cpuis("MC?A146*"))
hexmask.long.byte 0x14 0.--6. 1. "INP,QDC0 input connections"
newline
endif
sif (cpuis("MC?A152*"))
hexmask.long.byte 0x14 0.--5. 1. "INP,QDC0 input connections"
endif
sif (cpuis("MC?A153*"))
hexmask.long.byte 0x14 0.--5. 1. "INP,QDC0 input connections"
newline
endif
sif (cpuis("MC?A154*"))
hexmask.long.byte 0x14 0.--6. 1. "INP,QDC0 input connections"
endif
sif (cpuis("MC?A155*"))
hexmask.long.byte 0x14 0.--6. 1. "INP,QDC0 input connections"
newline
endif
sif (cpuis("MC?A156*"))
hexmask.long.byte 0x14 0.--6. 1. "INP,QDC0 input connections"
endif
line.long 0x18 "QDC0_ICAP2,QDC0 Trigger Input Connections"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x18 0.--5. 1. "INP,QDC0 input connections"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x18 0.--6. 1. "INP,QDC0 input connections"
newline
endif
sif (cpuis("MC?A145*"))
hexmask.long.byte 0x18 0.--6. 1. "INP,QDC0 input connections"
endif
sif (cpuis("MC?A146*"))
hexmask.long.byte 0x18 0.--6. 1. "INP,QDC0 input connections"
newline
endif
sif (cpuis("MC?A152*"))
hexmask.long.byte 0x18 0.--5. 1. "INP,QDC0 input connections"
endif
sif (cpuis("MC?A153*"))
hexmask.long.byte 0x18 0.--5. 1. "INP,QDC0 input connections"
newline
endif
sif (cpuis("MC?A154*"))
hexmask.long.byte 0x18 0.--6. 1. "INP,QDC0 input connections"
endif
sif (cpuis("MC?A155*"))
hexmask.long.byte 0x18 0.--6. 1. "INP,QDC0 input connections"
newline
endif
sif (cpuis("MC?A156*"))
hexmask.long.byte 0x18 0.--6. 1. "INP,QDC0 input connections"
endif
line.long 0x1C "QDC0_ICAP3,QDC0 Trigger Input Connections"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x1C 0.--5. 1. "INP,QDC0 input connections"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x1C 0.--6. 1. "INP,QDC0 input connections"
newline
endif
sif (cpuis("MC?A145*"))
hexmask.long.byte 0x1C 0.--6. 1. "INP,QDC0 input connections"
endif
sif (cpuis("MC?A146*"))
hexmask.long.byte 0x1C 0.--6. 1. "INP,QDC0 input connections"
newline
endif
sif (cpuis("MC?A152*"))
hexmask.long.byte 0x1C 0.--5. 1. "INP,QDC0 input connections"
endif
sif (cpuis("MC?A153*"))
hexmask.long.byte 0x1C 0.--5. 1. "INP,QDC0 input connections"
newline
endif
sif (cpuis("MC?A154*"))
hexmask.long.byte 0x1C 0.--6. 1. "INP,QDC0 input connections"
endif
sif (cpuis("MC?A155*"))
hexmask.long.byte 0x1C 0.--6. 1. "INP,QDC0 input connections"
newline
endif
sif (cpuis("MC?A156*"))
hexmask.long.byte 0x1C 0.--6. 1. "INP,QDC0 input connections"
endif
group.long 0x3A0++0x3
line.long 0x0 "FlexPWM0_SM0_EXTA0,PWM0 input trigger connections"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,Trigger input connections for PWM0"
endif
sif (cpuis("MC?A145*"))
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,EXTA input connections for PWM0"
newline
endif
sif (cpuis("MC?A146*"))
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,EXTA input connections for PWM0"
endif
sif (cpuis("MC?A152*"))
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,Trigger input connections for PWM0"
newline
endif
sif (cpuis("MC?A153*"))
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,Trigger input connections for PWM0"
endif
sif (cpuis("MC?A154*"))
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,EXTA input connections for PWM0"
newline
endif
sif (cpuis("MC?A155*"))
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,EXTA input connections for PWM0"
endif
sif (cpuis("MC?A156*"))
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,EXTA input connections for PWM0"
endif
group.long 0x3D0++0x3
line.long 0x0 "FlexPWM0_FORCE,PWM0 input trigger connections"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,Trigger input connections for PWM0"
endif
sif (cpuis("MC?A145*"))
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,Trigger input connections for PWM0"
newline
endif
sif (cpuis("MC?A146*"))
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,Trigger input connections for PWM0"
endif
sif (cpuis("MC?A152*"))
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,Trigger input connections for PWM0"
newline
endif
sif (cpuis("MC?A153*"))
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,Trigger input connections for PWM0"
endif
sif (cpuis("MC?A154*"))
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,Trigger input connections for PWM0"
newline
endif
sif (cpuis("MC?A155*"))
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,Trigger input connections for PWM0"
endif
sif (cpuis("MC?A156*"))
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,Trigger input connections for PWM0"
endif
group.long 0x420++0x3
line.long 0x0 "PWM0_EXT_CLK,PWM0 external clock trigger"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
bitfld.long 0x0 0.--2. "TRIGIN,Trigger input connections for PWM" "?,1: clk_16k[1] input is selected,2: clk_in input is selected,3: AOI0_OUT0 input is selected,4: AOI0_OUT1 input is selected,5: EXTTRIG_IN0 input is selected,6: EXTTRIG_IN7 input is selected,?"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x0 0.--3. 1. "TRIGIN,Trigger input connections for PWM"
newline
endif
sif (cpuis("MC?A145*"))
hexmask.long.byte 0x0 0.--3. 1. "TRIGIN,Trigger input connections for PWM"
endif
sif (cpuis("MC?A146*"))
hexmask.long.byte 0x0 0.--3. 1. "TRIGIN,Trigger input connections for PWM"
newline
endif
sif (cpuis("MC?A152*"))
bitfld.long 0x0 0.--2. "TRIGIN,Trigger input connections for PWM" "?,1: clk_16k[1] input is selected,2: clk_in input is selected,3: AOI0_OUT0 input is selected,4: AOI0_OUT1 input is selected,5: EXTTRIG_IN0 input is selected,6: EXTTRIG_IN7 input is selected,?"
endif
sif (cpuis("MC?A153*"))
bitfld.long 0x0 0.--2. "TRIGIN,Trigger input connections for PWM" "?,1: clk_16k[1] input is selected,2: clk_in input is selected,3: AOI0_OUT0 input is selected,4: AOI0_OUT1 input is selected,5: EXTTRIG_IN0 input is selected,6: EXTTRIG_IN7 input is selected,?"
newline
endif
sif (cpuis("MC?A154*"))
hexmask.long.byte 0x0 0.--3. 1. "TRIGIN,Trigger input connections for PWM"
endif
sif (cpuis("MC?A155*"))
hexmask.long.byte 0x0 0.--3. 1. "TRIGIN,Trigger input connections for PWM"
newline
endif
sif (cpuis("MC?A156*"))
hexmask.long.byte 0x0 0.--3. 1. "TRIGIN,Trigger input connections for PWM"
endif
group.long 0x480++0x3
line.long 0x0 "USBFS_TRIG,USB-FS trigger input connections"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
bitfld.long 0x0 0.--2. "INP,USB-FS trigger input connections." "?,1: LPUART0 lpuart_trg_txdata input is selected,2: LPUART1 lpuart_trg_txdata input is selected,3: LPUART2 lpuart_trg_txdata input is selected,?,?,?,?"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x0 0.--3. 1. "INP,USB-FS trigger input connections."
newline
endif
sif (cpuis("MC?A145*"))
hexmask.long.byte 0x0 0.--3. 1. "INP,USB-FS trigger input connections."
endif
sif (cpuis("MC?A146*"))
hexmask.long.byte 0x0 0.--3. 1. "INP,USB-FS trigger input connections."
newline
endif
sif (cpuis("MC?A152*"))
bitfld.long 0x0 0.--2. "INP,USB-FS trigger input connections." "?,1: LPUART0 lpuart_trg_txdata input is selected,2: LPUART1 lpuart_trg_txdata input is selected,3: LPUART2 lpuart_trg_txdata input is selected,?,?,?,?"
endif
sif (cpuis("MC?A153*"))
bitfld.long 0x0 0.--2. "INP,USB-FS trigger input connections." "?,1: LPUART0 lpuart_trg_txdata input is selected,2: LPUART1 lpuart_trg_txdata input is selected,3: LPUART2 lpuart_trg_txdata input is selected,?,?,?,?"
newline
endif
sif (cpuis("MC?A154*"))
hexmask.long.byte 0x0 0.--3. 1. "INP,USB-FS trigger input connections."
endif
sif (cpuis("MC?A155*"))
hexmask.long.byte 0x0 0.--3. 1. "INP,USB-FS trigger input connections."
newline
endif
sif (cpuis("MC?A156*"))
hexmask.long.byte 0x0 0.--3. 1. "INP,USB-FS trigger input connections."
endif
group.long 0x4E0++0x3
line.long 0x0 "CMP1_TRIG,CMP1 input connections"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,CMP0 input trigger"
endif
sif (cpuis("MC?A145*"))
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,CMP0 input trigger"
newline
endif
sif (cpuis("MC?A146*"))
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,CMP0 input trigger"
endif
sif (cpuis("MC?A152*"))
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,CMP0 input trigger"
newline
endif
sif (cpuis("MC?A153*"))
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,CMP0 input trigger"
endif
sif (cpuis("MC?A154*"))
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,CMP0 input trigger"
newline
endif
sif (cpuis("MC?A155*"))
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,CMP0 input trigger"
endif
sif (cpuis("MC?A156*"))
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,CMP0 input trigger"
endif
group.long 0x5A0++0x3
line.long 0x0 "LPI2C0_TRIG,LPI2C0 trigger input connections"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPI2C0 trigger input connections"
endif
sif (cpuis("MC?A145*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPI2C0 trigger input connections"
newline
endif
sif (cpuis("MC?A146*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPI2C0 trigger input connections"
endif
sif (cpuis("MC?A152*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPI2C0 trigger input connections"
newline
endif
sif (cpuis("MC?A153*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPI2C0 trigger input connections"
endif
sif (cpuis("MC?A154*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPI2C0 trigger input connections"
newline
endif
sif (cpuis("MC?A155*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPI2C0 trigger input connections"
endif
sif (cpuis("MC?A156*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPI2C0 trigger input connections"
endif
group.long 0x5E0++0x3
line.long 0x0 "LPSPI0_TRIG,LPSPI0 trigger input connections"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPSPI0 trigger input connections"
endif
sif (cpuis("MC?A145*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPSPI0 trigger input connections"
newline
endif
sif (cpuis("MC?A146*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPSPI0 trigger input connections"
endif
sif (cpuis("MC?A152*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPSPI0 trigger input connections"
newline
endif
sif (cpuis("MC?A153*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPSPI0 trigger input connections"
endif
sif (cpuis("MC?A154*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPSPI0 trigger input connections"
newline
endif
sif (cpuis("MC?A155*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPSPI0 trigger input connections"
endif
sif (cpuis("MC?A156*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPSPI0 trigger input connections"
endif
group.long 0x600++0x3
line.long 0x0 "LPSPI1_TRIG,LPSPI1 trigger input connections"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPSPI1 trigger input connections"
endif
sif (cpuis("MC?A145*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPSPI1 trigger input connections"
newline
endif
sif (cpuis("MC?A146*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPSPI1 trigger input connections"
endif
sif (cpuis("MC?A152*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPSPI1 trigger input connections"
newline
endif
sif (cpuis("MC?A153*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPSPI1 trigger input connections"
endif
sif (cpuis("MC?A154*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPSPI1 trigger input connections"
newline
endif
sif (cpuis("MC?A155*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPSPI1 trigger input connections"
endif
sif (cpuis("MC?A156*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPSPI1 trigger input connections"
endif
group.long 0x620++0x3
line.long 0x0 "LPUART0,LPUART0 trigger input connections"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPUART0 trigger input connections"
endif
sif (cpuis("MC?A145*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPUART0 trigger input connections"
newline
endif
sif (cpuis("MC?A146*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPUART0 trigger input connections"
endif
sif (cpuis("MC?A152*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPUART0 trigger input connections"
newline
endif
sif (cpuis("MC?A153*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPUART0 trigger input connections"
endif
sif (cpuis("MC?A154*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPUART0 trigger input connections"
newline
endif
sif (cpuis("MC?A155*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPUART0 trigger input connections"
endif
sif (cpuis("MC?A156*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPUART0 trigger input connections"
endif
group.long 0x640++0x3
line.long 0x0 "LPUART1,LPUART1 trigger input connections"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPUART1 trigger input connections"
endif
sif (cpuis("MC?A145*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPUART1 trigger input connections"
newline
endif
sif (cpuis("MC?A146*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPUART1 trigger input connections"
endif
sif (cpuis("MC?A152*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPUART1 trigger input connections"
newline
endif
sif (cpuis("MC?A153*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPUART1 trigger input connections"
endif
sif (cpuis("MC?A154*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPUART1 trigger input connections"
newline
endif
sif (cpuis("MC?A155*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPUART1 trigger input connections"
endif
sif (cpuis("MC?A156*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPUART1 trigger input connections"
endif
group.long 0x660++0x3
line.long 0x0 "LPUART2,LPUART2 trigger input connections"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPUART2 trigger input connections"
endif
sif (cpuis("MC?A145*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPUART2 trigger input connections"
newline
endif
sif (cpuis("MC?A146*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPUART2 trigger input connections"
endif
sif (cpuis("MC?A152*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPUART2 trigger input connections"
newline
endif
sif (cpuis("MC?A153*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPUART2 trigger input connections"
endif
sif (cpuis("MC?A154*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPUART2 trigger input connections"
newline
endif
sif (cpuis("MC?A155*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPUART2 trigger input connections"
endif
sif (cpuis("MC?A156*"))
hexmask.long.byte 0x0 0.--5. 1. "INP,LPUART2 trigger input connections"
endif
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x20)++0x3
line.long 0x0 "CTIMER0CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER0"
repeat.end
group.long 0x3A4++0x13
line.long 0x0 "FlexPWM0_SM0_EXTSYNC0,PWM0 input trigger connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,Trigger input connections for PWM0"
line.long 0x4 "FlexPWM0_SM1_EXTA1,PWM0 input trigger connections"
hexmask.long.byte 0x4 0.--5. 1. "TRIGIN,Trigger input connections for PWM0"
line.long 0x8 "FlexPWM0_SM1_EXTSYNC1,PWM0 input trigger connections"
hexmask.long.byte 0x8 0.--5. 1. "TRIGIN,Trigger input connections for PWM0"
line.long 0xC "FlexPWM0_SM2_EXTA2,PWM0 input trigger connections"
hexmask.long.byte 0xC 0.--5. 1. "TRIGIN,Trigger input connections for PWM0"
line.long 0x10 "FlexPWM0_SM2_EXTSYNC2,PWM0 input trigger connections"
hexmask.long.byte 0x10 0.--5. 1. "TRIGIN,Trigger input connections for PWM0"
group.long 0x3C0++0xF
line.long 0x0 "FlexPWM0_FAULT0,PWM0 input trigger connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,Trigger input connections for PWM0"
line.long 0x4 "FlexPWM0_FAULT1,PWM0 input trigger connections"
hexmask.long.byte 0x4 0.--5. 1. "TRIGIN,Trigger input connections for PWM0"
line.long 0x8 "FlexPWM0_FAULT2,PWM0 input trigger connections"
hexmask.long.byte 0x8 0.--5. 1. "TRIGIN,Trigger input connections for PWM0"
line.long 0xC "FlexPWM0_FAULT3,PWM0 input trigger connections"
hexmask.long.byte 0xC 0.--5. 1. "TRIGIN,Trigger input connections for PWM0"
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x440)++0x3
line.long 0x0 "AOI0_MUX[$1],AOI0 trigger input connections 0-15"
hexmask.long.byte 0x0 0.--5. 1. "INP,AOI0 trigger input connections"
repeat.end
repeat 5. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x4C0)++0x3
line.long 0x0 "EXT_TRIG[$1],EXT trigger connections 0-4"
hexmask.long.byte 0x0 0.--4. 1. "INP,EXT trigger input connections"
repeat.end
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x4D8)++0x3
line.long 0x0 "EXT_TRIG$1,EXT trigger connections 6-7"
hexmask.long.byte 0x0 0.--4. 1. "INP,EXT trigger input connections"
repeat.end
endif
sif (cpuis("MC?A144*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x20)++0x3
line.long 0x0 "CTIMER0CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER0"
repeat.end
endif
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x40)++0x3
line.long 0x0 "CTIMER1CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER0"
repeat.end
endif
sif (cpuis("MC?A144*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x40)++0x3
line.long 0x0 "CTIMER1CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER1"
repeat.end
endif
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x60)++0x3
line.long 0x0 "CTIMER2CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER0"
repeat.end
endif
sif (cpuis("MC?A144*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x60)++0x3
line.long 0x0 "CTIMER2CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER2"
repeat.end
endif
sif (cpuis("MC?A144*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x1A0)++0x3
line.long 0x0 "CTIMER3CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER3"
repeat.end
group.long 0x1B0++0x3
line.long 0x0 "TIMER3TRIG,Trigger register for TIMER3"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER3"
endif
sif (cpuis("MC?A144*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x1C0)++0x3
line.long 0x0 "CTIMER4CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER4"
repeat.end
group.long 0x1D0++0x3
line.long 0x0 "TIMER4TRIG,Trigger register for TIMER4"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER4"
endif
sif (cpuis("MC?A144*"))
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x200)++0x3
line.long 0x0 "AOI1_INPUT[$1],AOI1 trigger input connections 0"
hexmask.long.byte 0x0 0.--6. 1. "INP,AOI0 trigger input connections"
repeat.end
endif
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x280)++0x3
line.long 0x0 "ADC0_TRIG[$1],ADC Trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,ADC0 trigger inputs"
repeat.end
endif
sif (cpuis("MC?A144*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x280)++0x3
line.long 0x0 "ADC0_TRIG[$1],ADC Trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,ADC0 trigger inputs"
repeat.end
endif
sif (cpuis("MC?A144*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x2C0)++0x3
line.long 0x0 "ADC1_TRIG[$1],ADC Trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,ADC0 trigger inputs"
repeat.end
group.long 0x300++0x3
line.long 0x0 "DAC0_TRIG,This register selects the DAC0 trigger inputs."
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,DAC0 trigger input"
group.long 0x380++0x1F
line.long 0x0 "QDC1_TRIG,QDC1 Trigger Input Connections"
hexmask.long.byte 0x0 0.--6. 1. "INP,QDC1 input connections"
line.long 0x4 "QDC1_HOME,QDC1 Trigger Input Connections"
hexmask.long.byte 0x4 0.--6. 1. "INP,QDC1 input connections"
line.long 0x8 "QDC1_INDEX,QDC1 Trigger Input Connections"
hexmask.long.byte 0x8 0.--6. 1. "INP,QDC1 input connections"
line.long 0xC "QDC1_PHASEB,QDC1 Trigger Input Connections"
hexmask.long.byte 0xC 0.--6. 1. "INP,QDC1 input connections"
line.long 0x10 "QDC1_PHASEA,QDC1 Trigger Input Connections"
hexmask.long.byte 0x10 0.--6. 1. "INP,QDC0 input connections"
line.long 0x14 "QDC1_ICAP1,QDC1 Trigger Input Connections"
hexmask.long.byte 0x14 0.--6. 1. "INP,QDC1 input connections"
line.long 0x18 "QDC1_ICAP2,QDC1 Trigger Input Connections"
hexmask.long.byte 0x18 0.--6. 1. "INP,QDC1 input connections"
line.long 0x1C "QDC1_ICAP3,QDC1 Trigger Input Connections"
hexmask.long.byte 0x1C 0.--6. 1. "INP,QDC1 input connections"
group.long 0x3A4++0x13
line.long 0x0 "FlexPWM0_SM0_EXTSYNC,PWM0 input trigger connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,EXTSYNC input connections for PWM0"
line.long 0x4 "FlexPWM0_SM1_EXTA,PWM0 input trigger connections"
hexmask.long.byte 0x4 0.--5. 1. "TRIGIN,EXTA input connections for PWM0"
line.long 0x8 "FlexPWM0_SM1_EXTSYNC,PWM0 input trigger connections"
hexmask.long.byte 0x8 0.--5. 1. "TRIGIN,EXTSYNC input connections for PWM0"
line.long 0xC "FlexPWM0_SM2_EXTA,PWM0 input trigger connections"
hexmask.long.byte 0xC 0.--5. 1. "TRIGIN,EXTA input connections for PWM0"
line.long 0x10 "FlexPWM0_SM2_EXTSYNC,PWM0 input trigger connections"
hexmask.long.byte 0x10 0.--5. 1. "TRIGIN,EXTSYNC input connections for PWM0"
endif
sif (cpuis("MC?A144*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x3C0)++0x3
line.long 0x0 "FlexPWM0_FAULT[$1],PWM0 Fault Input Trigger Connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,FAULT input connections for PWM0"
repeat.end
group.long 0x3E0++0x17
line.long 0x0 "FlexPWM1_SM0_EXTA0,PWM1 input trigger connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,EXTA input connections for PWM0"
line.long 0x4 "FlexPWM1_SM0_EXTSYNC,PWM1 input trigger connections"
hexmask.long.byte 0x4 0.--5. 1. "TRIGIN,EXTSYNC input connections for PWM0"
line.long 0x8 "FlexPWM1_SM1_EXTA,PWM1 input trigger connections"
hexmask.long.byte 0x8 0.--5. 1. "TRIGIN,EXTA input connections for PWM0"
line.long 0xC "FlexPWM1_SM1_EXTSYNC,PWM1 input trigger connections"
hexmask.long.byte 0xC 0.--5. 1. "TRIGIN,EXTSYNC input connections for PWM0"
line.long 0x10 "FlexPWM1_SM2_EXTA,PWM1 input trigger connections"
hexmask.long.byte 0x10 0.--5. 1. "TRIGIN,EXTA input connections for PWM0"
line.long 0x14 "FlexPWM1_SM2_EXTSYNC,PWM1 input trigger connections"
hexmask.long.byte 0x14 0.--5. 1. "TRIGIN,EXTSYNC input connections for PWM0"
endif
sif (cpuis("MC?A144*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x400)++0x3
line.long 0x0 "FlexPWM1_FAULT[$1],PWM1 Fault Input Trigger Connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,FAULT input connections for PWM1"
repeat.end
group.long 0x410++0x3
line.long 0x0 "FlexPWM1_FORCE,PWM1 input trigger connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,Trigger input connections for PWM1"
group.long 0x424++0x3
line.long 0x0 "PWM1_EXT_CLK,PWM1 external clock trigger"
hexmask.long.byte 0x0 0.--3. 1. "TRIGIN,Trigger input connections for PWM"
endif
sif (cpuis("MC?A144*"))
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x440)++0x3
line.long 0x0 "AOI0_INPUT[$1],AOI0 trigger input connections 0"
hexmask.long.byte 0x0 0.--6. 1. "INP,AOI0 trigger input connections"
repeat.end
group.long 0x4C0++0x3
line.long 0x0 "EXT_TRIG0,EXT trigger connections 0"
hexmask.long.byte 0x0 0.--4. 1. "INP,EXT trigger input connections"
group.long 0x540++0x3
line.long 0x0 "LPI2C2_TRIG,LPI2C2 trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "INP,LPI2C2 trigger input connections"
group.long 0x580++0x3
line.long 0x0 "OPAMP0_TRIG,OPAMP0 Trigger Input Connections"
hexmask.long.byte 0x0 0.--5. 1. "INP,DAC0 trigger input"
group.long 0x5C0++0x3
line.long 0x0 "LPI2C1_TRIG,LPI2C1 trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "INP,LPI2C1 trigger input connections"
group.long 0x680++0x3
line.long 0x0 "LPUART3,LPUART3 trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "INP,LPUART3 trigger input connections"
group.long 0x6A0++0x3
line.long 0x0 "LPUART4,LPUART4 trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "INP,LPUART4 trigger input connections"
endif
sif (cpuis("MC?A144*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x6E0)++0x3
line.long 0x0 "FLEXIO_TRIG[$1],FlexIO Trigger Input Connections"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for FlexIO0."
repeat.end
endif
sif (cpuis("MC?A145*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x20)++0x3
line.long 0x0 "CTIMER0CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER0"
repeat.end
endif
sif (cpuis("MC?A145*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x40)++0x3
line.long 0x0 "CTIMER1CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER1"
repeat.end
endif
sif (cpuis("MC?A145*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x60)++0x3
line.long 0x0 "CTIMER2CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER2"
repeat.end
endif
sif (cpuis("MC?A145*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x1A0)++0x3
line.long 0x0 "CTIMER3CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER3"
repeat.end
group.long 0x1B0++0x3
line.long 0x0 "TIMER3TRIG,Trigger register for TIMER3"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER3"
endif
sif (cpuis("MC?A145*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x1C0)++0x3
line.long 0x0 "CTIMER4CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER4"
repeat.end
group.long 0x1D0++0x3
line.long 0x0 "TIMER4TRIG,Trigger register for TIMER4"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER4"
endif
sif (cpuis("MC?A145*"))
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x200)++0x3
line.long 0x0 "AOI1_INPUT[$1],AOI1 trigger input connections 0"
hexmask.long.byte 0x0 0.--6. 1. "INP,AOI0 trigger input connections"
repeat.end
endif
sif (cpuis("MC?A145*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x280)++0x3
line.long 0x0 "ADC0_TRIG[$1],ADC Trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,ADC0 trigger inputs"
repeat.end
endif
sif (cpuis("MC?A145*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x2C0)++0x3
line.long 0x0 "ADC1_TRIG[$1],ADC Trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,ADC0 trigger inputs"
repeat.end
group.long 0x300++0x3
line.long 0x0 "DAC0_TRIG,This register selects the DAC0 trigger inputs."
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,DAC0 trigger input"
group.long 0x380++0x1F
line.long 0x0 "QDC1_TRIG,QDC1 Trigger Input Connections"
hexmask.long.byte 0x0 0.--6. 1. "INP,QDC1 input connections"
line.long 0x4 "QDC1_HOME,QDC1 Trigger Input Connections"
hexmask.long.byte 0x4 0.--6. 1. "INP,QDC1 input connections"
line.long 0x8 "QDC1_INDEX,QDC1 Trigger Input Connections"
hexmask.long.byte 0x8 0.--6. 1. "INP,QDC1 input connections"
line.long 0xC "QDC1_PHASEB,QDC1 Trigger Input Connections"
hexmask.long.byte 0xC 0.--6. 1. "INP,QDC1 input connections"
line.long 0x10 "QDC1_PHASEA,QDC1 Trigger Input Connections"
hexmask.long.byte 0x10 0.--6. 1. "INP,QDC0 input connections"
line.long 0x14 "QDC1_ICAP1,QDC1 Trigger Input Connections"
hexmask.long.byte 0x14 0.--6. 1. "INP,QDC1 input connections"
line.long 0x18 "QDC1_ICAP2,QDC1 Trigger Input Connections"
hexmask.long.byte 0x18 0.--6. 1. "INP,QDC1 input connections"
line.long 0x1C "QDC1_ICAP3,QDC1 Trigger Input Connections"
hexmask.long.byte 0x1C 0.--6. 1. "INP,QDC1 input connections"
group.long 0x3A4++0x13
line.long 0x0 "FlexPWM0_SM0_EXTSYNC,PWM0 input trigger connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,EXTSYNC input connections for PWM0"
line.long 0x4 "FlexPWM0_SM1_EXTA,PWM0 input trigger connections"
hexmask.long.byte 0x4 0.--5. 1. "TRIGIN,EXTA input connections for PWM0"
line.long 0x8 "FlexPWM0_SM1_EXTSYNC,PWM0 input trigger connections"
hexmask.long.byte 0x8 0.--5. 1. "TRIGIN,EXTSYNC input connections for PWM0"
line.long 0xC "FlexPWM0_SM2_EXTA,PWM0 input trigger connections"
hexmask.long.byte 0xC 0.--5. 1. "TRIGIN,EXTA input connections for PWM0"
line.long 0x10 "FlexPWM0_SM2_EXTSYNC,PWM0 input trigger connections"
hexmask.long.byte 0x10 0.--5. 1. "TRIGIN,EXTSYNC input connections for PWM0"
endif
sif (cpuis("MC?A145*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x3C0)++0x3
line.long 0x0 "FlexPWM0_FAULT[$1],PWM0 Fault Input Trigger Connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,FAULT input connections for PWM0"
repeat.end
group.long 0x3E0++0x17
line.long 0x0 "FlexPWM1_SM0_EXTA0,PWM1 input trigger connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,EXTA input connections for PWM0"
line.long 0x4 "FlexPWM1_SM0_EXTSYNC,PWM1 input trigger connections"
hexmask.long.byte 0x4 0.--5. 1. "TRIGIN,EXTSYNC input connections for PWM0"
line.long 0x8 "FlexPWM1_SM1_EXTA,PWM1 input trigger connections"
hexmask.long.byte 0x8 0.--5. 1. "TRIGIN,EXTA input connections for PWM0"
line.long 0xC "FlexPWM1_SM1_EXTSYNC,PWM1 input trigger connections"
hexmask.long.byte 0xC 0.--5. 1. "TRIGIN,EXTSYNC input connections for PWM0"
line.long 0x10 "FlexPWM1_SM2_EXTA,PWM1 input trigger connections"
hexmask.long.byte 0x10 0.--5. 1. "TRIGIN,EXTA input connections for PWM0"
line.long 0x14 "FlexPWM1_SM2_EXTSYNC,PWM1 input trigger connections"
hexmask.long.byte 0x14 0.--5. 1. "TRIGIN,EXTSYNC input connections for PWM0"
endif
sif (cpuis("MC?A145*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x400)++0x3
line.long 0x0 "FlexPWM1_FAULT[$1],PWM1 Fault Input Trigger Connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,FAULT input connections for PWM1"
repeat.end
group.long 0x410++0x3
line.long 0x0 "FlexPWM1_FORCE,PWM1 input trigger connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,Trigger input connections for PWM1"
group.long 0x424++0x3
line.long 0x0 "PWM1_EXT_CLK,PWM1 external clock trigger"
hexmask.long.byte 0x0 0.--3. 1. "TRIGIN,Trigger input connections for PWM"
endif
sif (cpuis("MC?A145*"))
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x440)++0x3
line.long 0x0 "AOI0_INPUT[$1],AOI0 trigger input connections 0"
hexmask.long.byte 0x0 0.--6. 1. "INP,AOI0 trigger input connections"
repeat.end
group.long 0x4C0++0x3
line.long 0x0 "EXT_TRIG0,EXT trigger connections 0"
hexmask.long.byte 0x0 0.--4. 1. "INP,EXT trigger input connections"
group.long 0x540++0x3
line.long 0x0 "LPI2C2_TRIG,LPI2C2 trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "INP,LPI2C2 trigger input connections"
group.long 0x580++0x3
line.long 0x0 "OPAMP0_TRIG,OPAMP0 Trigger Input Connections"
hexmask.long.byte 0x0 0.--5. 1. "INP,DAC0 trigger input"
group.long 0x5C0++0x3
line.long 0x0 "LPI2C1_TRIG,LPI2C1 trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "INP,LPI2C1 trigger input connections"
group.long 0x680++0x3
line.long 0x0 "LPUART3,LPUART3 trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "INP,LPUART3 trigger input connections"
group.long 0x6A0++0x3
line.long 0x0 "LPUART4,LPUART4 trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "INP,LPUART4 trigger input connections"
endif
sif (cpuis("MC?A145*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x6E0)++0x3
line.long 0x0 "FLEXIO_TRIG[$1],FlexIO Trigger Input Connections"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for FlexIO0."
repeat.end
endif
sif (cpuis("MC?A146*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x20)++0x3
line.long 0x0 "CTIMER0CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER0"
repeat.end
endif
sif (cpuis("MC?A146*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x40)++0x3
line.long 0x0 "CTIMER1CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER1"
repeat.end
endif
sif (cpuis("MC?A146*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x60)++0x3
line.long 0x0 "CTIMER2CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER2"
repeat.end
endif
sif (cpuis("MC?A146*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x1A0)++0x3
line.long 0x0 "CTIMER3CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER3"
repeat.end
group.long 0x1B0++0x3
line.long 0x0 "TIMER3TRIG,Trigger register for TIMER3"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER3"
endif
sif (cpuis("MC?A146*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x1C0)++0x3
line.long 0x0 "CTIMER4CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER4"
repeat.end
group.long 0x1D0++0x3
line.long 0x0 "TIMER4TRIG,Trigger register for TIMER4"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER4"
endif
sif (cpuis("MC?A146*"))
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x200)++0x3
line.long 0x0 "AOI1_INPUT[$1],AOI1 trigger input connections 0"
hexmask.long.byte 0x0 0.--6. 1. "INP,AOI0 trigger input connections"
repeat.end
endif
sif (cpuis("MC?A146*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x280)++0x3
line.long 0x0 "ADC0_TRIG[$1],ADC Trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,ADC0 trigger inputs"
repeat.end
endif
sif (cpuis("MC?A146*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x2C0)++0x3
line.long 0x0 "ADC1_TRIG[$1],ADC Trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,ADC0 trigger inputs"
repeat.end
group.long 0x300++0x3
line.long 0x0 "DAC0_TRIG,This register selects the DAC0 trigger inputs."
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,DAC0 trigger input"
group.long 0x380++0x1F
line.long 0x0 "QDC1_TRIG,QDC1 Trigger Input Connections"
hexmask.long.byte 0x0 0.--6. 1. "INP,QDC1 input connections"
line.long 0x4 "QDC1_HOME,QDC1 Trigger Input Connections"
hexmask.long.byte 0x4 0.--6. 1. "INP,QDC1 input connections"
line.long 0x8 "QDC1_INDEX,QDC1 Trigger Input Connections"
hexmask.long.byte 0x8 0.--6. 1. "INP,QDC1 input connections"
line.long 0xC "QDC1_PHASEB,QDC1 Trigger Input Connections"
hexmask.long.byte 0xC 0.--6. 1. "INP,QDC1 input connections"
line.long 0x10 "QDC1_PHASEA,QDC1 Trigger Input Connections"
hexmask.long.byte 0x10 0.--6. 1. "INP,QDC0 input connections"
line.long 0x14 "QDC1_ICAP1,QDC1 Trigger Input Connections"
hexmask.long.byte 0x14 0.--6. 1. "INP,QDC1 input connections"
line.long 0x18 "QDC1_ICAP2,QDC1 Trigger Input Connections"
hexmask.long.byte 0x18 0.--6. 1. "INP,QDC1 input connections"
line.long 0x1C "QDC1_ICAP3,QDC1 Trigger Input Connections"
hexmask.long.byte 0x1C 0.--6. 1. "INP,QDC1 input connections"
group.long 0x3A4++0x13
line.long 0x0 "FlexPWM0_SM0_EXTSYNC,PWM0 input trigger connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,EXTSYNC input connections for PWM0"
line.long 0x4 "FlexPWM0_SM1_EXTA,PWM0 input trigger connections"
hexmask.long.byte 0x4 0.--5. 1. "TRIGIN,EXTA input connections for PWM0"
line.long 0x8 "FlexPWM0_SM1_EXTSYNC,PWM0 input trigger connections"
hexmask.long.byte 0x8 0.--5. 1. "TRIGIN,EXTSYNC input connections for PWM0"
line.long 0xC "FlexPWM0_SM2_EXTA,PWM0 input trigger connections"
hexmask.long.byte 0xC 0.--5. 1. "TRIGIN,EXTA input connections for PWM0"
line.long 0x10 "FlexPWM0_SM2_EXTSYNC,PWM0 input trigger connections"
hexmask.long.byte 0x10 0.--5. 1. "TRIGIN,EXTSYNC input connections for PWM0"
endif
sif (cpuis("MC?A146*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x3C0)++0x3
line.long 0x0 "FlexPWM0_FAULT[$1],PWM0 Fault Input Trigger Connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,FAULT input connections for PWM0"
repeat.end
group.long 0x3E0++0x17
line.long 0x0 "FlexPWM1_SM0_EXTA0,PWM1 input trigger connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,EXTA input connections for PWM0"
line.long 0x4 "FlexPWM1_SM0_EXTSYNC,PWM1 input trigger connections"
hexmask.long.byte 0x4 0.--5. 1. "TRIGIN,EXTSYNC input connections for PWM0"
line.long 0x8 "FlexPWM1_SM1_EXTA,PWM1 input trigger connections"
hexmask.long.byte 0x8 0.--5. 1. "TRIGIN,EXTA input connections for PWM0"
line.long 0xC "FlexPWM1_SM1_EXTSYNC,PWM1 input trigger connections"
hexmask.long.byte 0xC 0.--5. 1. "TRIGIN,EXTSYNC input connections for PWM0"
line.long 0x10 "FlexPWM1_SM2_EXTA,PWM1 input trigger connections"
hexmask.long.byte 0x10 0.--5. 1. "TRIGIN,EXTA input connections for PWM0"
line.long 0x14 "FlexPWM1_SM2_EXTSYNC,PWM1 input trigger connections"
hexmask.long.byte 0x14 0.--5. 1. "TRIGIN,EXTSYNC input connections for PWM0"
endif
sif (cpuis("MC?A146*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x400)++0x3
line.long 0x0 "FlexPWM1_FAULT[$1],PWM1 Fault Input Trigger Connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,FAULT input connections for PWM1"
repeat.end
group.long 0x410++0x3
line.long 0x0 "FlexPWM1_FORCE,PWM1 input trigger connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,Trigger input connections for PWM1"
group.long 0x424++0x3
line.long 0x0 "PWM1_EXT_CLK,PWM1 external clock trigger"
hexmask.long.byte 0x0 0.--3. 1. "TRIGIN,Trigger input connections for PWM"
endif
sif (cpuis("MC?A146*"))
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x440)++0x3
line.long 0x0 "AOI0_INPUT[$1],AOI0 trigger input connections 0"
hexmask.long.byte 0x0 0.--6. 1. "INP,AOI0 trigger input connections"
repeat.end
group.long 0x4C0++0x3
line.long 0x0 "EXT_TRIG0,EXT trigger connections 0"
hexmask.long.byte 0x0 0.--4. 1. "INP,EXT trigger input connections"
group.long 0x540++0x3
line.long 0x0 "LPI2C2_TRIG,LPI2C2 trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "INP,LPI2C2 trigger input connections"
group.long 0x580++0x3
line.long 0x0 "OPAMP0_TRIG,OPAMP0 Trigger Input Connections"
hexmask.long.byte 0x0 0.--5. 1. "INP,DAC0 trigger input"
group.long 0x5C0++0x3
line.long 0x0 "LPI2C1_TRIG,LPI2C1 trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "INP,LPI2C1 trigger input connections"
group.long 0x680++0x3
line.long 0x0 "LPUART3,LPUART3 trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "INP,LPUART3 trigger input connections"
group.long 0x6A0++0x3
line.long 0x0 "LPUART4,LPUART4 trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "INP,LPUART4 trigger input connections"
endif
sif (cpuis("MC?A146*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x6E0)++0x3
line.long 0x0 "FLEXIO_TRIG[$1],FlexIO Trigger Input Connections"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for FlexIO0."
repeat.end
endif
sif (cpuis("MC?A152*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x20)++0x3
line.long 0x0 "CTIMER0CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER0"
repeat.end
endif
sif (cpuis("MC?A152*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x40)++0x3
line.long 0x0 "CTIMER1CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER0"
repeat.end
endif
sif (cpuis("MC?A152*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x60)++0x3
line.long 0x0 "CTIMER2CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER0"
repeat.end
endif
sif (cpuis("MC?A152*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x280)++0x3
line.long 0x0 "ADC0_TRIG[$1],ADC Trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,ADC0 trigger inputs"
repeat.end
group.long 0x3A4++0x13
line.long 0x0 "FlexPWM0_SM0_EXTSYNC0,PWM0 input trigger connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,Trigger input connections for PWM0"
line.long 0x4 "FlexPWM0_SM1_EXTA1,PWM0 input trigger connections"
hexmask.long.byte 0x4 0.--5. 1. "TRIGIN,Trigger input connections for PWM0"
line.long 0x8 "FlexPWM0_SM1_EXTSYNC1,PWM0 input trigger connections"
hexmask.long.byte 0x8 0.--5. 1. "TRIGIN,Trigger input connections for PWM0"
line.long 0xC "FlexPWM0_SM2_EXTA2,PWM0 input trigger connections"
hexmask.long.byte 0xC 0.--5. 1. "TRIGIN,Trigger input connections for PWM0"
line.long 0x10 "FlexPWM0_SM2_EXTSYNC2,PWM0 input trigger connections"
hexmask.long.byte 0x10 0.--5. 1. "TRIGIN,Trigger input connections for PWM0"
group.long 0x3C0++0xF
line.long 0x0 "FlexPWM0_FAULT0,PWM0 input trigger connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,Trigger input connections for PWM0"
line.long 0x4 "FlexPWM0_FAULT1,PWM0 input trigger connections"
hexmask.long.byte 0x4 0.--5. 1. "TRIGIN,Trigger input connections for PWM0"
line.long 0x8 "FlexPWM0_FAULT2,PWM0 input trigger connections"
hexmask.long.byte 0x8 0.--5. 1. "TRIGIN,Trigger input connections for PWM0"
line.long 0xC "FlexPWM0_FAULT3,PWM0 input trigger connections"
hexmask.long.byte 0xC 0.--5. 1. "TRIGIN,Trigger input connections for PWM0"
endif
sif (cpuis("MC?A152*"))
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x440)++0x3
line.long 0x0 "AOI0_MUX[$1],AOI0 trigger input connections 0-15"
hexmask.long.byte 0x0 0.--5. 1. "INP,AOI0 trigger input connections"
repeat.end
endif
sif (cpuis("MC?A152*"))
repeat 5. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x4C0)++0x3
line.long 0x0 "EXT_TRIG[$1],EXT trigger connections 0-4"
hexmask.long.byte 0x0 0.--4. 1. "INP,EXT trigger input connections"
repeat.end
endif
sif (cpuis("MC?A152*"))
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x4D8)++0x3
line.long 0x0 "EXT_TRIG$1,EXT trigger connections 6-7"
hexmask.long.byte 0x0 0.--4. 1. "INP,EXT trigger input connections"
repeat.end
endif
sif (cpuis("MC?A153*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x20)++0x3
line.long 0x0 "CTIMER0CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER0"
repeat.end
endif
sif (cpuis("MC?A153*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x40)++0x3
line.long 0x0 "CTIMER1CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER0"
repeat.end
endif
sif (cpuis("MC?A153*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x60)++0x3
line.long 0x0 "CTIMER2CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER0"
repeat.end
endif
sif (cpuis("MC?A153*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x280)++0x3
line.long 0x0 "ADC0_TRIG[$1],ADC Trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,ADC0 trigger inputs"
repeat.end
group.long 0x3A4++0x13
line.long 0x0 "FlexPWM0_SM0_EXTSYNC0,PWM0 input trigger connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,Trigger input connections for PWM0"
line.long 0x4 "FlexPWM0_SM1_EXTA1,PWM0 input trigger connections"
hexmask.long.byte 0x4 0.--5. 1. "TRIGIN,Trigger input connections for PWM0"
line.long 0x8 "FlexPWM0_SM1_EXTSYNC1,PWM0 input trigger connections"
hexmask.long.byte 0x8 0.--5. 1. "TRIGIN,Trigger input connections for PWM0"
line.long 0xC "FlexPWM0_SM2_EXTA2,PWM0 input trigger connections"
hexmask.long.byte 0xC 0.--5. 1. "TRIGIN,Trigger input connections for PWM0"
line.long 0x10 "FlexPWM0_SM2_EXTSYNC2,PWM0 input trigger connections"
hexmask.long.byte 0x10 0.--5. 1. "TRIGIN,Trigger input connections for PWM0"
group.long 0x3C0++0xF
line.long 0x0 "FlexPWM0_FAULT0,PWM0 input trigger connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,Trigger input connections for PWM0"
line.long 0x4 "FlexPWM0_FAULT1,PWM0 input trigger connections"
hexmask.long.byte 0x4 0.--5. 1. "TRIGIN,Trigger input connections for PWM0"
line.long 0x8 "FlexPWM0_FAULT2,PWM0 input trigger connections"
hexmask.long.byte 0x8 0.--5. 1. "TRIGIN,Trigger input connections for PWM0"
line.long 0xC "FlexPWM0_FAULT3,PWM0 input trigger connections"
hexmask.long.byte 0xC 0.--5. 1. "TRIGIN,Trigger input connections for PWM0"
endif
sif (cpuis("MC?A153*"))
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x440)++0x3
line.long 0x0 "AOI0_MUX[$1],AOI0 trigger input connections 0-15"
hexmask.long.byte 0x0 0.--5. 1. "INP,AOI0 trigger input connections"
repeat.end
endif
sif (cpuis("MC?A153*"))
repeat 5. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x4C0)++0x3
line.long 0x0 "EXT_TRIG[$1],EXT trigger connections 0-4"
hexmask.long.byte 0x0 0.--4. 1. "INP,EXT trigger input connections"
repeat.end
endif
sif (cpuis("MC?A153*"))
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x4D8)++0x3
line.long 0x0 "EXT_TRIG$1,EXT trigger connections 6-7"
hexmask.long.byte 0x0 0.--4. 1. "INP,EXT trigger input connections"
repeat.end
endif
sif (cpuis("MC?A154*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x20)++0x3
line.long 0x0 "CTIMER0CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER0"
repeat.end
endif
sif (cpuis("MC?A154*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x40)++0x3
line.long 0x0 "CTIMER1CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER1"
repeat.end
endif
sif (cpuis("MC?A154*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x60)++0x3
line.long 0x0 "CTIMER2CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER2"
repeat.end
endif
sif (cpuis("MC?A154*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x1A0)++0x3
line.long 0x0 "CTIMER3CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER3"
repeat.end
group.long 0x1B0++0x3
line.long 0x0 "TIMER3TRIG,Trigger register for TIMER3"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER3"
endif
sif (cpuis("MC?A154*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x1C0)++0x3
line.long 0x0 "CTIMER4CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER4"
repeat.end
group.long 0x1D0++0x3
line.long 0x0 "TIMER4TRIG,Trigger register for TIMER4"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER4"
endif
sif (cpuis("MC?A154*"))
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x200)++0x3
line.long 0x0 "AOI1_INPUT[$1],AOI1 trigger input connections 0"
hexmask.long.byte 0x0 0.--6. 1. "INP,AOI0 trigger input connections"
repeat.end
endif
sif (cpuis("MC?A154*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x280)++0x3
line.long 0x0 "ADC0_TRIG[$1],ADC Trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,ADC0 trigger inputs"
repeat.end
endif
sif (cpuis("MC?A154*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x2C0)++0x3
line.long 0x0 "ADC1_TRIG[$1],ADC Trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,ADC0 trigger inputs"
repeat.end
group.long 0x300++0x3
line.long 0x0 "DAC0_TRIG,This register selects the DAC0 trigger inputs."
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,DAC0 trigger input"
group.long 0x380++0x1F
line.long 0x0 "QDC1_TRIG,QDC1 Trigger Input Connections"
hexmask.long.byte 0x0 0.--6. 1. "INP,QDC1 input connections"
line.long 0x4 "QDC1_HOME,QDC1 Trigger Input Connections"
hexmask.long.byte 0x4 0.--6. 1. "INP,QDC1 input connections"
line.long 0x8 "QDC1_INDEX,QDC1 Trigger Input Connections"
hexmask.long.byte 0x8 0.--6. 1. "INP,QDC1 input connections"
line.long 0xC "QDC1_PHASEB,QDC1 Trigger Input Connections"
hexmask.long.byte 0xC 0.--6. 1. "INP,QDC1 input connections"
line.long 0x10 "QDC1_PHASEA,QDC1 Trigger Input Connections"
hexmask.long.byte 0x10 0.--6. 1. "INP,QDC0 input connections"
line.long 0x14 "QDC1_ICAP1,QDC1 Trigger Input Connections"
hexmask.long.byte 0x14 0.--6. 1. "INP,QDC1 input connections"
line.long 0x18 "QDC1_ICAP2,QDC1 Trigger Input Connections"
hexmask.long.byte 0x18 0.--6. 1. "INP,QDC1 input connections"
line.long 0x1C "QDC1_ICAP3,QDC1 Trigger Input Connections"
hexmask.long.byte 0x1C 0.--6. 1. "INP,QDC1 input connections"
group.long 0x3A4++0x13
line.long 0x0 "FlexPWM0_SM0_EXTSYNC,PWM0 input trigger connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,EXTSYNC input connections for PWM0"
line.long 0x4 "FlexPWM0_SM1_EXTA,PWM0 input trigger connections"
hexmask.long.byte 0x4 0.--5. 1. "TRIGIN,EXTA input connections for PWM0"
line.long 0x8 "FlexPWM0_SM1_EXTSYNC,PWM0 input trigger connections"
hexmask.long.byte 0x8 0.--5. 1. "TRIGIN,EXTSYNC input connections for PWM0"
line.long 0xC "FlexPWM0_SM2_EXTA,PWM0 input trigger connections"
hexmask.long.byte 0xC 0.--5. 1. "TRIGIN,EXTA input connections for PWM0"
line.long 0x10 "FlexPWM0_SM2_EXTSYNC,PWM0 input trigger connections"
hexmask.long.byte 0x10 0.--5. 1. "TRIGIN,EXTSYNC input connections for PWM0"
endif
sif (cpuis("MC?A154*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x3C0)++0x3
line.long 0x0 "FlexPWM0_FAULT[$1],PWM0 Fault Input Trigger Connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,FAULT input connections for PWM0"
repeat.end
group.long 0x3E0++0x17
line.long 0x0 "FlexPWM1_SM0_EXTA0,PWM1 input trigger connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,EXTA input connections for PWM0"
line.long 0x4 "FlexPWM1_SM0_EXTSYNC,PWM1 input trigger connections"
hexmask.long.byte 0x4 0.--5. 1. "TRIGIN,EXTSYNC input connections for PWM0"
line.long 0x8 "FlexPWM1_SM1_EXTA,PWM1 input trigger connections"
hexmask.long.byte 0x8 0.--5. 1. "TRIGIN,EXTA input connections for PWM0"
line.long 0xC "FlexPWM1_SM1_EXTSYNC,PWM1 input trigger connections"
hexmask.long.byte 0xC 0.--5. 1. "TRIGIN,EXTSYNC input connections for PWM0"
line.long 0x10 "FlexPWM1_SM2_EXTA,PWM1 input trigger connections"
hexmask.long.byte 0x10 0.--5. 1. "TRIGIN,EXTA input connections for PWM0"
line.long 0x14 "FlexPWM1_SM2_EXTSYNC,PWM1 input trigger connections"
hexmask.long.byte 0x14 0.--5. 1. "TRIGIN,EXTSYNC input connections for PWM0"
endif
sif (cpuis("MC?A154*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x400)++0x3
line.long 0x0 "FlexPWM1_FAULT[$1],PWM1 Fault Input Trigger Connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,FAULT input connections for PWM1"
repeat.end
group.long 0x410++0x3
line.long 0x0 "FlexPWM1_FORCE,PWM1 input trigger connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,Trigger input connections for PWM1"
group.long 0x424++0x3
line.long 0x0 "PWM1_EXT_CLK,PWM1 external clock trigger"
hexmask.long.byte 0x0 0.--3. 1. "TRIGIN,Trigger input connections for PWM"
endif
sif (cpuis("MC?A154*"))
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x440)++0x3
line.long 0x0 "AOI0_INPUT[$1],AOI0 trigger input connections 0"
hexmask.long.byte 0x0 0.--6. 1. "INP,AOI0 trigger input connections"
repeat.end
group.long 0x4C0++0x3
line.long 0x0 "EXT_TRIG0,EXT trigger connections 0"
hexmask.long.byte 0x0 0.--4. 1. "INP,EXT trigger input connections"
group.long 0x540++0x3
line.long 0x0 "LPI2C2_TRIG,LPI2C2 trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "INP,LPI2C2 trigger input connections"
group.long 0x580++0x3
line.long 0x0 "OPAMP0_TRIG,OPAMP0 Trigger Input Connections"
hexmask.long.byte 0x0 0.--5. 1. "INP,DAC0 trigger input"
group.long 0x5C0++0x3
line.long 0x0 "LPI2C1_TRIG,LPI2C1 trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "INP,LPI2C1 trigger input connections"
group.long 0x680++0x3
line.long 0x0 "LPUART3,LPUART3 trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "INP,LPUART3 trigger input connections"
group.long 0x6A0++0x3
line.long 0x0 "LPUART4,LPUART4 trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "INP,LPUART4 trigger input connections"
endif
sif (cpuis("MC?A154*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x6E0)++0x3
line.long 0x0 "FLEXIO_TRIG[$1],FlexIO Trigger Input Connections"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for FlexIO0."
repeat.end
endif
sif (cpuis("MC?A155*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x20)++0x3
line.long 0x0 "CTIMER0CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER0"
repeat.end
endif
sif (cpuis("MC?A155*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x40)++0x3
line.long 0x0 "CTIMER1CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER1"
repeat.end
endif
sif (cpuis("MC?A155*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x60)++0x3
line.long 0x0 "CTIMER2CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER2"
repeat.end
endif
sif (cpuis("MC?A155*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x1A0)++0x3
line.long 0x0 "CTIMER3CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER3"
repeat.end
group.long 0x1B0++0x3
line.long 0x0 "TIMER3TRIG,Trigger register for TIMER3"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER3"
endif
sif (cpuis("MC?A155*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x1C0)++0x3
line.long 0x0 "CTIMER4CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER4"
repeat.end
group.long 0x1D0++0x3
line.long 0x0 "TIMER4TRIG,Trigger register for TIMER4"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER4"
endif
sif (cpuis("MC?A155*"))
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x200)++0x3
line.long 0x0 "AOI1_INPUT[$1],AOI1 trigger input connections 0"
hexmask.long.byte 0x0 0.--6. 1. "INP,AOI0 trigger input connections"
repeat.end
endif
sif (cpuis("MC?A155*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x280)++0x3
line.long 0x0 "ADC0_TRIG[$1],ADC Trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,ADC0 trigger inputs"
repeat.end
endif
sif (cpuis("MC?A155*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x2C0)++0x3
line.long 0x0 "ADC1_TRIG[$1],ADC Trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,ADC0 trigger inputs"
repeat.end
group.long 0x300++0x3
line.long 0x0 "DAC0_TRIG,This register selects the DAC0 trigger inputs."
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,DAC0 trigger input"
group.long 0x380++0x1F
line.long 0x0 "QDC1_TRIG,QDC1 Trigger Input Connections"
hexmask.long.byte 0x0 0.--6. 1. "INP,QDC1 input connections"
line.long 0x4 "QDC1_HOME,QDC1 Trigger Input Connections"
hexmask.long.byte 0x4 0.--6. 1. "INP,QDC1 input connections"
line.long 0x8 "QDC1_INDEX,QDC1 Trigger Input Connections"
hexmask.long.byte 0x8 0.--6. 1. "INP,QDC1 input connections"
line.long 0xC "QDC1_PHASEB,QDC1 Trigger Input Connections"
hexmask.long.byte 0xC 0.--6. 1. "INP,QDC1 input connections"
line.long 0x10 "QDC1_PHASEA,QDC1 Trigger Input Connections"
hexmask.long.byte 0x10 0.--6. 1. "INP,QDC0 input connections"
line.long 0x14 "QDC1_ICAP1,QDC1 Trigger Input Connections"
hexmask.long.byte 0x14 0.--6. 1. "INP,QDC1 input connections"
line.long 0x18 "QDC1_ICAP2,QDC1 Trigger Input Connections"
hexmask.long.byte 0x18 0.--6. 1. "INP,QDC1 input connections"
line.long 0x1C "QDC1_ICAP3,QDC1 Trigger Input Connections"
hexmask.long.byte 0x1C 0.--6. 1. "INP,QDC1 input connections"
group.long 0x3A4++0x13
line.long 0x0 "FlexPWM0_SM0_EXTSYNC,PWM0 input trigger connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,EXTSYNC input connections for PWM0"
line.long 0x4 "FlexPWM0_SM1_EXTA,PWM0 input trigger connections"
hexmask.long.byte 0x4 0.--5. 1. "TRIGIN,EXTA input connections for PWM0"
line.long 0x8 "FlexPWM0_SM1_EXTSYNC,PWM0 input trigger connections"
hexmask.long.byte 0x8 0.--5. 1. "TRIGIN,EXTSYNC input connections for PWM0"
line.long 0xC "FlexPWM0_SM2_EXTA,PWM0 input trigger connections"
hexmask.long.byte 0xC 0.--5. 1. "TRIGIN,EXTA input connections for PWM0"
line.long 0x10 "FlexPWM0_SM2_EXTSYNC,PWM0 input trigger connections"
hexmask.long.byte 0x10 0.--5. 1. "TRIGIN,EXTSYNC input connections for PWM0"
endif
sif (cpuis("MC?A155*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x3C0)++0x3
line.long 0x0 "FlexPWM0_FAULT[$1],PWM0 Fault Input Trigger Connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,FAULT input connections for PWM0"
repeat.end
group.long 0x3E0++0x17
line.long 0x0 "FlexPWM1_SM0_EXTA0,PWM1 input trigger connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,EXTA input connections for PWM0"
line.long 0x4 "FlexPWM1_SM0_EXTSYNC,PWM1 input trigger connections"
hexmask.long.byte 0x4 0.--5. 1. "TRIGIN,EXTSYNC input connections for PWM0"
line.long 0x8 "FlexPWM1_SM1_EXTA,PWM1 input trigger connections"
hexmask.long.byte 0x8 0.--5. 1. "TRIGIN,EXTA input connections for PWM0"
line.long 0xC "FlexPWM1_SM1_EXTSYNC,PWM1 input trigger connections"
hexmask.long.byte 0xC 0.--5. 1. "TRIGIN,EXTSYNC input connections for PWM0"
line.long 0x10 "FlexPWM1_SM2_EXTA,PWM1 input trigger connections"
hexmask.long.byte 0x10 0.--5. 1. "TRIGIN,EXTA input connections for PWM0"
line.long 0x14 "FlexPWM1_SM2_EXTSYNC,PWM1 input trigger connections"
hexmask.long.byte 0x14 0.--5. 1. "TRIGIN,EXTSYNC input connections for PWM0"
endif
sif (cpuis("MC?A155*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x400)++0x3
line.long 0x0 "FlexPWM1_FAULT[$1],PWM1 Fault Input Trigger Connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,FAULT input connections for PWM1"
repeat.end
group.long 0x410++0x3
line.long 0x0 "FlexPWM1_FORCE,PWM1 input trigger connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,Trigger input connections for PWM1"
group.long 0x424++0x3
line.long 0x0 "PWM1_EXT_CLK,PWM1 external clock trigger"
hexmask.long.byte 0x0 0.--3. 1. "TRIGIN,Trigger input connections for PWM"
endif
sif (cpuis("MC?A155*"))
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x440)++0x3
line.long 0x0 "AOI0_INPUT[$1],AOI0 trigger input connections 0"
hexmask.long.byte 0x0 0.--6. 1. "INP,AOI0 trigger input connections"
repeat.end
group.long 0x4C0++0x3
line.long 0x0 "EXT_TRIG0,EXT trigger connections 0"
hexmask.long.byte 0x0 0.--4. 1. "INP,EXT trigger input connections"
group.long 0x540++0x3
line.long 0x0 "LPI2C2_TRIG,LPI2C2 trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "INP,LPI2C2 trigger input connections"
group.long 0x580++0x3
line.long 0x0 "OPAMP0_TRIG,OPAMP0 Trigger Input Connections"
hexmask.long.byte 0x0 0.--5. 1. "INP,DAC0 trigger input"
group.long 0x5C0++0x3
line.long 0x0 "LPI2C1_TRIG,LPI2C1 trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "INP,LPI2C1 trigger input connections"
group.long 0x680++0x3
line.long 0x0 "LPUART3,LPUART3 trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "INP,LPUART3 trigger input connections"
group.long 0x6A0++0x3
line.long 0x0 "LPUART4,LPUART4 trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "INP,LPUART4 trigger input connections"
endif
sif (cpuis("MC?A155*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x6E0)++0x3
line.long 0x0 "FLEXIO_TRIG[$1],FlexIO Trigger Input Connections"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for FlexIO0."
repeat.end
endif
sif (cpuis("MC?A156*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x20)++0x3
line.long 0x0 "CTIMER0CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER0"
repeat.end
endif
sif (cpuis("MC?A156*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x40)++0x3
line.long 0x0 "CTIMER1CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER1"
repeat.end
endif
sif (cpuis("MC?A156*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x60)++0x3
line.long 0x0 "CTIMER2CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER2"
repeat.end
endif
sif (cpuis("MC?A156*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x1A0)++0x3
line.long 0x0 "CTIMER3CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER3"
repeat.end
group.long 0x1B0++0x3
line.long 0x0 "TIMER3TRIG,Trigger register for TIMER3"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER3"
endif
sif (cpuis("MC?A156*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x1C0)++0x3
line.long 0x0 "CTIMER4CAP[$1],Capture select register for CTIMER inputs"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER4"
repeat.end
group.long 0x1D0++0x3
line.long 0x0 "TIMER4TRIG,Trigger register for TIMER4"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for CTIMER4"
endif
sif (cpuis("MC?A156*"))
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x200)++0x3
line.long 0x0 "AOI1_INPUT[$1],AOI1 trigger input connections 0"
hexmask.long.byte 0x0 0.--6. 1. "INP,AOI0 trigger input connections"
repeat.end
endif
sif (cpuis("MC?A156*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x280)++0x3
line.long 0x0 "ADC0_TRIG[$1],ADC Trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,ADC0 trigger inputs"
repeat.end
endif
sif (cpuis("MC?A156*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x2C0)++0x3
line.long 0x0 "ADC1_TRIG[$1],ADC Trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,ADC0 trigger inputs"
repeat.end
group.long 0x300++0x3
line.long 0x0 "DAC0_TRIG,This register selects the DAC0 trigger inputs."
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,DAC0 trigger input"
group.long 0x380++0x1F
line.long 0x0 "QDC1_TRIG,QDC1 Trigger Input Connections"
hexmask.long.byte 0x0 0.--6. 1. "INP,QDC1 input connections"
line.long 0x4 "QDC1_HOME,QDC1 Trigger Input Connections"
hexmask.long.byte 0x4 0.--6. 1. "INP,QDC1 input connections"
line.long 0x8 "QDC1_INDEX,QDC1 Trigger Input Connections"
hexmask.long.byte 0x8 0.--6. 1. "INP,QDC1 input connections"
line.long 0xC "QDC1_PHASEB,QDC1 Trigger Input Connections"
hexmask.long.byte 0xC 0.--6. 1. "INP,QDC1 input connections"
line.long 0x10 "QDC1_PHASEA,QDC1 Trigger Input Connections"
hexmask.long.byte 0x10 0.--6. 1. "INP,QDC0 input connections"
line.long 0x14 "QDC1_ICAP1,QDC1 Trigger Input Connections"
hexmask.long.byte 0x14 0.--6. 1. "INP,QDC1 input connections"
line.long 0x18 "QDC1_ICAP2,QDC1 Trigger Input Connections"
hexmask.long.byte 0x18 0.--6. 1. "INP,QDC1 input connections"
line.long 0x1C "QDC1_ICAP3,QDC1 Trigger Input Connections"
hexmask.long.byte 0x1C 0.--6. 1. "INP,QDC1 input connections"
group.long 0x3A4++0x13
line.long 0x0 "FlexPWM0_SM0_EXTSYNC,PWM0 input trigger connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,EXTSYNC input connections for PWM0"
line.long 0x4 "FlexPWM0_SM1_EXTA,PWM0 input trigger connections"
hexmask.long.byte 0x4 0.--5. 1. "TRIGIN,EXTA input connections for PWM0"
line.long 0x8 "FlexPWM0_SM1_EXTSYNC,PWM0 input trigger connections"
hexmask.long.byte 0x8 0.--5. 1. "TRIGIN,EXTSYNC input connections for PWM0"
line.long 0xC "FlexPWM0_SM2_EXTA,PWM0 input trigger connections"
hexmask.long.byte 0xC 0.--5. 1. "TRIGIN,EXTA input connections for PWM0"
line.long 0x10 "FlexPWM0_SM2_EXTSYNC,PWM0 input trigger connections"
hexmask.long.byte 0x10 0.--5. 1. "TRIGIN,EXTSYNC input connections for PWM0"
endif
sif (cpuis("MC?A156*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x3C0)++0x3
line.long 0x0 "FlexPWM0_FAULT[$1],PWM0 Fault Input Trigger Connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,FAULT input connections for PWM0"
repeat.end
group.long 0x3E0++0x17
line.long 0x0 "FlexPWM1_SM0_EXTA0,PWM1 input trigger connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,EXTA input connections for PWM0"
line.long 0x4 "FlexPWM1_SM0_EXTSYNC,PWM1 input trigger connections"
hexmask.long.byte 0x4 0.--5. 1. "TRIGIN,EXTSYNC input connections for PWM0"
line.long 0x8 "FlexPWM1_SM1_EXTA,PWM1 input trigger connections"
hexmask.long.byte 0x8 0.--5. 1. "TRIGIN,EXTA input connections for PWM0"
line.long 0xC "FlexPWM1_SM1_EXTSYNC,PWM1 input trigger connections"
hexmask.long.byte 0xC 0.--5. 1. "TRIGIN,EXTSYNC input connections for PWM0"
line.long 0x10 "FlexPWM1_SM2_EXTA,PWM1 input trigger connections"
hexmask.long.byte 0x10 0.--5. 1. "TRIGIN,EXTA input connections for PWM0"
line.long 0x14 "FlexPWM1_SM2_EXTSYNC,PWM1 input trigger connections"
hexmask.long.byte 0x14 0.--5. 1. "TRIGIN,EXTSYNC input connections for PWM0"
endif
sif (cpuis("MC?A156*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x400)++0x3
line.long 0x0 "FlexPWM1_FAULT[$1],PWM1 Fault Input Trigger Connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,FAULT input connections for PWM1"
repeat.end
group.long 0x410++0x3
line.long 0x0 "FlexPWM1_FORCE,PWM1 input trigger connections"
hexmask.long.byte 0x0 0.--5. 1. "TRIGIN,Trigger input connections for PWM1"
group.long 0x424++0x3
line.long 0x0 "PWM1_EXT_CLK,PWM1 external clock trigger"
hexmask.long.byte 0x0 0.--3. 1. "TRIGIN,Trigger input connections for PWM"
endif
sif (cpuis("MC?A156*"))
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x440)++0x3
line.long 0x0 "AOI0_INPUT[$1],AOI0 trigger input connections 0"
hexmask.long.byte 0x0 0.--6. 1. "INP,AOI0 trigger input connections"
repeat.end
group.long 0x4C0++0x3
line.long 0x0 "EXT_TRIG0,EXT trigger connections 0"
hexmask.long.byte 0x0 0.--4. 1. "INP,EXT trigger input connections"
group.long 0x540++0x3
line.long 0x0 "LPI2C2_TRIG,LPI2C2 trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "INP,LPI2C2 trigger input connections"
group.long 0x580++0x3
line.long 0x0 "OPAMP0_TRIG,OPAMP0 Trigger Input Connections"
hexmask.long.byte 0x0 0.--5. 1. "INP,DAC0 trigger input"
group.long 0x5C0++0x3
line.long 0x0 "LPI2C1_TRIG,LPI2C1 trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "INP,LPI2C1 trigger input connections"
group.long 0x680++0x3
line.long 0x0 "LPUART3,LPUART3 trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "INP,LPUART3 trigger input connections"
group.long 0x6A0++0x3
line.long 0x0 "LPUART4,LPUART4 trigger input connections"
hexmask.long.byte 0x0 0.--5. 1. "INP,LPUART4 trigger input connections"
endif
sif (cpuis("MC?A156*"))
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x6E0)++0x3
line.long 0x0 "FLEXIO_TRIG[$1],FlexIO Trigger Input Connections"
hexmask.long.byte 0x0 0.--6. 1. "INP,Input number for FlexIO0."
repeat.end
endif
tree.end
tree "LPI2C (Low-Power Inter-Integrated Circuit)"
base ad:0x0
tree "LPI2C0"
base ad:0x4009A000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 8.--11. 1. "MRXFIFO,Controller Receive FIFO Size"
hexmask.long.byte 0x4 0.--3. 1. "MTXFIFO,Controller Transmit FIFO Size"
group.long 0x10++0x1F
line.long 0x0 "MCR,Controller Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Reset receive FIFO"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Reset transmit FIFO"
newline
bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Disable,1: Enable"
bitfld.long 0x0 2. "DOZEN,Doze Mode Enable" "0: Enable,1: Disable"
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: No effect,1: Reset"
bitfld.long 0x0 0. "MEN,Controller Enable" "0: Disable,1: Enable"
line.long 0x4 "MSR,Controller Status"
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
rbitfld.long 0x4 24. "MBF,Controller Busy Flag" "0: Idle,1: Busy"
newline
eventfld.long 0x4 15. "STF,Start Flag" "0: Start condition not detected,1: Start condition detected"
eventfld.long 0x4 14. "DMF,Data Match Flag" "0: Matching data not received,1: Matching data received"
newline
eventfld.long 0x4 13. "PLTF,Pin Low Timeout Flag" "0: Pin low timeout did not occur,1: Pin low timeout occurred"
eventfld.long 0x4 12. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error"
newline
eventfld.long 0x4 11. "ALF,Arbitration Lost Flag" "0: Controller did not lose arbitration,1: Controller lost arbitration"
eventfld.long 0x4 10. "NDF,NACK Detect Flag" "0: No unexpected NACK detected,1: Unexpected NACK detected"
newline
eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop condition generated,1: Stop condition generated"
eventfld.long 0x4 8. "EPF,End Packet Flag" "0: No Stop or repeated Start generated,1: Stop or repeated Start generated"
newline
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive data not ready,1: Receive data ready"
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data requested"
line.long 0x8 "MIER,Controller Interrupt Enable"
bitfld.long 0x8 15. "STIE,Start Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "DMIE,Data Match Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 13. "PLTIE,Pin Low Timeout Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "ALIE,Arbitration Lost Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "NDIE,NACK Detect Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "EPIE,End Packet Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "MDER,Controller DMA Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "MCFGR0,Controller Configuration 0"
bitfld.long 0x10 17. "ABORT,Abort Transfer" "0: Normal transfer,1: Abort existing transfer and do not start a new one"
bitfld.long 0x10 16. "RELAX,Relaxed Mode" "0: Normal transfer,1: Relaxed transfer"
newline
bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO,1: Received data is discarded unless MSR[DMF] is set"
bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 3. "HRDIR,Host Request Direction" "0: HREQ pin is input (for LPI2C controller),1: HREQ pin is output (for LPI2C target)"
bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin HREQ,1: Host request input is input trigger"
newline
bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low,1: Active high"
bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Disable,1: Enable"
line.long 0x14 "MCFGR1,Controller Configuration 1"
bitfld.long 0x14 24.--26. "PINCFG,Pin Configuration" "0: Two-pin open drain mode,1: Two-pin output only mode (Ultra-Fast mode),2: Two-pin push-pull mode,3: Four-pin push-pull mode,4: Two-pin open-drain mode with separate LPI2C target,5: Two-pin output only mode (Ultra-Fast mode) with..,6: Two-pin push-pull mode with separate LPI2C target,7: Four-pin push-pull mode (inverted outputs)"
bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: Match is enabled: first data word equals..,3: Match is enabled: any data word equals..,4: Match is enabled: (first data word equals..,5: Match is enabled: (any data word equals..,6: Match is enabled: (first data word AND..,7: Match is enabled: (any data word AND.."
newline
bitfld.long 0x14 12. "STARTCFG,Start Configuration" "0: Sets when both I2C bus and LPI2C controller are..,1: Sets when I2C bus is idle"
bitfld.long 0x14 11. "STOPCFG,Stop Configuration" "0: Any Stop condition,1: Last Stop condition"
newline
bitfld.long 0x14 10. "TIMECFG,Timeout Configuration" "0: SCL,1: SCL or SDA"
bitfld.long 0x14 9. "IGNACK,Ignore NACK" "0: No effect,1: Treat a received NACK as an ACK"
newline
bitfld.long 0x14 8. "AUTOSTOP,Automatic Stop Generation" "0: No effect,1: Stop automatically generated"
bitfld.long 0x14 0.--2. "PRESCALE,Prescaler" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
line.long 0x18 "MCFGR2,Controller Configuration 2"
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
newline
hexmask.long.word 0x18 0.--11. 1. "BUSIDLE,Bus Idle Timeout"
line.long 0x1C "MCFGR3,Controller Configuration 3"
hexmask.long.word 0x1C 8.--19. 1. "PINLOW,Pin Low Timeout"
group.long 0x40++0x3
line.long 0x0 "MDMR,Controller Data Match"
hexmask.long.byte 0x0 16.--23. 1. "MATCH1,Match 1 Value"
hexmask.long.byte 0x0 0.--7. 1. "MATCH0,Match 0 Value"
group.long 0x48++0x3
line.long 0x0 "MCCR0,Controller Clock Configuration 0"
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
group.long 0x50++0x3
line.long 0x0 "MCCR1,Controller Clock Configuration 1"
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
group.long 0x58++0x3
line.long 0x0 "MFCR,Controller FIFO Control"
bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3"
bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3"
rgroup.long 0x5C++0x3
line.long 0x0 "MFSR,Controller FIFO Status"
bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7"
wgroup.long 0x60++0x3
line.long 0x0 "MTDR,Controller Transmit Data"
bitfld.long 0x0 8.--10. "CMD,Command Data" "0: Transmit the value in DATA[7:0],1: Receive (DATA[7:0] + 1) bytes,2: Generate Stop condition on I2C bus,3: Receive and discard (DATA[7:0] + 1) bytes,4: Generate (repeated) Start on the I2C bus and..,5: Generate (repeated) Start on the I2C bus and..,6: Generate (repeated) Start on the I2C bus and..,7: Generate (repeated) Start on the I2C bus and.."
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
rgroup.long 0x70++0x3
line.long 0x0 "MRDR,Controller Receive Data"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
rgroup.long 0x78++0x3
line.long 0x0 "MRDROR,Controller Receive Data Read Only"
bitfld.long 0x0 14. "RXEMPTY,RX Empty" "0: Not empty,1: Empty"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
group.long 0x110++0x1B
line.long 0x0 "SCR,Target Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: SRDR is now empty"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: STDR is now empty"
newline
bitfld.long 0x0 5. "FILTDZ,Filter Doze Enable" "0: Enable,1: Disable"
bitfld.long 0x0 4. "FILTEN,Filter Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
bitfld.long 0x0 0. "SEN,Target Enable" "0: Disable,1: Enable"
line.long 0x4 "SSR,Target Status"
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
rbitfld.long 0x4 24. "SBF,Target Busy Flag" "0: Idle,1: Busy"
newline
rbitfld.long 0x4 15. "SARF,SMBus Alert Response Flag" "0: Disabled or not detected,1: Enabled and detected"
rbitfld.long 0x4 14. "GCF,General Call Flag" "0: General call address disabled or not detected,1: General call address detected"
newline
rbitfld.long 0x4 13. "AM1F,Address Match 1 Flag" "0: Matching address not received,1: Matching address received"
rbitfld.long 0x4 12. "AM0F,Address Match 0 Flag" "0: ADDR0 matching address not received,1: ADDR0 matching address received"
newline
eventfld.long 0x4 11. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error"
eventfld.long 0x4 10. "BEF,Bit Error Flag" "0: No bit error occurred,1: Bit error occurred"
newline
eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop detected,1: Stop detected"
eventfld.long 0x4 8. "RSF,Repeated Start Flag" "0: No repeated Start detected,1: Repeated Start detected"
newline
rbitfld.long 0x4 3. "TAF,Transmit ACK Flag" "0: Not required,1: Required"
rbitfld.long 0x4 2. "AVF,Address Valid Flag" "0: Not valid,1: Valid"
newline
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Not ready,1: Ready"
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data is requested"
line.long 0x8 "SIER,Target Interrupt Enable"
bitfld.long 0x8 15. "SARIE,SMBus Alert Response Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "GCIE,General Call Interrupt Enable" "0: Disabled,1: Enabled"
newline
bitfld.long 0x8 13. "AM1IE,Address Match 1 Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "AM0IE,Address Match 0 Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "BEIE,Bit Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "RSIE,Repeated Start Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 3. "TAIE,Transmit ACK Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 2. "AVIE,Address Valid Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "SDER,Target DMA Enable"
bitfld.long 0xC 9. "SDDE,Stop Detect DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 8. "RSDE,Repeated Start DMA Enable" "0: Disable,1: Enable"
newline
bitfld.long 0xC 2. "AVDE,Address Valid DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable DMA request,1: Enable DMA request"
newline
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "SCFGR0,Target Configuration 0"
rbitfld.long 0x10 1. "RDACK,Read Acknowledge Flag" "0: Read Request not acknowledged,1: Read Request acknowledged"
bitfld.long 0x10 0. "RDREQ,Read Request" "0: Disable,1: Enable"
line.long 0x14 "SCFGR1,Target Configuration 1"
bitfld.long 0x14 26. "SDCFG,Stop Detect Configuration" "0: Any Stop condition following an address match,1: Any Stop condition"
bitfld.long 0x14 25. "RSCFG,Repeated Start Configuration" "0: Any repeated Start condition following an..,1: Any repeated Start condition"
newline
bitfld.long 0x14 24. "RXALL,Receive All" "0: Disable,1: Enable"
bitfld.long 0x14 16.--18. "ADDRCFG,Address Configuration" "0: Address match 0 (7-bit),1: Address match 0 (10-bit),2: Address match 0 (7-bit) or address match 1 (7-bit),3: Address match 0 (10-bit) or address match 1..,4: Address match 0 (7-bit) or address match 1..,5: Address match 0 (10-bit) or address match 1..,6: From address match 0 (7-bit) to address match 1..,7: From address match 0 (10-bit) to address match 1.."
newline
bitfld.long 0x14 13. "HSMEN,HS Mode Enable" "0: Disable,1: Enable"
bitfld.long 0x14 12. "IGNACK,Ignore NACK" "0: End transfer on NACK,1: Do not end transfer on NACK"
newline
bitfld.long 0x14 11. "RXCFG,Receive Data Configuration" "0: Return received data clear MSR[RDF],1: Return SASR and clear SSR[AVF] when SSR[AVF] is.."
bitfld.long 0x14 10. "TXCFG,Transmit Flag Configuration" "0: MSR[TDF] is set only during a target-transmit..,1: MSR[TDF] is set whenever STDR is empty"
newline
bitfld.long 0x14 9. "SAEN,SMBus Alert Enable" "0: Disable,1: Enable"
bitfld.long 0x14 8. "GCEN,General Call Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x14 4. "RXNACK,Receive NACK" "0: ACK or NACK always determined by STAR[TXNACK],1: NACK always generated on address overrun or.."
bitfld.long 0x14 3. "ACKSTALL,ACK SCL Stall" "0: Disable,1: Enable"
newline
bitfld.long 0x14 2. "TXDSTALL,Transmit Data SCL Stall" "0: Disable,1: Enable"
bitfld.long 0x14 1. "RXSTALL,RX SCL Stall" "0: Disable,1: Enable"
newline
bitfld.long 0x14 0. "ADRSTALL,Address SCL Stall" "0: Disable,1: Enable"
line.long 0x18 "SCFGR2,Target Configuration 2"
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
newline
hexmask.long.byte 0x18 8.--13. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x18 0.--3. 1. "CLKHOLD,Clock Hold Time"
group.long 0x140++0x3
line.long 0x0 "SAMR,Target Address Match"
hexmask.long.word 0x0 17.--26. 1. "ADDR1,Address 1 Value"
hexmask.long.word 0x0 1.--10. 1. "ADDR0,Address 0 Value"
rgroup.long 0x150++0x3
line.long 0x0 "SASR,Target Address Status"
bitfld.long 0x0 14. "ANV,Address Not Valid" "0: Valid,1: Not valid"
hexmask.long.word 0x0 0.--10. 1. "RADDR,Received Address"
group.long 0x154++0x3
line.long 0x0 "STAR,Target Transmit ACK"
bitfld.long 0x0 0. "TXNACK,Transmit NACK" "0: Transmit ACK,1: Transmit NACK"
wgroup.long 0x160++0x3
line.long 0x0 "STDR,Target Transmit Data"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
rgroup.long 0x170++0x3
line.long 0x0 "SRDR,Target Receive Data"
bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not first,1: First"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
newline
bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Received Data"
rgroup.long 0x178++0x3
line.long 0x0 "SRDROR,Target Receive Data Read Only"
bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not the first,1: First"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
newline
bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
tree.end
sif (cpuis("MC?A144*"))
tree "LPI2C1"
base ad:0x4009B000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 8.--11. 1. "MRXFIFO,Controller Receive FIFO Size"
hexmask.long.byte 0x4 0.--3. 1. "MTXFIFO,Controller Transmit FIFO Size"
group.long 0x10++0x1F
line.long 0x0 "MCR,Controller Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Reset receive FIFO"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Reset transmit FIFO"
newline
bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Disable,1: Enable"
bitfld.long 0x0 2. "DOZEN,Doze Mode Enable" "0: Enable,1: Disable"
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: No effect,1: Reset"
bitfld.long 0x0 0. "MEN,Controller Enable" "0: Disable,1: Enable"
line.long 0x4 "MSR,Controller Status"
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
rbitfld.long 0x4 24. "MBF,Controller Busy Flag" "0: Idle,1: Busy"
newline
eventfld.long 0x4 15. "STF,Start Flag" "0: Start condition not detected,1: Start condition detected"
eventfld.long 0x4 14. "DMF,Data Match Flag" "0: Matching data not received,1: Matching data received"
newline
eventfld.long 0x4 13. "PLTF,Pin Low Timeout Flag" "0: Pin low timeout did not occur,1: Pin low timeout occurred"
eventfld.long 0x4 12. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error"
newline
eventfld.long 0x4 11. "ALF,Arbitration Lost Flag" "0: Controller did not lose arbitration,1: Controller lost arbitration"
eventfld.long 0x4 10. "NDF,NACK Detect Flag" "0: No unexpected NACK detected,1: Unexpected NACK detected"
newline
eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop condition generated,1: Stop condition generated"
eventfld.long 0x4 8. "EPF,End Packet Flag" "0: No Stop or repeated Start generated,1: Stop or repeated Start generated"
newline
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive data not ready,1: Receive data ready"
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data requested"
line.long 0x8 "MIER,Controller Interrupt Enable"
bitfld.long 0x8 15. "STIE,Start Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "DMIE,Data Match Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 13. "PLTIE,Pin Low Timeout Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "ALIE,Arbitration Lost Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "NDIE,NACK Detect Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "EPIE,End Packet Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "MDER,Controller DMA Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "MCFGR0,Controller Configuration 0"
bitfld.long 0x10 17. "ABORT,Abort Transfer" "0: Normal transfer,1: Abort existing transfer and do not start a new one"
bitfld.long 0x10 16. "RELAX,Relaxed Mode" "0: Normal transfer,1: Relaxed transfer"
newline
bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO,1: Received data is discarded unless MSR[DMF] is set"
bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 3. "HRDIR,Host Request Direction" "0: HREQ pin is input (for LPI2C controller),1: HREQ pin is output (for LPI2C target)"
bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin HREQ,1: Host request input is input trigger"
newline
bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low,1: Active high"
bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Disable,1: Enable"
line.long 0x14 "MCFGR1,Controller Configuration 1"
bitfld.long 0x14 24.--26. "PINCFG,Pin Configuration" "0: Two-pin open drain mode,1: Two-pin output only mode (Ultra-Fast mode),2: Two-pin push-pull mode,3: Four-pin push-pull mode,4: Two-pin open-drain mode with separate LPI2C target,5: Two-pin output only mode (Ultra-Fast mode) with..,6: Two-pin push-pull mode with separate LPI2C target,7: Four-pin push-pull mode (inverted outputs)"
bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: Match is enabled: first data word equals..,3: Match is enabled: any data word equals..,4: Match is enabled: (first data word equals..,5: Match is enabled: (any data word equals..,6: Match is enabled: (first data word AND..,7: Match is enabled: (any data word AND.."
newline
bitfld.long 0x14 12. "STARTCFG,Start Configuration" "0: Sets when both I2C bus and LPI2C controller are..,1: Sets when I2C bus is idle"
bitfld.long 0x14 11. "STOPCFG,Stop Configuration" "0: Any Stop condition,1: Last Stop condition"
newline
bitfld.long 0x14 10. "TIMECFG,Timeout Configuration" "0: SCL,1: SCL or SDA"
bitfld.long 0x14 9. "IGNACK,Ignore NACK" "0: No effect,1: Treat a received NACK as an ACK"
newline
bitfld.long 0x14 8. "AUTOSTOP,Automatic Stop Generation" "0: No effect,1: Stop automatically generated"
bitfld.long 0x14 0.--2. "PRESCALE,Prescaler" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
line.long 0x18 "MCFGR2,Controller Configuration 2"
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
newline
hexmask.long.word 0x18 0.--11. 1. "BUSIDLE,Bus Idle Timeout"
line.long 0x1C "MCFGR3,Controller Configuration 3"
hexmask.long.word 0x1C 8.--19. 1. "PINLOW,Pin Low Timeout"
group.long 0x40++0x3
line.long 0x0 "MDMR,Controller Data Match"
hexmask.long.byte 0x0 16.--23. 1. "MATCH1,Match 1 Value"
hexmask.long.byte 0x0 0.--7. 1. "MATCH0,Match 0 Value"
group.long 0x48++0x3
line.long 0x0 "MCCR0,Controller Clock Configuration 0"
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
group.long 0x50++0x3
line.long 0x0 "MCCR1,Controller Clock Configuration 1"
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
group.long 0x58++0x3
line.long 0x0 "MFCR,Controller FIFO Control"
bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3"
bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3"
rgroup.long 0x5C++0x3
line.long 0x0 "MFSR,Controller FIFO Status"
bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7"
wgroup.long 0x60++0x3
line.long 0x0 "MTDR,Controller Transmit Data"
bitfld.long 0x0 8.--10. "CMD,Command Data" "0: Transmit the value in DATA[7:0],1: Receive (DATA[7:0] + 1) bytes,2: Generate Stop condition on I2C bus,3: Receive and discard (DATA[7:0] + 1) bytes,4: Generate (repeated) Start on the I2C bus and..,5: Generate (repeated) Start on the I2C bus and..,6: Generate (repeated) Start on the I2C bus and..,7: Generate (repeated) Start on the I2C bus and.."
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
rgroup.long 0x70++0x3
line.long 0x0 "MRDR,Controller Receive Data"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
rgroup.long 0x78++0x3
line.long 0x0 "MRDROR,Controller Receive Data Read Only"
bitfld.long 0x0 14. "RXEMPTY,RX Empty" "0: Not empty,1: Empty"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
group.long 0x110++0x1B
line.long 0x0 "SCR,Target Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: SRDR is now empty"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: STDR is now empty"
newline
bitfld.long 0x0 5. "FILTDZ,Filter Doze Enable" "0: Enable,1: Disable"
bitfld.long 0x0 4. "FILTEN,Filter Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
bitfld.long 0x0 0. "SEN,Target Enable" "0: Disable,1: Enable"
line.long 0x4 "SSR,Target Status"
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
rbitfld.long 0x4 24. "SBF,Target Busy Flag" "0: Idle,1: Busy"
newline
rbitfld.long 0x4 15. "SARF,SMBus Alert Response Flag" "0: Disabled or not detected,1: Enabled and detected"
rbitfld.long 0x4 14. "GCF,General Call Flag" "0: General call address disabled or not detected,1: General call address detected"
newline
rbitfld.long 0x4 13. "AM1F,Address Match 1 Flag" "0: Matching address not received,1: Matching address received"
rbitfld.long 0x4 12. "AM0F,Address Match 0 Flag" "0: ADDR0 matching address not received,1: ADDR0 matching address received"
newline
eventfld.long 0x4 11. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error"
eventfld.long 0x4 10. "BEF,Bit Error Flag" "0: No bit error occurred,1: Bit error occurred"
newline
eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop detected,1: Stop detected"
eventfld.long 0x4 8. "RSF,Repeated Start Flag" "0: No repeated Start detected,1: Repeated Start detected"
newline
rbitfld.long 0x4 3. "TAF,Transmit ACK Flag" "0: Not required,1: Required"
rbitfld.long 0x4 2. "AVF,Address Valid Flag" "0: Not valid,1: Valid"
newline
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Not ready,1: Ready"
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data is requested"
line.long 0x8 "SIER,Target Interrupt Enable"
bitfld.long 0x8 15. "SARIE,SMBus Alert Response Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "GCIE,General Call Interrupt Enable" "0: Disabled,1: Enabled"
newline
bitfld.long 0x8 13. "AM1IE,Address Match 1 Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "AM0IE,Address Match 0 Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "BEIE,Bit Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "RSIE,Repeated Start Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 3. "TAIE,Transmit ACK Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 2. "AVIE,Address Valid Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "SDER,Target DMA Enable"
bitfld.long 0xC 9. "SDDE,Stop Detect DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 8. "RSDE,Repeated Start DMA Enable" "0: Disable,1: Enable"
newline
bitfld.long 0xC 2. "AVDE,Address Valid DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable DMA request,1: Enable DMA request"
newline
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "SCFGR0,Target Configuration 0"
rbitfld.long 0x10 1. "RDACK,Read Acknowledge Flag" "0: Read Request not acknowledged,1: Read Request acknowledged"
bitfld.long 0x10 0. "RDREQ,Read Request" "0: Disable,1: Enable"
line.long 0x14 "SCFGR1,Target Configuration 1"
bitfld.long 0x14 26. "SDCFG,Stop Detect Configuration" "0: Any Stop condition following an address match,1: Any Stop condition"
bitfld.long 0x14 25. "RSCFG,Repeated Start Configuration" "0: Any repeated Start condition following an..,1: Any repeated Start condition"
newline
bitfld.long 0x14 24. "RXALL,Receive All" "0: Disable,1: Enable"
bitfld.long 0x14 16.--18. "ADDRCFG,Address Configuration" "0: Address match 0 (7-bit),1: Address match 0 (10-bit),2: Address match 0 (7-bit) or address match 1 (7-bit),3: Address match 0 (10-bit) or address match 1..,4: Address match 0 (7-bit) or address match 1..,5: Address match 0 (10-bit) or address match 1..,6: From address match 0 (7-bit) to address match 1..,7: From address match 0 (10-bit) to address match 1.."
newline
bitfld.long 0x14 13. "HSMEN,HS Mode Enable" "0: Disable,1: Enable"
bitfld.long 0x14 12. "IGNACK,Ignore NACK" "0: End transfer on NACK,1: Do not end transfer on NACK"
newline
bitfld.long 0x14 11. "RXCFG,Receive Data Configuration" "0: Return received data clear MSR[RDF],1: Return SASR and clear SSR[AVF] when SSR[AVF] is.."
bitfld.long 0x14 10. "TXCFG,Transmit Flag Configuration" "0: MSR[TDF] is set only during a target-transmit..,1: MSR[TDF] is set whenever STDR is empty"
newline
bitfld.long 0x14 9. "SAEN,SMBus Alert Enable" "0: Disable,1: Enable"
bitfld.long 0x14 8. "GCEN,General Call Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x14 4. "RXNACK,Receive NACK" "0: ACK or NACK always determined by STAR[TXNACK],1: NACK always generated on address overrun or.."
bitfld.long 0x14 3. "ACKSTALL,ACK SCL Stall" "0: Disable,1: Enable"
newline
bitfld.long 0x14 2. "TXDSTALL,Transmit Data SCL Stall" "0: Disable,1: Enable"
bitfld.long 0x14 1. "RXSTALL,RX SCL Stall" "0: Disable,1: Enable"
newline
bitfld.long 0x14 0. "ADRSTALL,Address SCL Stall" "0: Disable,1: Enable"
line.long 0x18 "SCFGR2,Target Configuration 2"
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
newline
hexmask.long.byte 0x18 8.--13. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x18 0.--3. 1. "CLKHOLD,Clock Hold Time"
group.long 0x140++0x3
line.long 0x0 "SAMR,Target Address Match"
hexmask.long.word 0x0 17.--26. 1. "ADDR1,Address 1 Value"
hexmask.long.word 0x0 1.--10. 1. "ADDR0,Address 0 Value"
rgroup.long 0x150++0x3
line.long 0x0 "SASR,Target Address Status"
bitfld.long 0x0 14. "ANV,Address Not Valid" "0: Valid,1: Not valid"
hexmask.long.word 0x0 0.--10. 1. "RADDR,Received Address"
group.long 0x154++0x3
line.long 0x0 "STAR,Target Transmit ACK"
bitfld.long 0x0 0. "TXNACK,Transmit NACK" "0: Transmit ACK,1: Transmit NACK"
wgroup.long 0x160++0x3
line.long 0x0 "STDR,Target Transmit Data"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
rgroup.long 0x170++0x3
line.long 0x0 "SRDR,Target Receive Data"
bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not first,1: First"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
newline
bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Received Data"
rgroup.long 0x178++0x3
line.long 0x0 "SRDROR,Target Receive Data Read Only"
bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not the first,1: First"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
newline
bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
tree.end
tree "LPI2C2"
base ad:0x400D4000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 8.--11. 1. "MRXFIFO,Controller Receive FIFO Size"
hexmask.long.byte 0x4 0.--3. 1. "MTXFIFO,Controller Transmit FIFO Size"
group.long 0x10++0x1F
line.long 0x0 "MCR,Controller Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Reset receive FIFO"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Reset transmit FIFO"
newline
bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Disable,1: Enable"
bitfld.long 0x0 2. "DOZEN,Doze Mode Enable" "0: Enable,1: Disable"
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: No effect,1: Reset"
bitfld.long 0x0 0. "MEN,Controller Enable" "0: Disable,1: Enable"
line.long 0x4 "MSR,Controller Status"
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
rbitfld.long 0x4 24. "MBF,Controller Busy Flag" "0: Idle,1: Busy"
newline
eventfld.long 0x4 15. "STF,Start Flag" "0: Start condition not detected,1: Start condition detected"
eventfld.long 0x4 14. "DMF,Data Match Flag" "0: Matching data not received,1: Matching data received"
newline
eventfld.long 0x4 13. "PLTF,Pin Low Timeout Flag" "0: Pin low timeout did not occur,1: Pin low timeout occurred"
eventfld.long 0x4 12. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error"
newline
eventfld.long 0x4 11. "ALF,Arbitration Lost Flag" "0: Controller did not lose arbitration,1: Controller lost arbitration"
eventfld.long 0x4 10. "NDF,NACK Detect Flag" "0: No unexpected NACK detected,1: Unexpected NACK detected"
newline
eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop condition generated,1: Stop condition generated"
eventfld.long 0x4 8. "EPF,End Packet Flag" "0: No Stop or repeated Start generated,1: Stop or repeated Start generated"
newline
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive data not ready,1: Receive data ready"
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data requested"
line.long 0x8 "MIER,Controller Interrupt Enable"
bitfld.long 0x8 15. "STIE,Start Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "DMIE,Data Match Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 13. "PLTIE,Pin Low Timeout Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "ALIE,Arbitration Lost Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "NDIE,NACK Detect Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "EPIE,End Packet Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "MDER,Controller DMA Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "MCFGR0,Controller Configuration 0"
bitfld.long 0x10 17. "ABORT,Abort Transfer" "0: Normal transfer,1: Abort existing transfer and do not start a new one"
bitfld.long 0x10 16. "RELAX,Relaxed Mode" "0: Normal transfer,1: Relaxed transfer"
newline
bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO,1: Received data is discarded unless MSR[DMF] is set"
bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 3. "HRDIR,Host Request Direction" "0: HREQ pin is input (for LPI2C controller),1: HREQ pin is output (for LPI2C target)"
bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin HREQ,1: Host request input is input trigger"
newline
bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low,1: Active high"
bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Disable,1: Enable"
line.long 0x14 "MCFGR1,Controller Configuration 1"
bitfld.long 0x14 24.--26. "PINCFG,Pin Configuration" "0: Two-pin open drain mode,1: Two-pin output only mode (Ultra-Fast mode),2: Two-pin push-pull mode,3: Four-pin push-pull mode,4: Two-pin open-drain mode with separate LPI2C target,5: Two-pin output only mode (Ultra-Fast mode) with..,6: Two-pin push-pull mode with separate LPI2C target,7: Four-pin push-pull mode (inverted outputs)"
bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: Match is enabled: first data word equals..,3: Match is enabled: any data word equals..,4: Match is enabled: (first data word equals..,5: Match is enabled: (any data word equals..,6: Match is enabled: (first data word AND..,7: Match is enabled: (any data word AND.."
newline
bitfld.long 0x14 12. "STARTCFG,Start Configuration" "0: Sets when both I2C bus and LPI2C controller are..,1: Sets when I2C bus is idle"
bitfld.long 0x14 11. "STOPCFG,Stop Configuration" "0: Any Stop condition,1: Last Stop condition"
newline
bitfld.long 0x14 10. "TIMECFG,Timeout Configuration" "0: SCL,1: SCL or SDA"
bitfld.long 0x14 9. "IGNACK,Ignore NACK" "0: No effect,1: Treat a received NACK as an ACK"
newline
bitfld.long 0x14 8. "AUTOSTOP,Automatic Stop Generation" "0: No effect,1: Stop automatically generated"
bitfld.long 0x14 0.--2. "PRESCALE,Prescaler" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
line.long 0x18 "MCFGR2,Controller Configuration 2"
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
newline
hexmask.long.word 0x18 0.--11. 1. "BUSIDLE,Bus Idle Timeout"
line.long 0x1C "MCFGR3,Controller Configuration 3"
hexmask.long.word 0x1C 8.--19. 1. "PINLOW,Pin Low Timeout"
group.long 0x40++0x3
line.long 0x0 "MDMR,Controller Data Match"
hexmask.long.byte 0x0 16.--23. 1. "MATCH1,Match 1 Value"
hexmask.long.byte 0x0 0.--7. 1. "MATCH0,Match 0 Value"
group.long 0x48++0x3
line.long 0x0 "MCCR0,Controller Clock Configuration 0"
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
group.long 0x50++0x3
line.long 0x0 "MCCR1,Controller Clock Configuration 1"
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
group.long 0x58++0x3
line.long 0x0 "MFCR,Controller FIFO Control"
bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3"
bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3"
rgroup.long 0x5C++0x3
line.long 0x0 "MFSR,Controller FIFO Status"
bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7"
wgroup.long 0x60++0x3
line.long 0x0 "MTDR,Controller Transmit Data"
bitfld.long 0x0 8.--10. "CMD,Command Data" "0: Transmit the value in DATA[7:0],1: Receive (DATA[7:0] + 1) bytes,2: Generate Stop condition on I2C bus,3: Receive and discard (DATA[7:0] + 1) bytes,4: Generate (repeated) Start on the I2C bus and..,5: Generate (repeated) Start on the I2C bus and..,6: Generate (repeated) Start on the I2C bus and..,7: Generate (repeated) Start on the I2C bus and.."
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
rgroup.long 0x70++0x3
line.long 0x0 "MRDR,Controller Receive Data"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
rgroup.long 0x78++0x3
line.long 0x0 "MRDROR,Controller Receive Data Read Only"
bitfld.long 0x0 14. "RXEMPTY,RX Empty" "0: Not empty,1: Empty"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
group.long 0x110++0x1B
line.long 0x0 "SCR,Target Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: SRDR is now empty"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: STDR is now empty"
newline
bitfld.long 0x0 5. "FILTDZ,Filter Doze Enable" "0: Enable,1: Disable"
bitfld.long 0x0 4. "FILTEN,Filter Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
bitfld.long 0x0 0. "SEN,Target Enable" "0: Disable,1: Enable"
line.long 0x4 "SSR,Target Status"
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
rbitfld.long 0x4 24. "SBF,Target Busy Flag" "0: Idle,1: Busy"
newline
rbitfld.long 0x4 15. "SARF,SMBus Alert Response Flag" "0: Disabled or not detected,1: Enabled and detected"
rbitfld.long 0x4 14. "GCF,General Call Flag" "0: General call address disabled or not detected,1: General call address detected"
newline
rbitfld.long 0x4 13. "AM1F,Address Match 1 Flag" "0: Matching address not received,1: Matching address received"
rbitfld.long 0x4 12. "AM0F,Address Match 0 Flag" "0: ADDR0 matching address not received,1: ADDR0 matching address received"
newline
eventfld.long 0x4 11. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error"
eventfld.long 0x4 10. "BEF,Bit Error Flag" "0: No bit error occurred,1: Bit error occurred"
newline
eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop detected,1: Stop detected"
eventfld.long 0x4 8. "RSF,Repeated Start Flag" "0: No repeated Start detected,1: Repeated Start detected"
newline
rbitfld.long 0x4 3. "TAF,Transmit ACK Flag" "0: Not required,1: Required"
rbitfld.long 0x4 2. "AVF,Address Valid Flag" "0: Not valid,1: Valid"
newline
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Not ready,1: Ready"
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data is requested"
line.long 0x8 "SIER,Target Interrupt Enable"
bitfld.long 0x8 15. "SARIE,SMBus Alert Response Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "GCIE,General Call Interrupt Enable" "0: Disabled,1: Enabled"
newline
bitfld.long 0x8 13. "AM1IE,Address Match 1 Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "AM0IE,Address Match 0 Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "BEIE,Bit Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "RSIE,Repeated Start Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 3. "TAIE,Transmit ACK Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 2. "AVIE,Address Valid Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "SDER,Target DMA Enable"
bitfld.long 0xC 9. "SDDE,Stop Detect DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 8. "RSDE,Repeated Start DMA Enable" "0: Disable,1: Enable"
newline
bitfld.long 0xC 2. "AVDE,Address Valid DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable DMA request,1: Enable DMA request"
newline
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "SCFGR0,Target Configuration 0"
rbitfld.long 0x10 1. "RDACK,Read Acknowledge Flag" "0: Read Request not acknowledged,1: Read Request acknowledged"
bitfld.long 0x10 0. "RDREQ,Read Request" "0: Disable,1: Enable"
line.long 0x14 "SCFGR1,Target Configuration 1"
bitfld.long 0x14 26. "SDCFG,Stop Detect Configuration" "0: Any Stop condition following an address match,1: Any Stop condition"
bitfld.long 0x14 25. "RSCFG,Repeated Start Configuration" "0: Any repeated Start condition following an..,1: Any repeated Start condition"
newline
bitfld.long 0x14 24. "RXALL,Receive All" "0: Disable,1: Enable"
bitfld.long 0x14 16.--18. "ADDRCFG,Address Configuration" "0: Address match 0 (7-bit),1: Address match 0 (10-bit),2: Address match 0 (7-bit) or address match 1 (7-bit),3: Address match 0 (10-bit) or address match 1..,4: Address match 0 (7-bit) or address match 1..,5: Address match 0 (10-bit) or address match 1..,6: From address match 0 (7-bit) to address match 1..,7: From address match 0 (10-bit) to address match 1.."
newline
bitfld.long 0x14 13. "HSMEN,HS Mode Enable" "0: Disable,1: Enable"
bitfld.long 0x14 12. "IGNACK,Ignore NACK" "0: End transfer on NACK,1: Do not end transfer on NACK"
newline
bitfld.long 0x14 11. "RXCFG,Receive Data Configuration" "0: Return received data clear MSR[RDF],1: Return SASR and clear SSR[AVF] when SSR[AVF] is.."
bitfld.long 0x14 10. "TXCFG,Transmit Flag Configuration" "0: MSR[TDF] is set only during a target-transmit..,1: MSR[TDF] is set whenever STDR is empty"
newline
bitfld.long 0x14 9. "SAEN,SMBus Alert Enable" "0: Disable,1: Enable"
bitfld.long 0x14 8. "GCEN,General Call Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x14 4. "RXNACK,Receive NACK" "0: ACK or NACK always determined by STAR[TXNACK],1: NACK always generated on address overrun or.."
bitfld.long 0x14 3. "ACKSTALL,ACK SCL Stall" "0: Disable,1: Enable"
newline
bitfld.long 0x14 2. "TXDSTALL,Transmit Data SCL Stall" "0: Disable,1: Enable"
bitfld.long 0x14 1. "RXSTALL,RX SCL Stall" "0: Disable,1: Enable"
newline
bitfld.long 0x14 0. "ADRSTALL,Address SCL Stall" "0: Disable,1: Enable"
line.long 0x18 "SCFGR2,Target Configuration 2"
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
newline
hexmask.long.byte 0x18 8.--13. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x18 0.--3. 1. "CLKHOLD,Clock Hold Time"
group.long 0x140++0x3
line.long 0x0 "SAMR,Target Address Match"
hexmask.long.word 0x0 17.--26. 1. "ADDR1,Address 1 Value"
hexmask.long.word 0x0 1.--10. 1. "ADDR0,Address 0 Value"
rgroup.long 0x150++0x3
line.long 0x0 "SASR,Target Address Status"
bitfld.long 0x0 14. "ANV,Address Not Valid" "0: Valid,1: Not valid"
hexmask.long.word 0x0 0.--10. 1. "RADDR,Received Address"
group.long 0x154++0x3
line.long 0x0 "STAR,Target Transmit ACK"
bitfld.long 0x0 0. "TXNACK,Transmit NACK" "0: Transmit ACK,1: Transmit NACK"
wgroup.long 0x160++0x3
line.long 0x0 "STDR,Target Transmit Data"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
rgroup.long 0x170++0x3
line.long 0x0 "SRDR,Target Receive Data"
bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not first,1: First"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
newline
bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Received Data"
rgroup.long 0x178++0x3
line.long 0x0 "SRDROR,Target Receive Data Read Only"
bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not the first,1: First"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
newline
bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
tree.end
tree "LPI2C3"
base ad:0x400D5000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 8.--11. 1. "MRXFIFO,Controller Receive FIFO Size"
hexmask.long.byte 0x4 0.--3. 1. "MTXFIFO,Controller Transmit FIFO Size"
group.long 0x10++0x1F
line.long 0x0 "MCR,Controller Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Reset receive FIFO"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Reset transmit FIFO"
newline
bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Disable,1: Enable"
bitfld.long 0x0 2. "DOZEN,Doze Mode Enable" "0: Enable,1: Disable"
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: No effect,1: Reset"
bitfld.long 0x0 0. "MEN,Controller Enable" "0: Disable,1: Enable"
line.long 0x4 "MSR,Controller Status"
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
rbitfld.long 0x4 24. "MBF,Controller Busy Flag" "0: Idle,1: Busy"
newline
eventfld.long 0x4 15. "STF,Start Flag" "0: Start condition not detected,1: Start condition detected"
eventfld.long 0x4 14. "DMF,Data Match Flag" "0: Matching data not received,1: Matching data received"
newline
eventfld.long 0x4 13. "PLTF,Pin Low Timeout Flag" "0: Pin low timeout did not occur,1: Pin low timeout occurred"
eventfld.long 0x4 12. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error"
newline
eventfld.long 0x4 11. "ALF,Arbitration Lost Flag" "0: Controller did not lose arbitration,1: Controller lost arbitration"
eventfld.long 0x4 10. "NDF,NACK Detect Flag" "0: No unexpected NACK detected,1: Unexpected NACK detected"
newline
eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop condition generated,1: Stop condition generated"
eventfld.long 0x4 8. "EPF,End Packet Flag" "0: No Stop or repeated Start generated,1: Stop or repeated Start generated"
newline
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive data not ready,1: Receive data ready"
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data requested"
line.long 0x8 "MIER,Controller Interrupt Enable"
bitfld.long 0x8 15. "STIE,Start Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "DMIE,Data Match Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 13. "PLTIE,Pin Low Timeout Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "ALIE,Arbitration Lost Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "NDIE,NACK Detect Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "EPIE,End Packet Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "MDER,Controller DMA Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "MCFGR0,Controller Configuration 0"
bitfld.long 0x10 17. "ABORT,Abort Transfer" "0: Normal transfer,1: Abort existing transfer and do not start a new one"
bitfld.long 0x10 16. "RELAX,Relaxed Mode" "0: Normal transfer,1: Relaxed transfer"
newline
bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO,1: Received data is discarded unless MSR[DMF] is set"
bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 3. "HRDIR,Host Request Direction" "0: HREQ pin is input (for LPI2C controller),1: HREQ pin is output (for LPI2C target)"
bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin HREQ,1: Host request input is input trigger"
newline
bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low,1: Active high"
bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Disable,1: Enable"
line.long 0x14 "MCFGR1,Controller Configuration 1"
bitfld.long 0x14 24.--26. "PINCFG,Pin Configuration" "0: Two-pin open drain mode,1: Two-pin output only mode (Ultra-Fast mode),2: Two-pin push-pull mode,3: Four-pin push-pull mode,4: Two-pin open-drain mode with separate LPI2C target,5: Two-pin output only mode (Ultra-Fast mode) with..,6: Two-pin push-pull mode with separate LPI2C target,7: Four-pin push-pull mode (inverted outputs)"
bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: Match is enabled: first data word equals..,3: Match is enabled: any data word equals..,4: Match is enabled: (first data word equals..,5: Match is enabled: (any data word equals..,6: Match is enabled: (first data word AND..,7: Match is enabled: (any data word AND.."
newline
bitfld.long 0x14 12. "STARTCFG,Start Configuration" "0: Sets when both I2C bus and LPI2C controller are..,1: Sets when I2C bus is idle"
bitfld.long 0x14 11. "STOPCFG,Stop Configuration" "0: Any Stop condition,1: Last Stop condition"
newline
bitfld.long 0x14 10. "TIMECFG,Timeout Configuration" "0: SCL,1: SCL or SDA"
bitfld.long 0x14 9. "IGNACK,Ignore NACK" "0: No effect,1: Treat a received NACK as an ACK"
newline
bitfld.long 0x14 8. "AUTOSTOP,Automatic Stop Generation" "0: No effect,1: Stop automatically generated"
bitfld.long 0x14 0.--2. "PRESCALE,Prescaler" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
line.long 0x18 "MCFGR2,Controller Configuration 2"
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
newline
hexmask.long.word 0x18 0.--11. 1. "BUSIDLE,Bus Idle Timeout"
line.long 0x1C "MCFGR3,Controller Configuration 3"
hexmask.long.word 0x1C 8.--19. 1. "PINLOW,Pin Low Timeout"
group.long 0x40++0x3
line.long 0x0 "MDMR,Controller Data Match"
hexmask.long.byte 0x0 16.--23. 1. "MATCH1,Match 1 Value"
hexmask.long.byte 0x0 0.--7. 1. "MATCH0,Match 0 Value"
group.long 0x48++0x3
line.long 0x0 "MCCR0,Controller Clock Configuration 0"
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
group.long 0x50++0x3
line.long 0x0 "MCCR1,Controller Clock Configuration 1"
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
group.long 0x58++0x3
line.long 0x0 "MFCR,Controller FIFO Control"
bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3"
bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3"
rgroup.long 0x5C++0x3
line.long 0x0 "MFSR,Controller FIFO Status"
bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7"
wgroup.long 0x60++0x3
line.long 0x0 "MTDR,Controller Transmit Data"
bitfld.long 0x0 8.--10. "CMD,Command Data" "0: Transmit the value in DATA[7:0],1: Receive (DATA[7:0] + 1) bytes,2: Generate Stop condition on I2C bus,3: Receive and discard (DATA[7:0] + 1) bytes,4: Generate (repeated) Start on the I2C bus and..,5: Generate (repeated) Start on the I2C bus and..,6: Generate (repeated) Start on the I2C bus and..,7: Generate (repeated) Start on the I2C bus and.."
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
rgroup.long 0x70++0x3
line.long 0x0 "MRDR,Controller Receive Data"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
rgroup.long 0x78++0x3
line.long 0x0 "MRDROR,Controller Receive Data Read Only"
bitfld.long 0x0 14. "RXEMPTY,RX Empty" "0: Not empty,1: Empty"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
group.long 0x110++0x1B
line.long 0x0 "SCR,Target Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: SRDR is now empty"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: STDR is now empty"
newline
bitfld.long 0x0 5. "FILTDZ,Filter Doze Enable" "0: Enable,1: Disable"
bitfld.long 0x0 4. "FILTEN,Filter Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
bitfld.long 0x0 0. "SEN,Target Enable" "0: Disable,1: Enable"
line.long 0x4 "SSR,Target Status"
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
rbitfld.long 0x4 24. "SBF,Target Busy Flag" "0: Idle,1: Busy"
newline
rbitfld.long 0x4 15. "SARF,SMBus Alert Response Flag" "0: Disabled or not detected,1: Enabled and detected"
rbitfld.long 0x4 14. "GCF,General Call Flag" "0: General call address disabled or not detected,1: General call address detected"
newline
rbitfld.long 0x4 13. "AM1F,Address Match 1 Flag" "0: Matching address not received,1: Matching address received"
rbitfld.long 0x4 12. "AM0F,Address Match 0 Flag" "0: ADDR0 matching address not received,1: ADDR0 matching address received"
newline
eventfld.long 0x4 11. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error"
eventfld.long 0x4 10. "BEF,Bit Error Flag" "0: No bit error occurred,1: Bit error occurred"
newline
eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop detected,1: Stop detected"
eventfld.long 0x4 8. "RSF,Repeated Start Flag" "0: No repeated Start detected,1: Repeated Start detected"
newline
rbitfld.long 0x4 3. "TAF,Transmit ACK Flag" "0: Not required,1: Required"
rbitfld.long 0x4 2. "AVF,Address Valid Flag" "0: Not valid,1: Valid"
newline
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Not ready,1: Ready"
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data is requested"
line.long 0x8 "SIER,Target Interrupt Enable"
bitfld.long 0x8 15. "SARIE,SMBus Alert Response Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "GCIE,General Call Interrupt Enable" "0: Disabled,1: Enabled"
newline
bitfld.long 0x8 13. "AM1IE,Address Match 1 Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "AM0IE,Address Match 0 Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "BEIE,Bit Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "RSIE,Repeated Start Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 3. "TAIE,Transmit ACK Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 2. "AVIE,Address Valid Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "SDER,Target DMA Enable"
bitfld.long 0xC 9. "SDDE,Stop Detect DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 8. "RSDE,Repeated Start DMA Enable" "0: Disable,1: Enable"
newline
bitfld.long 0xC 2. "AVDE,Address Valid DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable DMA request,1: Enable DMA request"
newline
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "SCFGR0,Target Configuration 0"
rbitfld.long 0x10 1. "RDACK,Read Acknowledge Flag" "0: Read Request not acknowledged,1: Read Request acknowledged"
bitfld.long 0x10 0. "RDREQ,Read Request" "0: Disable,1: Enable"
line.long 0x14 "SCFGR1,Target Configuration 1"
bitfld.long 0x14 26. "SDCFG,Stop Detect Configuration" "0: Any Stop condition following an address match,1: Any Stop condition"
bitfld.long 0x14 25. "RSCFG,Repeated Start Configuration" "0: Any repeated Start condition following an..,1: Any repeated Start condition"
newline
bitfld.long 0x14 24. "RXALL,Receive All" "0: Disable,1: Enable"
bitfld.long 0x14 16.--18. "ADDRCFG,Address Configuration" "0: Address match 0 (7-bit),1: Address match 0 (10-bit),2: Address match 0 (7-bit) or address match 1 (7-bit),3: Address match 0 (10-bit) or address match 1..,4: Address match 0 (7-bit) or address match 1..,5: Address match 0 (10-bit) or address match 1..,6: From address match 0 (7-bit) to address match 1..,7: From address match 0 (10-bit) to address match 1.."
newline
bitfld.long 0x14 13. "HSMEN,HS Mode Enable" "0: Disable,1: Enable"
bitfld.long 0x14 12. "IGNACK,Ignore NACK" "0: End transfer on NACK,1: Do not end transfer on NACK"
newline
bitfld.long 0x14 11. "RXCFG,Receive Data Configuration" "0: Return received data clear MSR[RDF],1: Return SASR and clear SSR[AVF] when SSR[AVF] is.."
bitfld.long 0x14 10. "TXCFG,Transmit Flag Configuration" "0: MSR[TDF] is set only during a target-transmit..,1: MSR[TDF] is set whenever STDR is empty"
newline
bitfld.long 0x14 9. "SAEN,SMBus Alert Enable" "0: Disable,1: Enable"
bitfld.long 0x14 8. "GCEN,General Call Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x14 4. "RXNACK,Receive NACK" "0: ACK or NACK always determined by STAR[TXNACK],1: NACK always generated on address overrun or.."
bitfld.long 0x14 3. "ACKSTALL,ACK SCL Stall" "0: Disable,1: Enable"
newline
bitfld.long 0x14 2. "TXDSTALL,Transmit Data SCL Stall" "0: Disable,1: Enable"
bitfld.long 0x14 1. "RXSTALL,RX SCL Stall" "0: Disable,1: Enable"
newline
bitfld.long 0x14 0. "ADRSTALL,Address SCL Stall" "0: Disable,1: Enable"
line.long 0x18 "SCFGR2,Target Configuration 2"
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
newline
hexmask.long.byte 0x18 8.--13. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x18 0.--3. 1. "CLKHOLD,Clock Hold Time"
group.long 0x140++0x3
line.long 0x0 "SAMR,Target Address Match"
hexmask.long.word 0x0 17.--26. 1. "ADDR1,Address 1 Value"
hexmask.long.word 0x0 1.--10. 1. "ADDR0,Address 0 Value"
rgroup.long 0x150++0x3
line.long 0x0 "SASR,Target Address Status"
bitfld.long 0x0 14. "ANV,Address Not Valid" "0: Valid,1: Not valid"
hexmask.long.word 0x0 0.--10. 1. "RADDR,Received Address"
group.long 0x154++0x3
line.long 0x0 "STAR,Target Transmit ACK"
bitfld.long 0x0 0. "TXNACK,Transmit NACK" "0: Transmit ACK,1: Transmit NACK"
wgroup.long 0x160++0x3
line.long 0x0 "STDR,Target Transmit Data"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
rgroup.long 0x170++0x3
line.long 0x0 "SRDR,Target Receive Data"
bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not first,1: First"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
newline
bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Received Data"
rgroup.long 0x178++0x3
line.long 0x0 "SRDROR,Target Receive Data Read Only"
bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not the first,1: First"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
newline
bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
tree.end
endif
sif (cpuis("MC?A145*"))
tree "LPI2C1"
base ad:0x4009B000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 8.--11. 1. "MRXFIFO,Controller Receive FIFO Size"
hexmask.long.byte 0x4 0.--3. 1. "MTXFIFO,Controller Transmit FIFO Size"
group.long 0x10++0x1F
line.long 0x0 "MCR,Controller Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Reset receive FIFO"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Reset transmit FIFO"
newline
bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Disable,1: Enable"
bitfld.long 0x0 2. "DOZEN,Doze Mode Enable" "0: Enable,1: Disable"
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: No effect,1: Reset"
bitfld.long 0x0 0. "MEN,Controller Enable" "0: Disable,1: Enable"
line.long 0x4 "MSR,Controller Status"
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
rbitfld.long 0x4 24. "MBF,Controller Busy Flag" "0: Idle,1: Busy"
newline
eventfld.long 0x4 15. "STF,Start Flag" "0: Start condition not detected,1: Start condition detected"
eventfld.long 0x4 14. "DMF,Data Match Flag" "0: Matching data not received,1: Matching data received"
newline
eventfld.long 0x4 13. "PLTF,Pin Low Timeout Flag" "0: Pin low timeout did not occur,1: Pin low timeout occurred"
eventfld.long 0x4 12. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error"
newline
eventfld.long 0x4 11. "ALF,Arbitration Lost Flag" "0: Controller did not lose arbitration,1: Controller lost arbitration"
eventfld.long 0x4 10. "NDF,NACK Detect Flag" "0: No unexpected NACK detected,1: Unexpected NACK detected"
newline
eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop condition generated,1: Stop condition generated"
eventfld.long 0x4 8. "EPF,End Packet Flag" "0: No Stop or repeated Start generated,1: Stop or repeated Start generated"
newline
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive data not ready,1: Receive data ready"
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data requested"
line.long 0x8 "MIER,Controller Interrupt Enable"
bitfld.long 0x8 15. "STIE,Start Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "DMIE,Data Match Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 13. "PLTIE,Pin Low Timeout Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "ALIE,Arbitration Lost Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "NDIE,NACK Detect Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "EPIE,End Packet Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "MDER,Controller DMA Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "MCFGR0,Controller Configuration 0"
bitfld.long 0x10 17. "ABORT,Abort Transfer" "0: Normal transfer,1: Abort existing transfer and do not start a new one"
bitfld.long 0x10 16. "RELAX,Relaxed Mode" "0: Normal transfer,1: Relaxed transfer"
newline
bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO,1: Received data is discarded unless MSR[DMF] is set"
bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 3. "HRDIR,Host Request Direction" "0: HREQ pin is input (for LPI2C controller),1: HREQ pin is output (for LPI2C target)"
bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin HREQ,1: Host request input is input trigger"
newline
bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low,1: Active high"
bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Disable,1: Enable"
line.long 0x14 "MCFGR1,Controller Configuration 1"
bitfld.long 0x14 24.--26. "PINCFG,Pin Configuration" "0: Two-pin open drain mode,1: Two-pin output only mode (Ultra-Fast mode),2: Two-pin push-pull mode,3: Four-pin push-pull mode,4: Two-pin open-drain mode with separate LPI2C target,5: Two-pin output only mode (Ultra-Fast mode) with..,6: Two-pin push-pull mode with separate LPI2C target,7: Four-pin push-pull mode (inverted outputs)"
bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: Match is enabled: first data word equals..,3: Match is enabled: any data word equals..,4: Match is enabled: (first data word equals..,5: Match is enabled: (any data word equals..,6: Match is enabled: (first data word AND..,7: Match is enabled: (any data word AND.."
newline
bitfld.long 0x14 12. "STARTCFG,Start Configuration" "0: Sets when both I2C bus and LPI2C controller are..,1: Sets when I2C bus is idle"
bitfld.long 0x14 11. "STOPCFG,Stop Configuration" "0: Any Stop condition,1: Last Stop condition"
newline
bitfld.long 0x14 10. "TIMECFG,Timeout Configuration" "0: SCL,1: SCL or SDA"
bitfld.long 0x14 9. "IGNACK,Ignore NACK" "0: No effect,1: Treat a received NACK as an ACK"
newline
bitfld.long 0x14 8. "AUTOSTOP,Automatic Stop Generation" "0: No effect,1: Stop automatically generated"
bitfld.long 0x14 0.--2. "PRESCALE,Prescaler" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
line.long 0x18 "MCFGR2,Controller Configuration 2"
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
newline
hexmask.long.word 0x18 0.--11. 1. "BUSIDLE,Bus Idle Timeout"
line.long 0x1C "MCFGR3,Controller Configuration 3"
hexmask.long.word 0x1C 8.--19. 1. "PINLOW,Pin Low Timeout"
group.long 0x40++0x3
line.long 0x0 "MDMR,Controller Data Match"
hexmask.long.byte 0x0 16.--23. 1. "MATCH1,Match 1 Value"
hexmask.long.byte 0x0 0.--7. 1. "MATCH0,Match 0 Value"
group.long 0x48++0x3
line.long 0x0 "MCCR0,Controller Clock Configuration 0"
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
group.long 0x50++0x3
line.long 0x0 "MCCR1,Controller Clock Configuration 1"
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
group.long 0x58++0x3
line.long 0x0 "MFCR,Controller FIFO Control"
bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3"
bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3"
rgroup.long 0x5C++0x3
line.long 0x0 "MFSR,Controller FIFO Status"
bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7"
wgroup.long 0x60++0x3
line.long 0x0 "MTDR,Controller Transmit Data"
bitfld.long 0x0 8.--10. "CMD,Command Data" "0: Transmit the value in DATA[7:0],1: Receive (DATA[7:0] + 1) bytes,2: Generate Stop condition on I2C bus,3: Receive and discard (DATA[7:0] + 1) bytes,4: Generate (repeated) Start on the I2C bus and..,5: Generate (repeated) Start on the I2C bus and..,6: Generate (repeated) Start on the I2C bus and..,7: Generate (repeated) Start on the I2C bus and.."
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
rgroup.long 0x70++0x3
line.long 0x0 "MRDR,Controller Receive Data"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
rgroup.long 0x78++0x3
line.long 0x0 "MRDROR,Controller Receive Data Read Only"
bitfld.long 0x0 14. "RXEMPTY,RX Empty" "0: Not empty,1: Empty"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
group.long 0x110++0x1B
line.long 0x0 "SCR,Target Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: SRDR is now empty"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: STDR is now empty"
newline
bitfld.long 0x0 5. "FILTDZ,Filter Doze Enable" "0: Enable,1: Disable"
bitfld.long 0x0 4. "FILTEN,Filter Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
bitfld.long 0x0 0. "SEN,Target Enable" "0: Disable,1: Enable"
line.long 0x4 "SSR,Target Status"
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
rbitfld.long 0x4 24. "SBF,Target Busy Flag" "0: Idle,1: Busy"
newline
rbitfld.long 0x4 15. "SARF,SMBus Alert Response Flag" "0: Disabled or not detected,1: Enabled and detected"
rbitfld.long 0x4 14. "GCF,General Call Flag" "0: General call address disabled or not detected,1: General call address detected"
newline
rbitfld.long 0x4 13. "AM1F,Address Match 1 Flag" "0: Matching address not received,1: Matching address received"
rbitfld.long 0x4 12. "AM0F,Address Match 0 Flag" "0: ADDR0 matching address not received,1: ADDR0 matching address received"
newline
eventfld.long 0x4 11. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error"
eventfld.long 0x4 10. "BEF,Bit Error Flag" "0: No bit error occurred,1: Bit error occurred"
newline
eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop detected,1: Stop detected"
eventfld.long 0x4 8. "RSF,Repeated Start Flag" "0: No repeated Start detected,1: Repeated Start detected"
newline
rbitfld.long 0x4 3. "TAF,Transmit ACK Flag" "0: Not required,1: Required"
rbitfld.long 0x4 2. "AVF,Address Valid Flag" "0: Not valid,1: Valid"
newline
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Not ready,1: Ready"
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data is requested"
line.long 0x8 "SIER,Target Interrupt Enable"
bitfld.long 0x8 15. "SARIE,SMBus Alert Response Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "GCIE,General Call Interrupt Enable" "0: Disabled,1: Enabled"
newline
bitfld.long 0x8 13. "AM1IE,Address Match 1 Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "AM0IE,Address Match 0 Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "BEIE,Bit Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "RSIE,Repeated Start Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 3. "TAIE,Transmit ACK Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 2. "AVIE,Address Valid Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "SDER,Target DMA Enable"
bitfld.long 0xC 9. "SDDE,Stop Detect DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 8. "RSDE,Repeated Start DMA Enable" "0: Disable,1: Enable"
newline
bitfld.long 0xC 2. "AVDE,Address Valid DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable DMA request,1: Enable DMA request"
newline
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "SCFGR0,Target Configuration 0"
rbitfld.long 0x10 1. "RDACK,Read Acknowledge Flag" "0: Read Request not acknowledged,1: Read Request acknowledged"
bitfld.long 0x10 0. "RDREQ,Read Request" "0: Disable,1: Enable"
line.long 0x14 "SCFGR1,Target Configuration 1"
bitfld.long 0x14 26. "SDCFG,Stop Detect Configuration" "0: Any Stop condition following an address match,1: Any Stop condition"
bitfld.long 0x14 25. "RSCFG,Repeated Start Configuration" "0: Any repeated Start condition following an..,1: Any repeated Start condition"
newline
bitfld.long 0x14 24. "RXALL,Receive All" "0: Disable,1: Enable"
bitfld.long 0x14 16.--18. "ADDRCFG,Address Configuration" "0: Address match 0 (7-bit),1: Address match 0 (10-bit),2: Address match 0 (7-bit) or address match 1 (7-bit),3: Address match 0 (10-bit) or address match 1..,4: Address match 0 (7-bit) or address match 1..,5: Address match 0 (10-bit) or address match 1..,6: From address match 0 (7-bit) to address match 1..,7: From address match 0 (10-bit) to address match 1.."
newline
bitfld.long 0x14 13. "HSMEN,HS Mode Enable" "0: Disable,1: Enable"
bitfld.long 0x14 12. "IGNACK,Ignore NACK" "0: End transfer on NACK,1: Do not end transfer on NACK"
newline
bitfld.long 0x14 11. "RXCFG,Receive Data Configuration" "0: Return received data clear MSR[RDF],1: Return SASR and clear SSR[AVF] when SSR[AVF] is.."
bitfld.long 0x14 10. "TXCFG,Transmit Flag Configuration" "0: MSR[TDF] is set only during a target-transmit..,1: MSR[TDF] is set whenever STDR is empty"
newline
bitfld.long 0x14 9. "SAEN,SMBus Alert Enable" "0: Disable,1: Enable"
bitfld.long 0x14 8. "GCEN,General Call Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x14 4. "RXNACK,Receive NACK" "0: ACK or NACK always determined by STAR[TXNACK],1: NACK always generated on address overrun or.."
bitfld.long 0x14 3. "ACKSTALL,ACK SCL Stall" "0: Disable,1: Enable"
newline
bitfld.long 0x14 2. "TXDSTALL,Transmit Data SCL Stall" "0: Disable,1: Enable"
bitfld.long 0x14 1. "RXSTALL,RX SCL Stall" "0: Disable,1: Enable"
newline
bitfld.long 0x14 0. "ADRSTALL,Address SCL Stall" "0: Disable,1: Enable"
line.long 0x18 "SCFGR2,Target Configuration 2"
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
newline
hexmask.long.byte 0x18 8.--13. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x18 0.--3. 1. "CLKHOLD,Clock Hold Time"
group.long 0x140++0x3
line.long 0x0 "SAMR,Target Address Match"
hexmask.long.word 0x0 17.--26. 1. "ADDR1,Address 1 Value"
hexmask.long.word 0x0 1.--10. 1. "ADDR0,Address 0 Value"
rgroup.long 0x150++0x3
line.long 0x0 "SASR,Target Address Status"
bitfld.long 0x0 14. "ANV,Address Not Valid" "0: Valid,1: Not valid"
hexmask.long.word 0x0 0.--10. 1. "RADDR,Received Address"
group.long 0x154++0x3
line.long 0x0 "STAR,Target Transmit ACK"
bitfld.long 0x0 0. "TXNACK,Transmit NACK" "0: Transmit ACK,1: Transmit NACK"
wgroup.long 0x160++0x3
line.long 0x0 "STDR,Target Transmit Data"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
rgroup.long 0x170++0x3
line.long 0x0 "SRDR,Target Receive Data"
bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not first,1: First"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
newline
bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Received Data"
rgroup.long 0x178++0x3
line.long 0x0 "SRDROR,Target Receive Data Read Only"
bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not the first,1: First"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
newline
bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
tree.end
tree "LPI2C2"
base ad:0x400D4000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 8.--11. 1. "MRXFIFO,Controller Receive FIFO Size"
hexmask.long.byte 0x4 0.--3. 1. "MTXFIFO,Controller Transmit FIFO Size"
group.long 0x10++0x1F
line.long 0x0 "MCR,Controller Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Reset receive FIFO"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Reset transmit FIFO"
newline
bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Disable,1: Enable"
bitfld.long 0x0 2. "DOZEN,Doze Mode Enable" "0: Enable,1: Disable"
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: No effect,1: Reset"
bitfld.long 0x0 0. "MEN,Controller Enable" "0: Disable,1: Enable"
line.long 0x4 "MSR,Controller Status"
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
rbitfld.long 0x4 24. "MBF,Controller Busy Flag" "0: Idle,1: Busy"
newline
eventfld.long 0x4 15. "STF,Start Flag" "0: Start condition not detected,1: Start condition detected"
eventfld.long 0x4 14. "DMF,Data Match Flag" "0: Matching data not received,1: Matching data received"
newline
eventfld.long 0x4 13. "PLTF,Pin Low Timeout Flag" "0: Pin low timeout did not occur,1: Pin low timeout occurred"
eventfld.long 0x4 12. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error"
newline
eventfld.long 0x4 11. "ALF,Arbitration Lost Flag" "0: Controller did not lose arbitration,1: Controller lost arbitration"
eventfld.long 0x4 10. "NDF,NACK Detect Flag" "0: No unexpected NACK detected,1: Unexpected NACK detected"
newline
eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop condition generated,1: Stop condition generated"
eventfld.long 0x4 8. "EPF,End Packet Flag" "0: No Stop or repeated Start generated,1: Stop or repeated Start generated"
newline
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive data not ready,1: Receive data ready"
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data requested"
line.long 0x8 "MIER,Controller Interrupt Enable"
bitfld.long 0x8 15. "STIE,Start Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "DMIE,Data Match Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 13. "PLTIE,Pin Low Timeout Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "ALIE,Arbitration Lost Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "NDIE,NACK Detect Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "EPIE,End Packet Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "MDER,Controller DMA Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "MCFGR0,Controller Configuration 0"
bitfld.long 0x10 17. "ABORT,Abort Transfer" "0: Normal transfer,1: Abort existing transfer and do not start a new one"
bitfld.long 0x10 16. "RELAX,Relaxed Mode" "0: Normal transfer,1: Relaxed transfer"
newline
bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO,1: Received data is discarded unless MSR[DMF] is set"
bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 3. "HRDIR,Host Request Direction" "0: HREQ pin is input (for LPI2C controller),1: HREQ pin is output (for LPI2C target)"
bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin HREQ,1: Host request input is input trigger"
newline
bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low,1: Active high"
bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Disable,1: Enable"
line.long 0x14 "MCFGR1,Controller Configuration 1"
bitfld.long 0x14 24.--26. "PINCFG,Pin Configuration" "0: Two-pin open drain mode,1: Two-pin output only mode (Ultra-Fast mode),2: Two-pin push-pull mode,3: Four-pin push-pull mode,4: Two-pin open-drain mode with separate LPI2C target,5: Two-pin output only mode (Ultra-Fast mode) with..,6: Two-pin push-pull mode with separate LPI2C target,7: Four-pin push-pull mode (inverted outputs)"
bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: Match is enabled: first data word equals..,3: Match is enabled: any data word equals..,4: Match is enabled: (first data word equals..,5: Match is enabled: (any data word equals..,6: Match is enabled: (first data word AND..,7: Match is enabled: (any data word AND.."
newline
bitfld.long 0x14 12. "STARTCFG,Start Configuration" "0: Sets when both I2C bus and LPI2C controller are..,1: Sets when I2C bus is idle"
bitfld.long 0x14 11. "STOPCFG,Stop Configuration" "0: Any Stop condition,1: Last Stop condition"
newline
bitfld.long 0x14 10. "TIMECFG,Timeout Configuration" "0: SCL,1: SCL or SDA"
bitfld.long 0x14 9. "IGNACK,Ignore NACK" "0: No effect,1: Treat a received NACK as an ACK"
newline
bitfld.long 0x14 8. "AUTOSTOP,Automatic Stop Generation" "0: No effect,1: Stop automatically generated"
bitfld.long 0x14 0.--2. "PRESCALE,Prescaler" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
line.long 0x18 "MCFGR2,Controller Configuration 2"
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
newline
hexmask.long.word 0x18 0.--11. 1. "BUSIDLE,Bus Idle Timeout"
line.long 0x1C "MCFGR3,Controller Configuration 3"
hexmask.long.word 0x1C 8.--19. 1. "PINLOW,Pin Low Timeout"
group.long 0x40++0x3
line.long 0x0 "MDMR,Controller Data Match"
hexmask.long.byte 0x0 16.--23. 1. "MATCH1,Match 1 Value"
hexmask.long.byte 0x0 0.--7. 1. "MATCH0,Match 0 Value"
group.long 0x48++0x3
line.long 0x0 "MCCR0,Controller Clock Configuration 0"
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
group.long 0x50++0x3
line.long 0x0 "MCCR1,Controller Clock Configuration 1"
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
group.long 0x58++0x3
line.long 0x0 "MFCR,Controller FIFO Control"
bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3"
bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3"
rgroup.long 0x5C++0x3
line.long 0x0 "MFSR,Controller FIFO Status"
bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7"
wgroup.long 0x60++0x3
line.long 0x0 "MTDR,Controller Transmit Data"
bitfld.long 0x0 8.--10. "CMD,Command Data" "0: Transmit the value in DATA[7:0],1: Receive (DATA[7:0] + 1) bytes,2: Generate Stop condition on I2C bus,3: Receive and discard (DATA[7:0] + 1) bytes,4: Generate (repeated) Start on the I2C bus and..,5: Generate (repeated) Start on the I2C bus and..,6: Generate (repeated) Start on the I2C bus and..,7: Generate (repeated) Start on the I2C bus and.."
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
rgroup.long 0x70++0x3
line.long 0x0 "MRDR,Controller Receive Data"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
rgroup.long 0x78++0x3
line.long 0x0 "MRDROR,Controller Receive Data Read Only"
bitfld.long 0x0 14. "RXEMPTY,RX Empty" "0: Not empty,1: Empty"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
group.long 0x110++0x1B
line.long 0x0 "SCR,Target Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: SRDR is now empty"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: STDR is now empty"
newline
bitfld.long 0x0 5. "FILTDZ,Filter Doze Enable" "0: Enable,1: Disable"
bitfld.long 0x0 4. "FILTEN,Filter Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
bitfld.long 0x0 0. "SEN,Target Enable" "0: Disable,1: Enable"
line.long 0x4 "SSR,Target Status"
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
rbitfld.long 0x4 24. "SBF,Target Busy Flag" "0: Idle,1: Busy"
newline
rbitfld.long 0x4 15. "SARF,SMBus Alert Response Flag" "0: Disabled or not detected,1: Enabled and detected"
rbitfld.long 0x4 14. "GCF,General Call Flag" "0: General call address disabled or not detected,1: General call address detected"
newline
rbitfld.long 0x4 13. "AM1F,Address Match 1 Flag" "0: Matching address not received,1: Matching address received"
rbitfld.long 0x4 12. "AM0F,Address Match 0 Flag" "0: ADDR0 matching address not received,1: ADDR0 matching address received"
newline
eventfld.long 0x4 11. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error"
eventfld.long 0x4 10. "BEF,Bit Error Flag" "0: No bit error occurred,1: Bit error occurred"
newline
eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop detected,1: Stop detected"
eventfld.long 0x4 8. "RSF,Repeated Start Flag" "0: No repeated Start detected,1: Repeated Start detected"
newline
rbitfld.long 0x4 3. "TAF,Transmit ACK Flag" "0: Not required,1: Required"
rbitfld.long 0x4 2. "AVF,Address Valid Flag" "0: Not valid,1: Valid"
newline
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Not ready,1: Ready"
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data is requested"
line.long 0x8 "SIER,Target Interrupt Enable"
bitfld.long 0x8 15. "SARIE,SMBus Alert Response Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "GCIE,General Call Interrupt Enable" "0: Disabled,1: Enabled"
newline
bitfld.long 0x8 13. "AM1IE,Address Match 1 Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "AM0IE,Address Match 0 Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "BEIE,Bit Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "RSIE,Repeated Start Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 3. "TAIE,Transmit ACK Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 2. "AVIE,Address Valid Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "SDER,Target DMA Enable"
bitfld.long 0xC 9. "SDDE,Stop Detect DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 8. "RSDE,Repeated Start DMA Enable" "0: Disable,1: Enable"
newline
bitfld.long 0xC 2. "AVDE,Address Valid DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable DMA request,1: Enable DMA request"
newline
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "SCFGR0,Target Configuration 0"
rbitfld.long 0x10 1. "RDACK,Read Acknowledge Flag" "0: Read Request not acknowledged,1: Read Request acknowledged"
bitfld.long 0x10 0. "RDREQ,Read Request" "0: Disable,1: Enable"
line.long 0x14 "SCFGR1,Target Configuration 1"
bitfld.long 0x14 26. "SDCFG,Stop Detect Configuration" "0: Any Stop condition following an address match,1: Any Stop condition"
bitfld.long 0x14 25. "RSCFG,Repeated Start Configuration" "0: Any repeated Start condition following an..,1: Any repeated Start condition"
newline
bitfld.long 0x14 24. "RXALL,Receive All" "0: Disable,1: Enable"
bitfld.long 0x14 16.--18. "ADDRCFG,Address Configuration" "0: Address match 0 (7-bit),1: Address match 0 (10-bit),2: Address match 0 (7-bit) or address match 1 (7-bit),3: Address match 0 (10-bit) or address match 1..,4: Address match 0 (7-bit) or address match 1..,5: Address match 0 (10-bit) or address match 1..,6: From address match 0 (7-bit) to address match 1..,7: From address match 0 (10-bit) to address match 1.."
newline
bitfld.long 0x14 13. "HSMEN,HS Mode Enable" "0: Disable,1: Enable"
bitfld.long 0x14 12. "IGNACK,Ignore NACK" "0: End transfer on NACK,1: Do not end transfer on NACK"
newline
bitfld.long 0x14 11. "RXCFG,Receive Data Configuration" "0: Return received data clear MSR[RDF],1: Return SASR and clear SSR[AVF] when SSR[AVF] is.."
bitfld.long 0x14 10. "TXCFG,Transmit Flag Configuration" "0: MSR[TDF] is set only during a target-transmit..,1: MSR[TDF] is set whenever STDR is empty"
newline
bitfld.long 0x14 9. "SAEN,SMBus Alert Enable" "0: Disable,1: Enable"
bitfld.long 0x14 8. "GCEN,General Call Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x14 4. "RXNACK,Receive NACK" "0: ACK or NACK always determined by STAR[TXNACK],1: NACK always generated on address overrun or.."
bitfld.long 0x14 3. "ACKSTALL,ACK SCL Stall" "0: Disable,1: Enable"
newline
bitfld.long 0x14 2. "TXDSTALL,Transmit Data SCL Stall" "0: Disable,1: Enable"
bitfld.long 0x14 1. "RXSTALL,RX SCL Stall" "0: Disable,1: Enable"
newline
bitfld.long 0x14 0. "ADRSTALL,Address SCL Stall" "0: Disable,1: Enable"
line.long 0x18 "SCFGR2,Target Configuration 2"
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
newline
hexmask.long.byte 0x18 8.--13. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x18 0.--3. 1. "CLKHOLD,Clock Hold Time"
group.long 0x140++0x3
line.long 0x0 "SAMR,Target Address Match"
hexmask.long.word 0x0 17.--26. 1. "ADDR1,Address 1 Value"
hexmask.long.word 0x0 1.--10. 1. "ADDR0,Address 0 Value"
rgroup.long 0x150++0x3
line.long 0x0 "SASR,Target Address Status"
bitfld.long 0x0 14. "ANV,Address Not Valid" "0: Valid,1: Not valid"
hexmask.long.word 0x0 0.--10. 1. "RADDR,Received Address"
group.long 0x154++0x3
line.long 0x0 "STAR,Target Transmit ACK"
bitfld.long 0x0 0. "TXNACK,Transmit NACK" "0: Transmit ACK,1: Transmit NACK"
wgroup.long 0x160++0x3
line.long 0x0 "STDR,Target Transmit Data"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
rgroup.long 0x170++0x3
line.long 0x0 "SRDR,Target Receive Data"
bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not first,1: First"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
newline
bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Received Data"
rgroup.long 0x178++0x3
line.long 0x0 "SRDROR,Target Receive Data Read Only"
bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not the first,1: First"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
newline
bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
tree.end
tree "LPI2C3"
base ad:0x400D5000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 8.--11. 1. "MRXFIFO,Controller Receive FIFO Size"
hexmask.long.byte 0x4 0.--3. 1. "MTXFIFO,Controller Transmit FIFO Size"
group.long 0x10++0x1F
line.long 0x0 "MCR,Controller Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Reset receive FIFO"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Reset transmit FIFO"
newline
bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Disable,1: Enable"
bitfld.long 0x0 2. "DOZEN,Doze Mode Enable" "0: Enable,1: Disable"
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: No effect,1: Reset"
bitfld.long 0x0 0. "MEN,Controller Enable" "0: Disable,1: Enable"
line.long 0x4 "MSR,Controller Status"
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
rbitfld.long 0x4 24. "MBF,Controller Busy Flag" "0: Idle,1: Busy"
newline
eventfld.long 0x4 15. "STF,Start Flag" "0: Start condition not detected,1: Start condition detected"
eventfld.long 0x4 14. "DMF,Data Match Flag" "0: Matching data not received,1: Matching data received"
newline
eventfld.long 0x4 13. "PLTF,Pin Low Timeout Flag" "0: Pin low timeout did not occur,1: Pin low timeout occurred"
eventfld.long 0x4 12. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error"
newline
eventfld.long 0x4 11. "ALF,Arbitration Lost Flag" "0: Controller did not lose arbitration,1: Controller lost arbitration"
eventfld.long 0x4 10. "NDF,NACK Detect Flag" "0: No unexpected NACK detected,1: Unexpected NACK detected"
newline
eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop condition generated,1: Stop condition generated"
eventfld.long 0x4 8. "EPF,End Packet Flag" "0: No Stop or repeated Start generated,1: Stop or repeated Start generated"
newline
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive data not ready,1: Receive data ready"
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data requested"
line.long 0x8 "MIER,Controller Interrupt Enable"
bitfld.long 0x8 15. "STIE,Start Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "DMIE,Data Match Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 13. "PLTIE,Pin Low Timeout Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "ALIE,Arbitration Lost Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "NDIE,NACK Detect Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "EPIE,End Packet Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "MDER,Controller DMA Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "MCFGR0,Controller Configuration 0"
bitfld.long 0x10 17. "ABORT,Abort Transfer" "0: Normal transfer,1: Abort existing transfer and do not start a new one"
bitfld.long 0x10 16. "RELAX,Relaxed Mode" "0: Normal transfer,1: Relaxed transfer"
newline
bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO,1: Received data is discarded unless MSR[DMF] is set"
bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 3. "HRDIR,Host Request Direction" "0: HREQ pin is input (for LPI2C controller),1: HREQ pin is output (for LPI2C target)"
bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin HREQ,1: Host request input is input trigger"
newline
bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low,1: Active high"
bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Disable,1: Enable"
line.long 0x14 "MCFGR1,Controller Configuration 1"
bitfld.long 0x14 24.--26. "PINCFG,Pin Configuration" "0: Two-pin open drain mode,1: Two-pin output only mode (Ultra-Fast mode),2: Two-pin push-pull mode,3: Four-pin push-pull mode,4: Two-pin open-drain mode with separate LPI2C target,5: Two-pin output only mode (Ultra-Fast mode) with..,6: Two-pin push-pull mode with separate LPI2C target,7: Four-pin push-pull mode (inverted outputs)"
bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: Match is enabled: first data word equals..,3: Match is enabled: any data word equals..,4: Match is enabled: (first data word equals..,5: Match is enabled: (any data word equals..,6: Match is enabled: (first data word AND..,7: Match is enabled: (any data word AND.."
newline
bitfld.long 0x14 12. "STARTCFG,Start Configuration" "0: Sets when both I2C bus and LPI2C controller are..,1: Sets when I2C bus is idle"
bitfld.long 0x14 11. "STOPCFG,Stop Configuration" "0: Any Stop condition,1: Last Stop condition"
newline
bitfld.long 0x14 10. "TIMECFG,Timeout Configuration" "0: SCL,1: SCL or SDA"
bitfld.long 0x14 9. "IGNACK,Ignore NACK" "0: No effect,1: Treat a received NACK as an ACK"
newline
bitfld.long 0x14 8. "AUTOSTOP,Automatic Stop Generation" "0: No effect,1: Stop automatically generated"
bitfld.long 0x14 0.--2. "PRESCALE,Prescaler" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
line.long 0x18 "MCFGR2,Controller Configuration 2"
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
newline
hexmask.long.word 0x18 0.--11. 1. "BUSIDLE,Bus Idle Timeout"
line.long 0x1C "MCFGR3,Controller Configuration 3"
hexmask.long.word 0x1C 8.--19. 1. "PINLOW,Pin Low Timeout"
group.long 0x40++0x3
line.long 0x0 "MDMR,Controller Data Match"
hexmask.long.byte 0x0 16.--23. 1. "MATCH1,Match 1 Value"
hexmask.long.byte 0x0 0.--7. 1. "MATCH0,Match 0 Value"
group.long 0x48++0x3
line.long 0x0 "MCCR0,Controller Clock Configuration 0"
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
group.long 0x50++0x3
line.long 0x0 "MCCR1,Controller Clock Configuration 1"
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
group.long 0x58++0x3
line.long 0x0 "MFCR,Controller FIFO Control"
bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3"
bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3"
rgroup.long 0x5C++0x3
line.long 0x0 "MFSR,Controller FIFO Status"
bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7"
wgroup.long 0x60++0x3
line.long 0x0 "MTDR,Controller Transmit Data"
bitfld.long 0x0 8.--10. "CMD,Command Data" "0: Transmit the value in DATA[7:0],1: Receive (DATA[7:0] + 1) bytes,2: Generate Stop condition on I2C bus,3: Receive and discard (DATA[7:0] + 1) bytes,4: Generate (repeated) Start on the I2C bus and..,5: Generate (repeated) Start on the I2C bus and..,6: Generate (repeated) Start on the I2C bus and..,7: Generate (repeated) Start on the I2C bus and.."
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
rgroup.long 0x70++0x3
line.long 0x0 "MRDR,Controller Receive Data"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
rgroup.long 0x78++0x3
line.long 0x0 "MRDROR,Controller Receive Data Read Only"
bitfld.long 0x0 14. "RXEMPTY,RX Empty" "0: Not empty,1: Empty"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
group.long 0x110++0x1B
line.long 0x0 "SCR,Target Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: SRDR is now empty"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: STDR is now empty"
newline
bitfld.long 0x0 5. "FILTDZ,Filter Doze Enable" "0: Enable,1: Disable"
bitfld.long 0x0 4. "FILTEN,Filter Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
bitfld.long 0x0 0. "SEN,Target Enable" "0: Disable,1: Enable"
line.long 0x4 "SSR,Target Status"
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
rbitfld.long 0x4 24. "SBF,Target Busy Flag" "0: Idle,1: Busy"
newline
rbitfld.long 0x4 15. "SARF,SMBus Alert Response Flag" "0: Disabled or not detected,1: Enabled and detected"
rbitfld.long 0x4 14. "GCF,General Call Flag" "0: General call address disabled or not detected,1: General call address detected"
newline
rbitfld.long 0x4 13. "AM1F,Address Match 1 Flag" "0: Matching address not received,1: Matching address received"
rbitfld.long 0x4 12. "AM0F,Address Match 0 Flag" "0: ADDR0 matching address not received,1: ADDR0 matching address received"
newline
eventfld.long 0x4 11. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error"
eventfld.long 0x4 10. "BEF,Bit Error Flag" "0: No bit error occurred,1: Bit error occurred"
newline
eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop detected,1: Stop detected"
eventfld.long 0x4 8. "RSF,Repeated Start Flag" "0: No repeated Start detected,1: Repeated Start detected"
newline
rbitfld.long 0x4 3. "TAF,Transmit ACK Flag" "0: Not required,1: Required"
rbitfld.long 0x4 2. "AVF,Address Valid Flag" "0: Not valid,1: Valid"
newline
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Not ready,1: Ready"
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data is requested"
line.long 0x8 "SIER,Target Interrupt Enable"
bitfld.long 0x8 15. "SARIE,SMBus Alert Response Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "GCIE,General Call Interrupt Enable" "0: Disabled,1: Enabled"
newline
bitfld.long 0x8 13. "AM1IE,Address Match 1 Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "AM0IE,Address Match 0 Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "BEIE,Bit Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "RSIE,Repeated Start Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 3. "TAIE,Transmit ACK Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 2. "AVIE,Address Valid Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "SDER,Target DMA Enable"
bitfld.long 0xC 9. "SDDE,Stop Detect DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 8. "RSDE,Repeated Start DMA Enable" "0: Disable,1: Enable"
newline
bitfld.long 0xC 2. "AVDE,Address Valid DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable DMA request,1: Enable DMA request"
newline
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "SCFGR0,Target Configuration 0"
rbitfld.long 0x10 1. "RDACK,Read Acknowledge Flag" "0: Read Request not acknowledged,1: Read Request acknowledged"
bitfld.long 0x10 0. "RDREQ,Read Request" "0: Disable,1: Enable"
line.long 0x14 "SCFGR1,Target Configuration 1"
bitfld.long 0x14 26. "SDCFG,Stop Detect Configuration" "0: Any Stop condition following an address match,1: Any Stop condition"
bitfld.long 0x14 25. "RSCFG,Repeated Start Configuration" "0: Any repeated Start condition following an..,1: Any repeated Start condition"
newline
bitfld.long 0x14 24. "RXALL,Receive All" "0: Disable,1: Enable"
bitfld.long 0x14 16.--18. "ADDRCFG,Address Configuration" "0: Address match 0 (7-bit),1: Address match 0 (10-bit),2: Address match 0 (7-bit) or address match 1 (7-bit),3: Address match 0 (10-bit) or address match 1..,4: Address match 0 (7-bit) or address match 1..,5: Address match 0 (10-bit) or address match 1..,6: From address match 0 (7-bit) to address match 1..,7: From address match 0 (10-bit) to address match 1.."
newline
bitfld.long 0x14 13. "HSMEN,HS Mode Enable" "0: Disable,1: Enable"
bitfld.long 0x14 12. "IGNACK,Ignore NACK" "0: End transfer on NACK,1: Do not end transfer on NACK"
newline
bitfld.long 0x14 11. "RXCFG,Receive Data Configuration" "0: Return received data clear MSR[RDF],1: Return SASR and clear SSR[AVF] when SSR[AVF] is.."
bitfld.long 0x14 10. "TXCFG,Transmit Flag Configuration" "0: MSR[TDF] is set only during a target-transmit..,1: MSR[TDF] is set whenever STDR is empty"
newline
bitfld.long 0x14 9. "SAEN,SMBus Alert Enable" "0: Disable,1: Enable"
bitfld.long 0x14 8. "GCEN,General Call Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x14 4. "RXNACK,Receive NACK" "0: ACK or NACK always determined by STAR[TXNACK],1: NACK always generated on address overrun or.."
bitfld.long 0x14 3. "ACKSTALL,ACK SCL Stall" "0: Disable,1: Enable"
newline
bitfld.long 0x14 2. "TXDSTALL,Transmit Data SCL Stall" "0: Disable,1: Enable"
bitfld.long 0x14 1. "RXSTALL,RX SCL Stall" "0: Disable,1: Enable"
newline
bitfld.long 0x14 0. "ADRSTALL,Address SCL Stall" "0: Disable,1: Enable"
line.long 0x18 "SCFGR2,Target Configuration 2"
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
newline
hexmask.long.byte 0x18 8.--13. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x18 0.--3. 1. "CLKHOLD,Clock Hold Time"
group.long 0x140++0x3
line.long 0x0 "SAMR,Target Address Match"
hexmask.long.word 0x0 17.--26. 1. "ADDR1,Address 1 Value"
hexmask.long.word 0x0 1.--10. 1. "ADDR0,Address 0 Value"
rgroup.long 0x150++0x3
line.long 0x0 "SASR,Target Address Status"
bitfld.long 0x0 14. "ANV,Address Not Valid" "0: Valid,1: Not valid"
hexmask.long.word 0x0 0.--10. 1. "RADDR,Received Address"
group.long 0x154++0x3
line.long 0x0 "STAR,Target Transmit ACK"
bitfld.long 0x0 0. "TXNACK,Transmit NACK" "0: Transmit ACK,1: Transmit NACK"
wgroup.long 0x160++0x3
line.long 0x0 "STDR,Target Transmit Data"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
rgroup.long 0x170++0x3
line.long 0x0 "SRDR,Target Receive Data"
bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not first,1: First"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
newline
bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Received Data"
rgroup.long 0x178++0x3
line.long 0x0 "SRDROR,Target Receive Data Read Only"
bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not the first,1: First"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
newline
bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
tree.end
endif
sif (cpuis("MC?A146*"))
tree "LPI2C1"
base ad:0x4009B000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 8.--11. 1. "MRXFIFO,Controller Receive FIFO Size"
hexmask.long.byte 0x4 0.--3. 1. "MTXFIFO,Controller Transmit FIFO Size"
group.long 0x10++0x1F
line.long 0x0 "MCR,Controller Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Reset receive FIFO"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Reset transmit FIFO"
newline
bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Disable,1: Enable"
bitfld.long 0x0 2. "DOZEN,Doze Mode Enable" "0: Enable,1: Disable"
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: No effect,1: Reset"
bitfld.long 0x0 0. "MEN,Controller Enable" "0: Disable,1: Enable"
line.long 0x4 "MSR,Controller Status"
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
rbitfld.long 0x4 24. "MBF,Controller Busy Flag" "0: Idle,1: Busy"
newline
eventfld.long 0x4 15. "STF,Start Flag" "0: Start condition not detected,1: Start condition detected"
eventfld.long 0x4 14. "DMF,Data Match Flag" "0: Matching data not received,1: Matching data received"
newline
eventfld.long 0x4 13. "PLTF,Pin Low Timeout Flag" "0: Pin low timeout did not occur,1: Pin low timeout occurred"
eventfld.long 0x4 12. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error"
newline
eventfld.long 0x4 11. "ALF,Arbitration Lost Flag" "0: Controller did not lose arbitration,1: Controller lost arbitration"
eventfld.long 0x4 10. "NDF,NACK Detect Flag" "0: No unexpected NACK detected,1: Unexpected NACK detected"
newline
eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop condition generated,1: Stop condition generated"
eventfld.long 0x4 8. "EPF,End Packet Flag" "0: No Stop or repeated Start generated,1: Stop or repeated Start generated"
newline
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive data not ready,1: Receive data ready"
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data requested"
line.long 0x8 "MIER,Controller Interrupt Enable"
bitfld.long 0x8 15. "STIE,Start Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "DMIE,Data Match Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 13. "PLTIE,Pin Low Timeout Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "ALIE,Arbitration Lost Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "NDIE,NACK Detect Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "EPIE,End Packet Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "MDER,Controller DMA Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "MCFGR0,Controller Configuration 0"
bitfld.long 0x10 17. "ABORT,Abort Transfer" "0: Normal transfer,1: Abort existing transfer and do not start a new one"
bitfld.long 0x10 16. "RELAX,Relaxed Mode" "0: Normal transfer,1: Relaxed transfer"
newline
bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO,1: Received data is discarded unless MSR[DMF] is set"
bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 3. "HRDIR,Host Request Direction" "0: HREQ pin is input (for LPI2C controller),1: HREQ pin is output (for LPI2C target)"
bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin HREQ,1: Host request input is input trigger"
newline
bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low,1: Active high"
bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Disable,1: Enable"
line.long 0x14 "MCFGR1,Controller Configuration 1"
bitfld.long 0x14 24.--26. "PINCFG,Pin Configuration" "0: Two-pin open drain mode,1: Two-pin output only mode (Ultra-Fast mode),2: Two-pin push-pull mode,3: Four-pin push-pull mode,4: Two-pin open-drain mode with separate LPI2C target,5: Two-pin output only mode (Ultra-Fast mode) with..,6: Two-pin push-pull mode with separate LPI2C target,7: Four-pin push-pull mode (inverted outputs)"
bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: Match is enabled: first data word equals..,3: Match is enabled: any data word equals..,4: Match is enabled: (first data word equals..,5: Match is enabled: (any data word equals..,6: Match is enabled: (first data word AND..,7: Match is enabled: (any data word AND.."
newline
bitfld.long 0x14 12. "STARTCFG,Start Configuration" "0: Sets when both I2C bus and LPI2C controller are..,1: Sets when I2C bus is idle"
bitfld.long 0x14 11. "STOPCFG,Stop Configuration" "0: Any Stop condition,1: Last Stop condition"
newline
bitfld.long 0x14 10. "TIMECFG,Timeout Configuration" "0: SCL,1: SCL or SDA"
bitfld.long 0x14 9. "IGNACK,Ignore NACK" "0: No effect,1: Treat a received NACK as an ACK"
newline
bitfld.long 0x14 8. "AUTOSTOP,Automatic Stop Generation" "0: No effect,1: Stop automatically generated"
bitfld.long 0x14 0.--2. "PRESCALE,Prescaler" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
line.long 0x18 "MCFGR2,Controller Configuration 2"
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
newline
hexmask.long.word 0x18 0.--11. 1. "BUSIDLE,Bus Idle Timeout"
line.long 0x1C "MCFGR3,Controller Configuration 3"
hexmask.long.word 0x1C 8.--19. 1. "PINLOW,Pin Low Timeout"
group.long 0x40++0x3
line.long 0x0 "MDMR,Controller Data Match"
hexmask.long.byte 0x0 16.--23. 1. "MATCH1,Match 1 Value"
hexmask.long.byte 0x0 0.--7. 1. "MATCH0,Match 0 Value"
group.long 0x48++0x3
line.long 0x0 "MCCR0,Controller Clock Configuration 0"
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
group.long 0x50++0x3
line.long 0x0 "MCCR1,Controller Clock Configuration 1"
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
group.long 0x58++0x3
line.long 0x0 "MFCR,Controller FIFO Control"
bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3"
bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3"
rgroup.long 0x5C++0x3
line.long 0x0 "MFSR,Controller FIFO Status"
bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7"
wgroup.long 0x60++0x3
line.long 0x0 "MTDR,Controller Transmit Data"
bitfld.long 0x0 8.--10. "CMD,Command Data" "0: Transmit the value in DATA[7:0],1: Receive (DATA[7:0] + 1) bytes,2: Generate Stop condition on I2C bus,3: Receive and discard (DATA[7:0] + 1) bytes,4: Generate (repeated) Start on the I2C bus and..,5: Generate (repeated) Start on the I2C bus and..,6: Generate (repeated) Start on the I2C bus and..,7: Generate (repeated) Start on the I2C bus and.."
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
rgroup.long 0x70++0x3
line.long 0x0 "MRDR,Controller Receive Data"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
rgroup.long 0x78++0x3
line.long 0x0 "MRDROR,Controller Receive Data Read Only"
bitfld.long 0x0 14. "RXEMPTY,RX Empty" "0: Not empty,1: Empty"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
group.long 0x110++0x1B
line.long 0x0 "SCR,Target Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: SRDR is now empty"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: STDR is now empty"
newline
bitfld.long 0x0 5. "FILTDZ,Filter Doze Enable" "0: Enable,1: Disable"
bitfld.long 0x0 4. "FILTEN,Filter Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
bitfld.long 0x0 0. "SEN,Target Enable" "0: Disable,1: Enable"
line.long 0x4 "SSR,Target Status"
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
rbitfld.long 0x4 24. "SBF,Target Busy Flag" "0: Idle,1: Busy"
newline
rbitfld.long 0x4 15. "SARF,SMBus Alert Response Flag" "0: Disabled or not detected,1: Enabled and detected"
rbitfld.long 0x4 14. "GCF,General Call Flag" "0: General call address disabled or not detected,1: General call address detected"
newline
rbitfld.long 0x4 13. "AM1F,Address Match 1 Flag" "0: Matching address not received,1: Matching address received"
rbitfld.long 0x4 12. "AM0F,Address Match 0 Flag" "0: ADDR0 matching address not received,1: ADDR0 matching address received"
newline
eventfld.long 0x4 11. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error"
eventfld.long 0x4 10. "BEF,Bit Error Flag" "0: No bit error occurred,1: Bit error occurred"
newline
eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop detected,1: Stop detected"
eventfld.long 0x4 8. "RSF,Repeated Start Flag" "0: No repeated Start detected,1: Repeated Start detected"
newline
rbitfld.long 0x4 3. "TAF,Transmit ACK Flag" "0: Not required,1: Required"
rbitfld.long 0x4 2. "AVF,Address Valid Flag" "0: Not valid,1: Valid"
newline
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Not ready,1: Ready"
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data is requested"
line.long 0x8 "SIER,Target Interrupt Enable"
bitfld.long 0x8 15. "SARIE,SMBus Alert Response Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "GCIE,General Call Interrupt Enable" "0: Disabled,1: Enabled"
newline
bitfld.long 0x8 13. "AM1IE,Address Match 1 Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "AM0IE,Address Match 0 Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "BEIE,Bit Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "RSIE,Repeated Start Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 3. "TAIE,Transmit ACK Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 2. "AVIE,Address Valid Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "SDER,Target DMA Enable"
bitfld.long 0xC 9. "SDDE,Stop Detect DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 8. "RSDE,Repeated Start DMA Enable" "0: Disable,1: Enable"
newline
bitfld.long 0xC 2. "AVDE,Address Valid DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable DMA request,1: Enable DMA request"
newline
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "SCFGR0,Target Configuration 0"
rbitfld.long 0x10 1. "RDACK,Read Acknowledge Flag" "0: Read Request not acknowledged,1: Read Request acknowledged"
bitfld.long 0x10 0. "RDREQ,Read Request" "0: Disable,1: Enable"
line.long 0x14 "SCFGR1,Target Configuration 1"
bitfld.long 0x14 26. "SDCFG,Stop Detect Configuration" "0: Any Stop condition following an address match,1: Any Stop condition"
bitfld.long 0x14 25. "RSCFG,Repeated Start Configuration" "0: Any repeated Start condition following an..,1: Any repeated Start condition"
newline
bitfld.long 0x14 24. "RXALL,Receive All" "0: Disable,1: Enable"
bitfld.long 0x14 16.--18. "ADDRCFG,Address Configuration" "0: Address match 0 (7-bit),1: Address match 0 (10-bit),2: Address match 0 (7-bit) or address match 1 (7-bit),3: Address match 0 (10-bit) or address match 1..,4: Address match 0 (7-bit) or address match 1..,5: Address match 0 (10-bit) or address match 1..,6: From address match 0 (7-bit) to address match 1..,7: From address match 0 (10-bit) to address match 1.."
newline
bitfld.long 0x14 13. "HSMEN,HS Mode Enable" "0: Disable,1: Enable"
bitfld.long 0x14 12. "IGNACK,Ignore NACK" "0: End transfer on NACK,1: Do not end transfer on NACK"
newline
bitfld.long 0x14 11. "RXCFG,Receive Data Configuration" "0: Return received data clear MSR[RDF],1: Return SASR and clear SSR[AVF] when SSR[AVF] is.."
bitfld.long 0x14 10. "TXCFG,Transmit Flag Configuration" "0: MSR[TDF] is set only during a target-transmit..,1: MSR[TDF] is set whenever STDR is empty"
newline
bitfld.long 0x14 9. "SAEN,SMBus Alert Enable" "0: Disable,1: Enable"
bitfld.long 0x14 8. "GCEN,General Call Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x14 4. "RXNACK,Receive NACK" "0: ACK or NACK always determined by STAR[TXNACK],1: NACK always generated on address overrun or.."
bitfld.long 0x14 3. "ACKSTALL,ACK SCL Stall" "0: Disable,1: Enable"
newline
bitfld.long 0x14 2. "TXDSTALL,Transmit Data SCL Stall" "0: Disable,1: Enable"
bitfld.long 0x14 1. "RXSTALL,RX SCL Stall" "0: Disable,1: Enable"
newline
bitfld.long 0x14 0. "ADRSTALL,Address SCL Stall" "0: Disable,1: Enable"
line.long 0x18 "SCFGR2,Target Configuration 2"
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
newline
hexmask.long.byte 0x18 8.--13. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x18 0.--3. 1. "CLKHOLD,Clock Hold Time"
group.long 0x140++0x3
line.long 0x0 "SAMR,Target Address Match"
hexmask.long.word 0x0 17.--26. 1. "ADDR1,Address 1 Value"
hexmask.long.word 0x0 1.--10. 1. "ADDR0,Address 0 Value"
rgroup.long 0x150++0x3
line.long 0x0 "SASR,Target Address Status"
bitfld.long 0x0 14. "ANV,Address Not Valid" "0: Valid,1: Not valid"
hexmask.long.word 0x0 0.--10. 1. "RADDR,Received Address"
group.long 0x154++0x3
line.long 0x0 "STAR,Target Transmit ACK"
bitfld.long 0x0 0. "TXNACK,Transmit NACK" "0: Transmit ACK,1: Transmit NACK"
wgroup.long 0x160++0x3
line.long 0x0 "STDR,Target Transmit Data"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
rgroup.long 0x170++0x3
line.long 0x0 "SRDR,Target Receive Data"
bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not first,1: First"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
newline
bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Received Data"
rgroup.long 0x178++0x3
line.long 0x0 "SRDROR,Target Receive Data Read Only"
bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not the first,1: First"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
newline
bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
tree.end
tree "LPI2C2"
base ad:0x400D4000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 8.--11. 1. "MRXFIFO,Controller Receive FIFO Size"
hexmask.long.byte 0x4 0.--3. 1. "MTXFIFO,Controller Transmit FIFO Size"
group.long 0x10++0x1F
line.long 0x0 "MCR,Controller Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Reset receive FIFO"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Reset transmit FIFO"
newline
bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Disable,1: Enable"
bitfld.long 0x0 2. "DOZEN,Doze Mode Enable" "0: Enable,1: Disable"
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: No effect,1: Reset"
bitfld.long 0x0 0. "MEN,Controller Enable" "0: Disable,1: Enable"
line.long 0x4 "MSR,Controller Status"
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
rbitfld.long 0x4 24. "MBF,Controller Busy Flag" "0: Idle,1: Busy"
newline
eventfld.long 0x4 15. "STF,Start Flag" "0: Start condition not detected,1: Start condition detected"
eventfld.long 0x4 14. "DMF,Data Match Flag" "0: Matching data not received,1: Matching data received"
newline
eventfld.long 0x4 13. "PLTF,Pin Low Timeout Flag" "0: Pin low timeout did not occur,1: Pin low timeout occurred"
eventfld.long 0x4 12. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error"
newline
eventfld.long 0x4 11. "ALF,Arbitration Lost Flag" "0: Controller did not lose arbitration,1: Controller lost arbitration"
eventfld.long 0x4 10. "NDF,NACK Detect Flag" "0: No unexpected NACK detected,1: Unexpected NACK detected"
newline
eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop condition generated,1: Stop condition generated"
eventfld.long 0x4 8. "EPF,End Packet Flag" "0: No Stop or repeated Start generated,1: Stop or repeated Start generated"
newline
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive data not ready,1: Receive data ready"
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data requested"
line.long 0x8 "MIER,Controller Interrupt Enable"
bitfld.long 0x8 15. "STIE,Start Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "DMIE,Data Match Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 13. "PLTIE,Pin Low Timeout Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "ALIE,Arbitration Lost Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "NDIE,NACK Detect Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "EPIE,End Packet Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "MDER,Controller DMA Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "MCFGR0,Controller Configuration 0"
bitfld.long 0x10 17. "ABORT,Abort Transfer" "0: Normal transfer,1: Abort existing transfer and do not start a new one"
bitfld.long 0x10 16. "RELAX,Relaxed Mode" "0: Normal transfer,1: Relaxed transfer"
newline
bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO,1: Received data is discarded unless MSR[DMF] is set"
bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 3. "HRDIR,Host Request Direction" "0: HREQ pin is input (for LPI2C controller),1: HREQ pin is output (for LPI2C target)"
bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin HREQ,1: Host request input is input trigger"
newline
bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low,1: Active high"
bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Disable,1: Enable"
line.long 0x14 "MCFGR1,Controller Configuration 1"
bitfld.long 0x14 24.--26. "PINCFG,Pin Configuration" "0: Two-pin open drain mode,1: Two-pin output only mode (Ultra-Fast mode),2: Two-pin push-pull mode,3: Four-pin push-pull mode,4: Two-pin open-drain mode with separate LPI2C target,5: Two-pin output only mode (Ultra-Fast mode) with..,6: Two-pin push-pull mode with separate LPI2C target,7: Four-pin push-pull mode (inverted outputs)"
bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: Match is enabled: first data word equals..,3: Match is enabled: any data word equals..,4: Match is enabled: (first data word equals..,5: Match is enabled: (any data word equals..,6: Match is enabled: (first data word AND..,7: Match is enabled: (any data word AND.."
newline
bitfld.long 0x14 12. "STARTCFG,Start Configuration" "0: Sets when both I2C bus and LPI2C controller are..,1: Sets when I2C bus is idle"
bitfld.long 0x14 11. "STOPCFG,Stop Configuration" "0: Any Stop condition,1: Last Stop condition"
newline
bitfld.long 0x14 10. "TIMECFG,Timeout Configuration" "0: SCL,1: SCL or SDA"
bitfld.long 0x14 9. "IGNACK,Ignore NACK" "0: No effect,1: Treat a received NACK as an ACK"
newline
bitfld.long 0x14 8. "AUTOSTOP,Automatic Stop Generation" "0: No effect,1: Stop automatically generated"
bitfld.long 0x14 0.--2. "PRESCALE,Prescaler" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
line.long 0x18 "MCFGR2,Controller Configuration 2"
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
newline
hexmask.long.word 0x18 0.--11. 1. "BUSIDLE,Bus Idle Timeout"
line.long 0x1C "MCFGR3,Controller Configuration 3"
hexmask.long.word 0x1C 8.--19. 1. "PINLOW,Pin Low Timeout"
group.long 0x40++0x3
line.long 0x0 "MDMR,Controller Data Match"
hexmask.long.byte 0x0 16.--23. 1. "MATCH1,Match 1 Value"
hexmask.long.byte 0x0 0.--7. 1. "MATCH0,Match 0 Value"
group.long 0x48++0x3
line.long 0x0 "MCCR0,Controller Clock Configuration 0"
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
group.long 0x50++0x3
line.long 0x0 "MCCR1,Controller Clock Configuration 1"
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
group.long 0x58++0x3
line.long 0x0 "MFCR,Controller FIFO Control"
bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3"
bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3"
rgroup.long 0x5C++0x3
line.long 0x0 "MFSR,Controller FIFO Status"
bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7"
wgroup.long 0x60++0x3
line.long 0x0 "MTDR,Controller Transmit Data"
bitfld.long 0x0 8.--10. "CMD,Command Data" "0: Transmit the value in DATA[7:0],1: Receive (DATA[7:0] + 1) bytes,2: Generate Stop condition on I2C bus,3: Receive and discard (DATA[7:0] + 1) bytes,4: Generate (repeated) Start on the I2C bus and..,5: Generate (repeated) Start on the I2C bus and..,6: Generate (repeated) Start on the I2C bus and..,7: Generate (repeated) Start on the I2C bus and.."
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
rgroup.long 0x70++0x3
line.long 0x0 "MRDR,Controller Receive Data"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
rgroup.long 0x78++0x3
line.long 0x0 "MRDROR,Controller Receive Data Read Only"
bitfld.long 0x0 14. "RXEMPTY,RX Empty" "0: Not empty,1: Empty"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
group.long 0x110++0x1B
line.long 0x0 "SCR,Target Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: SRDR is now empty"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: STDR is now empty"
newline
bitfld.long 0x0 5. "FILTDZ,Filter Doze Enable" "0: Enable,1: Disable"
bitfld.long 0x0 4. "FILTEN,Filter Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
bitfld.long 0x0 0. "SEN,Target Enable" "0: Disable,1: Enable"
line.long 0x4 "SSR,Target Status"
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
rbitfld.long 0x4 24. "SBF,Target Busy Flag" "0: Idle,1: Busy"
newline
rbitfld.long 0x4 15. "SARF,SMBus Alert Response Flag" "0: Disabled or not detected,1: Enabled and detected"
rbitfld.long 0x4 14. "GCF,General Call Flag" "0: General call address disabled or not detected,1: General call address detected"
newline
rbitfld.long 0x4 13. "AM1F,Address Match 1 Flag" "0: Matching address not received,1: Matching address received"
rbitfld.long 0x4 12. "AM0F,Address Match 0 Flag" "0: ADDR0 matching address not received,1: ADDR0 matching address received"
newline
eventfld.long 0x4 11. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error"
eventfld.long 0x4 10. "BEF,Bit Error Flag" "0: No bit error occurred,1: Bit error occurred"
newline
eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop detected,1: Stop detected"
eventfld.long 0x4 8. "RSF,Repeated Start Flag" "0: No repeated Start detected,1: Repeated Start detected"
newline
rbitfld.long 0x4 3. "TAF,Transmit ACK Flag" "0: Not required,1: Required"
rbitfld.long 0x4 2. "AVF,Address Valid Flag" "0: Not valid,1: Valid"
newline
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Not ready,1: Ready"
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data is requested"
line.long 0x8 "SIER,Target Interrupt Enable"
bitfld.long 0x8 15. "SARIE,SMBus Alert Response Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "GCIE,General Call Interrupt Enable" "0: Disabled,1: Enabled"
newline
bitfld.long 0x8 13. "AM1IE,Address Match 1 Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "AM0IE,Address Match 0 Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "BEIE,Bit Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "RSIE,Repeated Start Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 3. "TAIE,Transmit ACK Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 2. "AVIE,Address Valid Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "SDER,Target DMA Enable"
bitfld.long 0xC 9. "SDDE,Stop Detect DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 8. "RSDE,Repeated Start DMA Enable" "0: Disable,1: Enable"
newline
bitfld.long 0xC 2. "AVDE,Address Valid DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable DMA request,1: Enable DMA request"
newline
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "SCFGR0,Target Configuration 0"
rbitfld.long 0x10 1. "RDACK,Read Acknowledge Flag" "0: Read Request not acknowledged,1: Read Request acknowledged"
bitfld.long 0x10 0. "RDREQ,Read Request" "0: Disable,1: Enable"
line.long 0x14 "SCFGR1,Target Configuration 1"
bitfld.long 0x14 26. "SDCFG,Stop Detect Configuration" "0: Any Stop condition following an address match,1: Any Stop condition"
bitfld.long 0x14 25. "RSCFG,Repeated Start Configuration" "0: Any repeated Start condition following an..,1: Any repeated Start condition"
newline
bitfld.long 0x14 24. "RXALL,Receive All" "0: Disable,1: Enable"
bitfld.long 0x14 16.--18. "ADDRCFG,Address Configuration" "0: Address match 0 (7-bit),1: Address match 0 (10-bit),2: Address match 0 (7-bit) or address match 1 (7-bit),3: Address match 0 (10-bit) or address match 1..,4: Address match 0 (7-bit) or address match 1..,5: Address match 0 (10-bit) or address match 1..,6: From address match 0 (7-bit) to address match 1..,7: From address match 0 (10-bit) to address match 1.."
newline
bitfld.long 0x14 13. "HSMEN,HS Mode Enable" "0: Disable,1: Enable"
bitfld.long 0x14 12. "IGNACK,Ignore NACK" "0: End transfer on NACK,1: Do not end transfer on NACK"
newline
bitfld.long 0x14 11. "RXCFG,Receive Data Configuration" "0: Return received data clear MSR[RDF],1: Return SASR and clear SSR[AVF] when SSR[AVF] is.."
bitfld.long 0x14 10. "TXCFG,Transmit Flag Configuration" "0: MSR[TDF] is set only during a target-transmit..,1: MSR[TDF] is set whenever STDR is empty"
newline
bitfld.long 0x14 9. "SAEN,SMBus Alert Enable" "0: Disable,1: Enable"
bitfld.long 0x14 8. "GCEN,General Call Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x14 4. "RXNACK,Receive NACK" "0: ACK or NACK always determined by STAR[TXNACK],1: NACK always generated on address overrun or.."
bitfld.long 0x14 3. "ACKSTALL,ACK SCL Stall" "0: Disable,1: Enable"
newline
bitfld.long 0x14 2. "TXDSTALL,Transmit Data SCL Stall" "0: Disable,1: Enable"
bitfld.long 0x14 1. "RXSTALL,RX SCL Stall" "0: Disable,1: Enable"
newline
bitfld.long 0x14 0. "ADRSTALL,Address SCL Stall" "0: Disable,1: Enable"
line.long 0x18 "SCFGR2,Target Configuration 2"
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
newline
hexmask.long.byte 0x18 8.--13. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x18 0.--3. 1. "CLKHOLD,Clock Hold Time"
group.long 0x140++0x3
line.long 0x0 "SAMR,Target Address Match"
hexmask.long.word 0x0 17.--26. 1. "ADDR1,Address 1 Value"
hexmask.long.word 0x0 1.--10. 1. "ADDR0,Address 0 Value"
rgroup.long 0x150++0x3
line.long 0x0 "SASR,Target Address Status"
bitfld.long 0x0 14. "ANV,Address Not Valid" "0: Valid,1: Not valid"
hexmask.long.word 0x0 0.--10. 1. "RADDR,Received Address"
group.long 0x154++0x3
line.long 0x0 "STAR,Target Transmit ACK"
bitfld.long 0x0 0. "TXNACK,Transmit NACK" "0: Transmit ACK,1: Transmit NACK"
wgroup.long 0x160++0x3
line.long 0x0 "STDR,Target Transmit Data"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
rgroup.long 0x170++0x3
line.long 0x0 "SRDR,Target Receive Data"
bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not first,1: First"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
newline
bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Received Data"
rgroup.long 0x178++0x3
line.long 0x0 "SRDROR,Target Receive Data Read Only"
bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not the first,1: First"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
newline
bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
tree.end
tree "LPI2C3"
base ad:0x400D5000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 8.--11. 1. "MRXFIFO,Controller Receive FIFO Size"
hexmask.long.byte 0x4 0.--3. 1. "MTXFIFO,Controller Transmit FIFO Size"
group.long 0x10++0x1F
line.long 0x0 "MCR,Controller Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Reset receive FIFO"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Reset transmit FIFO"
newline
bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Disable,1: Enable"
bitfld.long 0x0 2. "DOZEN,Doze Mode Enable" "0: Enable,1: Disable"
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: No effect,1: Reset"
bitfld.long 0x0 0. "MEN,Controller Enable" "0: Disable,1: Enable"
line.long 0x4 "MSR,Controller Status"
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
rbitfld.long 0x4 24. "MBF,Controller Busy Flag" "0: Idle,1: Busy"
newline
eventfld.long 0x4 15. "STF,Start Flag" "0: Start condition not detected,1: Start condition detected"
eventfld.long 0x4 14. "DMF,Data Match Flag" "0: Matching data not received,1: Matching data received"
newline
eventfld.long 0x4 13. "PLTF,Pin Low Timeout Flag" "0: Pin low timeout did not occur,1: Pin low timeout occurred"
eventfld.long 0x4 12. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error"
newline
eventfld.long 0x4 11. "ALF,Arbitration Lost Flag" "0: Controller did not lose arbitration,1: Controller lost arbitration"
eventfld.long 0x4 10. "NDF,NACK Detect Flag" "0: No unexpected NACK detected,1: Unexpected NACK detected"
newline
eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop condition generated,1: Stop condition generated"
eventfld.long 0x4 8. "EPF,End Packet Flag" "0: No Stop or repeated Start generated,1: Stop or repeated Start generated"
newline
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive data not ready,1: Receive data ready"
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data requested"
line.long 0x8 "MIER,Controller Interrupt Enable"
bitfld.long 0x8 15. "STIE,Start Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "DMIE,Data Match Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 13. "PLTIE,Pin Low Timeout Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "ALIE,Arbitration Lost Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "NDIE,NACK Detect Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "EPIE,End Packet Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "MDER,Controller DMA Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "MCFGR0,Controller Configuration 0"
bitfld.long 0x10 17. "ABORT,Abort Transfer" "0: Normal transfer,1: Abort existing transfer and do not start a new one"
bitfld.long 0x10 16. "RELAX,Relaxed Mode" "0: Normal transfer,1: Relaxed transfer"
newline
bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO,1: Received data is discarded unless MSR[DMF] is set"
bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 3. "HRDIR,Host Request Direction" "0: HREQ pin is input (for LPI2C controller),1: HREQ pin is output (for LPI2C target)"
bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin HREQ,1: Host request input is input trigger"
newline
bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low,1: Active high"
bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Disable,1: Enable"
line.long 0x14 "MCFGR1,Controller Configuration 1"
bitfld.long 0x14 24.--26. "PINCFG,Pin Configuration" "0: Two-pin open drain mode,1: Two-pin output only mode (Ultra-Fast mode),2: Two-pin push-pull mode,3: Four-pin push-pull mode,4: Two-pin open-drain mode with separate LPI2C target,5: Two-pin output only mode (Ultra-Fast mode) with..,6: Two-pin push-pull mode with separate LPI2C target,7: Four-pin push-pull mode (inverted outputs)"
bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: Match is enabled: first data word equals..,3: Match is enabled: any data word equals..,4: Match is enabled: (first data word equals..,5: Match is enabled: (any data word equals..,6: Match is enabled: (first data word AND..,7: Match is enabled: (any data word AND.."
newline
bitfld.long 0x14 12. "STARTCFG,Start Configuration" "0: Sets when both I2C bus and LPI2C controller are..,1: Sets when I2C bus is idle"
bitfld.long 0x14 11. "STOPCFG,Stop Configuration" "0: Any Stop condition,1: Last Stop condition"
newline
bitfld.long 0x14 10. "TIMECFG,Timeout Configuration" "0: SCL,1: SCL or SDA"
bitfld.long 0x14 9. "IGNACK,Ignore NACK" "0: No effect,1: Treat a received NACK as an ACK"
newline
bitfld.long 0x14 8. "AUTOSTOP,Automatic Stop Generation" "0: No effect,1: Stop automatically generated"
bitfld.long 0x14 0.--2. "PRESCALE,Prescaler" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
line.long 0x18 "MCFGR2,Controller Configuration 2"
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
newline
hexmask.long.word 0x18 0.--11. 1. "BUSIDLE,Bus Idle Timeout"
line.long 0x1C "MCFGR3,Controller Configuration 3"
hexmask.long.word 0x1C 8.--19. 1. "PINLOW,Pin Low Timeout"
group.long 0x40++0x3
line.long 0x0 "MDMR,Controller Data Match"
hexmask.long.byte 0x0 16.--23. 1. "MATCH1,Match 1 Value"
hexmask.long.byte 0x0 0.--7. 1. "MATCH0,Match 0 Value"
group.long 0x48++0x3
line.long 0x0 "MCCR0,Controller Clock Configuration 0"
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
group.long 0x50++0x3
line.long 0x0 "MCCR1,Controller Clock Configuration 1"
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
group.long 0x58++0x3
line.long 0x0 "MFCR,Controller FIFO Control"
bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3"
bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3"
rgroup.long 0x5C++0x3
line.long 0x0 "MFSR,Controller FIFO Status"
bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7"
wgroup.long 0x60++0x3
line.long 0x0 "MTDR,Controller Transmit Data"
bitfld.long 0x0 8.--10. "CMD,Command Data" "0: Transmit the value in DATA[7:0],1: Receive (DATA[7:0] + 1) bytes,2: Generate Stop condition on I2C bus,3: Receive and discard (DATA[7:0] + 1) bytes,4: Generate (repeated) Start on the I2C bus and..,5: Generate (repeated) Start on the I2C bus and..,6: Generate (repeated) Start on the I2C bus and..,7: Generate (repeated) Start on the I2C bus and.."
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
rgroup.long 0x70++0x3
line.long 0x0 "MRDR,Controller Receive Data"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
rgroup.long 0x78++0x3
line.long 0x0 "MRDROR,Controller Receive Data Read Only"
bitfld.long 0x0 14. "RXEMPTY,RX Empty" "0: Not empty,1: Empty"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
group.long 0x110++0x1B
line.long 0x0 "SCR,Target Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: SRDR is now empty"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: STDR is now empty"
newline
bitfld.long 0x0 5. "FILTDZ,Filter Doze Enable" "0: Enable,1: Disable"
bitfld.long 0x0 4. "FILTEN,Filter Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
bitfld.long 0x0 0. "SEN,Target Enable" "0: Disable,1: Enable"
line.long 0x4 "SSR,Target Status"
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
rbitfld.long 0x4 24. "SBF,Target Busy Flag" "0: Idle,1: Busy"
newline
rbitfld.long 0x4 15. "SARF,SMBus Alert Response Flag" "0: Disabled or not detected,1: Enabled and detected"
rbitfld.long 0x4 14. "GCF,General Call Flag" "0: General call address disabled or not detected,1: General call address detected"
newline
rbitfld.long 0x4 13. "AM1F,Address Match 1 Flag" "0: Matching address not received,1: Matching address received"
rbitfld.long 0x4 12. "AM0F,Address Match 0 Flag" "0: ADDR0 matching address not received,1: ADDR0 matching address received"
newline
eventfld.long 0x4 11. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error"
eventfld.long 0x4 10. "BEF,Bit Error Flag" "0: No bit error occurred,1: Bit error occurred"
newline
eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop detected,1: Stop detected"
eventfld.long 0x4 8. "RSF,Repeated Start Flag" "0: No repeated Start detected,1: Repeated Start detected"
newline
rbitfld.long 0x4 3. "TAF,Transmit ACK Flag" "0: Not required,1: Required"
rbitfld.long 0x4 2. "AVF,Address Valid Flag" "0: Not valid,1: Valid"
newline
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Not ready,1: Ready"
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data is requested"
line.long 0x8 "SIER,Target Interrupt Enable"
bitfld.long 0x8 15. "SARIE,SMBus Alert Response Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "GCIE,General Call Interrupt Enable" "0: Disabled,1: Enabled"
newline
bitfld.long 0x8 13. "AM1IE,Address Match 1 Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "AM0IE,Address Match 0 Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "BEIE,Bit Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "RSIE,Repeated Start Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 3. "TAIE,Transmit ACK Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 2. "AVIE,Address Valid Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "SDER,Target DMA Enable"
bitfld.long 0xC 9. "SDDE,Stop Detect DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 8. "RSDE,Repeated Start DMA Enable" "0: Disable,1: Enable"
newline
bitfld.long 0xC 2. "AVDE,Address Valid DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable DMA request,1: Enable DMA request"
newline
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "SCFGR0,Target Configuration 0"
rbitfld.long 0x10 1. "RDACK,Read Acknowledge Flag" "0: Read Request not acknowledged,1: Read Request acknowledged"
bitfld.long 0x10 0. "RDREQ,Read Request" "0: Disable,1: Enable"
line.long 0x14 "SCFGR1,Target Configuration 1"
bitfld.long 0x14 26. "SDCFG,Stop Detect Configuration" "0: Any Stop condition following an address match,1: Any Stop condition"
bitfld.long 0x14 25. "RSCFG,Repeated Start Configuration" "0: Any repeated Start condition following an..,1: Any repeated Start condition"
newline
bitfld.long 0x14 24. "RXALL,Receive All" "0: Disable,1: Enable"
bitfld.long 0x14 16.--18. "ADDRCFG,Address Configuration" "0: Address match 0 (7-bit),1: Address match 0 (10-bit),2: Address match 0 (7-bit) or address match 1 (7-bit),3: Address match 0 (10-bit) or address match 1..,4: Address match 0 (7-bit) or address match 1..,5: Address match 0 (10-bit) or address match 1..,6: From address match 0 (7-bit) to address match 1..,7: From address match 0 (10-bit) to address match 1.."
newline
bitfld.long 0x14 13. "HSMEN,HS Mode Enable" "0: Disable,1: Enable"
bitfld.long 0x14 12. "IGNACK,Ignore NACK" "0: End transfer on NACK,1: Do not end transfer on NACK"
newline
bitfld.long 0x14 11. "RXCFG,Receive Data Configuration" "0: Return received data clear MSR[RDF],1: Return SASR and clear SSR[AVF] when SSR[AVF] is.."
bitfld.long 0x14 10. "TXCFG,Transmit Flag Configuration" "0: MSR[TDF] is set only during a target-transmit..,1: MSR[TDF] is set whenever STDR is empty"
newline
bitfld.long 0x14 9. "SAEN,SMBus Alert Enable" "0: Disable,1: Enable"
bitfld.long 0x14 8. "GCEN,General Call Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x14 4. "RXNACK,Receive NACK" "0: ACK or NACK always determined by STAR[TXNACK],1: NACK always generated on address overrun or.."
bitfld.long 0x14 3. "ACKSTALL,ACK SCL Stall" "0: Disable,1: Enable"
newline
bitfld.long 0x14 2. "TXDSTALL,Transmit Data SCL Stall" "0: Disable,1: Enable"
bitfld.long 0x14 1. "RXSTALL,RX SCL Stall" "0: Disable,1: Enable"
newline
bitfld.long 0x14 0. "ADRSTALL,Address SCL Stall" "0: Disable,1: Enable"
line.long 0x18 "SCFGR2,Target Configuration 2"
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
newline
hexmask.long.byte 0x18 8.--13. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x18 0.--3. 1. "CLKHOLD,Clock Hold Time"
group.long 0x140++0x3
line.long 0x0 "SAMR,Target Address Match"
hexmask.long.word 0x0 17.--26. 1. "ADDR1,Address 1 Value"
hexmask.long.word 0x0 1.--10. 1. "ADDR0,Address 0 Value"
rgroup.long 0x150++0x3
line.long 0x0 "SASR,Target Address Status"
bitfld.long 0x0 14. "ANV,Address Not Valid" "0: Valid,1: Not valid"
hexmask.long.word 0x0 0.--10. 1. "RADDR,Received Address"
group.long 0x154++0x3
line.long 0x0 "STAR,Target Transmit ACK"
bitfld.long 0x0 0. "TXNACK,Transmit NACK" "0: Transmit ACK,1: Transmit NACK"
wgroup.long 0x160++0x3
line.long 0x0 "STDR,Target Transmit Data"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
rgroup.long 0x170++0x3
line.long 0x0 "SRDR,Target Receive Data"
bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not first,1: First"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
newline
bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Received Data"
rgroup.long 0x178++0x3
line.long 0x0 "SRDROR,Target Receive Data Read Only"
bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not the first,1: First"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
newline
bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
tree.end
endif
sif (cpuis("MC?A154*"))
tree "LPI2C1"
base ad:0x4009B000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 8.--11. 1. "MRXFIFO,Controller Receive FIFO Size"
hexmask.long.byte 0x4 0.--3. 1. "MTXFIFO,Controller Transmit FIFO Size"
group.long 0x10++0x1F
line.long 0x0 "MCR,Controller Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Reset receive FIFO"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Reset transmit FIFO"
newline
bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Disable,1: Enable"
bitfld.long 0x0 2. "DOZEN,Doze Mode Enable" "0: Enable,1: Disable"
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: No effect,1: Reset"
bitfld.long 0x0 0. "MEN,Controller Enable" "0: Disable,1: Enable"
line.long 0x4 "MSR,Controller Status"
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
rbitfld.long 0x4 24. "MBF,Controller Busy Flag" "0: Idle,1: Busy"
newline
eventfld.long 0x4 15. "STF,Start Flag" "0: Start condition not detected,1: Start condition detected"
eventfld.long 0x4 14. "DMF,Data Match Flag" "0: Matching data not received,1: Matching data received"
newline
eventfld.long 0x4 13. "PLTF,Pin Low Timeout Flag" "0: Pin low timeout did not occur,1: Pin low timeout occurred"
eventfld.long 0x4 12. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error"
newline
eventfld.long 0x4 11. "ALF,Arbitration Lost Flag" "0: Controller did not lose arbitration,1: Controller lost arbitration"
eventfld.long 0x4 10. "NDF,NACK Detect Flag" "0: No unexpected NACK detected,1: Unexpected NACK detected"
newline
eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop condition generated,1: Stop condition generated"
eventfld.long 0x4 8. "EPF,End Packet Flag" "0: No Stop or repeated Start generated,1: Stop or repeated Start generated"
newline
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive data not ready,1: Receive data ready"
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data requested"
line.long 0x8 "MIER,Controller Interrupt Enable"
bitfld.long 0x8 15. "STIE,Start Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "DMIE,Data Match Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 13. "PLTIE,Pin Low Timeout Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "ALIE,Arbitration Lost Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "NDIE,NACK Detect Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "EPIE,End Packet Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "MDER,Controller DMA Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "MCFGR0,Controller Configuration 0"
bitfld.long 0x10 17. "ABORT,Abort Transfer" "0: Normal transfer,1: Abort existing transfer and do not start a new one"
bitfld.long 0x10 16. "RELAX,Relaxed Mode" "0: Normal transfer,1: Relaxed transfer"
newline
bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO,1: Received data is discarded unless MSR[DMF] is set"
bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 3. "HRDIR,Host Request Direction" "0: HREQ pin is input (for LPI2C controller),1: HREQ pin is output (for LPI2C target)"
bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin HREQ,1: Host request input is input trigger"
newline
bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low,1: Active high"
bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Disable,1: Enable"
line.long 0x14 "MCFGR1,Controller Configuration 1"
bitfld.long 0x14 24.--26. "PINCFG,Pin Configuration" "0: Two-pin open drain mode,1: Two-pin output only mode (Ultra-Fast mode),2: Two-pin push-pull mode,3: Four-pin push-pull mode,4: Two-pin open-drain mode with separate LPI2C target,5: Two-pin output only mode (Ultra-Fast mode) with..,6: Two-pin push-pull mode with separate LPI2C target,7: Four-pin push-pull mode (inverted outputs)"
bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: Match is enabled: first data word equals..,3: Match is enabled: any data word equals..,4: Match is enabled: (first data word equals..,5: Match is enabled: (any data word equals..,6: Match is enabled: (first data word AND..,7: Match is enabled: (any data word AND.."
newline
bitfld.long 0x14 12. "STARTCFG,Start Configuration" "0: Sets when both I2C bus and LPI2C controller are..,1: Sets when I2C bus is idle"
bitfld.long 0x14 11. "STOPCFG,Stop Configuration" "0: Any Stop condition,1: Last Stop condition"
newline
bitfld.long 0x14 10. "TIMECFG,Timeout Configuration" "0: SCL,1: SCL or SDA"
bitfld.long 0x14 9. "IGNACK,Ignore NACK" "0: No effect,1: Treat a received NACK as an ACK"
newline
bitfld.long 0x14 8. "AUTOSTOP,Automatic Stop Generation" "0: No effect,1: Stop automatically generated"
bitfld.long 0x14 0.--2. "PRESCALE,Prescaler" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
line.long 0x18 "MCFGR2,Controller Configuration 2"
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
newline
hexmask.long.word 0x18 0.--11. 1. "BUSIDLE,Bus Idle Timeout"
line.long 0x1C "MCFGR3,Controller Configuration 3"
hexmask.long.word 0x1C 8.--19. 1. "PINLOW,Pin Low Timeout"
group.long 0x40++0x3
line.long 0x0 "MDMR,Controller Data Match"
hexmask.long.byte 0x0 16.--23. 1. "MATCH1,Match 1 Value"
hexmask.long.byte 0x0 0.--7. 1. "MATCH0,Match 0 Value"
group.long 0x48++0x3
line.long 0x0 "MCCR0,Controller Clock Configuration 0"
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
group.long 0x50++0x3
line.long 0x0 "MCCR1,Controller Clock Configuration 1"
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
group.long 0x58++0x3
line.long 0x0 "MFCR,Controller FIFO Control"
bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3"
bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3"
rgroup.long 0x5C++0x3
line.long 0x0 "MFSR,Controller FIFO Status"
bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7"
wgroup.long 0x60++0x3
line.long 0x0 "MTDR,Controller Transmit Data"
bitfld.long 0x0 8.--10. "CMD,Command Data" "0: Transmit the value in DATA[7:0],1: Receive (DATA[7:0] + 1) bytes,2: Generate Stop condition on I2C bus,3: Receive and discard (DATA[7:0] + 1) bytes,4: Generate (repeated) Start on the I2C bus and..,5: Generate (repeated) Start on the I2C bus and..,6: Generate (repeated) Start on the I2C bus and..,7: Generate (repeated) Start on the I2C bus and.."
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
rgroup.long 0x70++0x3
line.long 0x0 "MRDR,Controller Receive Data"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
rgroup.long 0x78++0x3
line.long 0x0 "MRDROR,Controller Receive Data Read Only"
bitfld.long 0x0 14. "RXEMPTY,RX Empty" "0: Not empty,1: Empty"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
group.long 0x110++0x1B
line.long 0x0 "SCR,Target Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: SRDR is now empty"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: STDR is now empty"
newline
bitfld.long 0x0 5. "FILTDZ,Filter Doze Enable" "0: Enable,1: Disable"
bitfld.long 0x0 4. "FILTEN,Filter Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
bitfld.long 0x0 0. "SEN,Target Enable" "0: Disable,1: Enable"
line.long 0x4 "SSR,Target Status"
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
rbitfld.long 0x4 24. "SBF,Target Busy Flag" "0: Idle,1: Busy"
newline
rbitfld.long 0x4 15. "SARF,SMBus Alert Response Flag" "0: Disabled or not detected,1: Enabled and detected"
rbitfld.long 0x4 14. "GCF,General Call Flag" "0: General call address disabled or not detected,1: General call address detected"
newline
rbitfld.long 0x4 13. "AM1F,Address Match 1 Flag" "0: Matching address not received,1: Matching address received"
rbitfld.long 0x4 12. "AM0F,Address Match 0 Flag" "0: ADDR0 matching address not received,1: ADDR0 matching address received"
newline
eventfld.long 0x4 11. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error"
eventfld.long 0x4 10. "BEF,Bit Error Flag" "0: No bit error occurred,1: Bit error occurred"
newline
eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop detected,1: Stop detected"
eventfld.long 0x4 8. "RSF,Repeated Start Flag" "0: No repeated Start detected,1: Repeated Start detected"
newline
rbitfld.long 0x4 3. "TAF,Transmit ACK Flag" "0: Not required,1: Required"
rbitfld.long 0x4 2. "AVF,Address Valid Flag" "0: Not valid,1: Valid"
newline
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Not ready,1: Ready"
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data is requested"
line.long 0x8 "SIER,Target Interrupt Enable"
bitfld.long 0x8 15. "SARIE,SMBus Alert Response Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "GCIE,General Call Interrupt Enable" "0: Disabled,1: Enabled"
newline
bitfld.long 0x8 13. "AM1IE,Address Match 1 Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "AM0IE,Address Match 0 Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "BEIE,Bit Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "RSIE,Repeated Start Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 3. "TAIE,Transmit ACK Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 2. "AVIE,Address Valid Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "SDER,Target DMA Enable"
bitfld.long 0xC 9. "SDDE,Stop Detect DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 8. "RSDE,Repeated Start DMA Enable" "0: Disable,1: Enable"
newline
bitfld.long 0xC 2. "AVDE,Address Valid DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable DMA request,1: Enable DMA request"
newline
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "SCFGR0,Target Configuration 0"
rbitfld.long 0x10 1. "RDACK,Read Acknowledge Flag" "0: Read Request not acknowledged,1: Read Request acknowledged"
bitfld.long 0x10 0. "RDREQ,Read Request" "0: Disable,1: Enable"
line.long 0x14 "SCFGR1,Target Configuration 1"
bitfld.long 0x14 26. "SDCFG,Stop Detect Configuration" "0: Any Stop condition following an address match,1: Any Stop condition"
bitfld.long 0x14 25. "RSCFG,Repeated Start Configuration" "0: Any repeated Start condition following an..,1: Any repeated Start condition"
newline
bitfld.long 0x14 24. "RXALL,Receive All" "0: Disable,1: Enable"
bitfld.long 0x14 16.--18. "ADDRCFG,Address Configuration" "0: Address match 0 (7-bit),1: Address match 0 (10-bit),2: Address match 0 (7-bit) or address match 1 (7-bit),3: Address match 0 (10-bit) or address match 1..,4: Address match 0 (7-bit) or address match 1..,5: Address match 0 (10-bit) or address match 1..,6: From address match 0 (7-bit) to address match 1..,7: From address match 0 (10-bit) to address match 1.."
newline
bitfld.long 0x14 13. "HSMEN,HS Mode Enable" "0: Disable,1: Enable"
bitfld.long 0x14 12. "IGNACK,Ignore NACK" "0: End transfer on NACK,1: Do not end transfer on NACK"
newline
bitfld.long 0x14 11. "RXCFG,Receive Data Configuration" "0: Return received data clear MSR[RDF],1: Return SASR and clear SSR[AVF] when SSR[AVF] is.."
bitfld.long 0x14 10. "TXCFG,Transmit Flag Configuration" "0: MSR[TDF] is set only during a target-transmit..,1: MSR[TDF] is set whenever STDR is empty"
newline
bitfld.long 0x14 9. "SAEN,SMBus Alert Enable" "0: Disable,1: Enable"
bitfld.long 0x14 8. "GCEN,General Call Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x14 4. "RXNACK,Receive NACK" "0: ACK or NACK always determined by STAR[TXNACK],1: NACK always generated on address overrun or.."
bitfld.long 0x14 3. "ACKSTALL,ACK SCL Stall" "0: Disable,1: Enable"
newline
bitfld.long 0x14 2. "TXDSTALL,Transmit Data SCL Stall" "0: Disable,1: Enable"
bitfld.long 0x14 1. "RXSTALL,RX SCL Stall" "0: Disable,1: Enable"
newline
bitfld.long 0x14 0. "ADRSTALL,Address SCL Stall" "0: Disable,1: Enable"
line.long 0x18 "SCFGR2,Target Configuration 2"
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
newline
hexmask.long.byte 0x18 8.--13. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x18 0.--3. 1. "CLKHOLD,Clock Hold Time"
group.long 0x140++0x3
line.long 0x0 "SAMR,Target Address Match"
hexmask.long.word 0x0 17.--26. 1. "ADDR1,Address 1 Value"
hexmask.long.word 0x0 1.--10. 1. "ADDR0,Address 0 Value"
rgroup.long 0x150++0x3
line.long 0x0 "SASR,Target Address Status"
bitfld.long 0x0 14. "ANV,Address Not Valid" "0: Valid,1: Not valid"
hexmask.long.word 0x0 0.--10. 1. "RADDR,Received Address"
group.long 0x154++0x3
line.long 0x0 "STAR,Target Transmit ACK"
bitfld.long 0x0 0. "TXNACK,Transmit NACK" "0: Transmit ACK,1: Transmit NACK"
wgroup.long 0x160++0x3
line.long 0x0 "STDR,Target Transmit Data"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
rgroup.long 0x170++0x3
line.long 0x0 "SRDR,Target Receive Data"
bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not first,1: First"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
newline
bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Received Data"
rgroup.long 0x178++0x3
line.long 0x0 "SRDROR,Target Receive Data Read Only"
bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not the first,1: First"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
newline
bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
tree.end
tree "LPI2C2"
base ad:0x400D4000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 8.--11. 1. "MRXFIFO,Controller Receive FIFO Size"
hexmask.long.byte 0x4 0.--3. 1. "MTXFIFO,Controller Transmit FIFO Size"
group.long 0x10++0x1F
line.long 0x0 "MCR,Controller Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Reset receive FIFO"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Reset transmit FIFO"
newline
bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Disable,1: Enable"
bitfld.long 0x0 2. "DOZEN,Doze Mode Enable" "0: Enable,1: Disable"
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: No effect,1: Reset"
bitfld.long 0x0 0. "MEN,Controller Enable" "0: Disable,1: Enable"
line.long 0x4 "MSR,Controller Status"
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
rbitfld.long 0x4 24. "MBF,Controller Busy Flag" "0: Idle,1: Busy"
newline
eventfld.long 0x4 15. "STF,Start Flag" "0: Start condition not detected,1: Start condition detected"
eventfld.long 0x4 14. "DMF,Data Match Flag" "0: Matching data not received,1: Matching data received"
newline
eventfld.long 0x4 13. "PLTF,Pin Low Timeout Flag" "0: Pin low timeout did not occur,1: Pin low timeout occurred"
eventfld.long 0x4 12. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error"
newline
eventfld.long 0x4 11. "ALF,Arbitration Lost Flag" "0: Controller did not lose arbitration,1: Controller lost arbitration"
eventfld.long 0x4 10. "NDF,NACK Detect Flag" "0: No unexpected NACK detected,1: Unexpected NACK detected"
newline
eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop condition generated,1: Stop condition generated"
eventfld.long 0x4 8. "EPF,End Packet Flag" "0: No Stop or repeated Start generated,1: Stop or repeated Start generated"
newline
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive data not ready,1: Receive data ready"
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data requested"
line.long 0x8 "MIER,Controller Interrupt Enable"
bitfld.long 0x8 15. "STIE,Start Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "DMIE,Data Match Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 13. "PLTIE,Pin Low Timeout Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "ALIE,Arbitration Lost Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "NDIE,NACK Detect Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "EPIE,End Packet Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "MDER,Controller DMA Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "MCFGR0,Controller Configuration 0"
bitfld.long 0x10 17. "ABORT,Abort Transfer" "0: Normal transfer,1: Abort existing transfer and do not start a new one"
bitfld.long 0x10 16. "RELAX,Relaxed Mode" "0: Normal transfer,1: Relaxed transfer"
newline
bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO,1: Received data is discarded unless MSR[DMF] is set"
bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 3. "HRDIR,Host Request Direction" "0: HREQ pin is input (for LPI2C controller),1: HREQ pin is output (for LPI2C target)"
bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin HREQ,1: Host request input is input trigger"
newline
bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low,1: Active high"
bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Disable,1: Enable"
line.long 0x14 "MCFGR1,Controller Configuration 1"
bitfld.long 0x14 24.--26. "PINCFG,Pin Configuration" "0: Two-pin open drain mode,1: Two-pin output only mode (Ultra-Fast mode),2: Two-pin push-pull mode,3: Four-pin push-pull mode,4: Two-pin open-drain mode with separate LPI2C target,5: Two-pin output only mode (Ultra-Fast mode) with..,6: Two-pin push-pull mode with separate LPI2C target,7: Four-pin push-pull mode (inverted outputs)"
bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: Match is enabled: first data word equals..,3: Match is enabled: any data word equals..,4: Match is enabled: (first data word equals..,5: Match is enabled: (any data word equals..,6: Match is enabled: (first data word AND..,7: Match is enabled: (any data word AND.."
newline
bitfld.long 0x14 12. "STARTCFG,Start Configuration" "0: Sets when both I2C bus and LPI2C controller are..,1: Sets when I2C bus is idle"
bitfld.long 0x14 11. "STOPCFG,Stop Configuration" "0: Any Stop condition,1: Last Stop condition"
newline
bitfld.long 0x14 10. "TIMECFG,Timeout Configuration" "0: SCL,1: SCL or SDA"
bitfld.long 0x14 9. "IGNACK,Ignore NACK" "0: No effect,1: Treat a received NACK as an ACK"
newline
bitfld.long 0x14 8. "AUTOSTOP,Automatic Stop Generation" "0: No effect,1: Stop automatically generated"
bitfld.long 0x14 0.--2. "PRESCALE,Prescaler" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
line.long 0x18 "MCFGR2,Controller Configuration 2"
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
newline
hexmask.long.word 0x18 0.--11. 1. "BUSIDLE,Bus Idle Timeout"
line.long 0x1C "MCFGR3,Controller Configuration 3"
hexmask.long.word 0x1C 8.--19. 1. "PINLOW,Pin Low Timeout"
group.long 0x40++0x3
line.long 0x0 "MDMR,Controller Data Match"
hexmask.long.byte 0x0 16.--23. 1. "MATCH1,Match 1 Value"
hexmask.long.byte 0x0 0.--7. 1. "MATCH0,Match 0 Value"
group.long 0x48++0x3
line.long 0x0 "MCCR0,Controller Clock Configuration 0"
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
group.long 0x50++0x3
line.long 0x0 "MCCR1,Controller Clock Configuration 1"
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
group.long 0x58++0x3
line.long 0x0 "MFCR,Controller FIFO Control"
bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3"
bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3"
rgroup.long 0x5C++0x3
line.long 0x0 "MFSR,Controller FIFO Status"
bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7"
wgroup.long 0x60++0x3
line.long 0x0 "MTDR,Controller Transmit Data"
bitfld.long 0x0 8.--10. "CMD,Command Data" "0: Transmit the value in DATA[7:0],1: Receive (DATA[7:0] + 1) bytes,2: Generate Stop condition on I2C bus,3: Receive and discard (DATA[7:0] + 1) bytes,4: Generate (repeated) Start on the I2C bus and..,5: Generate (repeated) Start on the I2C bus and..,6: Generate (repeated) Start on the I2C bus and..,7: Generate (repeated) Start on the I2C bus and.."
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
rgroup.long 0x70++0x3
line.long 0x0 "MRDR,Controller Receive Data"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
rgroup.long 0x78++0x3
line.long 0x0 "MRDROR,Controller Receive Data Read Only"
bitfld.long 0x0 14. "RXEMPTY,RX Empty" "0: Not empty,1: Empty"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
group.long 0x110++0x1B
line.long 0x0 "SCR,Target Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: SRDR is now empty"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: STDR is now empty"
newline
bitfld.long 0x0 5. "FILTDZ,Filter Doze Enable" "0: Enable,1: Disable"
bitfld.long 0x0 4. "FILTEN,Filter Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
bitfld.long 0x0 0. "SEN,Target Enable" "0: Disable,1: Enable"
line.long 0x4 "SSR,Target Status"
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
rbitfld.long 0x4 24. "SBF,Target Busy Flag" "0: Idle,1: Busy"
newline
rbitfld.long 0x4 15. "SARF,SMBus Alert Response Flag" "0: Disabled or not detected,1: Enabled and detected"
rbitfld.long 0x4 14. "GCF,General Call Flag" "0: General call address disabled or not detected,1: General call address detected"
newline
rbitfld.long 0x4 13. "AM1F,Address Match 1 Flag" "0: Matching address not received,1: Matching address received"
rbitfld.long 0x4 12. "AM0F,Address Match 0 Flag" "0: ADDR0 matching address not received,1: ADDR0 matching address received"
newline
eventfld.long 0x4 11. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error"
eventfld.long 0x4 10. "BEF,Bit Error Flag" "0: No bit error occurred,1: Bit error occurred"
newline
eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop detected,1: Stop detected"
eventfld.long 0x4 8. "RSF,Repeated Start Flag" "0: No repeated Start detected,1: Repeated Start detected"
newline
rbitfld.long 0x4 3. "TAF,Transmit ACK Flag" "0: Not required,1: Required"
rbitfld.long 0x4 2. "AVF,Address Valid Flag" "0: Not valid,1: Valid"
newline
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Not ready,1: Ready"
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data is requested"
line.long 0x8 "SIER,Target Interrupt Enable"
bitfld.long 0x8 15. "SARIE,SMBus Alert Response Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "GCIE,General Call Interrupt Enable" "0: Disabled,1: Enabled"
newline
bitfld.long 0x8 13. "AM1IE,Address Match 1 Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "AM0IE,Address Match 0 Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "BEIE,Bit Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "RSIE,Repeated Start Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 3. "TAIE,Transmit ACK Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 2. "AVIE,Address Valid Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "SDER,Target DMA Enable"
bitfld.long 0xC 9. "SDDE,Stop Detect DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 8. "RSDE,Repeated Start DMA Enable" "0: Disable,1: Enable"
newline
bitfld.long 0xC 2. "AVDE,Address Valid DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable DMA request,1: Enable DMA request"
newline
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "SCFGR0,Target Configuration 0"
rbitfld.long 0x10 1. "RDACK,Read Acknowledge Flag" "0: Read Request not acknowledged,1: Read Request acknowledged"
bitfld.long 0x10 0. "RDREQ,Read Request" "0: Disable,1: Enable"
line.long 0x14 "SCFGR1,Target Configuration 1"
bitfld.long 0x14 26. "SDCFG,Stop Detect Configuration" "0: Any Stop condition following an address match,1: Any Stop condition"
bitfld.long 0x14 25. "RSCFG,Repeated Start Configuration" "0: Any repeated Start condition following an..,1: Any repeated Start condition"
newline
bitfld.long 0x14 24. "RXALL,Receive All" "0: Disable,1: Enable"
bitfld.long 0x14 16.--18. "ADDRCFG,Address Configuration" "0: Address match 0 (7-bit),1: Address match 0 (10-bit),2: Address match 0 (7-bit) or address match 1 (7-bit),3: Address match 0 (10-bit) or address match 1..,4: Address match 0 (7-bit) or address match 1..,5: Address match 0 (10-bit) or address match 1..,6: From address match 0 (7-bit) to address match 1..,7: From address match 0 (10-bit) to address match 1.."
newline
bitfld.long 0x14 13. "HSMEN,HS Mode Enable" "0: Disable,1: Enable"
bitfld.long 0x14 12. "IGNACK,Ignore NACK" "0: End transfer on NACK,1: Do not end transfer on NACK"
newline
bitfld.long 0x14 11. "RXCFG,Receive Data Configuration" "0: Return received data clear MSR[RDF],1: Return SASR and clear SSR[AVF] when SSR[AVF] is.."
bitfld.long 0x14 10. "TXCFG,Transmit Flag Configuration" "0: MSR[TDF] is set only during a target-transmit..,1: MSR[TDF] is set whenever STDR is empty"
newline
bitfld.long 0x14 9. "SAEN,SMBus Alert Enable" "0: Disable,1: Enable"
bitfld.long 0x14 8. "GCEN,General Call Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x14 4. "RXNACK,Receive NACK" "0: ACK or NACK always determined by STAR[TXNACK],1: NACK always generated on address overrun or.."
bitfld.long 0x14 3. "ACKSTALL,ACK SCL Stall" "0: Disable,1: Enable"
newline
bitfld.long 0x14 2. "TXDSTALL,Transmit Data SCL Stall" "0: Disable,1: Enable"
bitfld.long 0x14 1. "RXSTALL,RX SCL Stall" "0: Disable,1: Enable"
newline
bitfld.long 0x14 0. "ADRSTALL,Address SCL Stall" "0: Disable,1: Enable"
line.long 0x18 "SCFGR2,Target Configuration 2"
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
newline
hexmask.long.byte 0x18 8.--13. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x18 0.--3. 1. "CLKHOLD,Clock Hold Time"
group.long 0x140++0x3
line.long 0x0 "SAMR,Target Address Match"
hexmask.long.word 0x0 17.--26. 1. "ADDR1,Address 1 Value"
hexmask.long.word 0x0 1.--10. 1. "ADDR0,Address 0 Value"
rgroup.long 0x150++0x3
line.long 0x0 "SASR,Target Address Status"
bitfld.long 0x0 14. "ANV,Address Not Valid" "0: Valid,1: Not valid"
hexmask.long.word 0x0 0.--10. 1. "RADDR,Received Address"
group.long 0x154++0x3
line.long 0x0 "STAR,Target Transmit ACK"
bitfld.long 0x0 0. "TXNACK,Transmit NACK" "0: Transmit ACK,1: Transmit NACK"
wgroup.long 0x160++0x3
line.long 0x0 "STDR,Target Transmit Data"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
rgroup.long 0x170++0x3
line.long 0x0 "SRDR,Target Receive Data"
bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not first,1: First"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
newline
bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Received Data"
rgroup.long 0x178++0x3
line.long 0x0 "SRDROR,Target Receive Data Read Only"
bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not the first,1: First"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
newline
bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
tree.end
tree "LPI2C3"
base ad:0x400D5000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 8.--11. 1. "MRXFIFO,Controller Receive FIFO Size"
hexmask.long.byte 0x4 0.--3. 1. "MTXFIFO,Controller Transmit FIFO Size"
group.long 0x10++0x1F
line.long 0x0 "MCR,Controller Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Reset receive FIFO"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Reset transmit FIFO"
newline
bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Disable,1: Enable"
bitfld.long 0x0 2. "DOZEN,Doze Mode Enable" "0: Enable,1: Disable"
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: No effect,1: Reset"
bitfld.long 0x0 0. "MEN,Controller Enable" "0: Disable,1: Enable"
line.long 0x4 "MSR,Controller Status"
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
rbitfld.long 0x4 24. "MBF,Controller Busy Flag" "0: Idle,1: Busy"
newline
eventfld.long 0x4 15. "STF,Start Flag" "0: Start condition not detected,1: Start condition detected"
eventfld.long 0x4 14. "DMF,Data Match Flag" "0: Matching data not received,1: Matching data received"
newline
eventfld.long 0x4 13. "PLTF,Pin Low Timeout Flag" "0: Pin low timeout did not occur,1: Pin low timeout occurred"
eventfld.long 0x4 12. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error"
newline
eventfld.long 0x4 11. "ALF,Arbitration Lost Flag" "0: Controller did not lose arbitration,1: Controller lost arbitration"
eventfld.long 0x4 10. "NDF,NACK Detect Flag" "0: No unexpected NACK detected,1: Unexpected NACK detected"
newline
eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop condition generated,1: Stop condition generated"
eventfld.long 0x4 8. "EPF,End Packet Flag" "0: No Stop or repeated Start generated,1: Stop or repeated Start generated"
newline
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive data not ready,1: Receive data ready"
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data requested"
line.long 0x8 "MIER,Controller Interrupt Enable"
bitfld.long 0x8 15. "STIE,Start Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "DMIE,Data Match Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 13. "PLTIE,Pin Low Timeout Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "ALIE,Arbitration Lost Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "NDIE,NACK Detect Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "EPIE,End Packet Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "MDER,Controller DMA Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "MCFGR0,Controller Configuration 0"
bitfld.long 0x10 17. "ABORT,Abort Transfer" "0: Normal transfer,1: Abort existing transfer and do not start a new one"
bitfld.long 0x10 16. "RELAX,Relaxed Mode" "0: Normal transfer,1: Relaxed transfer"
newline
bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO,1: Received data is discarded unless MSR[DMF] is set"
bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 3. "HRDIR,Host Request Direction" "0: HREQ pin is input (for LPI2C controller),1: HREQ pin is output (for LPI2C target)"
bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin HREQ,1: Host request input is input trigger"
newline
bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low,1: Active high"
bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Disable,1: Enable"
line.long 0x14 "MCFGR1,Controller Configuration 1"
bitfld.long 0x14 24.--26. "PINCFG,Pin Configuration" "0: Two-pin open drain mode,1: Two-pin output only mode (Ultra-Fast mode),2: Two-pin push-pull mode,3: Four-pin push-pull mode,4: Two-pin open-drain mode with separate LPI2C target,5: Two-pin output only mode (Ultra-Fast mode) with..,6: Two-pin push-pull mode with separate LPI2C target,7: Four-pin push-pull mode (inverted outputs)"
bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: Match is enabled: first data word equals..,3: Match is enabled: any data word equals..,4: Match is enabled: (first data word equals..,5: Match is enabled: (any data word equals..,6: Match is enabled: (first data word AND..,7: Match is enabled: (any data word AND.."
newline
bitfld.long 0x14 12. "STARTCFG,Start Configuration" "0: Sets when both I2C bus and LPI2C controller are..,1: Sets when I2C bus is idle"
bitfld.long 0x14 11. "STOPCFG,Stop Configuration" "0: Any Stop condition,1: Last Stop condition"
newline
bitfld.long 0x14 10. "TIMECFG,Timeout Configuration" "0: SCL,1: SCL or SDA"
bitfld.long 0x14 9. "IGNACK,Ignore NACK" "0: No effect,1: Treat a received NACK as an ACK"
newline
bitfld.long 0x14 8. "AUTOSTOP,Automatic Stop Generation" "0: No effect,1: Stop automatically generated"
bitfld.long 0x14 0.--2. "PRESCALE,Prescaler" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
line.long 0x18 "MCFGR2,Controller Configuration 2"
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
newline
hexmask.long.word 0x18 0.--11. 1. "BUSIDLE,Bus Idle Timeout"
line.long 0x1C "MCFGR3,Controller Configuration 3"
hexmask.long.word 0x1C 8.--19. 1. "PINLOW,Pin Low Timeout"
group.long 0x40++0x3
line.long 0x0 "MDMR,Controller Data Match"
hexmask.long.byte 0x0 16.--23. 1. "MATCH1,Match 1 Value"
hexmask.long.byte 0x0 0.--7. 1. "MATCH0,Match 0 Value"
group.long 0x48++0x3
line.long 0x0 "MCCR0,Controller Clock Configuration 0"
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
group.long 0x50++0x3
line.long 0x0 "MCCR1,Controller Clock Configuration 1"
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
group.long 0x58++0x3
line.long 0x0 "MFCR,Controller FIFO Control"
bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3"
bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3"
rgroup.long 0x5C++0x3
line.long 0x0 "MFSR,Controller FIFO Status"
bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7"
wgroup.long 0x60++0x3
line.long 0x0 "MTDR,Controller Transmit Data"
bitfld.long 0x0 8.--10. "CMD,Command Data" "0: Transmit the value in DATA[7:0],1: Receive (DATA[7:0] + 1) bytes,2: Generate Stop condition on I2C bus,3: Receive and discard (DATA[7:0] + 1) bytes,4: Generate (repeated) Start on the I2C bus and..,5: Generate (repeated) Start on the I2C bus and..,6: Generate (repeated) Start on the I2C bus and..,7: Generate (repeated) Start on the I2C bus and.."
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
rgroup.long 0x70++0x3
line.long 0x0 "MRDR,Controller Receive Data"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
rgroup.long 0x78++0x3
line.long 0x0 "MRDROR,Controller Receive Data Read Only"
bitfld.long 0x0 14. "RXEMPTY,RX Empty" "0: Not empty,1: Empty"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
group.long 0x110++0x1B
line.long 0x0 "SCR,Target Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: SRDR is now empty"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: STDR is now empty"
newline
bitfld.long 0x0 5. "FILTDZ,Filter Doze Enable" "0: Enable,1: Disable"
bitfld.long 0x0 4. "FILTEN,Filter Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
bitfld.long 0x0 0. "SEN,Target Enable" "0: Disable,1: Enable"
line.long 0x4 "SSR,Target Status"
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
rbitfld.long 0x4 24. "SBF,Target Busy Flag" "0: Idle,1: Busy"
newline
rbitfld.long 0x4 15. "SARF,SMBus Alert Response Flag" "0: Disabled or not detected,1: Enabled and detected"
rbitfld.long 0x4 14. "GCF,General Call Flag" "0: General call address disabled or not detected,1: General call address detected"
newline
rbitfld.long 0x4 13. "AM1F,Address Match 1 Flag" "0: Matching address not received,1: Matching address received"
rbitfld.long 0x4 12. "AM0F,Address Match 0 Flag" "0: ADDR0 matching address not received,1: ADDR0 matching address received"
newline
eventfld.long 0x4 11. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error"
eventfld.long 0x4 10. "BEF,Bit Error Flag" "0: No bit error occurred,1: Bit error occurred"
newline
eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop detected,1: Stop detected"
eventfld.long 0x4 8. "RSF,Repeated Start Flag" "0: No repeated Start detected,1: Repeated Start detected"
newline
rbitfld.long 0x4 3. "TAF,Transmit ACK Flag" "0: Not required,1: Required"
rbitfld.long 0x4 2. "AVF,Address Valid Flag" "0: Not valid,1: Valid"
newline
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Not ready,1: Ready"
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data is requested"
line.long 0x8 "SIER,Target Interrupt Enable"
bitfld.long 0x8 15. "SARIE,SMBus Alert Response Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "GCIE,General Call Interrupt Enable" "0: Disabled,1: Enabled"
newline
bitfld.long 0x8 13. "AM1IE,Address Match 1 Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "AM0IE,Address Match 0 Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "BEIE,Bit Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "RSIE,Repeated Start Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 3. "TAIE,Transmit ACK Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 2. "AVIE,Address Valid Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "SDER,Target DMA Enable"
bitfld.long 0xC 9. "SDDE,Stop Detect DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 8. "RSDE,Repeated Start DMA Enable" "0: Disable,1: Enable"
newline
bitfld.long 0xC 2. "AVDE,Address Valid DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable DMA request,1: Enable DMA request"
newline
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "SCFGR0,Target Configuration 0"
rbitfld.long 0x10 1. "RDACK,Read Acknowledge Flag" "0: Read Request not acknowledged,1: Read Request acknowledged"
bitfld.long 0x10 0. "RDREQ,Read Request" "0: Disable,1: Enable"
line.long 0x14 "SCFGR1,Target Configuration 1"
bitfld.long 0x14 26. "SDCFG,Stop Detect Configuration" "0: Any Stop condition following an address match,1: Any Stop condition"
bitfld.long 0x14 25. "RSCFG,Repeated Start Configuration" "0: Any repeated Start condition following an..,1: Any repeated Start condition"
newline
bitfld.long 0x14 24. "RXALL,Receive All" "0: Disable,1: Enable"
bitfld.long 0x14 16.--18. "ADDRCFG,Address Configuration" "0: Address match 0 (7-bit),1: Address match 0 (10-bit),2: Address match 0 (7-bit) or address match 1 (7-bit),3: Address match 0 (10-bit) or address match 1..,4: Address match 0 (7-bit) or address match 1..,5: Address match 0 (10-bit) or address match 1..,6: From address match 0 (7-bit) to address match 1..,7: From address match 0 (10-bit) to address match 1.."
newline
bitfld.long 0x14 13. "HSMEN,HS Mode Enable" "0: Disable,1: Enable"
bitfld.long 0x14 12. "IGNACK,Ignore NACK" "0: End transfer on NACK,1: Do not end transfer on NACK"
newline
bitfld.long 0x14 11. "RXCFG,Receive Data Configuration" "0: Return received data clear MSR[RDF],1: Return SASR and clear SSR[AVF] when SSR[AVF] is.."
bitfld.long 0x14 10. "TXCFG,Transmit Flag Configuration" "0: MSR[TDF] is set only during a target-transmit..,1: MSR[TDF] is set whenever STDR is empty"
newline
bitfld.long 0x14 9. "SAEN,SMBus Alert Enable" "0: Disable,1: Enable"
bitfld.long 0x14 8. "GCEN,General Call Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x14 4. "RXNACK,Receive NACK" "0: ACK or NACK always determined by STAR[TXNACK],1: NACK always generated on address overrun or.."
bitfld.long 0x14 3. "ACKSTALL,ACK SCL Stall" "0: Disable,1: Enable"
newline
bitfld.long 0x14 2. "TXDSTALL,Transmit Data SCL Stall" "0: Disable,1: Enable"
bitfld.long 0x14 1. "RXSTALL,RX SCL Stall" "0: Disable,1: Enable"
newline
bitfld.long 0x14 0. "ADRSTALL,Address SCL Stall" "0: Disable,1: Enable"
line.long 0x18 "SCFGR2,Target Configuration 2"
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
newline
hexmask.long.byte 0x18 8.--13. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x18 0.--3. 1. "CLKHOLD,Clock Hold Time"
group.long 0x140++0x3
line.long 0x0 "SAMR,Target Address Match"
hexmask.long.word 0x0 17.--26. 1. "ADDR1,Address 1 Value"
hexmask.long.word 0x0 1.--10. 1. "ADDR0,Address 0 Value"
rgroup.long 0x150++0x3
line.long 0x0 "SASR,Target Address Status"
bitfld.long 0x0 14. "ANV,Address Not Valid" "0: Valid,1: Not valid"
hexmask.long.word 0x0 0.--10. 1. "RADDR,Received Address"
group.long 0x154++0x3
line.long 0x0 "STAR,Target Transmit ACK"
bitfld.long 0x0 0. "TXNACK,Transmit NACK" "0: Transmit ACK,1: Transmit NACK"
wgroup.long 0x160++0x3
line.long 0x0 "STDR,Target Transmit Data"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
rgroup.long 0x170++0x3
line.long 0x0 "SRDR,Target Receive Data"
bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not first,1: First"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
newline
bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Received Data"
rgroup.long 0x178++0x3
line.long 0x0 "SRDROR,Target Receive Data Read Only"
bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not the first,1: First"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
newline
bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
tree.end
endif
sif (cpuis("MC?A155*"))
tree "LPI2C1"
base ad:0x4009B000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 8.--11. 1. "MRXFIFO,Controller Receive FIFO Size"
hexmask.long.byte 0x4 0.--3. 1. "MTXFIFO,Controller Transmit FIFO Size"
group.long 0x10++0x1F
line.long 0x0 "MCR,Controller Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Reset receive FIFO"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Reset transmit FIFO"
newline
bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Disable,1: Enable"
bitfld.long 0x0 2. "DOZEN,Doze Mode Enable" "0: Enable,1: Disable"
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: No effect,1: Reset"
bitfld.long 0x0 0. "MEN,Controller Enable" "0: Disable,1: Enable"
line.long 0x4 "MSR,Controller Status"
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
rbitfld.long 0x4 24. "MBF,Controller Busy Flag" "0: Idle,1: Busy"
newline
eventfld.long 0x4 15. "STF,Start Flag" "0: Start condition not detected,1: Start condition detected"
eventfld.long 0x4 14. "DMF,Data Match Flag" "0: Matching data not received,1: Matching data received"
newline
eventfld.long 0x4 13. "PLTF,Pin Low Timeout Flag" "0: Pin low timeout did not occur,1: Pin low timeout occurred"
eventfld.long 0x4 12. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error"
newline
eventfld.long 0x4 11. "ALF,Arbitration Lost Flag" "0: Controller did not lose arbitration,1: Controller lost arbitration"
eventfld.long 0x4 10. "NDF,NACK Detect Flag" "0: No unexpected NACK detected,1: Unexpected NACK detected"
newline
eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop condition generated,1: Stop condition generated"
eventfld.long 0x4 8. "EPF,End Packet Flag" "0: No Stop or repeated Start generated,1: Stop or repeated Start generated"
newline
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive data not ready,1: Receive data ready"
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data requested"
line.long 0x8 "MIER,Controller Interrupt Enable"
bitfld.long 0x8 15. "STIE,Start Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "DMIE,Data Match Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 13. "PLTIE,Pin Low Timeout Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "ALIE,Arbitration Lost Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "NDIE,NACK Detect Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "EPIE,End Packet Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "MDER,Controller DMA Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "MCFGR0,Controller Configuration 0"
bitfld.long 0x10 17. "ABORT,Abort Transfer" "0: Normal transfer,1: Abort existing transfer and do not start a new one"
bitfld.long 0x10 16. "RELAX,Relaxed Mode" "0: Normal transfer,1: Relaxed transfer"
newline
bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO,1: Received data is discarded unless MSR[DMF] is set"
bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 3. "HRDIR,Host Request Direction" "0: HREQ pin is input (for LPI2C controller),1: HREQ pin is output (for LPI2C target)"
bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin HREQ,1: Host request input is input trigger"
newline
bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low,1: Active high"
bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Disable,1: Enable"
line.long 0x14 "MCFGR1,Controller Configuration 1"
bitfld.long 0x14 24.--26. "PINCFG,Pin Configuration" "0: Two-pin open drain mode,1: Two-pin output only mode (Ultra-Fast mode),2: Two-pin push-pull mode,3: Four-pin push-pull mode,4: Two-pin open-drain mode with separate LPI2C target,5: Two-pin output only mode (Ultra-Fast mode) with..,6: Two-pin push-pull mode with separate LPI2C target,7: Four-pin push-pull mode (inverted outputs)"
bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: Match is enabled: first data word equals..,3: Match is enabled: any data word equals..,4: Match is enabled: (first data word equals..,5: Match is enabled: (any data word equals..,6: Match is enabled: (first data word AND..,7: Match is enabled: (any data word AND.."
newline
bitfld.long 0x14 12. "STARTCFG,Start Configuration" "0: Sets when both I2C bus and LPI2C controller are..,1: Sets when I2C bus is idle"
bitfld.long 0x14 11. "STOPCFG,Stop Configuration" "0: Any Stop condition,1: Last Stop condition"
newline
bitfld.long 0x14 10. "TIMECFG,Timeout Configuration" "0: SCL,1: SCL or SDA"
bitfld.long 0x14 9. "IGNACK,Ignore NACK" "0: No effect,1: Treat a received NACK as an ACK"
newline
bitfld.long 0x14 8. "AUTOSTOP,Automatic Stop Generation" "0: No effect,1: Stop automatically generated"
bitfld.long 0x14 0.--2. "PRESCALE,Prescaler" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
line.long 0x18 "MCFGR2,Controller Configuration 2"
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
newline
hexmask.long.word 0x18 0.--11. 1. "BUSIDLE,Bus Idle Timeout"
line.long 0x1C "MCFGR3,Controller Configuration 3"
hexmask.long.word 0x1C 8.--19. 1. "PINLOW,Pin Low Timeout"
group.long 0x40++0x3
line.long 0x0 "MDMR,Controller Data Match"
hexmask.long.byte 0x0 16.--23. 1. "MATCH1,Match 1 Value"
hexmask.long.byte 0x0 0.--7. 1. "MATCH0,Match 0 Value"
group.long 0x48++0x3
line.long 0x0 "MCCR0,Controller Clock Configuration 0"
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
group.long 0x50++0x3
line.long 0x0 "MCCR1,Controller Clock Configuration 1"
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
group.long 0x58++0x3
line.long 0x0 "MFCR,Controller FIFO Control"
bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3"
bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3"
rgroup.long 0x5C++0x3
line.long 0x0 "MFSR,Controller FIFO Status"
bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7"
wgroup.long 0x60++0x3
line.long 0x0 "MTDR,Controller Transmit Data"
bitfld.long 0x0 8.--10. "CMD,Command Data" "0: Transmit the value in DATA[7:0],1: Receive (DATA[7:0] + 1) bytes,2: Generate Stop condition on I2C bus,3: Receive and discard (DATA[7:0] + 1) bytes,4: Generate (repeated) Start on the I2C bus and..,5: Generate (repeated) Start on the I2C bus and..,6: Generate (repeated) Start on the I2C bus and..,7: Generate (repeated) Start on the I2C bus and.."
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
rgroup.long 0x70++0x3
line.long 0x0 "MRDR,Controller Receive Data"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
rgroup.long 0x78++0x3
line.long 0x0 "MRDROR,Controller Receive Data Read Only"
bitfld.long 0x0 14. "RXEMPTY,RX Empty" "0: Not empty,1: Empty"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
group.long 0x110++0x1B
line.long 0x0 "SCR,Target Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: SRDR is now empty"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: STDR is now empty"
newline
bitfld.long 0x0 5. "FILTDZ,Filter Doze Enable" "0: Enable,1: Disable"
bitfld.long 0x0 4. "FILTEN,Filter Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
bitfld.long 0x0 0. "SEN,Target Enable" "0: Disable,1: Enable"
line.long 0x4 "SSR,Target Status"
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
rbitfld.long 0x4 24. "SBF,Target Busy Flag" "0: Idle,1: Busy"
newline
rbitfld.long 0x4 15. "SARF,SMBus Alert Response Flag" "0: Disabled or not detected,1: Enabled and detected"
rbitfld.long 0x4 14. "GCF,General Call Flag" "0: General call address disabled or not detected,1: General call address detected"
newline
rbitfld.long 0x4 13. "AM1F,Address Match 1 Flag" "0: Matching address not received,1: Matching address received"
rbitfld.long 0x4 12. "AM0F,Address Match 0 Flag" "0: ADDR0 matching address not received,1: ADDR0 matching address received"
newline
eventfld.long 0x4 11. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error"
eventfld.long 0x4 10. "BEF,Bit Error Flag" "0: No bit error occurred,1: Bit error occurred"
newline
eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop detected,1: Stop detected"
eventfld.long 0x4 8. "RSF,Repeated Start Flag" "0: No repeated Start detected,1: Repeated Start detected"
newline
rbitfld.long 0x4 3. "TAF,Transmit ACK Flag" "0: Not required,1: Required"
rbitfld.long 0x4 2. "AVF,Address Valid Flag" "0: Not valid,1: Valid"
newline
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Not ready,1: Ready"
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data is requested"
line.long 0x8 "SIER,Target Interrupt Enable"
bitfld.long 0x8 15. "SARIE,SMBus Alert Response Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "GCIE,General Call Interrupt Enable" "0: Disabled,1: Enabled"
newline
bitfld.long 0x8 13. "AM1IE,Address Match 1 Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "AM0IE,Address Match 0 Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "BEIE,Bit Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "RSIE,Repeated Start Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 3. "TAIE,Transmit ACK Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 2. "AVIE,Address Valid Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "SDER,Target DMA Enable"
bitfld.long 0xC 9. "SDDE,Stop Detect DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 8. "RSDE,Repeated Start DMA Enable" "0: Disable,1: Enable"
newline
bitfld.long 0xC 2. "AVDE,Address Valid DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable DMA request,1: Enable DMA request"
newline
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "SCFGR0,Target Configuration 0"
rbitfld.long 0x10 1. "RDACK,Read Acknowledge Flag" "0: Read Request not acknowledged,1: Read Request acknowledged"
bitfld.long 0x10 0. "RDREQ,Read Request" "0: Disable,1: Enable"
line.long 0x14 "SCFGR1,Target Configuration 1"
bitfld.long 0x14 26. "SDCFG,Stop Detect Configuration" "0: Any Stop condition following an address match,1: Any Stop condition"
bitfld.long 0x14 25. "RSCFG,Repeated Start Configuration" "0: Any repeated Start condition following an..,1: Any repeated Start condition"
newline
bitfld.long 0x14 24. "RXALL,Receive All" "0: Disable,1: Enable"
bitfld.long 0x14 16.--18. "ADDRCFG,Address Configuration" "0: Address match 0 (7-bit),1: Address match 0 (10-bit),2: Address match 0 (7-bit) or address match 1 (7-bit),3: Address match 0 (10-bit) or address match 1..,4: Address match 0 (7-bit) or address match 1..,5: Address match 0 (10-bit) or address match 1..,6: From address match 0 (7-bit) to address match 1..,7: From address match 0 (10-bit) to address match 1.."
newline
bitfld.long 0x14 13. "HSMEN,HS Mode Enable" "0: Disable,1: Enable"
bitfld.long 0x14 12. "IGNACK,Ignore NACK" "0: End transfer on NACK,1: Do not end transfer on NACK"
newline
bitfld.long 0x14 11. "RXCFG,Receive Data Configuration" "0: Return received data clear MSR[RDF],1: Return SASR and clear SSR[AVF] when SSR[AVF] is.."
bitfld.long 0x14 10. "TXCFG,Transmit Flag Configuration" "0: MSR[TDF] is set only during a target-transmit..,1: MSR[TDF] is set whenever STDR is empty"
newline
bitfld.long 0x14 9. "SAEN,SMBus Alert Enable" "0: Disable,1: Enable"
bitfld.long 0x14 8. "GCEN,General Call Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x14 4. "RXNACK,Receive NACK" "0: ACK or NACK always determined by STAR[TXNACK],1: NACK always generated on address overrun or.."
bitfld.long 0x14 3. "ACKSTALL,ACK SCL Stall" "0: Disable,1: Enable"
newline
bitfld.long 0x14 2. "TXDSTALL,Transmit Data SCL Stall" "0: Disable,1: Enable"
bitfld.long 0x14 1. "RXSTALL,RX SCL Stall" "0: Disable,1: Enable"
newline
bitfld.long 0x14 0. "ADRSTALL,Address SCL Stall" "0: Disable,1: Enable"
line.long 0x18 "SCFGR2,Target Configuration 2"
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
newline
hexmask.long.byte 0x18 8.--13. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x18 0.--3. 1. "CLKHOLD,Clock Hold Time"
group.long 0x140++0x3
line.long 0x0 "SAMR,Target Address Match"
hexmask.long.word 0x0 17.--26. 1. "ADDR1,Address 1 Value"
hexmask.long.word 0x0 1.--10. 1. "ADDR0,Address 0 Value"
rgroup.long 0x150++0x3
line.long 0x0 "SASR,Target Address Status"
bitfld.long 0x0 14. "ANV,Address Not Valid" "0: Valid,1: Not valid"
hexmask.long.word 0x0 0.--10. 1. "RADDR,Received Address"
group.long 0x154++0x3
line.long 0x0 "STAR,Target Transmit ACK"
bitfld.long 0x0 0. "TXNACK,Transmit NACK" "0: Transmit ACK,1: Transmit NACK"
wgroup.long 0x160++0x3
line.long 0x0 "STDR,Target Transmit Data"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
rgroup.long 0x170++0x3
line.long 0x0 "SRDR,Target Receive Data"
bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not first,1: First"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
newline
bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Received Data"
rgroup.long 0x178++0x3
line.long 0x0 "SRDROR,Target Receive Data Read Only"
bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not the first,1: First"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
newline
bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
tree.end
tree "LPI2C2"
base ad:0x400D4000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 8.--11. 1. "MRXFIFO,Controller Receive FIFO Size"
hexmask.long.byte 0x4 0.--3. 1. "MTXFIFO,Controller Transmit FIFO Size"
group.long 0x10++0x1F
line.long 0x0 "MCR,Controller Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Reset receive FIFO"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Reset transmit FIFO"
newline
bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Disable,1: Enable"
bitfld.long 0x0 2. "DOZEN,Doze Mode Enable" "0: Enable,1: Disable"
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: No effect,1: Reset"
bitfld.long 0x0 0. "MEN,Controller Enable" "0: Disable,1: Enable"
line.long 0x4 "MSR,Controller Status"
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
rbitfld.long 0x4 24. "MBF,Controller Busy Flag" "0: Idle,1: Busy"
newline
eventfld.long 0x4 15. "STF,Start Flag" "0: Start condition not detected,1: Start condition detected"
eventfld.long 0x4 14. "DMF,Data Match Flag" "0: Matching data not received,1: Matching data received"
newline
eventfld.long 0x4 13. "PLTF,Pin Low Timeout Flag" "0: Pin low timeout did not occur,1: Pin low timeout occurred"
eventfld.long 0x4 12. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error"
newline
eventfld.long 0x4 11. "ALF,Arbitration Lost Flag" "0: Controller did not lose arbitration,1: Controller lost arbitration"
eventfld.long 0x4 10. "NDF,NACK Detect Flag" "0: No unexpected NACK detected,1: Unexpected NACK detected"
newline
eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop condition generated,1: Stop condition generated"
eventfld.long 0x4 8. "EPF,End Packet Flag" "0: No Stop or repeated Start generated,1: Stop or repeated Start generated"
newline
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive data not ready,1: Receive data ready"
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data requested"
line.long 0x8 "MIER,Controller Interrupt Enable"
bitfld.long 0x8 15. "STIE,Start Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "DMIE,Data Match Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 13. "PLTIE,Pin Low Timeout Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "ALIE,Arbitration Lost Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "NDIE,NACK Detect Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "EPIE,End Packet Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "MDER,Controller DMA Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "MCFGR0,Controller Configuration 0"
bitfld.long 0x10 17. "ABORT,Abort Transfer" "0: Normal transfer,1: Abort existing transfer and do not start a new one"
bitfld.long 0x10 16. "RELAX,Relaxed Mode" "0: Normal transfer,1: Relaxed transfer"
newline
bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO,1: Received data is discarded unless MSR[DMF] is set"
bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 3. "HRDIR,Host Request Direction" "0: HREQ pin is input (for LPI2C controller),1: HREQ pin is output (for LPI2C target)"
bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin HREQ,1: Host request input is input trigger"
newline
bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low,1: Active high"
bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Disable,1: Enable"
line.long 0x14 "MCFGR1,Controller Configuration 1"
bitfld.long 0x14 24.--26. "PINCFG,Pin Configuration" "0: Two-pin open drain mode,1: Two-pin output only mode (Ultra-Fast mode),2: Two-pin push-pull mode,3: Four-pin push-pull mode,4: Two-pin open-drain mode with separate LPI2C target,5: Two-pin output only mode (Ultra-Fast mode) with..,6: Two-pin push-pull mode with separate LPI2C target,7: Four-pin push-pull mode (inverted outputs)"
bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: Match is enabled: first data word equals..,3: Match is enabled: any data word equals..,4: Match is enabled: (first data word equals..,5: Match is enabled: (any data word equals..,6: Match is enabled: (first data word AND..,7: Match is enabled: (any data word AND.."
newline
bitfld.long 0x14 12. "STARTCFG,Start Configuration" "0: Sets when both I2C bus and LPI2C controller are..,1: Sets when I2C bus is idle"
bitfld.long 0x14 11. "STOPCFG,Stop Configuration" "0: Any Stop condition,1: Last Stop condition"
newline
bitfld.long 0x14 10. "TIMECFG,Timeout Configuration" "0: SCL,1: SCL or SDA"
bitfld.long 0x14 9. "IGNACK,Ignore NACK" "0: No effect,1: Treat a received NACK as an ACK"
newline
bitfld.long 0x14 8. "AUTOSTOP,Automatic Stop Generation" "0: No effect,1: Stop automatically generated"
bitfld.long 0x14 0.--2. "PRESCALE,Prescaler" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
line.long 0x18 "MCFGR2,Controller Configuration 2"
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
newline
hexmask.long.word 0x18 0.--11. 1. "BUSIDLE,Bus Idle Timeout"
line.long 0x1C "MCFGR3,Controller Configuration 3"
hexmask.long.word 0x1C 8.--19. 1. "PINLOW,Pin Low Timeout"
group.long 0x40++0x3
line.long 0x0 "MDMR,Controller Data Match"
hexmask.long.byte 0x0 16.--23. 1. "MATCH1,Match 1 Value"
hexmask.long.byte 0x0 0.--7. 1. "MATCH0,Match 0 Value"
group.long 0x48++0x3
line.long 0x0 "MCCR0,Controller Clock Configuration 0"
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
group.long 0x50++0x3
line.long 0x0 "MCCR1,Controller Clock Configuration 1"
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
group.long 0x58++0x3
line.long 0x0 "MFCR,Controller FIFO Control"
bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3"
bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3"
rgroup.long 0x5C++0x3
line.long 0x0 "MFSR,Controller FIFO Status"
bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7"
wgroup.long 0x60++0x3
line.long 0x0 "MTDR,Controller Transmit Data"
bitfld.long 0x0 8.--10. "CMD,Command Data" "0: Transmit the value in DATA[7:0],1: Receive (DATA[7:0] + 1) bytes,2: Generate Stop condition on I2C bus,3: Receive and discard (DATA[7:0] + 1) bytes,4: Generate (repeated) Start on the I2C bus and..,5: Generate (repeated) Start on the I2C bus and..,6: Generate (repeated) Start on the I2C bus and..,7: Generate (repeated) Start on the I2C bus and.."
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
rgroup.long 0x70++0x3
line.long 0x0 "MRDR,Controller Receive Data"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
rgroup.long 0x78++0x3
line.long 0x0 "MRDROR,Controller Receive Data Read Only"
bitfld.long 0x0 14. "RXEMPTY,RX Empty" "0: Not empty,1: Empty"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
group.long 0x110++0x1B
line.long 0x0 "SCR,Target Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: SRDR is now empty"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: STDR is now empty"
newline
bitfld.long 0x0 5. "FILTDZ,Filter Doze Enable" "0: Enable,1: Disable"
bitfld.long 0x0 4. "FILTEN,Filter Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
bitfld.long 0x0 0. "SEN,Target Enable" "0: Disable,1: Enable"
line.long 0x4 "SSR,Target Status"
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
rbitfld.long 0x4 24. "SBF,Target Busy Flag" "0: Idle,1: Busy"
newline
rbitfld.long 0x4 15. "SARF,SMBus Alert Response Flag" "0: Disabled or not detected,1: Enabled and detected"
rbitfld.long 0x4 14. "GCF,General Call Flag" "0: General call address disabled or not detected,1: General call address detected"
newline
rbitfld.long 0x4 13. "AM1F,Address Match 1 Flag" "0: Matching address not received,1: Matching address received"
rbitfld.long 0x4 12. "AM0F,Address Match 0 Flag" "0: ADDR0 matching address not received,1: ADDR0 matching address received"
newline
eventfld.long 0x4 11. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error"
eventfld.long 0x4 10. "BEF,Bit Error Flag" "0: No bit error occurred,1: Bit error occurred"
newline
eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop detected,1: Stop detected"
eventfld.long 0x4 8. "RSF,Repeated Start Flag" "0: No repeated Start detected,1: Repeated Start detected"
newline
rbitfld.long 0x4 3. "TAF,Transmit ACK Flag" "0: Not required,1: Required"
rbitfld.long 0x4 2. "AVF,Address Valid Flag" "0: Not valid,1: Valid"
newline
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Not ready,1: Ready"
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data is requested"
line.long 0x8 "SIER,Target Interrupt Enable"
bitfld.long 0x8 15. "SARIE,SMBus Alert Response Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "GCIE,General Call Interrupt Enable" "0: Disabled,1: Enabled"
newline
bitfld.long 0x8 13. "AM1IE,Address Match 1 Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "AM0IE,Address Match 0 Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "BEIE,Bit Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "RSIE,Repeated Start Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 3. "TAIE,Transmit ACK Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 2. "AVIE,Address Valid Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "SDER,Target DMA Enable"
bitfld.long 0xC 9. "SDDE,Stop Detect DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 8. "RSDE,Repeated Start DMA Enable" "0: Disable,1: Enable"
newline
bitfld.long 0xC 2. "AVDE,Address Valid DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable DMA request,1: Enable DMA request"
newline
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "SCFGR0,Target Configuration 0"
rbitfld.long 0x10 1. "RDACK,Read Acknowledge Flag" "0: Read Request not acknowledged,1: Read Request acknowledged"
bitfld.long 0x10 0. "RDREQ,Read Request" "0: Disable,1: Enable"
line.long 0x14 "SCFGR1,Target Configuration 1"
bitfld.long 0x14 26. "SDCFG,Stop Detect Configuration" "0: Any Stop condition following an address match,1: Any Stop condition"
bitfld.long 0x14 25. "RSCFG,Repeated Start Configuration" "0: Any repeated Start condition following an..,1: Any repeated Start condition"
newline
bitfld.long 0x14 24. "RXALL,Receive All" "0: Disable,1: Enable"
bitfld.long 0x14 16.--18. "ADDRCFG,Address Configuration" "0: Address match 0 (7-bit),1: Address match 0 (10-bit),2: Address match 0 (7-bit) or address match 1 (7-bit),3: Address match 0 (10-bit) or address match 1..,4: Address match 0 (7-bit) or address match 1..,5: Address match 0 (10-bit) or address match 1..,6: From address match 0 (7-bit) to address match 1..,7: From address match 0 (10-bit) to address match 1.."
newline
bitfld.long 0x14 13. "HSMEN,HS Mode Enable" "0: Disable,1: Enable"
bitfld.long 0x14 12. "IGNACK,Ignore NACK" "0: End transfer on NACK,1: Do not end transfer on NACK"
newline
bitfld.long 0x14 11. "RXCFG,Receive Data Configuration" "0: Return received data clear MSR[RDF],1: Return SASR and clear SSR[AVF] when SSR[AVF] is.."
bitfld.long 0x14 10. "TXCFG,Transmit Flag Configuration" "0: MSR[TDF] is set only during a target-transmit..,1: MSR[TDF] is set whenever STDR is empty"
newline
bitfld.long 0x14 9. "SAEN,SMBus Alert Enable" "0: Disable,1: Enable"
bitfld.long 0x14 8. "GCEN,General Call Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x14 4. "RXNACK,Receive NACK" "0: ACK or NACK always determined by STAR[TXNACK],1: NACK always generated on address overrun or.."
bitfld.long 0x14 3. "ACKSTALL,ACK SCL Stall" "0: Disable,1: Enable"
newline
bitfld.long 0x14 2. "TXDSTALL,Transmit Data SCL Stall" "0: Disable,1: Enable"
bitfld.long 0x14 1. "RXSTALL,RX SCL Stall" "0: Disable,1: Enable"
newline
bitfld.long 0x14 0. "ADRSTALL,Address SCL Stall" "0: Disable,1: Enable"
line.long 0x18 "SCFGR2,Target Configuration 2"
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
newline
hexmask.long.byte 0x18 8.--13. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x18 0.--3. 1. "CLKHOLD,Clock Hold Time"
group.long 0x140++0x3
line.long 0x0 "SAMR,Target Address Match"
hexmask.long.word 0x0 17.--26. 1. "ADDR1,Address 1 Value"
hexmask.long.word 0x0 1.--10. 1. "ADDR0,Address 0 Value"
rgroup.long 0x150++0x3
line.long 0x0 "SASR,Target Address Status"
bitfld.long 0x0 14. "ANV,Address Not Valid" "0: Valid,1: Not valid"
hexmask.long.word 0x0 0.--10. 1. "RADDR,Received Address"
group.long 0x154++0x3
line.long 0x0 "STAR,Target Transmit ACK"
bitfld.long 0x0 0. "TXNACK,Transmit NACK" "0: Transmit ACK,1: Transmit NACK"
wgroup.long 0x160++0x3
line.long 0x0 "STDR,Target Transmit Data"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
rgroup.long 0x170++0x3
line.long 0x0 "SRDR,Target Receive Data"
bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not first,1: First"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
newline
bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Received Data"
rgroup.long 0x178++0x3
line.long 0x0 "SRDROR,Target Receive Data Read Only"
bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not the first,1: First"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
newline
bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
tree.end
tree "LPI2C3"
base ad:0x400D5000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 8.--11. 1. "MRXFIFO,Controller Receive FIFO Size"
hexmask.long.byte 0x4 0.--3. 1. "MTXFIFO,Controller Transmit FIFO Size"
group.long 0x10++0x1F
line.long 0x0 "MCR,Controller Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Reset receive FIFO"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Reset transmit FIFO"
newline
bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Disable,1: Enable"
bitfld.long 0x0 2. "DOZEN,Doze Mode Enable" "0: Enable,1: Disable"
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: No effect,1: Reset"
bitfld.long 0x0 0. "MEN,Controller Enable" "0: Disable,1: Enable"
line.long 0x4 "MSR,Controller Status"
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
rbitfld.long 0x4 24. "MBF,Controller Busy Flag" "0: Idle,1: Busy"
newline
eventfld.long 0x4 15. "STF,Start Flag" "0: Start condition not detected,1: Start condition detected"
eventfld.long 0x4 14. "DMF,Data Match Flag" "0: Matching data not received,1: Matching data received"
newline
eventfld.long 0x4 13. "PLTF,Pin Low Timeout Flag" "0: Pin low timeout did not occur,1: Pin low timeout occurred"
eventfld.long 0x4 12. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error"
newline
eventfld.long 0x4 11. "ALF,Arbitration Lost Flag" "0: Controller did not lose arbitration,1: Controller lost arbitration"
eventfld.long 0x4 10. "NDF,NACK Detect Flag" "0: No unexpected NACK detected,1: Unexpected NACK detected"
newline
eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop condition generated,1: Stop condition generated"
eventfld.long 0x4 8. "EPF,End Packet Flag" "0: No Stop or repeated Start generated,1: Stop or repeated Start generated"
newline
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive data not ready,1: Receive data ready"
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data requested"
line.long 0x8 "MIER,Controller Interrupt Enable"
bitfld.long 0x8 15. "STIE,Start Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "DMIE,Data Match Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 13. "PLTIE,Pin Low Timeout Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "ALIE,Arbitration Lost Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "NDIE,NACK Detect Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "EPIE,End Packet Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "MDER,Controller DMA Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "MCFGR0,Controller Configuration 0"
bitfld.long 0x10 17. "ABORT,Abort Transfer" "0: Normal transfer,1: Abort existing transfer and do not start a new one"
bitfld.long 0x10 16. "RELAX,Relaxed Mode" "0: Normal transfer,1: Relaxed transfer"
newline
bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO,1: Received data is discarded unless MSR[DMF] is set"
bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 3. "HRDIR,Host Request Direction" "0: HREQ pin is input (for LPI2C controller),1: HREQ pin is output (for LPI2C target)"
bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin HREQ,1: Host request input is input trigger"
newline
bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low,1: Active high"
bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Disable,1: Enable"
line.long 0x14 "MCFGR1,Controller Configuration 1"
bitfld.long 0x14 24.--26. "PINCFG,Pin Configuration" "0: Two-pin open drain mode,1: Two-pin output only mode (Ultra-Fast mode),2: Two-pin push-pull mode,3: Four-pin push-pull mode,4: Two-pin open-drain mode with separate LPI2C target,5: Two-pin output only mode (Ultra-Fast mode) with..,6: Two-pin push-pull mode with separate LPI2C target,7: Four-pin push-pull mode (inverted outputs)"
bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: Match is enabled: first data word equals..,3: Match is enabled: any data word equals..,4: Match is enabled: (first data word equals..,5: Match is enabled: (any data word equals..,6: Match is enabled: (first data word AND..,7: Match is enabled: (any data word AND.."
newline
bitfld.long 0x14 12. "STARTCFG,Start Configuration" "0: Sets when both I2C bus and LPI2C controller are..,1: Sets when I2C bus is idle"
bitfld.long 0x14 11. "STOPCFG,Stop Configuration" "0: Any Stop condition,1: Last Stop condition"
newline
bitfld.long 0x14 10. "TIMECFG,Timeout Configuration" "0: SCL,1: SCL or SDA"
bitfld.long 0x14 9. "IGNACK,Ignore NACK" "0: No effect,1: Treat a received NACK as an ACK"
newline
bitfld.long 0x14 8. "AUTOSTOP,Automatic Stop Generation" "0: No effect,1: Stop automatically generated"
bitfld.long 0x14 0.--2. "PRESCALE,Prescaler" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
line.long 0x18 "MCFGR2,Controller Configuration 2"
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
newline
hexmask.long.word 0x18 0.--11. 1. "BUSIDLE,Bus Idle Timeout"
line.long 0x1C "MCFGR3,Controller Configuration 3"
hexmask.long.word 0x1C 8.--19. 1. "PINLOW,Pin Low Timeout"
group.long 0x40++0x3
line.long 0x0 "MDMR,Controller Data Match"
hexmask.long.byte 0x0 16.--23. 1. "MATCH1,Match 1 Value"
hexmask.long.byte 0x0 0.--7. 1. "MATCH0,Match 0 Value"
group.long 0x48++0x3
line.long 0x0 "MCCR0,Controller Clock Configuration 0"
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
group.long 0x50++0x3
line.long 0x0 "MCCR1,Controller Clock Configuration 1"
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
group.long 0x58++0x3
line.long 0x0 "MFCR,Controller FIFO Control"
bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3"
bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3"
rgroup.long 0x5C++0x3
line.long 0x0 "MFSR,Controller FIFO Status"
bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7"
wgroup.long 0x60++0x3
line.long 0x0 "MTDR,Controller Transmit Data"
bitfld.long 0x0 8.--10. "CMD,Command Data" "0: Transmit the value in DATA[7:0],1: Receive (DATA[7:0] + 1) bytes,2: Generate Stop condition on I2C bus,3: Receive and discard (DATA[7:0] + 1) bytes,4: Generate (repeated) Start on the I2C bus and..,5: Generate (repeated) Start on the I2C bus and..,6: Generate (repeated) Start on the I2C bus and..,7: Generate (repeated) Start on the I2C bus and.."
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
rgroup.long 0x70++0x3
line.long 0x0 "MRDR,Controller Receive Data"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
rgroup.long 0x78++0x3
line.long 0x0 "MRDROR,Controller Receive Data Read Only"
bitfld.long 0x0 14. "RXEMPTY,RX Empty" "0: Not empty,1: Empty"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
group.long 0x110++0x1B
line.long 0x0 "SCR,Target Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: SRDR is now empty"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: STDR is now empty"
newline
bitfld.long 0x0 5. "FILTDZ,Filter Doze Enable" "0: Enable,1: Disable"
bitfld.long 0x0 4. "FILTEN,Filter Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
bitfld.long 0x0 0. "SEN,Target Enable" "0: Disable,1: Enable"
line.long 0x4 "SSR,Target Status"
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
rbitfld.long 0x4 24. "SBF,Target Busy Flag" "0: Idle,1: Busy"
newline
rbitfld.long 0x4 15. "SARF,SMBus Alert Response Flag" "0: Disabled or not detected,1: Enabled and detected"
rbitfld.long 0x4 14. "GCF,General Call Flag" "0: General call address disabled or not detected,1: General call address detected"
newline
rbitfld.long 0x4 13. "AM1F,Address Match 1 Flag" "0: Matching address not received,1: Matching address received"
rbitfld.long 0x4 12. "AM0F,Address Match 0 Flag" "0: ADDR0 matching address not received,1: ADDR0 matching address received"
newline
eventfld.long 0x4 11. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error"
eventfld.long 0x4 10. "BEF,Bit Error Flag" "0: No bit error occurred,1: Bit error occurred"
newline
eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop detected,1: Stop detected"
eventfld.long 0x4 8. "RSF,Repeated Start Flag" "0: No repeated Start detected,1: Repeated Start detected"
newline
rbitfld.long 0x4 3. "TAF,Transmit ACK Flag" "0: Not required,1: Required"
rbitfld.long 0x4 2. "AVF,Address Valid Flag" "0: Not valid,1: Valid"
newline
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Not ready,1: Ready"
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data is requested"
line.long 0x8 "SIER,Target Interrupt Enable"
bitfld.long 0x8 15. "SARIE,SMBus Alert Response Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "GCIE,General Call Interrupt Enable" "0: Disabled,1: Enabled"
newline
bitfld.long 0x8 13. "AM1IE,Address Match 1 Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "AM0IE,Address Match 0 Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "BEIE,Bit Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "RSIE,Repeated Start Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 3. "TAIE,Transmit ACK Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 2. "AVIE,Address Valid Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "SDER,Target DMA Enable"
bitfld.long 0xC 9. "SDDE,Stop Detect DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 8. "RSDE,Repeated Start DMA Enable" "0: Disable,1: Enable"
newline
bitfld.long 0xC 2. "AVDE,Address Valid DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable DMA request,1: Enable DMA request"
newline
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "SCFGR0,Target Configuration 0"
rbitfld.long 0x10 1. "RDACK,Read Acknowledge Flag" "0: Read Request not acknowledged,1: Read Request acknowledged"
bitfld.long 0x10 0. "RDREQ,Read Request" "0: Disable,1: Enable"
line.long 0x14 "SCFGR1,Target Configuration 1"
bitfld.long 0x14 26. "SDCFG,Stop Detect Configuration" "0: Any Stop condition following an address match,1: Any Stop condition"
bitfld.long 0x14 25. "RSCFG,Repeated Start Configuration" "0: Any repeated Start condition following an..,1: Any repeated Start condition"
newline
bitfld.long 0x14 24. "RXALL,Receive All" "0: Disable,1: Enable"
bitfld.long 0x14 16.--18. "ADDRCFG,Address Configuration" "0: Address match 0 (7-bit),1: Address match 0 (10-bit),2: Address match 0 (7-bit) or address match 1 (7-bit),3: Address match 0 (10-bit) or address match 1..,4: Address match 0 (7-bit) or address match 1..,5: Address match 0 (10-bit) or address match 1..,6: From address match 0 (7-bit) to address match 1..,7: From address match 0 (10-bit) to address match 1.."
newline
bitfld.long 0x14 13. "HSMEN,HS Mode Enable" "0: Disable,1: Enable"
bitfld.long 0x14 12. "IGNACK,Ignore NACK" "0: End transfer on NACK,1: Do not end transfer on NACK"
newline
bitfld.long 0x14 11. "RXCFG,Receive Data Configuration" "0: Return received data clear MSR[RDF],1: Return SASR and clear SSR[AVF] when SSR[AVF] is.."
bitfld.long 0x14 10. "TXCFG,Transmit Flag Configuration" "0: MSR[TDF] is set only during a target-transmit..,1: MSR[TDF] is set whenever STDR is empty"
newline
bitfld.long 0x14 9. "SAEN,SMBus Alert Enable" "0: Disable,1: Enable"
bitfld.long 0x14 8. "GCEN,General Call Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x14 4. "RXNACK,Receive NACK" "0: ACK or NACK always determined by STAR[TXNACK],1: NACK always generated on address overrun or.."
bitfld.long 0x14 3. "ACKSTALL,ACK SCL Stall" "0: Disable,1: Enable"
newline
bitfld.long 0x14 2. "TXDSTALL,Transmit Data SCL Stall" "0: Disable,1: Enable"
bitfld.long 0x14 1. "RXSTALL,RX SCL Stall" "0: Disable,1: Enable"
newline
bitfld.long 0x14 0. "ADRSTALL,Address SCL Stall" "0: Disable,1: Enable"
line.long 0x18 "SCFGR2,Target Configuration 2"
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
newline
hexmask.long.byte 0x18 8.--13. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x18 0.--3. 1. "CLKHOLD,Clock Hold Time"
group.long 0x140++0x3
line.long 0x0 "SAMR,Target Address Match"
hexmask.long.word 0x0 17.--26. 1. "ADDR1,Address 1 Value"
hexmask.long.word 0x0 1.--10. 1. "ADDR0,Address 0 Value"
rgroup.long 0x150++0x3
line.long 0x0 "SASR,Target Address Status"
bitfld.long 0x0 14. "ANV,Address Not Valid" "0: Valid,1: Not valid"
hexmask.long.word 0x0 0.--10. 1. "RADDR,Received Address"
group.long 0x154++0x3
line.long 0x0 "STAR,Target Transmit ACK"
bitfld.long 0x0 0. "TXNACK,Transmit NACK" "0: Transmit ACK,1: Transmit NACK"
wgroup.long 0x160++0x3
line.long 0x0 "STDR,Target Transmit Data"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
rgroup.long 0x170++0x3
line.long 0x0 "SRDR,Target Receive Data"
bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not first,1: First"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
newline
bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Received Data"
rgroup.long 0x178++0x3
line.long 0x0 "SRDROR,Target Receive Data Read Only"
bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not the first,1: First"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
newline
bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
tree.end
endif
sif (cpuis("MC?A156*"))
tree "LPI2C1"
base ad:0x4009B000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 8.--11. 1. "MRXFIFO,Controller Receive FIFO Size"
hexmask.long.byte 0x4 0.--3. 1. "MTXFIFO,Controller Transmit FIFO Size"
group.long 0x10++0x1F
line.long 0x0 "MCR,Controller Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Reset receive FIFO"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Reset transmit FIFO"
newline
bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Disable,1: Enable"
bitfld.long 0x0 2. "DOZEN,Doze Mode Enable" "0: Enable,1: Disable"
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: No effect,1: Reset"
bitfld.long 0x0 0. "MEN,Controller Enable" "0: Disable,1: Enable"
line.long 0x4 "MSR,Controller Status"
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
rbitfld.long 0x4 24. "MBF,Controller Busy Flag" "0: Idle,1: Busy"
newline
eventfld.long 0x4 15. "STF,Start Flag" "0: Start condition not detected,1: Start condition detected"
eventfld.long 0x4 14. "DMF,Data Match Flag" "0: Matching data not received,1: Matching data received"
newline
eventfld.long 0x4 13. "PLTF,Pin Low Timeout Flag" "0: Pin low timeout did not occur,1: Pin low timeout occurred"
eventfld.long 0x4 12. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error"
newline
eventfld.long 0x4 11. "ALF,Arbitration Lost Flag" "0: Controller did not lose arbitration,1: Controller lost arbitration"
eventfld.long 0x4 10. "NDF,NACK Detect Flag" "0: No unexpected NACK detected,1: Unexpected NACK detected"
newline
eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop condition generated,1: Stop condition generated"
eventfld.long 0x4 8. "EPF,End Packet Flag" "0: No Stop or repeated Start generated,1: Stop or repeated Start generated"
newline
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive data not ready,1: Receive data ready"
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data requested"
line.long 0x8 "MIER,Controller Interrupt Enable"
bitfld.long 0x8 15. "STIE,Start Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "DMIE,Data Match Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 13. "PLTIE,Pin Low Timeout Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "ALIE,Arbitration Lost Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "NDIE,NACK Detect Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "EPIE,End Packet Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "MDER,Controller DMA Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "MCFGR0,Controller Configuration 0"
bitfld.long 0x10 17. "ABORT,Abort Transfer" "0: Normal transfer,1: Abort existing transfer and do not start a new one"
bitfld.long 0x10 16. "RELAX,Relaxed Mode" "0: Normal transfer,1: Relaxed transfer"
newline
bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO,1: Received data is discarded unless MSR[DMF] is set"
bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 3. "HRDIR,Host Request Direction" "0: HREQ pin is input (for LPI2C controller),1: HREQ pin is output (for LPI2C target)"
bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin HREQ,1: Host request input is input trigger"
newline
bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low,1: Active high"
bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Disable,1: Enable"
line.long 0x14 "MCFGR1,Controller Configuration 1"
bitfld.long 0x14 24.--26. "PINCFG,Pin Configuration" "0: Two-pin open drain mode,1: Two-pin output only mode (Ultra-Fast mode),2: Two-pin push-pull mode,3: Four-pin push-pull mode,4: Two-pin open-drain mode with separate LPI2C target,5: Two-pin output only mode (Ultra-Fast mode) with..,6: Two-pin push-pull mode with separate LPI2C target,7: Four-pin push-pull mode (inverted outputs)"
bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: Match is enabled: first data word equals..,3: Match is enabled: any data word equals..,4: Match is enabled: (first data word equals..,5: Match is enabled: (any data word equals..,6: Match is enabled: (first data word AND..,7: Match is enabled: (any data word AND.."
newline
bitfld.long 0x14 12. "STARTCFG,Start Configuration" "0: Sets when both I2C bus and LPI2C controller are..,1: Sets when I2C bus is idle"
bitfld.long 0x14 11. "STOPCFG,Stop Configuration" "0: Any Stop condition,1: Last Stop condition"
newline
bitfld.long 0x14 10. "TIMECFG,Timeout Configuration" "0: SCL,1: SCL or SDA"
bitfld.long 0x14 9. "IGNACK,Ignore NACK" "0: No effect,1: Treat a received NACK as an ACK"
newline
bitfld.long 0x14 8. "AUTOSTOP,Automatic Stop Generation" "0: No effect,1: Stop automatically generated"
bitfld.long 0x14 0.--2. "PRESCALE,Prescaler" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
line.long 0x18 "MCFGR2,Controller Configuration 2"
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
newline
hexmask.long.word 0x18 0.--11. 1. "BUSIDLE,Bus Idle Timeout"
line.long 0x1C "MCFGR3,Controller Configuration 3"
hexmask.long.word 0x1C 8.--19. 1. "PINLOW,Pin Low Timeout"
group.long 0x40++0x3
line.long 0x0 "MDMR,Controller Data Match"
hexmask.long.byte 0x0 16.--23. 1. "MATCH1,Match 1 Value"
hexmask.long.byte 0x0 0.--7. 1. "MATCH0,Match 0 Value"
group.long 0x48++0x3
line.long 0x0 "MCCR0,Controller Clock Configuration 0"
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
group.long 0x50++0x3
line.long 0x0 "MCCR1,Controller Clock Configuration 1"
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
group.long 0x58++0x3
line.long 0x0 "MFCR,Controller FIFO Control"
bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3"
bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3"
rgroup.long 0x5C++0x3
line.long 0x0 "MFSR,Controller FIFO Status"
bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7"
wgroup.long 0x60++0x3
line.long 0x0 "MTDR,Controller Transmit Data"
bitfld.long 0x0 8.--10. "CMD,Command Data" "0: Transmit the value in DATA[7:0],1: Receive (DATA[7:0] + 1) bytes,2: Generate Stop condition on I2C bus,3: Receive and discard (DATA[7:0] + 1) bytes,4: Generate (repeated) Start on the I2C bus and..,5: Generate (repeated) Start on the I2C bus and..,6: Generate (repeated) Start on the I2C bus and..,7: Generate (repeated) Start on the I2C bus and.."
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
rgroup.long 0x70++0x3
line.long 0x0 "MRDR,Controller Receive Data"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
rgroup.long 0x78++0x3
line.long 0x0 "MRDROR,Controller Receive Data Read Only"
bitfld.long 0x0 14. "RXEMPTY,RX Empty" "0: Not empty,1: Empty"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
group.long 0x110++0x1B
line.long 0x0 "SCR,Target Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: SRDR is now empty"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: STDR is now empty"
newline
bitfld.long 0x0 5. "FILTDZ,Filter Doze Enable" "0: Enable,1: Disable"
bitfld.long 0x0 4. "FILTEN,Filter Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
bitfld.long 0x0 0. "SEN,Target Enable" "0: Disable,1: Enable"
line.long 0x4 "SSR,Target Status"
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
rbitfld.long 0x4 24. "SBF,Target Busy Flag" "0: Idle,1: Busy"
newline
rbitfld.long 0x4 15. "SARF,SMBus Alert Response Flag" "0: Disabled or not detected,1: Enabled and detected"
rbitfld.long 0x4 14. "GCF,General Call Flag" "0: General call address disabled or not detected,1: General call address detected"
newline
rbitfld.long 0x4 13. "AM1F,Address Match 1 Flag" "0: Matching address not received,1: Matching address received"
rbitfld.long 0x4 12. "AM0F,Address Match 0 Flag" "0: ADDR0 matching address not received,1: ADDR0 matching address received"
newline
eventfld.long 0x4 11. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error"
eventfld.long 0x4 10. "BEF,Bit Error Flag" "0: No bit error occurred,1: Bit error occurred"
newline
eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop detected,1: Stop detected"
eventfld.long 0x4 8. "RSF,Repeated Start Flag" "0: No repeated Start detected,1: Repeated Start detected"
newline
rbitfld.long 0x4 3. "TAF,Transmit ACK Flag" "0: Not required,1: Required"
rbitfld.long 0x4 2. "AVF,Address Valid Flag" "0: Not valid,1: Valid"
newline
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Not ready,1: Ready"
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data is requested"
line.long 0x8 "SIER,Target Interrupt Enable"
bitfld.long 0x8 15. "SARIE,SMBus Alert Response Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "GCIE,General Call Interrupt Enable" "0: Disabled,1: Enabled"
newline
bitfld.long 0x8 13. "AM1IE,Address Match 1 Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "AM0IE,Address Match 0 Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "BEIE,Bit Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "RSIE,Repeated Start Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 3. "TAIE,Transmit ACK Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 2. "AVIE,Address Valid Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "SDER,Target DMA Enable"
bitfld.long 0xC 9. "SDDE,Stop Detect DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 8. "RSDE,Repeated Start DMA Enable" "0: Disable,1: Enable"
newline
bitfld.long 0xC 2. "AVDE,Address Valid DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable DMA request,1: Enable DMA request"
newline
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "SCFGR0,Target Configuration 0"
rbitfld.long 0x10 1. "RDACK,Read Acknowledge Flag" "0: Read Request not acknowledged,1: Read Request acknowledged"
bitfld.long 0x10 0. "RDREQ,Read Request" "0: Disable,1: Enable"
line.long 0x14 "SCFGR1,Target Configuration 1"
bitfld.long 0x14 26. "SDCFG,Stop Detect Configuration" "0: Any Stop condition following an address match,1: Any Stop condition"
bitfld.long 0x14 25. "RSCFG,Repeated Start Configuration" "0: Any repeated Start condition following an..,1: Any repeated Start condition"
newline
bitfld.long 0x14 24. "RXALL,Receive All" "0: Disable,1: Enable"
bitfld.long 0x14 16.--18. "ADDRCFG,Address Configuration" "0: Address match 0 (7-bit),1: Address match 0 (10-bit),2: Address match 0 (7-bit) or address match 1 (7-bit),3: Address match 0 (10-bit) or address match 1..,4: Address match 0 (7-bit) or address match 1..,5: Address match 0 (10-bit) or address match 1..,6: From address match 0 (7-bit) to address match 1..,7: From address match 0 (10-bit) to address match 1.."
newline
bitfld.long 0x14 13. "HSMEN,HS Mode Enable" "0: Disable,1: Enable"
bitfld.long 0x14 12. "IGNACK,Ignore NACK" "0: End transfer on NACK,1: Do not end transfer on NACK"
newline
bitfld.long 0x14 11. "RXCFG,Receive Data Configuration" "0: Return received data clear MSR[RDF],1: Return SASR and clear SSR[AVF] when SSR[AVF] is.."
bitfld.long 0x14 10. "TXCFG,Transmit Flag Configuration" "0: MSR[TDF] is set only during a target-transmit..,1: MSR[TDF] is set whenever STDR is empty"
newline
bitfld.long 0x14 9. "SAEN,SMBus Alert Enable" "0: Disable,1: Enable"
bitfld.long 0x14 8. "GCEN,General Call Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x14 4. "RXNACK,Receive NACK" "0: ACK or NACK always determined by STAR[TXNACK],1: NACK always generated on address overrun or.."
bitfld.long 0x14 3. "ACKSTALL,ACK SCL Stall" "0: Disable,1: Enable"
newline
bitfld.long 0x14 2. "TXDSTALL,Transmit Data SCL Stall" "0: Disable,1: Enable"
bitfld.long 0x14 1. "RXSTALL,RX SCL Stall" "0: Disable,1: Enable"
newline
bitfld.long 0x14 0. "ADRSTALL,Address SCL Stall" "0: Disable,1: Enable"
line.long 0x18 "SCFGR2,Target Configuration 2"
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
newline
hexmask.long.byte 0x18 8.--13. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x18 0.--3. 1. "CLKHOLD,Clock Hold Time"
group.long 0x140++0x3
line.long 0x0 "SAMR,Target Address Match"
hexmask.long.word 0x0 17.--26. 1. "ADDR1,Address 1 Value"
hexmask.long.word 0x0 1.--10. 1. "ADDR0,Address 0 Value"
rgroup.long 0x150++0x3
line.long 0x0 "SASR,Target Address Status"
bitfld.long 0x0 14. "ANV,Address Not Valid" "0: Valid,1: Not valid"
hexmask.long.word 0x0 0.--10. 1. "RADDR,Received Address"
group.long 0x154++0x3
line.long 0x0 "STAR,Target Transmit ACK"
bitfld.long 0x0 0. "TXNACK,Transmit NACK" "0: Transmit ACK,1: Transmit NACK"
wgroup.long 0x160++0x3
line.long 0x0 "STDR,Target Transmit Data"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
rgroup.long 0x170++0x3
line.long 0x0 "SRDR,Target Receive Data"
bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not first,1: First"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
newline
bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Received Data"
rgroup.long 0x178++0x3
line.long 0x0 "SRDROR,Target Receive Data Read Only"
bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not the first,1: First"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
newline
bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
tree.end
tree "LPI2C2"
base ad:0x400D4000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 8.--11. 1. "MRXFIFO,Controller Receive FIFO Size"
hexmask.long.byte 0x4 0.--3. 1. "MTXFIFO,Controller Transmit FIFO Size"
group.long 0x10++0x1F
line.long 0x0 "MCR,Controller Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Reset receive FIFO"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Reset transmit FIFO"
newline
bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Disable,1: Enable"
bitfld.long 0x0 2. "DOZEN,Doze Mode Enable" "0: Enable,1: Disable"
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: No effect,1: Reset"
bitfld.long 0x0 0. "MEN,Controller Enable" "0: Disable,1: Enable"
line.long 0x4 "MSR,Controller Status"
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
rbitfld.long 0x4 24. "MBF,Controller Busy Flag" "0: Idle,1: Busy"
newline
eventfld.long 0x4 15. "STF,Start Flag" "0: Start condition not detected,1: Start condition detected"
eventfld.long 0x4 14. "DMF,Data Match Flag" "0: Matching data not received,1: Matching data received"
newline
eventfld.long 0x4 13. "PLTF,Pin Low Timeout Flag" "0: Pin low timeout did not occur,1: Pin low timeout occurred"
eventfld.long 0x4 12. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error"
newline
eventfld.long 0x4 11. "ALF,Arbitration Lost Flag" "0: Controller did not lose arbitration,1: Controller lost arbitration"
eventfld.long 0x4 10. "NDF,NACK Detect Flag" "0: No unexpected NACK detected,1: Unexpected NACK detected"
newline
eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop condition generated,1: Stop condition generated"
eventfld.long 0x4 8. "EPF,End Packet Flag" "0: No Stop or repeated Start generated,1: Stop or repeated Start generated"
newline
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive data not ready,1: Receive data ready"
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data requested"
line.long 0x8 "MIER,Controller Interrupt Enable"
bitfld.long 0x8 15. "STIE,Start Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "DMIE,Data Match Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 13. "PLTIE,Pin Low Timeout Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "ALIE,Arbitration Lost Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "NDIE,NACK Detect Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "EPIE,End Packet Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "MDER,Controller DMA Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "MCFGR0,Controller Configuration 0"
bitfld.long 0x10 17. "ABORT,Abort Transfer" "0: Normal transfer,1: Abort existing transfer and do not start a new one"
bitfld.long 0x10 16. "RELAX,Relaxed Mode" "0: Normal transfer,1: Relaxed transfer"
newline
bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO,1: Received data is discarded unless MSR[DMF] is set"
bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 3. "HRDIR,Host Request Direction" "0: HREQ pin is input (for LPI2C controller),1: HREQ pin is output (for LPI2C target)"
bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin HREQ,1: Host request input is input trigger"
newline
bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low,1: Active high"
bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Disable,1: Enable"
line.long 0x14 "MCFGR1,Controller Configuration 1"
bitfld.long 0x14 24.--26. "PINCFG,Pin Configuration" "0: Two-pin open drain mode,1: Two-pin output only mode (Ultra-Fast mode),2: Two-pin push-pull mode,3: Four-pin push-pull mode,4: Two-pin open-drain mode with separate LPI2C target,5: Two-pin output only mode (Ultra-Fast mode) with..,6: Two-pin push-pull mode with separate LPI2C target,7: Four-pin push-pull mode (inverted outputs)"
bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: Match is enabled: first data word equals..,3: Match is enabled: any data word equals..,4: Match is enabled: (first data word equals..,5: Match is enabled: (any data word equals..,6: Match is enabled: (first data word AND..,7: Match is enabled: (any data word AND.."
newline
bitfld.long 0x14 12. "STARTCFG,Start Configuration" "0: Sets when both I2C bus and LPI2C controller are..,1: Sets when I2C bus is idle"
bitfld.long 0x14 11. "STOPCFG,Stop Configuration" "0: Any Stop condition,1: Last Stop condition"
newline
bitfld.long 0x14 10. "TIMECFG,Timeout Configuration" "0: SCL,1: SCL or SDA"
bitfld.long 0x14 9. "IGNACK,Ignore NACK" "0: No effect,1: Treat a received NACK as an ACK"
newline
bitfld.long 0x14 8. "AUTOSTOP,Automatic Stop Generation" "0: No effect,1: Stop automatically generated"
bitfld.long 0x14 0.--2. "PRESCALE,Prescaler" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
line.long 0x18 "MCFGR2,Controller Configuration 2"
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
newline
hexmask.long.word 0x18 0.--11. 1. "BUSIDLE,Bus Idle Timeout"
line.long 0x1C "MCFGR3,Controller Configuration 3"
hexmask.long.word 0x1C 8.--19. 1. "PINLOW,Pin Low Timeout"
group.long 0x40++0x3
line.long 0x0 "MDMR,Controller Data Match"
hexmask.long.byte 0x0 16.--23. 1. "MATCH1,Match 1 Value"
hexmask.long.byte 0x0 0.--7. 1. "MATCH0,Match 0 Value"
group.long 0x48++0x3
line.long 0x0 "MCCR0,Controller Clock Configuration 0"
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
group.long 0x50++0x3
line.long 0x0 "MCCR1,Controller Clock Configuration 1"
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
group.long 0x58++0x3
line.long 0x0 "MFCR,Controller FIFO Control"
bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3"
bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3"
rgroup.long 0x5C++0x3
line.long 0x0 "MFSR,Controller FIFO Status"
bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7"
wgroup.long 0x60++0x3
line.long 0x0 "MTDR,Controller Transmit Data"
bitfld.long 0x0 8.--10. "CMD,Command Data" "0: Transmit the value in DATA[7:0],1: Receive (DATA[7:0] + 1) bytes,2: Generate Stop condition on I2C bus,3: Receive and discard (DATA[7:0] + 1) bytes,4: Generate (repeated) Start on the I2C bus and..,5: Generate (repeated) Start on the I2C bus and..,6: Generate (repeated) Start on the I2C bus and..,7: Generate (repeated) Start on the I2C bus and.."
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
rgroup.long 0x70++0x3
line.long 0x0 "MRDR,Controller Receive Data"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
rgroup.long 0x78++0x3
line.long 0x0 "MRDROR,Controller Receive Data Read Only"
bitfld.long 0x0 14. "RXEMPTY,RX Empty" "0: Not empty,1: Empty"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
group.long 0x110++0x1B
line.long 0x0 "SCR,Target Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: SRDR is now empty"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: STDR is now empty"
newline
bitfld.long 0x0 5. "FILTDZ,Filter Doze Enable" "0: Enable,1: Disable"
bitfld.long 0x0 4. "FILTEN,Filter Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
bitfld.long 0x0 0. "SEN,Target Enable" "0: Disable,1: Enable"
line.long 0x4 "SSR,Target Status"
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
rbitfld.long 0x4 24. "SBF,Target Busy Flag" "0: Idle,1: Busy"
newline
rbitfld.long 0x4 15. "SARF,SMBus Alert Response Flag" "0: Disabled or not detected,1: Enabled and detected"
rbitfld.long 0x4 14. "GCF,General Call Flag" "0: General call address disabled or not detected,1: General call address detected"
newline
rbitfld.long 0x4 13. "AM1F,Address Match 1 Flag" "0: Matching address not received,1: Matching address received"
rbitfld.long 0x4 12. "AM0F,Address Match 0 Flag" "0: ADDR0 matching address not received,1: ADDR0 matching address received"
newline
eventfld.long 0x4 11. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error"
eventfld.long 0x4 10. "BEF,Bit Error Flag" "0: No bit error occurred,1: Bit error occurred"
newline
eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop detected,1: Stop detected"
eventfld.long 0x4 8. "RSF,Repeated Start Flag" "0: No repeated Start detected,1: Repeated Start detected"
newline
rbitfld.long 0x4 3. "TAF,Transmit ACK Flag" "0: Not required,1: Required"
rbitfld.long 0x4 2. "AVF,Address Valid Flag" "0: Not valid,1: Valid"
newline
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Not ready,1: Ready"
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data is requested"
line.long 0x8 "SIER,Target Interrupt Enable"
bitfld.long 0x8 15. "SARIE,SMBus Alert Response Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "GCIE,General Call Interrupt Enable" "0: Disabled,1: Enabled"
newline
bitfld.long 0x8 13. "AM1IE,Address Match 1 Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "AM0IE,Address Match 0 Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "BEIE,Bit Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "RSIE,Repeated Start Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 3. "TAIE,Transmit ACK Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 2. "AVIE,Address Valid Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "SDER,Target DMA Enable"
bitfld.long 0xC 9. "SDDE,Stop Detect DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 8. "RSDE,Repeated Start DMA Enable" "0: Disable,1: Enable"
newline
bitfld.long 0xC 2. "AVDE,Address Valid DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable DMA request,1: Enable DMA request"
newline
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "SCFGR0,Target Configuration 0"
rbitfld.long 0x10 1. "RDACK,Read Acknowledge Flag" "0: Read Request not acknowledged,1: Read Request acknowledged"
bitfld.long 0x10 0. "RDREQ,Read Request" "0: Disable,1: Enable"
line.long 0x14 "SCFGR1,Target Configuration 1"
bitfld.long 0x14 26. "SDCFG,Stop Detect Configuration" "0: Any Stop condition following an address match,1: Any Stop condition"
bitfld.long 0x14 25. "RSCFG,Repeated Start Configuration" "0: Any repeated Start condition following an..,1: Any repeated Start condition"
newline
bitfld.long 0x14 24. "RXALL,Receive All" "0: Disable,1: Enable"
bitfld.long 0x14 16.--18. "ADDRCFG,Address Configuration" "0: Address match 0 (7-bit),1: Address match 0 (10-bit),2: Address match 0 (7-bit) or address match 1 (7-bit),3: Address match 0 (10-bit) or address match 1..,4: Address match 0 (7-bit) or address match 1..,5: Address match 0 (10-bit) or address match 1..,6: From address match 0 (7-bit) to address match 1..,7: From address match 0 (10-bit) to address match 1.."
newline
bitfld.long 0x14 13. "HSMEN,HS Mode Enable" "0: Disable,1: Enable"
bitfld.long 0x14 12. "IGNACK,Ignore NACK" "0: End transfer on NACK,1: Do not end transfer on NACK"
newline
bitfld.long 0x14 11. "RXCFG,Receive Data Configuration" "0: Return received data clear MSR[RDF],1: Return SASR and clear SSR[AVF] when SSR[AVF] is.."
bitfld.long 0x14 10. "TXCFG,Transmit Flag Configuration" "0: MSR[TDF] is set only during a target-transmit..,1: MSR[TDF] is set whenever STDR is empty"
newline
bitfld.long 0x14 9. "SAEN,SMBus Alert Enable" "0: Disable,1: Enable"
bitfld.long 0x14 8. "GCEN,General Call Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x14 4. "RXNACK,Receive NACK" "0: ACK or NACK always determined by STAR[TXNACK],1: NACK always generated on address overrun or.."
bitfld.long 0x14 3. "ACKSTALL,ACK SCL Stall" "0: Disable,1: Enable"
newline
bitfld.long 0x14 2. "TXDSTALL,Transmit Data SCL Stall" "0: Disable,1: Enable"
bitfld.long 0x14 1. "RXSTALL,RX SCL Stall" "0: Disable,1: Enable"
newline
bitfld.long 0x14 0. "ADRSTALL,Address SCL Stall" "0: Disable,1: Enable"
line.long 0x18 "SCFGR2,Target Configuration 2"
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
newline
hexmask.long.byte 0x18 8.--13. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x18 0.--3. 1. "CLKHOLD,Clock Hold Time"
group.long 0x140++0x3
line.long 0x0 "SAMR,Target Address Match"
hexmask.long.word 0x0 17.--26. 1. "ADDR1,Address 1 Value"
hexmask.long.word 0x0 1.--10. 1. "ADDR0,Address 0 Value"
rgroup.long 0x150++0x3
line.long 0x0 "SASR,Target Address Status"
bitfld.long 0x0 14. "ANV,Address Not Valid" "0: Valid,1: Not valid"
hexmask.long.word 0x0 0.--10. 1. "RADDR,Received Address"
group.long 0x154++0x3
line.long 0x0 "STAR,Target Transmit ACK"
bitfld.long 0x0 0. "TXNACK,Transmit NACK" "0: Transmit ACK,1: Transmit NACK"
wgroup.long 0x160++0x3
line.long 0x0 "STDR,Target Transmit Data"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
rgroup.long 0x170++0x3
line.long 0x0 "SRDR,Target Receive Data"
bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not first,1: First"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
newline
bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Received Data"
rgroup.long 0x178++0x3
line.long 0x0 "SRDROR,Target Receive Data Read Only"
bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not the first,1: First"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
newline
bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
tree.end
tree "LPI2C3"
base ad:0x400D5000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 8.--11. 1. "MRXFIFO,Controller Receive FIFO Size"
hexmask.long.byte 0x4 0.--3. 1. "MTXFIFO,Controller Transmit FIFO Size"
group.long 0x10++0x1F
line.long 0x0 "MCR,Controller Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Reset receive FIFO"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Reset transmit FIFO"
newline
bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Disable,1: Enable"
bitfld.long 0x0 2. "DOZEN,Doze Mode Enable" "0: Enable,1: Disable"
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: No effect,1: Reset"
bitfld.long 0x0 0. "MEN,Controller Enable" "0: Disable,1: Enable"
line.long 0x4 "MSR,Controller Status"
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
rbitfld.long 0x4 24. "MBF,Controller Busy Flag" "0: Idle,1: Busy"
newline
eventfld.long 0x4 15. "STF,Start Flag" "0: Start condition not detected,1: Start condition detected"
eventfld.long 0x4 14. "DMF,Data Match Flag" "0: Matching data not received,1: Matching data received"
newline
eventfld.long 0x4 13. "PLTF,Pin Low Timeout Flag" "0: Pin low timeout did not occur,1: Pin low timeout occurred"
eventfld.long 0x4 12. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error"
newline
eventfld.long 0x4 11. "ALF,Arbitration Lost Flag" "0: Controller did not lose arbitration,1: Controller lost arbitration"
eventfld.long 0x4 10. "NDF,NACK Detect Flag" "0: No unexpected NACK detected,1: Unexpected NACK detected"
newline
eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop condition generated,1: Stop condition generated"
eventfld.long 0x4 8. "EPF,End Packet Flag" "0: No Stop or repeated Start generated,1: Stop or repeated Start generated"
newline
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive data not ready,1: Receive data ready"
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data requested"
line.long 0x8 "MIER,Controller Interrupt Enable"
bitfld.long 0x8 15. "STIE,Start Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "DMIE,Data Match Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 13. "PLTIE,Pin Low Timeout Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "ALIE,Arbitration Lost Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "NDIE,NACK Detect Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "EPIE,End Packet Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "MDER,Controller DMA Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "MCFGR0,Controller Configuration 0"
bitfld.long 0x10 17. "ABORT,Abort Transfer" "0: Normal transfer,1: Abort existing transfer and do not start a new one"
bitfld.long 0x10 16. "RELAX,Relaxed Mode" "0: Normal transfer,1: Relaxed transfer"
newline
bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO,1: Received data is discarded unless MSR[DMF] is set"
bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 3. "HRDIR,Host Request Direction" "0: HREQ pin is input (for LPI2C controller),1: HREQ pin is output (for LPI2C target)"
bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin HREQ,1: Host request input is input trigger"
newline
bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low,1: Active high"
bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Disable,1: Enable"
line.long 0x14 "MCFGR1,Controller Configuration 1"
bitfld.long 0x14 24.--26. "PINCFG,Pin Configuration" "0: Two-pin open drain mode,1: Two-pin output only mode (Ultra-Fast mode),2: Two-pin push-pull mode,3: Four-pin push-pull mode,4: Two-pin open-drain mode with separate LPI2C target,5: Two-pin output only mode (Ultra-Fast mode) with..,6: Two-pin push-pull mode with separate LPI2C target,7: Four-pin push-pull mode (inverted outputs)"
bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: Match is enabled: first data word equals..,3: Match is enabled: any data word equals..,4: Match is enabled: (first data word equals..,5: Match is enabled: (any data word equals..,6: Match is enabled: (first data word AND..,7: Match is enabled: (any data word AND.."
newline
bitfld.long 0x14 12. "STARTCFG,Start Configuration" "0: Sets when both I2C bus and LPI2C controller are..,1: Sets when I2C bus is idle"
bitfld.long 0x14 11. "STOPCFG,Stop Configuration" "0: Any Stop condition,1: Last Stop condition"
newline
bitfld.long 0x14 10. "TIMECFG,Timeout Configuration" "0: SCL,1: SCL or SDA"
bitfld.long 0x14 9. "IGNACK,Ignore NACK" "0: No effect,1: Treat a received NACK as an ACK"
newline
bitfld.long 0x14 8. "AUTOSTOP,Automatic Stop Generation" "0: No effect,1: Stop automatically generated"
bitfld.long 0x14 0.--2. "PRESCALE,Prescaler" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
line.long 0x18 "MCFGR2,Controller Configuration 2"
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
newline
hexmask.long.word 0x18 0.--11. 1. "BUSIDLE,Bus Idle Timeout"
line.long 0x1C "MCFGR3,Controller Configuration 3"
hexmask.long.word 0x1C 8.--19. 1. "PINLOW,Pin Low Timeout"
group.long 0x40++0x3
line.long 0x0 "MDMR,Controller Data Match"
hexmask.long.byte 0x0 16.--23. 1. "MATCH1,Match 1 Value"
hexmask.long.byte 0x0 0.--7. 1. "MATCH0,Match 0 Value"
group.long 0x48++0x3
line.long 0x0 "MCCR0,Controller Clock Configuration 0"
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
group.long 0x50++0x3
line.long 0x0 "MCCR1,Controller Clock Configuration 1"
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
group.long 0x58++0x3
line.long 0x0 "MFCR,Controller FIFO Control"
bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3"
bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3"
rgroup.long 0x5C++0x3
line.long 0x0 "MFSR,Controller FIFO Status"
bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7"
wgroup.long 0x60++0x3
line.long 0x0 "MTDR,Controller Transmit Data"
bitfld.long 0x0 8.--10. "CMD,Command Data" "0: Transmit the value in DATA[7:0],1: Receive (DATA[7:0] + 1) bytes,2: Generate Stop condition on I2C bus,3: Receive and discard (DATA[7:0] + 1) bytes,4: Generate (repeated) Start on the I2C bus and..,5: Generate (repeated) Start on the I2C bus and..,6: Generate (repeated) Start on the I2C bus and..,7: Generate (repeated) Start on the I2C bus and.."
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
rgroup.long 0x70++0x3
line.long 0x0 "MRDR,Controller Receive Data"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
rgroup.long 0x78++0x3
line.long 0x0 "MRDROR,Controller Receive Data Read Only"
bitfld.long 0x0 14. "RXEMPTY,RX Empty" "0: Not empty,1: Empty"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
group.long 0x110++0x1B
line.long 0x0 "SCR,Target Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: SRDR is now empty"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: STDR is now empty"
newline
bitfld.long 0x0 5. "FILTDZ,Filter Doze Enable" "0: Enable,1: Disable"
bitfld.long 0x0 4. "FILTEN,Filter Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
bitfld.long 0x0 0. "SEN,Target Enable" "0: Disable,1: Enable"
line.long 0x4 "SSR,Target Status"
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
rbitfld.long 0x4 24. "SBF,Target Busy Flag" "0: Idle,1: Busy"
newline
rbitfld.long 0x4 15. "SARF,SMBus Alert Response Flag" "0: Disabled or not detected,1: Enabled and detected"
rbitfld.long 0x4 14. "GCF,General Call Flag" "0: General call address disabled or not detected,1: General call address detected"
newline
rbitfld.long 0x4 13. "AM1F,Address Match 1 Flag" "0: Matching address not received,1: Matching address received"
rbitfld.long 0x4 12. "AM0F,Address Match 0 Flag" "0: ADDR0 matching address not received,1: ADDR0 matching address received"
newline
eventfld.long 0x4 11. "FEF,FIFO Error Flag" "0: No FIFO error,1: FIFO error"
eventfld.long 0x4 10. "BEF,Bit Error Flag" "0: No bit error occurred,1: Bit error occurred"
newline
eventfld.long 0x4 9. "SDF,Stop Detect Flag" "0: No Stop detected,1: Stop detected"
eventfld.long 0x4 8. "RSF,Repeated Start Flag" "0: No repeated Start detected,1: Repeated Start detected"
newline
rbitfld.long 0x4 3. "TAF,Transmit ACK Flag" "0: Not required,1: Required"
rbitfld.long 0x4 2. "AVF,Address Valid Flag" "0: Not valid,1: Valid"
newline
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Not ready,1: Ready"
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data is requested"
line.long 0x8 "SIER,Target Interrupt Enable"
bitfld.long 0x8 15. "SARIE,SMBus Alert Response Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "GCIE,General Call Interrupt Enable" "0: Disabled,1: Enabled"
newline
bitfld.long 0x8 13. "AM1IE,Address Match 1 Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "AM0IE,Address Match 0 Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "FEIE,FIFO Error Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "BEIE,Bit Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "SDIE,Stop Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "RSIE,Repeated Start Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 3. "TAIE,Transmit ACK Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 2. "AVIE,Address Valid Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "SDER,Target DMA Enable"
bitfld.long 0xC 9. "SDDE,Stop Detect DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 8. "RSDE,Repeated Start DMA Enable" "0: Disable,1: Enable"
newline
bitfld.long 0xC 2. "AVDE,Address Valid DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable DMA request,1: Enable DMA request"
newline
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "SCFGR0,Target Configuration 0"
rbitfld.long 0x10 1. "RDACK,Read Acknowledge Flag" "0: Read Request not acknowledged,1: Read Request acknowledged"
bitfld.long 0x10 0. "RDREQ,Read Request" "0: Disable,1: Enable"
line.long 0x14 "SCFGR1,Target Configuration 1"
bitfld.long 0x14 26. "SDCFG,Stop Detect Configuration" "0: Any Stop condition following an address match,1: Any Stop condition"
bitfld.long 0x14 25. "RSCFG,Repeated Start Configuration" "0: Any repeated Start condition following an..,1: Any repeated Start condition"
newline
bitfld.long 0x14 24. "RXALL,Receive All" "0: Disable,1: Enable"
bitfld.long 0x14 16.--18. "ADDRCFG,Address Configuration" "0: Address match 0 (7-bit),1: Address match 0 (10-bit),2: Address match 0 (7-bit) or address match 1 (7-bit),3: Address match 0 (10-bit) or address match 1..,4: Address match 0 (7-bit) or address match 1..,5: Address match 0 (10-bit) or address match 1..,6: From address match 0 (7-bit) to address match 1..,7: From address match 0 (10-bit) to address match 1.."
newline
bitfld.long 0x14 13. "HSMEN,HS Mode Enable" "0: Disable,1: Enable"
bitfld.long 0x14 12. "IGNACK,Ignore NACK" "0: End transfer on NACK,1: Do not end transfer on NACK"
newline
bitfld.long 0x14 11. "RXCFG,Receive Data Configuration" "0: Return received data clear MSR[RDF],1: Return SASR and clear SSR[AVF] when SSR[AVF] is.."
bitfld.long 0x14 10. "TXCFG,Transmit Flag Configuration" "0: MSR[TDF] is set only during a target-transmit..,1: MSR[TDF] is set whenever STDR is empty"
newline
bitfld.long 0x14 9. "SAEN,SMBus Alert Enable" "0: Disable,1: Enable"
bitfld.long 0x14 8. "GCEN,General Call Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x14 4. "RXNACK,Receive NACK" "0: ACK or NACK always determined by STAR[TXNACK],1: NACK always generated on address overrun or.."
bitfld.long 0x14 3. "ACKSTALL,ACK SCL Stall" "0: Disable,1: Enable"
newline
bitfld.long 0x14 2. "TXDSTALL,Transmit Data SCL Stall" "0: Disable,1: Enable"
bitfld.long 0x14 1. "RXSTALL,RX SCL Stall" "0: Disable,1: Enable"
newline
bitfld.long 0x14 0. "ADRSTALL,Address SCL Stall" "0: Disable,1: Enable"
line.long 0x18 "SCFGR2,Target Configuration 2"
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
newline
hexmask.long.byte 0x18 8.--13. 1. "DATAVD,Data Valid Delay"
hexmask.long.byte 0x18 0.--3. 1. "CLKHOLD,Clock Hold Time"
group.long 0x140++0x3
line.long 0x0 "SAMR,Target Address Match"
hexmask.long.word 0x0 17.--26. 1. "ADDR1,Address 1 Value"
hexmask.long.word 0x0 1.--10. 1. "ADDR0,Address 0 Value"
rgroup.long 0x150++0x3
line.long 0x0 "SASR,Target Address Status"
bitfld.long 0x0 14. "ANV,Address Not Valid" "0: Valid,1: Not valid"
hexmask.long.word 0x0 0.--10. 1. "RADDR,Received Address"
group.long 0x154++0x3
line.long 0x0 "STAR,Target Transmit ACK"
bitfld.long 0x0 0. "TXNACK,Transmit NACK" "0: Transmit ACK,1: Transmit NACK"
wgroup.long 0x160++0x3
line.long 0x0 "STDR,Target Transmit Data"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
rgroup.long 0x170++0x3
line.long 0x0 "SRDR,Target Receive Data"
bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not first,1: First"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
newline
bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Received Data"
rgroup.long 0x178++0x3
line.long 0x0 "SRDROR,Target Receive Data Read Only"
bitfld.long 0x0 15. "SOF,Start of Frame" "0: Not the first,1: First"
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Not empty,1: Empty"
newline
bitfld.long 0x0 8.--10. "RADDR,Received Address" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
tree.end
endif
tree.end
tree "LPSPI (Low-Power Serial Peripheral Interface)"
base ad:0x0
tree "LPSPI0"
base ad:0x4009C000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Module Identification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 16.--23. 1. "PCSNUM,PCS Number"
hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size"
newline
hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size"
group.long 0x10++0x17
line.long 0x0 "CR,Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Reset"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Reset"
newline
bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Disable,1: Enable"
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
newline
bitfld.long 0x0 0. "MEN,Module Enable" "0: Disable,1: Enable"
line.long 0x4 "SR,Status"
rbitfld.long 0x4 24. "MBF,Module Busy Flag" "0: LPSPI is idle,1: LPSPI is busy"
eventfld.long 0x4 13. "DMF,Data Match Flag" "0: No match,1: Match"
newline
eventfld.long 0x4 12. "REF,Receive Error Flag" "0: No overflow,1: Overflow"
eventfld.long 0x4 11. "TEF,Transmit Error Flag" "0: No underrun,1: Underrun"
newline
eventfld.long 0x4 10. "TCF,Transfer Complete Flag" "0: Not complete,1: Complete"
eventfld.long 0x4 9. "FCF,Frame Complete Flag" "0: Not complete,1: Complete"
newline
eventfld.long 0x4 8. "WCF,Word Complete Flag" "0: Not complete,1: Complete"
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive data not ready,1: Receive data ready"
newline
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data requested"
line.long 0x8 "IER,Interrupt Enable"
bitfld.long 0x8 13. "DMIE,Data Match Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "REIE,Receive Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "TEIE,Transmit Error Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "TCIE,Transfer Complete Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "FCIE,Frame Complete Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "WCIE,Word Complete Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "DER,DMA Enable"
bitfld.long 0xC 9. "FCDE,Frame Complete DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable,1: Enable"
newline
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "CFGR0,Configuration 0"
bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Disable,1: Enable"
bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 3. "HRDIR,Host Request Direction" "0: Input,1: Output"
bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: HREQ pin,1: Input trigger"
newline
bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active high,1: Active low"
bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Disable,1: Enable"
line.long 0x14 "CFGR1,Configuration 1"
bitfld.long 0x14 27. "PCSCFG,Peripheral Chip Select Configuration" "0: PCS[3:2] configured for chip select function,1: PCS[3:2] configured for half-duplex 4-bit.."
bitfld.long 0x14 26. "OUTCFG,Output Configuration" "0: Retain last value,1: 3-stated"
newline
bitfld.long 0x14 24.--25. "PINCFG,Pin Configuration" "0: SIN is used for input data; SOUT is used for..,1: SIN is used for both input and output data; only..,2: SOUT is used for both input and output data;..,3: SOUT is used for input data; SIN is used for.."
bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: Match first data word with compare word,3: Match any data word with compare word,4: Sequential match first data word,5: Sequential match any data word,6: Match first data word (masked) with compare word..,7: Match any data word (masked) with compare word.."
newline
hexmask.long.byte 0x14 8.--11. 1. "PCSPOL,Peripheral Chip Select Polarity"
bitfld.long 0x14 4. "PARTIAL,Partial Enable" "0: Discard,1: Store"
newline
bitfld.long 0x14 3. "NOSTALL,No Stall" "0: Disable,1: Enable"
bitfld.long 0x14 2. "AUTOPCS,Automatic PCS" "0: Disable,1: Enable"
newline
bitfld.long 0x14 1. "SAMPLE,Sample Point" "0: SCK edge,1: Delayed SCK edge"
bitfld.long 0x14 0. "MASTER,Master Mode" "0: Slave mode,1: Master mode"
group.long 0x30++0x7
line.long 0x0 "DMR0,Data Match 0"
hexmask.long 0x0 0.--31. 1. "MATCH0,Match 0 Value"
line.long 0x4 "DMR1,Data Match 1"
hexmask.long 0x4 0.--31. 1. "MATCH1,Match 1 Value"
group.long 0x40++0x7
line.long 0x0 "CCR,Clock Configuration"
hexmask.long.byte 0x0 24.--31. 1. "SCKPCS,SCK-to-PCS Delay"
hexmask.long.byte 0x0 16.--23. 1. "PCSSCK,PCS-to-SCK Delay"
newline
hexmask.long.byte 0x0 8.--15. 1. "DBT,Delay Between Transfers"
hexmask.long.byte 0x0 0.--7. 1. "SCKDIV,SCK Divider"
line.long 0x4 "CCR1,Clock Configuration 1"
hexmask.long.byte 0x4 24.--31. 1. "SCKSCK,SCK Inter-Frame Delay"
hexmask.long.byte 0x4 16.--23. 1. "PCSPCS,PCS to PCS Delay"
newline
hexmask.long.byte 0x4 8.--15. 1. "SCKHLD,SCK Hold"
hexmask.long.byte 0x4 0.--7. 1. "SCKSET,SCK Setup"
group.long 0x58++0x3
line.long 0x0 "FCR,FIFO Control"
bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3"
bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3"
rgroup.long 0x5C++0x3
line.long 0x0 "FSR,FIFO Status"
bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7"
group.long 0x60++0x3
line.long 0x0 "TCR,Transmit Command"
bitfld.long 0x0 31. "CPOL,Clock Polarity" "0: Inactive low,1: Inactive high"
bitfld.long 0x0 30. "CPHA,Clock Phase" "0: Captured,1: Changed"
newline
bitfld.long 0x0 27.--29. "PRESCALE,Prescaler Value" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
bitfld.long 0x0 24.--25. "PCS,Peripheral Chip Select" "0: Transfer using PCS[0],1: Transfer using PCS[1],2: Transfer using PCS[2],3: Transfer using PCS[3]"
newline
bitfld.long 0x0 23. "LSBF,LSB First" "0: MSB first,1: LSB first"
bitfld.long 0x0 22. "BYSW,Byte Swap" "0: Disable byte swap,1: Enable byte swap"
newline
bitfld.long 0x0 21. "CONT,Continuous Transfer" "0: Disable,1: Enable"
bitfld.long 0x0 20. "CONTC,Continuing Command" "0: Command word for start of new transfer,1: Command word for continuing transfer"
newline
bitfld.long 0x0 19. "RXMSK,Receive Data Mask" "0: Normal transfer,1: Mask receive data"
bitfld.long 0x0 18. "TXMSK,Transmit Data Mask" "0: Normal transfer,1: Mask transmit data"
newline
bitfld.long 0x0 16.--17. "WIDTH,Transfer Width" "0: 1-bit transfer,1: 2-bit transfer,2: 4-bit transfer,?"
hexmask.long.word 0x0 0.--11. 1. "FRAMESZ,Frame Size"
wgroup.long 0x64++0x3
line.long 0x0 "TDR,Transmit Data"
hexmask.long 0x0 0.--31. 1. "DATA,Transmit Data"
rgroup.long 0x70++0xB
line.long 0x0 "RSR,Receive Status"
bitfld.long 0x0 1. "RXEMPTY,RX FIFO Empty" "0: Not empty,1: Empty"
bitfld.long 0x0 0. "SOF,Start of Frame" "0: Subsequent data word,1: First data word"
line.long 0x4 "RDR,Receive Data"
hexmask.long 0x4 0.--31. 1. "DATA,Receive Data"
line.long 0x8 "RDROR,Receive Data Read Only"
hexmask.long 0x8 0.--31. 1. "DATA,Receive Data"
wgroup.long 0x3FC++0x3
line.long 0x0 "TCBR,Transmit Command Burst"
hexmask.long 0x0 0.--31. 1. "DATA,Command Data"
repeat 128. (increment 0x0 0x1)(increment 0x0 0x4)
wgroup.long ($2+0x400)++0x3
line.long 0x0 "TDBR[$1],Transmit Data Burst"
hexmask.long 0x0 0.--31. 1. "DATA,Data"
repeat.end
repeat 128. (increment 0x0 0x1)(increment 0x0 0x4)
rgroup.long ($2+0x600)++0x3
line.long 0x0 "RDBR[$1],Receive Data Burst"
hexmask.long 0x0 0.--31. 1. "DATA,Data"
repeat.end
tree.end
tree "LPSPI1"
base ad:0x4009D000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Module Identification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 16.--23. 1. "PCSNUM,PCS Number"
hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size"
newline
hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size"
group.long 0x10++0x17
line.long 0x0 "CR,Control"
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Reset"
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Reset"
newline
bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Disable,1: Enable"
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
newline
bitfld.long 0x0 0. "MEN,Module Enable" "0: Disable,1: Enable"
line.long 0x4 "SR,Status"
rbitfld.long 0x4 24. "MBF,Module Busy Flag" "0: LPSPI is idle,1: LPSPI is busy"
eventfld.long 0x4 13. "DMF,Data Match Flag" "0: No match,1: Match"
newline
eventfld.long 0x4 12. "REF,Receive Error Flag" "0: No overflow,1: Overflow"
eventfld.long 0x4 11. "TEF,Transmit Error Flag" "0: No underrun,1: Underrun"
newline
eventfld.long 0x4 10. "TCF,Transfer Complete Flag" "0: Not complete,1: Complete"
eventfld.long 0x4 9. "FCF,Frame Complete Flag" "0: Not complete,1: Complete"
newline
eventfld.long 0x4 8. "WCF,Word Complete Flag" "0: Not complete,1: Complete"
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive data not ready,1: Receive data ready"
newline
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data requested"
line.long 0x8 "IER,Interrupt Enable"
bitfld.long 0x8 13. "DMIE,Data Match Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 12. "REIE,Receive Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 11. "TEIE,Transmit Error Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 10. "TCIE,Transfer Complete Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 9. "FCIE,Frame Complete Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 8. "WCIE,Word Complete Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
line.long 0xC "DER,DMA Enable"
bitfld.long 0xC 9. "FCDE,Frame Complete DMA Enable" "0: Disable,1: Enable"
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable,1: Enable"
newline
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
line.long 0x10 "CFGR0,Configuration 0"
bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Disable,1: Enable"
bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 3. "HRDIR,Host Request Direction" "0: Input,1: Output"
bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: HREQ pin,1: Input trigger"
newline
bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active high,1: Active low"
bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Disable,1: Enable"
line.long 0x14 "CFGR1,Configuration 1"
bitfld.long 0x14 27. "PCSCFG,Peripheral Chip Select Configuration" "0: PCS[3:2] configured for chip select function,1: PCS[3:2] configured for half-duplex 4-bit.."
bitfld.long 0x14 26. "OUTCFG,Output Configuration" "0: Retain last value,1: 3-stated"
newline
bitfld.long 0x14 24.--25. "PINCFG,Pin Configuration" "0: SIN is used for input data; SOUT is used for..,1: SIN is used for both input and output data; only..,2: SOUT is used for both input and output data;..,3: SOUT is used for input data; SIN is used for.."
bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: Match first data word with compare word,3: Match any data word with compare word,4: Sequential match first data word,5: Sequential match any data word,6: Match first data word (masked) with compare word..,7: Match any data word (masked) with compare word.."
newline
hexmask.long.byte 0x14 8.--11. 1. "PCSPOL,Peripheral Chip Select Polarity"
bitfld.long 0x14 4. "PARTIAL,Partial Enable" "0: Discard,1: Store"
newline
bitfld.long 0x14 3. "NOSTALL,No Stall" "0: Disable,1: Enable"
bitfld.long 0x14 2. "AUTOPCS,Automatic PCS" "0: Disable,1: Enable"
newline
bitfld.long 0x14 1. "SAMPLE,Sample Point" "0: SCK edge,1: Delayed SCK edge"
bitfld.long 0x14 0. "MASTER,Master Mode" "0: Slave mode,1: Master mode"
group.long 0x30++0x7
line.long 0x0 "DMR0,Data Match 0"
hexmask.long 0x0 0.--31. 1. "MATCH0,Match 0 Value"
line.long 0x4 "DMR1,Data Match 1"
hexmask.long 0x4 0.--31. 1. "MATCH1,Match 1 Value"
group.long 0x40++0x7
line.long 0x0 "CCR,Clock Configuration"
hexmask.long.byte 0x0 24.--31. 1. "SCKPCS,SCK-to-PCS Delay"
hexmask.long.byte 0x0 16.--23. 1. "PCSSCK,PCS-to-SCK Delay"
newline
hexmask.long.byte 0x0 8.--15. 1. "DBT,Delay Between Transfers"
hexmask.long.byte 0x0 0.--7. 1. "SCKDIV,SCK Divider"
line.long 0x4 "CCR1,Clock Configuration 1"
hexmask.long.byte 0x4 24.--31. 1. "SCKSCK,SCK Inter-Frame Delay"
hexmask.long.byte 0x4 16.--23. 1. "PCSPCS,PCS to PCS Delay"
newline
hexmask.long.byte 0x4 8.--15. 1. "SCKHLD,SCK Hold"
hexmask.long.byte 0x4 0.--7. 1. "SCKSET,SCK Setup"
group.long 0x58++0x3
line.long 0x0 "FCR,FIFO Control"
bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3"
bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3"
rgroup.long 0x5C++0x3
line.long 0x0 "FSR,FIFO Status"
bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7"
group.long 0x60++0x3
line.long 0x0 "TCR,Transmit Command"
bitfld.long 0x0 31. "CPOL,Clock Polarity" "0: Inactive low,1: Inactive high"
bitfld.long 0x0 30. "CPHA,Clock Phase" "0: Captured,1: Changed"
newline
bitfld.long 0x0 27.--29. "PRESCALE,Prescaler Value" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
bitfld.long 0x0 24.--25. "PCS,Peripheral Chip Select" "0: Transfer using PCS[0],1: Transfer using PCS[1],2: Transfer using PCS[2],3: Transfer using PCS[3]"
newline
bitfld.long 0x0 23. "LSBF,LSB First" "0: MSB first,1: LSB first"
bitfld.long 0x0 22. "BYSW,Byte Swap" "0: Disable byte swap,1: Enable byte swap"
newline
bitfld.long 0x0 21. "CONT,Continuous Transfer" "0: Disable,1: Enable"
bitfld.long 0x0 20. "CONTC,Continuing Command" "0: Command word for start of new transfer,1: Command word for continuing transfer"
newline
bitfld.long 0x0 19. "RXMSK,Receive Data Mask" "0: Normal transfer,1: Mask receive data"
bitfld.long 0x0 18. "TXMSK,Transmit Data Mask" "0: Normal transfer,1: Mask transmit data"
newline
bitfld.long 0x0 16.--17. "WIDTH,Transfer Width" "0: 1-bit transfer,1: 2-bit transfer,2: 4-bit transfer,?"
hexmask.long.word 0x0 0.--11. 1. "FRAMESZ,Frame Size"
wgroup.long 0x64++0x3
line.long 0x0 "TDR,Transmit Data"
hexmask.long 0x0 0.--31. 1. "DATA,Transmit Data"
rgroup.long 0x70++0xB
line.long 0x0 "RSR,Receive Status"
bitfld.long 0x0 1. "RXEMPTY,RX FIFO Empty" "0: Not empty,1: Empty"
bitfld.long 0x0 0. "SOF,Start of Frame" "0: Subsequent data word,1: First data word"
line.long 0x4 "RDR,Receive Data"
hexmask.long 0x4 0.--31. 1. "DATA,Receive Data"
line.long 0x8 "RDROR,Receive Data Read Only"
hexmask.long 0x8 0.--31. 1. "DATA,Receive Data"
wgroup.long 0x3FC++0x3
line.long 0x0 "TCBR,Transmit Command Burst"
hexmask.long 0x0 0.--31. 1. "DATA,Command Data"
repeat 128. (increment 0x0 0x1)(increment 0x0 0x4)
wgroup.long ($2+0x400)++0x3
line.long 0x0 "TDBR[$1],Transmit Data Burst"
hexmask.long 0x0 0.--31. 1. "DATA,Data"
repeat.end
repeat 128. (increment 0x0 0x1)(increment 0x0 0x4)
rgroup.long ($2+0x600)++0x3
line.long 0x0 "RDBR[$1],Receive Data Burst"
hexmask.long 0x0 0.--31. 1. "DATA,Data"
repeat.end
tree.end
tree.end
tree "LPTMR (Low-Power Timer)"
base ad:0x400AB000
group.long 0x0++0xF
line.long 0x0 "CSR,Control Status"
bitfld.long 0x0 8. "TDRE,Timer DMA Request Enable" "0: Disable,1: Enable"
eventfld.long 0x0 7. "TCF,Timer Compare Flag" "0: CNR != (CMR + 1),1: CNR = (CMR + 1)"
bitfld.long 0x0 6. "TIE,Timer Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x0 4.--5. "TPS,Timer Pin Select" "0: Input 0,1: Input 1,2: Input 2,3: Input 3"
newline
bitfld.long 0x0 3. "TPP,Timer Pin Polarity" "0: Active-high,1: Active-low"
bitfld.long 0x0 2. "TFC,Timer Free-Running Counter" "0: Reset when TCF asserts,1: Reset on overflow"
bitfld.long 0x0 1. "TMS,Timer Mode Select" "0: Time Counter,1: Pulse Counter"
bitfld.long 0x0 0. "TEN,Timer Enable" "0: Disable,1: Enable"
line.long 0x4 "PSR,Prescaler and Glitch Filter"
hexmask.long.byte 0x4 3.--6. 1. "PRESCALE,Prescaler and Glitch Filter Value"
bitfld.long 0x4 2. "PBYP,Prescaler and Glitch Filter Bypass" "0: Prescaler and glitch filter enable,1: Prescaler and glitch filter bypass"
bitfld.long 0x4 0.--1. "PCS,Prescaler and Glitch Filter Clock Select" "0: Clock 0,1: Clock 1,2: Clock 2,3: Clock 3"
line.long 0x8 "CMR,Compare"
hexmask.long 0x8 0.--31. 1. "COMPARE,Compare Value"
line.long 0xC "CNR,Counter"
hexmask.long 0xC 0.--31. 1. "COUNTER,Counter Value"
tree.end
tree "LPUART (Low-Power Universal Asynchronous Receiver/Trasmitter)"
base ad:0x0
tree "LPUART0"
base ad:0x4009F000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Identification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size"
hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size"
group.long 0x8++0x27
line.long 0x0 "GLOBAL,Global"
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
line.long 0x4 "PINCFG,Pin Configuration"
bitfld.long 0x4 0.--1. "TRGSEL,Trigger Select" "0: Input trigger disabled,1: Input trigger used instead of the RXD pin input,2: Input trigger used instead of the CTS_B pin input,3: Input trigger used to modulate the TXD pin.."
line.long 0x8 "BAUD,Baud Rate"
bitfld.long 0x8 31. "MAEN1,Match Address Mode Enable 1" "0: Disable,1: Enable"
bitfld.long 0x8 30. "MAEN2,Match Address Mode Enable 2" "0: Disable,1: Enable"
newline
bitfld.long 0x8 29. "M10,10-Bit Mode Select" "0: Receiver and transmitter use 7-bit to 9-bit data..,1: Receiver and transmitter use 10-bit data.."
hexmask.long.byte 0x8 24.--28. 1. "OSR,Oversampling Ratio"
newline
bitfld.long 0x8 23. "TDMAE,Transmitter DMA Enable" "0: Disable,1: Enable"
bitfld.long 0x8 21. "RDMAE,Receiver Full DMA Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 20. "RIDMAE,Receiver Idle DMA Enable" "0: Disable,1: Enable"
bitfld.long 0x8 18.--19. "MATCFG,Match Configuration" "0: Address match wake-up,1: Idle match wake-up,2: Match on and match off,3: Enables RWU on data match and match on or off.."
newline
bitfld.long 0x8 17. "BOTHEDGE,Both Edge Sampling" "0: Rising edge,1: Both rising and falling edges"
bitfld.long 0x8 16. "RESYNCDIS,Resynchronization Disable" "0: Enable,1: Disable"
newline
bitfld.long 0x8 15. "LBKDIE,LIN Break Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "RXEDGIE,RX Input Active Edge Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 13. "SBNS,Stop Bit Number Select" "0: One stop bit,1: Two stop bits"
hexmask.long.word 0x8 0.--12. 1. "SBR,Baud Rate Modulo Divisor"
line.long 0xC "STAT,Status"
eventfld.long 0xC 31. "LBKDIF,LIN Break Detect Interrupt Flag" "0: Not detected,1: Detected"
eventfld.long 0xC 30. "RXEDGIF,RXD Pin Active Edge Interrupt Flag" "0: Not occurred,1: Occurred"
newline
bitfld.long 0xC 29. "MSBF,MSB First" "0: LSB,1: MSB"
bitfld.long 0xC 28. "RXINV,Receive Data Inversion" "0: Inverted,1: Not inverted"
newline
bitfld.long 0xC 27. "RWUID,Receive Wake Up Idle Detect" "0: STAT[IDLE] does not become 1,1: STAT[IDLE] becomes 1"
bitfld.long 0xC 26. "BRK13,Break Character Generation Length" "0: 9 to 13 bit times,1: 12 to 15 bit times"
newline
bitfld.long 0xC 25. "LBKDE,LIN Break Detection Enable" "0: Disable,1: Enable"
rbitfld.long 0xC 24. "RAF,Receiver Active Flag" "0: Idle waiting for a start bit,1: Receiver active (RXD pin input not idle)"
newline
rbitfld.long 0xC 23. "TDRE,Transmit Data Register Empty Flag" "0: Greater than watermark,1: Equal to or less than watermark"
rbitfld.long 0xC 22. "TC,Transmission Complete Flag" "0: Transmitter active,1: Transmitter idle"
newline
rbitfld.long 0xC 21. "RDRF,Receive Data Register Full Flag" "0: Equal to or less than watermark,1: Greater than watermark"
eventfld.long 0xC 20. "IDLE,Idle Line Flag" "0: Idle line detected,1: Idle line not detected"
newline
eventfld.long 0xC 19. "OR,Receiver Overrun Flag" "0: No overrun,1: Receive overrun (new LPUART data is lost)"
eventfld.long 0xC 18. "NF,Noise Flag" "0: No noise detected,1: Noise detected"
newline
eventfld.long 0xC 17. "FE,Framing Error Flag" "0: No framing error detected (this does not..,1: Framing error detected"
eventfld.long 0xC 16. "PF,Parity Error Flag" "0: No parity error detected,1: Parity error detected"
newline
eventfld.long 0xC 15. "MA1F,Match 1 Flag" "0: Not equal to MA1,1: Equal to MA1"
eventfld.long 0xC 14. "MA2F,Match 2 Flag" "0: Not equal to MA2,1: Equal to MA2"
newline
bitfld.long 0xC 1. "AME,Address Mark Enable" "0: Disable,1: Enable"
bitfld.long 0xC 0. "LBKFE,LIN Break Flag Enable" "0: Disable,1: Enable"
line.long 0x10 "CTRL,Control"
bitfld.long 0x10 31. "R8T9,Receive Bit 8 Transmit Bit 9" "0,1"
bitfld.long 0x10 30. "R9T8,Receive Bit 9 Transmit Bit 8" "0,1"
newline
bitfld.long 0x10 29. "TXDIR,TXD Pin Direction in Single-Wire Mode" "0: Input,1: Output"
bitfld.long 0x10 28. "TXINV,Transmit Data Inversion" "0: Not inverted,1: Inverted"
newline
bitfld.long 0x10 27. "ORIE,Overrun Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 26. "NEIE,Noise Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 25. "FEIE,Framing Error Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 24. "PEIE,Parity Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 23. "TIE,Transmit Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 22. "TCIE,Transmission Complete Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 21. "RIE,Receiver Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 20. "ILIE,Idle Line Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 19. "TE,Transmitter Enable" "0: Disable,1: Enable"
bitfld.long 0x10 18. "RE,Receiver Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 17. "RWU,Receiver Wake-Up Control" "0: Normal receiver operation,1: LPUART receiver in standby waiting for a wake-up.."
bitfld.long 0x10 16. "SBK,Send Break" "0: Normal transmitter operation,1: Queue break character(s) to be sent"
newline
bitfld.long 0x10 15. "MA1IE,Match 1 (MA1F) Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 14. "MA2IE,Match 2 (MA2F) Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 11. "M7,7-Bit Mode Select" "0: 8-bit to 10-bit,1: 7-bit"
bitfld.long 0x10 8.--10. "IDLECFG,Idle Configuration" "0: 1,1: 2,2: 4,3: 8,4: 16,5: 32,6: 64,7: 128"
newline
bitfld.long 0x10 7. "LOOPS,Loop Mode Select" "0: Normal operation: RXD and TXD use separate pins,1: Loop mode or Single-Wire mode"
bitfld.long 0x10 6. "DOZEEN,Doze Mode" "0: Enable,1: Disable"
newline
bitfld.long 0x10 5. "RSRC,Receiver Source Select" "0: Internal Loopback mode,1: Single-wire mode"
bitfld.long 0x10 4. "M,9-Bit Or 8-Bit Mode Select" "0: 8-bit,1: 9-bit"
newline
bitfld.long 0x10 3. "WAKE,Receiver Wake-Up Method Select" "0: Idle,1: Mark"
bitfld.long 0x10 2. "ILT,Idle Line Type Select" "0: After the start bit,1: After the stop bit"
newline
bitfld.long 0x10 1. "PE,Parity Enable" "0: Disable,1: Enable"
bitfld.long 0x10 0. "PT,Parity Type" "0: Even parity,1: Odd parity"
line.long 0x14 "DATA,Data"
rbitfld.long 0x14 15. "NOISY,Noisy Data Received" "0: Received without noise,1: Received with noise"
rbitfld.long 0x14 14. "PARITYE,Parity Error" "0: Received without a parity error,1: Received with a parity error"
newline
bitfld.long 0x14 13. "FRETSC,Frame Error Transmit Special Character" "0: Received without a frame error on reads or..,1: Received with a frame error on reads or.."
rbitfld.long 0x14 12. "RXEMPT,Receive Buffer Empty" "0: Valid data,1: Invalid data and empty"
newline
rbitfld.long 0x14 11. "IDLINE,Idle Line" "0: Not idle,1: Idle"
rbitfld.long 0x14 10. "LINBRK,LIN Break" "0: Not detected,1: Detected"
newline
bitfld.long 0x14 9. "R9T9,Read receive FIFO bit 9 or write transmit FIFO bit 9" "0,1"
bitfld.long 0x14 8. "R8T8,Read receive FIFO bit 8 or write transmit FIFO bit 8" "0,1"
newline
bitfld.long 0x14 7. "R7T7,Read receive FIFO bit 7 or write transmit FIFO bit 7" "0,1"
bitfld.long 0x14 6. "R6T6,Read receive FIFO bit 6 or write transmit FIFO bit 6" "0,1"
newline
bitfld.long 0x14 5. "R5T5,Read receive FIFO bit 5 or write transmit FIFO bit 5" "0,1"
bitfld.long 0x14 4. "R4T4,Read receive FIFO bit 4 or write transmit FIFO bit 4" "0,1"
newline
bitfld.long 0x14 3. "R3T3,Read receive FIFO bit 3 or write transmit FIFO bit 3" "0,1"
bitfld.long 0x14 2. "R2T2,Read receive FIFO bit 2 or write transmit FIFO bit 2" "0,1"
newline
bitfld.long 0x14 1. "R1T1,Read receive FIFO bit 1 or write transmit FIFO bit 1" "0,1"
bitfld.long 0x14 0. "R0T0,Read receive FIFO bit 0 or write transmit FIFO bit 0" "0,1"
line.long 0x18 "MATCH,Match Address"
hexmask.long.word 0x18 16.--25. 1. "MA2,Match Address 2"
hexmask.long.word 0x18 0.--9. 1. "MA1,Match Address 1"
line.long 0x1C "MODIR,MODEM IrDA"
bitfld.long 0x1C 18. "IREN,IR Enable" "0: Disable,1: Enable"
bitfld.long 0x1C 16.--17. "TNP,Transmitter Narrow Pulse" "0: 1 / OSR,1: 2 / OSR,2: 3 / OSR,3: 4 / OSR"
newline
bitfld.long 0x1C 8.--9. "RTSWATER,Receive RTS Configuration" "0,1,2,3"
bitfld.long 0x1C 5. "TXCTSSRC,Transmit CTS Source" "0: The CTS_B pin,1: An internal connection to the receiver address.."
newline
bitfld.long 0x1C 4. "TXCTSC,Transmit CTS Configuration" "0: Sampled at the start of each character,1: Sampled when the transmitter is idle"
bitfld.long 0x1C 3. "RXRTSE,Receiver RTS Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x1C 2. "TXRTSPOL,Transmitter RTS Polarity" "0: Active low,1: Active high"
bitfld.long 0x1C 1. "TXRTSE,Transmitter RTS Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x1C 0. "TXCTSE,Transmitter CTS Enable" "0: Disable,1: Enable"
line.long 0x20 "FIFO,FIFO"
rbitfld.long 0x20 23. "TXEMPT,Transmit FIFO Or Buffer Empty" "0: Not empty,1: Empty"
rbitfld.long 0x20 22. "RXEMPT,Receive FIFO Or Buffer Empty" "0: Not empty,1: Empty"
newline
eventfld.long 0x20 17. "TXOF,Transmitter FIFO Overflow Flag" "0: No overflow,1: Overflow"
eventfld.long 0x20 16. "RXUF,Receiver FIFO Underflow Flag" "0: No underflow,1: Underflow"
newline
bitfld.long 0x20 15. "TXFLUSH,Transmit FIFO Flush" "0: No effect,1: All data flushed out"
bitfld.long 0x20 14. "RXFLUSH,Receive FIFO Flush" "0: No effect,1: All data flushed out"
newline
bitfld.long 0x20 10.--12. "RXIDEN,Receiver Idle Empty Enable" "0: Disable STAT[RDRF] to become 1 because of..,1: Enable STAT[RDRF] to become 1 because of..,2: Enable STAT[RDRF] to become 1 because of..,3: Enable STAT[RDRF] to become 1 because of..,4: Enable STAT[RDRF] to become 1 because of..,5: Enable STAT[RDRF] to become 1 because of..,6: Enable STAT[RDRF] to become 1 because of..,7: Enable STAT[RDRF] to become 1 because of.."
bitfld.long 0x20 9. "TXOFE,Transmit FIFO Overflow Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x20 8. "RXUFE,Receive FIFO Underflow Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x20 7. "TXFE,Transmit FIFO Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x20 4.--6. "TXFIFOSIZE,Transmit FIFO Buffer Depth" "0: 1,1: 4,2: 8,3: 16,4: 32,5: 64,6: 128,7: 256"
bitfld.long 0x20 3. "RXFE,Receive FIFO Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x20 0.--2. "RXFIFOSIZE,Receive FIFO Buffer Depth" "0: 1,1: 4,2: 8,3: 16,4: 32,5: 64,6: 128,7: 256"
line.long 0x24 "WATER,Watermark"
rbitfld.long 0x24 24.--26. "RXCOUNT,Receive Counter" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 16.--17. "RXWATER,Receive Watermark" "0,1,2,3"
newline
rbitfld.long 0x24 8.--10. "TXCOUNT,Transmit Counter" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 0.--1. "TXWATER,Transmit Watermark" "0,1,2,3"
rgroup.long 0x30++0x3
line.long 0x0 "DATARO,Data Read-Only"
hexmask.long.word 0x0 0.--15. 1. "DATA,Receive Data"
tree.end
tree "LPUART1"
base ad:0x400A0000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Identification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size"
hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size"
group.long 0x8++0x27
line.long 0x0 "GLOBAL,Global"
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
line.long 0x4 "PINCFG,Pin Configuration"
bitfld.long 0x4 0.--1. "TRGSEL,Trigger Select" "0: Input trigger disabled,1: Input trigger used instead of the RXD pin input,2: Input trigger used instead of the CTS_B pin input,3: Input trigger used to modulate the TXD pin.."
line.long 0x8 "BAUD,Baud Rate"
bitfld.long 0x8 31. "MAEN1,Match Address Mode Enable 1" "0: Disable,1: Enable"
bitfld.long 0x8 30. "MAEN2,Match Address Mode Enable 2" "0: Disable,1: Enable"
newline
bitfld.long 0x8 29. "M10,10-Bit Mode Select" "0: Receiver and transmitter use 7-bit to 9-bit data..,1: Receiver and transmitter use 10-bit data.."
hexmask.long.byte 0x8 24.--28. 1. "OSR,Oversampling Ratio"
newline
bitfld.long 0x8 23. "TDMAE,Transmitter DMA Enable" "0: Disable,1: Enable"
bitfld.long 0x8 21. "RDMAE,Receiver Full DMA Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 20. "RIDMAE,Receiver Idle DMA Enable" "0: Disable,1: Enable"
bitfld.long 0x8 18.--19. "MATCFG,Match Configuration" "0: Address match wake-up,1: Idle match wake-up,2: Match on and match off,3: Enables RWU on data match and match on or off.."
newline
bitfld.long 0x8 17. "BOTHEDGE,Both Edge Sampling" "0: Rising edge,1: Both rising and falling edges"
bitfld.long 0x8 16. "RESYNCDIS,Resynchronization Disable" "0: Enable,1: Disable"
newline
bitfld.long 0x8 15. "LBKDIE,LIN Break Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "RXEDGIE,RX Input Active Edge Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 13. "SBNS,Stop Bit Number Select" "0: One stop bit,1: Two stop bits"
hexmask.long.word 0x8 0.--12. 1. "SBR,Baud Rate Modulo Divisor"
line.long 0xC "STAT,Status"
eventfld.long 0xC 31. "LBKDIF,LIN Break Detect Interrupt Flag" "0: Not detected,1: Detected"
eventfld.long 0xC 30. "RXEDGIF,RXD Pin Active Edge Interrupt Flag" "0: Not occurred,1: Occurred"
newline
bitfld.long 0xC 29. "MSBF,MSB First" "0: LSB,1: MSB"
bitfld.long 0xC 28. "RXINV,Receive Data Inversion" "0: Inverted,1: Not inverted"
newline
bitfld.long 0xC 27. "RWUID,Receive Wake Up Idle Detect" "0: STAT[IDLE] does not become 1,1: STAT[IDLE] becomes 1"
bitfld.long 0xC 26. "BRK13,Break Character Generation Length" "0: 9 to 13 bit times,1: 12 to 15 bit times"
newline
bitfld.long 0xC 25. "LBKDE,LIN Break Detection Enable" "0: Disable,1: Enable"
rbitfld.long 0xC 24. "RAF,Receiver Active Flag" "0: Idle waiting for a start bit,1: Receiver active (RXD pin input not idle)"
newline
rbitfld.long 0xC 23. "TDRE,Transmit Data Register Empty Flag" "0: Greater than watermark,1: Equal to or less than watermark"
rbitfld.long 0xC 22. "TC,Transmission Complete Flag" "0: Transmitter active,1: Transmitter idle"
newline
rbitfld.long 0xC 21. "RDRF,Receive Data Register Full Flag" "0: Equal to or less than watermark,1: Greater than watermark"
eventfld.long 0xC 20. "IDLE,Idle Line Flag" "0: Idle line detected,1: Idle line not detected"
newline
eventfld.long 0xC 19. "OR,Receiver Overrun Flag" "0: No overrun,1: Receive overrun (new LPUART data is lost)"
eventfld.long 0xC 18. "NF,Noise Flag" "0: No noise detected,1: Noise detected"
newline
eventfld.long 0xC 17. "FE,Framing Error Flag" "0: No framing error detected (this does not..,1: Framing error detected"
eventfld.long 0xC 16. "PF,Parity Error Flag" "0: No parity error detected,1: Parity error detected"
newline
eventfld.long 0xC 15. "MA1F,Match 1 Flag" "0: Not equal to MA1,1: Equal to MA1"
eventfld.long 0xC 14. "MA2F,Match 2 Flag" "0: Not equal to MA2,1: Equal to MA2"
newline
bitfld.long 0xC 1. "AME,Address Mark Enable" "0: Disable,1: Enable"
bitfld.long 0xC 0. "LBKFE,LIN Break Flag Enable" "0: Disable,1: Enable"
line.long 0x10 "CTRL,Control"
bitfld.long 0x10 31. "R8T9,Receive Bit 8 Transmit Bit 9" "0,1"
bitfld.long 0x10 30. "R9T8,Receive Bit 9 Transmit Bit 8" "0,1"
newline
bitfld.long 0x10 29. "TXDIR,TXD Pin Direction in Single-Wire Mode" "0: Input,1: Output"
bitfld.long 0x10 28. "TXINV,Transmit Data Inversion" "0: Not inverted,1: Inverted"
newline
bitfld.long 0x10 27. "ORIE,Overrun Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 26. "NEIE,Noise Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 25. "FEIE,Framing Error Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 24. "PEIE,Parity Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 23. "TIE,Transmit Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 22. "TCIE,Transmission Complete Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 21. "RIE,Receiver Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 20. "ILIE,Idle Line Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 19. "TE,Transmitter Enable" "0: Disable,1: Enable"
bitfld.long 0x10 18. "RE,Receiver Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 17. "RWU,Receiver Wake-Up Control" "0: Normal receiver operation,1: LPUART receiver in standby waiting for a wake-up.."
bitfld.long 0x10 16. "SBK,Send Break" "0: Normal transmitter operation,1: Queue break character(s) to be sent"
newline
bitfld.long 0x10 15. "MA1IE,Match 1 (MA1F) Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 14. "MA2IE,Match 2 (MA2F) Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 11. "M7,7-Bit Mode Select" "0: 8-bit to 10-bit,1: 7-bit"
bitfld.long 0x10 8.--10. "IDLECFG,Idle Configuration" "0: 1,1: 2,2: 4,3: 8,4: 16,5: 32,6: 64,7: 128"
newline
bitfld.long 0x10 7. "LOOPS,Loop Mode Select" "0: Normal operation: RXD and TXD use separate pins,1: Loop mode or Single-Wire mode"
bitfld.long 0x10 6. "DOZEEN,Doze Mode" "0: Enable,1: Disable"
newline
bitfld.long 0x10 5. "RSRC,Receiver Source Select" "0: Internal Loopback mode,1: Single-wire mode"
bitfld.long 0x10 4. "M,9-Bit Or 8-Bit Mode Select" "0: 8-bit,1: 9-bit"
newline
bitfld.long 0x10 3. "WAKE,Receiver Wake-Up Method Select" "0: Idle,1: Mark"
bitfld.long 0x10 2. "ILT,Idle Line Type Select" "0: After the start bit,1: After the stop bit"
newline
bitfld.long 0x10 1. "PE,Parity Enable" "0: Disable,1: Enable"
bitfld.long 0x10 0. "PT,Parity Type" "0: Even parity,1: Odd parity"
line.long 0x14 "DATA,Data"
rbitfld.long 0x14 15. "NOISY,Noisy Data Received" "0: Received without noise,1: Received with noise"
rbitfld.long 0x14 14. "PARITYE,Parity Error" "0: Received without a parity error,1: Received with a parity error"
newline
bitfld.long 0x14 13. "FRETSC,Frame Error Transmit Special Character" "0: Received without a frame error on reads or..,1: Received with a frame error on reads or.."
rbitfld.long 0x14 12. "RXEMPT,Receive Buffer Empty" "0: Valid data,1: Invalid data and empty"
newline
rbitfld.long 0x14 11. "IDLINE,Idle Line" "0: Not idle,1: Idle"
rbitfld.long 0x14 10. "LINBRK,LIN Break" "0: Not detected,1: Detected"
newline
bitfld.long 0x14 9. "R9T9,Read receive FIFO bit 9 or write transmit FIFO bit 9" "0,1"
bitfld.long 0x14 8. "R8T8,Read receive FIFO bit 8 or write transmit FIFO bit 8" "0,1"
newline
bitfld.long 0x14 7. "R7T7,Read receive FIFO bit 7 or write transmit FIFO bit 7" "0,1"
bitfld.long 0x14 6. "R6T6,Read receive FIFO bit 6 or write transmit FIFO bit 6" "0,1"
newline
bitfld.long 0x14 5. "R5T5,Read receive FIFO bit 5 or write transmit FIFO bit 5" "0,1"
bitfld.long 0x14 4. "R4T4,Read receive FIFO bit 4 or write transmit FIFO bit 4" "0,1"
newline
bitfld.long 0x14 3. "R3T3,Read receive FIFO bit 3 or write transmit FIFO bit 3" "0,1"
bitfld.long 0x14 2. "R2T2,Read receive FIFO bit 2 or write transmit FIFO bit 2" "0,1"
newline
bitfld.long 0x14 1. "R1T1,Read receive FIFO bit 1 or write transmit FIFO bit 1" "0,1"
bitfld.long 0x14 0. "R0T0,Read receive FIFO bit 0 or write transmit FIFO bit 0" "0,1"
line.long 0x18 "MATCH,Match Address"
hexmask.long.word 0x18 16.--25. 1. "MA2,Match Address 2"
hexmask.long.word 0x18 0.--9. 1. "MA1,Match Address 1"
line.long 0x1C "MODIR,MODEM IrDA"
bitfld.long 0x1C 18. "IREN,IR Enable" "0: Disable,1: Enable"
bitfld.long 0x1C 16.--17. "TNP,Transmitter Narrow Pulse" "0: 1 / OSR,1: 2 / OSR,2: 3 / OSR,3: 4 / OSR"
newline
bitfld.long 0x1C 8.--9. "RTSWATER,Receive RTS Configuration" "0,1,2,3"
bitfld.long 0x1C 5. "TXCTSSRC,Transmit CTS Source" "0: The CTS_B pin,1: An internal connection to the receiver address.."
newline
bitfld.long 0x1C 4. "TXCTSC,Transmit CTS Configuration" "0: Sampled at the start of each character,1: Sampled when the transmitter is idle"
bitfld.long 0x1C 3. "RXRTSE,Receiver RTS Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x1C 2. "TXRTSPOL,Transmitter RTS Polarity" "0: Active low,1: Active high"
bitfld.long 0x1C 1. "TXRTSE,Transmitter RTS Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x1C 0. "TXCTSE,Transmitter CTS Enable" "0: Disable,1: Enable"
line.long 0x20 "FIFO,FIFO"
rbitfld.long 0x20 23. "TXEMPT,Transmit FIFO Or Buffer Empty" "0: Not empty,1: Empty"
rbitfld.long 0x20 22. "RXEMPT,Receive FIFO Or Buffer Empty" "0: Not empty,1: Empty"
newline
eventfld.long 0x20 17. "TXOF,Transmitter FIFO Overflow Flag" "0: No overflow,1: Overflow"
eventfld.long 0x20 16. "RXUF,Receiver FIFO Underflow Flag" "0: No underflow,1: Underflow"
newline
bitfld.long 0x20 15. "TXFLUSH,Transmit FIFO Flush" "0: No effect,1: All data flushed out"
bitfld.long 0x20 14. "RXFLUSH,Receive FIFO Flush" "0: No effect,1: All data flushed out"
newline
bitfld.long 0x20 10.--12. "RXIDEN,Receiver Idle Empty Enable" "0: Disable STAT[RDRF] to become 1 because of..,1: Enable STAT[RDRF] to become 1 because of..,2: Enable STAT[RDRF] to become 1 because of..,3: Enable STAT[RDRF] to become 1 because of..,4: Enable STAT[RDRF] to become 1 because of..,5: Enable STAT[RDRF] to become 1 because of..,6: Enable STAT[RDRF] to become 1 because of..,7: Enable STAT[RDRF] to become 1 because of.."
bitfld.long 0x20 9. "TXOFE,Transmit FIFO Overflow Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x20 8. "RXUFE,Receive FIFO Underflow Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x20 7. "TXFE,Transmit FIFO Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x20 4.--6. "TXFIFOSIZE,Transmit FIFO Buffer Depth" "0: 1,1: 4,2: 8,3: 16,4: 32,5: 64,6: 128,7: 256"
bitfld.long 0x20 3. "RXFE,Receive FIFO Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x20 0.--2. "RXFIFOSIZE,Receive FIFO Buffer Depth" "0: 1,1: 4,2: 8,3: 16,4: 32,5: 64,6: 128,7: 256"
line.long 0x24 "WATER,Watermark"
rbitfld.long 0x24 24.--26. "RXCOUNT,Receive Counter" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 16.--17. "RXWATER,Receive Watermark" "0,1,2,3"
newline
rbitfld.long 0x24 8.--10. "TXCOUNT,Transmit Counter" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 0.--1. "TXWATER,Transmit Watermark" "0,1,2,3"
rgroup.long 0x30++0x3
line.long 0x0 "DATARO,Data Read-Only"
hexmask.long.word 0x0 0.--15. 1. "DATA,Receive Data"
tree.end
tree "LPUART2"
base ad:0x400A1000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Identification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size"
hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size"
group.long 0x8++0x27
line.long 0x0 "GLOBAL,Global"
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
line.long 0x4 "PINCFG,Pin Configuration"
bitfld.long 0x4 0.--1. "TRGSEL,Trigger Select" "0: Input trigger disabled,1: Input trigger used instead of the RXD pin input,2: Input trigger used instead of the CTS_B pin input,3: Input trigger used to modulate the TXD pin.."
line.long 0x8 "BAUD,Baud Rate"
bitfld.long 0x8 31. "MAEN1,Match Address Mode Enable 1" "0: Disable,1: Enable"
bitfld.long 0x8 30. "MAEN2,Match Address Mode Enable 2" "0: Disable,1: Enable"
newline
bitfld.long 0x8 29. "M10,10-Bit Mode Select" "0: Receiver and transmitter use 7-bit to 9-bit data..,1: Receiver and transmitter use 10-bit data.."
hexmask.long.byte 0x8 24.--28. 1. "OSR,Oversampling Ratio"
newline
bitfld.long 0x8 23. "TDMAE,Transmitter DMA Enable" "0: Disable,1: Enable"
bitfld.long 0x8 21. "RDMAE,Receiver Full DMA Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 20. "RIDMAE,Receiver Idle DMA Enable" "0: Disable,1: Enable"
bitfld.long 0x8 18.--19. "MATCFG,Match Configuration" "0: Address match wake-up,1: Idle match wake-up,2: Match on and match off,3: Enables RWU on data match and match on or off.."
newline
bitfld.long 0x8 17. "BOTHEDGE,Both Edge Sampling" "0: Rising edge,1: Both rising and falling edges"
bitfld.long 0x8 16. "RESYNCDIS,Resynchronization Disable" "0: Enable,1: Disable"
newline
bitfld.long 0x8 15. "LBKDIE,LIN Break Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "RXEDGIE,RX Input Active Edge Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 13. "SBNS,Stop Bit Number Select" "0: One stop bit,1: Two stop bits"
hexmask.long.word 0x8 0.--12. 1. "SBR,Baud Rate Modulo Divisor"
line.long 0xC "STAT,Status"
eventfld.long 0xC 31. "LBKDIF,LIN Break Detect Interrupt Flag" "0: Not detected,1: Detected"
eventfld.long 0xC 30. "RXEDGIF,RXD Pin Active Edge Interrupt Flag" "0: Not occurred,1: Occurred"
newline
bitfld.long 0xC 29. "MSBF,MSB First" "0: LSB,1: MSB"
bitfld.long 0xC 28. "RXINV,Receive Data Inversion" "0: Inverted,1: Not inverted"
newline
bitfld.long 0xC 27. "RWUID,Receive Wake Up Idle Detect" "0: STAT[IDLE] does not become 1,1: STAT[IDLE] becomes 1"
bitfld.long 0xC 26. "BRK13,Break Character Generation Length" "0: 9 to 13 bit times,1: 12 to 15 bit times"
newline
bitfld.long 0xC 25. "LBKDE,LIN Break Detection Enable" "0: Disable,1: Enable"
rbitfld.long 0xC 24. "RAF,Receiver Active Flag" "0: Idle waiting for a start bit,1: Receiver active (RXD pin input not idle)"
newline
rbitfld.long 0xC 23. "TDRE,Transmit Data Register Empty Flag" "0: Greater than watermark,1: Equal to or less than watermark"
rbitfld.long 0xC 22. "TC,Transmission Complete Flag" "0: Transmitter active,1: Transmitter idle"
newline
rbitfld.long 0xC 21. "RDRF,Receive Data Register Full Flag" "0: Equal to or less than watermark,1: Greater than watermark"
eventfld.long 0xC 20. "IDLE,Idle Line Flag" "0: Idle line detected,1: Idle line not detected"
newline
eventfld.long 0xC 19. "OR,Receiver Overrun Flag" "0: No overrun,1: Receive overrun (new LPUART data is lost)"
eventfld.long 0xC 18. "NF,Noise Flag" "0: No noise detected,1: Noise detected"
newline
eventfld.long 0xC 17. "FE,Framing Error Flag" "0: No framing error detected (this does not..,1: Framing error detected"
eventfld.long 0xC 16. "PF,Parity Error Flag" "0: No parity error detected,1: Parity error detected"
newline
eventfld.long 0xC 15. "MA1F,Match 1 Flag" "0: Not equal to MA1,1: Equal to MA1"
eventfld.long 0xC 14. "MA2F,Match 2 Flag" "0: Not equal to MA2,1: Equal to MA2"
newline
bitfld.long 0xC 1. "AME,Address Mark Enable" "0: Disable,1: Enable"
bitfld.long 0xC 0. "LBKFE,LIN Break Flag Enable" "0: Disable,1: Enable"
line.long 0x10 "CTRL,Control"
bitfld.long 0x10 31. "R8T9,Receive Bit 8 Transmit Bit 9" "0,1"
bitfld.long 0x10 30. "R9T8,Receive Bit 9 Transmit Bit 8" "0,1"
newline
bitfld.long 0x10 29. "TXDIR,TXD Pin Direction in Single-Wire Mode" "0: Input,1: Output"
bitfld.long 0x10 28. "TXINV,Transmit Data Inversion" "0: Not inverted,1: Inverted"
newline
bitfld.long 0x10 27. "ORIE,Overrun Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 26. "NEIE,Noise Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 25. "FEIE,Framing Error Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 24. "PEIE,Parity Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 23. "TIE,Transmit Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 22. "TCIE,Transmission Complete Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 21. "RIE,Receiver Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 20. "ILIE,Idle Line Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 19. "TE,Transmitter Enable" "0: Disable,1: Enable"
bitfld.long 0x10 18. "RE,Receiver Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 17. "RWU,Receiver Wake-Up Control" "0: Normal receiver operation,1: LPUART receiver in standby waiting for a wake-up.."
bitfld.long 0x10 16. "SBK,Send Break" "0: Normal transmitter operation,1: Queue break character(s) to be sent"
newline
bitfld.long 0x10 15. "MA1IE,Match 1 (MA1F) Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 14. "MA2IE,Match 2 (MA2F) Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 11. "M7,7-Bit Mode Select" "0: 8-bit to 10-bit,1: 7-bit"
bitfld.long 0x10 8.--10. "IDLECFG,Idle Configuration" "0: 1,1: 2,2: 4,3: 8,4: 16,5: 32,6: 64,7: 128"
newline
bitfld.long 0x10 7. "LOOPS,Loop Mode Select" "0: Normal operation: RXD and TXD use separate pins,1: Loop mode or Single-Wire mode"
bitfld.long 0x10 6. "DOZEEN,Doze Mode" "0: Enable,1: Disable"
newline
bitfld.long 0x10 5. "RSRC,Receiver Source Select" "0: Internal Loopback mode,1: Single-wire mode"
bitfld.long 0x10 4. "M,9-Bit Or 8-Bit Mode Select" "0: 8-bit,1: 9-bit"
newline
bitfld.long 0x10 3. "WAKE,Receiver Wake-Up Method Select" "0: Idle,1: Mark"
bitfld.long 0x10 2. "ILT,Idle Line Type Select" "0: After the start bit,1: After the stop bit"
newline
bitfld.long 0x10 1. "PE,Parity Enable" "0: Disable,1: Enable"
bitfld.long 0x10 0. "PT,Parity Type" "0: Even parity,1: Odd parity"
line.long 0x14 "DATA,Data"
rbitfld.long 0x14 15. "NOISY,Noisy Data Received" "0: Received without noise,1: Received with noise"
rbitfld.long 0x14 14. "PARITYE,Parity Error" "0: Received without a parity error,1: Received with a parity error"
newline
bitfld.long 0x14 13. "FRETSC,Frame Error Transmit Special Character" "0: Received without a frame error on reads or..,1: Received with a frame error on reads or.."
rbitfld.long 0x14 12. "RXEMPT,Receive Buffer Empty" "0: Valid data,1: Invalid data and empty"
newline
rbitfld.long 0x14 11. "IDLINE,Idle Line" "0: Not idle,1: Idle"
rbitfld.long 0x14 10. "LINBRK,LIN Break" "0: Not detected,1: Detected"
newline
bitfld.long 0x14 9. "R9T9,Read receive FIFO bit 9 or write transmit FIFO bit 9" "0,1"
bitfld.long 0x14 8. "R8T8,Read receive FIFO bit 8 or write transmit FIFO bit 8" "0,1"
newline
bitfld.long 0x14 7. "R7T7,Read receive FIFO bit 7 or write transmit FIFO bit 7" "0,1"
bitfld.long 0x14 6. "R6T6,Read receive FIFO bit 6 or write transmit FIFO bit 6" "0,1"
newline
bitfld.long 0x14 5. "R5T5,Read receive FIFO bit 5 or write transmit FIFO bit 5" "0,1"
bitfld.long 0x14 4. "R4T4,Read receive FIFO bit 4 or write transmit FIFO bit 4" "0,1"
newline
bitfld.long 0x14 3. "R3T3,Read receive FIFO bit 3 or write transmit FIFO bit 3" "0,1"
bitfld.long 0x14 2. "R2T2,Read receive FIFO bit 2 or write transmit FIFO bit 2" "0,1"
newline
bitfld.long 0x14 1. "R1T1,Read receive FIFO bit 1 or write transmit FIFO bit 1" "0,1"
bitfld.long 0x14 0. "R0T0,Read receive FIFO bit 0 or write transmit FIFO bit 0" "0,1"
line.long 0x18 "MATCH,Match Address"
hexmask.long.word 0x18 16.--25. 1. "MA2,Match Address 2"
hexmask.long.word 0x18 0.--9. 1. "MA1,Match Address 1"
line.long 0x1C "MODIR,MODEM IrDA"
bitfld.long 0x1C 18. "IREN,IR Enable" "0: Disable,1: Enable"
bitfld.long 0x1C 16.--17. "TNP,Transmitter Narrow Pulse" "0: 1 / OSR,1: 2 / OSR,2: 3 / OSR,3: 4 / OSR"
newline
bitfld.long 0x1C 8.--9. "RTSWATER,Receive RTS Configuration" "0,1,2,3"
bitfld.long 0x1C 5. "TXCTSSRC,Transmit CTS Source" "0: The CTS_B pin,1: An internal connection to the receiver address.."
newline
bitfld.long 0x1C 4. "TXCTSC,Transmit CTS Configuration" "0: Sampled at the start of each character,1: Sampled when the transmitter is idle"
bitfld.long 0x1C 3. "RXRTSE,Receiver RTS Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x1C 2. "TXRTSPOL,Transmitter RTS Polarity" "0: Active low,1: Active high"
bitfld.long 0x1C 1. "TXRTSE,Transmitter RTS Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x1C 0. "TXCTSE,Transmitter CTS Enable" "0: Disable,1: Enable"
line.long 0x20 "FIFO,FIFO"
rbitfld.long 0x20 23. "TXEMPT,Transmit FIFO Or Buffer Empty" "0: Not empty,1: Empty"
rbitfld.long 0x20 22. "RXEMPT,Receive FIFO Or Buffer Empty" "0: Not empty,1: Empty"
newline
eventfld.long 0x20 17. "TXOF,Transmitter FIFO Overflow Flag" "0: No overflow,1: Overflow"
eventfld.long 0x20 16. "RXUF,Receiver FIFO Underflow Flag" "0: No underflow,1: Underflow"
newline
bitfld.long 0x20 15. "TXFLUSH,Transmit FIFO Flush" "0: No effect,1: All data flushed out"
bitfld.long 0x20 14. "RXFLUSH,Receive FIFO Flush" "0: No effect,1: All data flushed out"
newline
bitfld.long 0x20 10.--12. "RXIDEN,Receiver Idle Empty Enable" "0: Disable STAT[RDRF] to become 1 because of..,1: Enable STAT[RDRF] to become 1 because of..,2: Enable STAT[RDRF] to become 1 because of..,3: Enable STAT[RDRF] to become 1 because of..,4: Enable STAT[RDRF] to become 1 because of..,5: Enable STAT[RDRF] to become 1 because of..,6: Enable STAT[RDRF] to become 1 because of..,7: Enable STAT[RDRF] to become 1 because of.."
bitfld.long 0x20 9. "TXOFE,Transmit FIFO Overflow Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x20 8. "RXUFE,Receive FIFO Underflow Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x20 7. "TXFE,Transmit FIFO Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x20 4.--6. "TXFIFOSIZE,Transmit FIFO Buffer Depth" "0: 1,1: 4,2: 8,3: 16,4: 32,5: 64,6: 128,7: 256"
bitfld.long 0x20 3. "RXFE,Receive FIFO Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x20 0.--2. "RXFIFOSIZE,Receive FIFO Buffer Depth" "0: 1,1: 4,2: 8,3: 16,4: 32,5: 64,6: 128,7: 256"
line.long 0x24 "WATER,Watermark"
rbitfld.long 0x24 24.--26. "RXCOUNT,Receive Counter" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 16.--17. "RXWATER,Receive Watermark" "0,1,2,3"
newline
rbitfld.long 0x24 8.--10. "TXCOUNT,Transmit Counter" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 0.--1. "TXWATER,Transmit Watermark" "0,1,2,3"
rgroup.long 0x30++0x3
line.long 0x0 "DATARO,Data Read-Only"
hexmask.long.word 0x0 0.--15. 1. "DATA,Receive Data"
tree.end
sif (cpuis("MC?A144*"))
tree "LPUART3"
base ad:0x400A2000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Identification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size"
hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size"
group.long 0x8++0x27
line.long 0x0 "GLOBAL,Global"
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
line.long 0x4 "PINCFG,Pin Configuration"
bitfld.long 0x4 0.--1. "TRGSEL,Trigger Select" "0: Input trigger disabled,1: Input trigger used instead of the RXD pin input,2: Input trigger used instead of the CTS_B pin input,3: Input trigger used to modulate the TXD pin.."
line.long 0x8 "BAUD,Baud Rate"
bitfld.long 0x8 31. "MAEN1,Match Address Mode Enable 1" "0: Disable,1: Enable"
bitfld.long 0x8 30. "MAEN2,Match Address Mode Enable 2" "0: Disable,1: Enable"
newline
bitfld.long 0x8 29. "M10,10-Bit Mode Select" "0: Receiver and transmitter use 7-bit to 9-bit data..,1: Receiver and transmitter use 10-bit data.."
hexmask.long.byte 0x8 24.--28. 1. "OSR,Oversampling Ratio"
newline
bitfld.long 0x8 23. "TDMAE,Transmitter DMA Enable" "0: Disable,1: Enable"
bitfld.long 0x8 21. "RDMAE,Receiver Full DMA Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 20. "RIDMAE,Receiver Idle DMA Enable" "0: Disable,1: Enable"
bitfld.long 0x8 18.--19. "MATCFG,Match Configuration" "0: Address match wake-up,1: Idle match wake-up,2: Match on and match off,3: Enables RWU on data match and match on or off.."
newline
bitfld.long 0x8 17. "BOTHEDGE,Both Edge Sampling" "0: Rising edge,1: Both rising and falling edges"
bitfld.long 0x8 16. "RESYNCDIS,Resynchronization Disable" "0: Enable,1: Disable"
newline
bitfld.long 0x8 15. "LBKDIE,LIN Break Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "RXEDGIE,RX Input Active Edge Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 13. "SBNS,Stop Bit Number Select" "0: One stop bit,1: Two stop bits"
hexmask.long.word 0x8 0.--12. 1. "SBR,Baud Rate Modulo Divisor"
line.long 0xC "STAT,Status"
eventfld.long 0xC 31. "LBKDIF,LIN Break Detect Interrupt Flag" "0: Not detected,1: Detected"
eventfld.long 0xC 30. "RXEDGIF,RXD Pin Active Edge Interrupt Flag" "0: Not occurred,1: Occurred"
newline
bitfld.long 0xC 29. "MSBF,MSB First" "0: LSB,1: MSB"
bitfld.long 0xC 28. "RXINV,Receive Data Inversion" "0: Inverted,1: Not inverted"
newline
bitfld.long 0xC 27. "RWUID,Receive Wake Up Idle Detect" "0: STAT[IDLE] does not become 1,1: STAT[IDLE] becomes 1"
bitfld.long 0xC 26. "BRK13,Break Character Generation Length" "0: 9 to 13 bit times,1: 12 to 15 bit times"
newline
bitfld.long 0xC 25. "LBKDE,LIN Break Detection Enable" "0: Disable,1: Enable"
rbitfld.long 0xC 24. "RAF,Receiver Active Flag" "0: Idle waiting for a start bit,1: Receiver active (RXD pin input not idle)"
newline
rbitfld.long 0xC 23. "TDRE,Transmit Data Register Empty Flag" "0: Greater than watermark,1: Equal to or less than watermark"
rbitfld.long 0xC 22. "TC,Transmission Complete Flag" "0: Transmitter active,1: Transmitter idle"
newline
rbitfld.long 0xC 21. "RDRF,Receive Data Register Full Flag" "0: Equal to or less than watermark,1: Greater than watermark"
eventfld.long 0xC 20. "IDLE,Idle Line Flag" "0: Idle line detected,1: Idle line not detected"
newline
eventfld.long 0xC 19. "OR,Receiver Overrun Flag" "0: No overrun,1: Receive overrun (new LPUART data is lost)"
eventfld.long 0xC 18. "NF,Noise Flag" "0: No noise detected,1: Noise detected"
newline
eventfld.long 0xC 17. "FE,Framing Error Flag" "0: No framing error detected (this does not..,1: Framing error detected"
eventfld.long 0xC 16. "PF,Parity Error Flag" "0: No parity error detected,1: Parity error detected"
newline
eventfld.long 0xC 15. "MA1F,Match 1 Flag" "0: Not equal to MA1,1: Equal to MA1"
eventfld.long 0xC 14. "MA2F,Match 2 Flag" "0: Not equal to MA2,1: Equal to MA2"
newline
bitfld.long 0xC 1. "AME,Address Mark Enable" "0: Disable,1: Enable"
bitfld.long 0xC 0. "LBKFE,LIN Break Flag Enable" "0: Disable,1: Enable"
line.long 0x10 "CTRL,Control"
bitfld.long 0x10 31. "R8T9,Receive Bit 8 Transmit Bit 9" "0,1"
bitfld.long 0x10 30. "R9T8,Receive Bit 9 Transmit Bit 8" "0,1"
newline
bitfld.long 0x10 29. "TXDIR,TXD Pin Direction in Single-Wire Mode" "0: Input,1: Output"
bitfld.long 0x10 28. "TXINV,Transmit Data Inversion" "0: Not inverted,1: Inverted"
newline
bitfld.long 0x10 27. "ORIE,Overrun Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 26. "NEIE,Noise Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 25. "FEIE,Framing Error Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 24. "PEIE,Parity Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 23. "TIE,Transmit Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 22. "TCIE,Transmission Complete Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 21. "RIE,Receiver Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 20. "ILIE,Idle Line Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 19. "TE,Transmitter Enable" "0: Disable,1: Enable"
bitfld.long 0x10 18. "RE,Receiver Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 17. "RWU,Receiver Wake-Up Control" "0: Normal receiver operation,1: LPUART receiver in standby waiting for a wake-up.."
bitfld.long 0x10 16. "SBK,Send Break" "0: Normal transmitter operation,1: Queue break character(s) to be sent"
newline
bitfld.long 0x10 15. "MA1IE,Match 1 (MA1F) Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 14. "MA2IE,Match 2 (MA2F) Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 11. "M7,7-Bit Mode Select" "0: 8-bit to 10-bit,1: 7-bit"
bitfld.long 0x10 8.--10. "IDLECFG,Idle Configuration" "0: 1,1: 2,2: 4,3: 8,4: 16,5: 32,6: 64,7: 128"
newline
bitfld.long 0x10 7. "LOOPS,Loop Mode Select" "0: Normal operation: RXD and TXD use separate pins,1: Loop mode or Single-Wire mode"
bitfld.long 0x10 6. "DOZEEN,Doze Mode" "0: Enable,1: Disable"
newline
bitfld.long 0x10 5. "RSRC,Receiver Source Select" "0: Internal Loopback mode,1: Single-wire mode"
bitfld.long 0x10 4. "M,9-Bit Or 8-Bit Mode Select" "0: 8-bit,1: 9-bit"
newline
bitfld.long 0x10 3. "WAKE,Receiver Wake-Up Method Select" "0: Idle,1: Mark"
bitfld.long 0x10 2. "ILT,Idle Line Type Select" "0: After the start bit,1: After the stop bit"
newline
bitfld.long 0x10 1. "PE,Parity Enable" "0: Disable,1: Enable"
bitfld.long 0x10 0. "PT,Parity Type" "0: Even parity,1: Odd parity"
line.long 0x14 "DATA,Data"
rbitfld.long 0x14 15. "NOISY,Noisy Data Received" "0: Received without noise,1: Received with noise"
rbitfld.long 0x14 14. "PARITYE,Parity Error" "0: Received without a parity error,1: Received with a parity error"
newline
bitfld.long 0x14 13. "FRETSC,Frame Error Transmit Special Character" "0: Received without a frame error on reads or..,1: Received with a frame error on reads or.."
rbitfld.long 0x14 12. "RXEMPT,Receive Buffer Empty" "0: Valid data,1: Invalid data and empty"
newline
rbitfld.long 0x14 11. "IDLINE,Idle Line" "0: Not idle,1: Idle"
rbitfld.long 0x14 10. "LINBRK,LIN Break" "0: Not detected,1: Detected"
newline
bitfld.long 0x14 9. "R9T9,Read receive FIFO bit 9 or write transmit FIFO bit 9" "0,1"
bitfld.long 0x14 8. "R8T8,Read receive FIFO bit 8 or write transmit FIFO bit 8" "0,1"
newline
bitfld.long 0x14 7. "R7T7,Read receive FIFO bit 7 or write transmit FIFO bit 7" "0,1"
bitfld.long 0x14 6. "R6T6,Read receive FIFO bit 6 or write transmit FIFO bit 6" "0,1"
newline
bitfld.long 0x14 5. "R5T5,Read receive FIFO bit 5 or write transmit FIFO bit 5" "0,1"
bitfld.long 0x14 4. "R4T4,Read receive FIFO bit 4 or write transmit FIFO bit 4" "0,1"
newline
bitfld.long 0x14 3. "R3T3,Read receive FIFO bit 3 or write transmit FIFO bit 3" "0,1"
bitfld.long 0x14 2. "R2T2,Read receive FIFO bit 2 or write transmit FIFO bit 2" "0,1"
newline
bitfld.long 0x14 1. "R1T1,Read receive FIFO bit 1 or write transmit FIFO bit 1" "0,1"
bitfld.long 0x14 0. "R0T0,Read receive FIFO bit 0 or write transmit FIFO bit 0" "0,1"
line.long 0x18 "MATCH,Match Address"
hexmask.long.word 0x18 16.--25. 1. "MA2,Match Address 2"
hexmask.long.word 0x18 0.--9. 1. "MA1,Match Address 1"
line.long 0x1C "MODIR,MODEM IrDA"
bitfld.long 0x1C 18. "IREN,IR Enable" "0: Disable,1: Enable"
bitfld.long 0x1C 16.--17. "TNP,Transmitter Narrow Pulse" "0: 1 / OSR,1: 2 / OSR,2: 3 / OSR,3: 4 / OSR"
newline
bitfld.long 0x1C 8.--9. "RTSWATER,Receive RTS Configuration" "0,1,2,3"
bitfld.long 0x1C 5. "TXCTSSRC,Transmit CTS Source" "0: The CTS_B pin,1: An internal connection to the receiver address.."
newline
bitfld.long 0x1C 4. "TXCTSC,Transmit CTS Configuration" "0: Sampled at the start of each character,1: Sampled when the transmitter is idle"
bitfld.long 0x1C 3. "RXRTSE,Receiver RTS Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x1C 2. "TXRTSPOL,Transmitter RTS Polarity" "0: Active low,1: Active high"
bitfld.long 0x1C 1. "TXRTSE,Transmitter RTS Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x1C 0. "TXCTSE,Transmitter CTS Enable" "0: Disable,1: Enable"
line.long 0x20 "FIFO,FIFO"
rbitfld.long 0x20 23. "TXEMPT,Transmit FIFO Or Buffer Empty" "0: Not empty,1: Empty"
rbitfld.long 0x20 22. "RXEMPT,Receive FIFO Or Buffer Empty" "0: Not empty,1: Empty"
newline
eventfld.long 0x20 17. "TXOF,Transmitter FIFO Overflow Flag" "0: No overflow,1: Overflow"
eventfld.long 0x20 16. "RXUF,Receiver FIFO Underflow Flag" "0: No underflow,1: Underflow"
newline
bitfld.long 0x20 15. "TXFLUSH,Transmit FIFO Flush" "0: No effect,1: All data flushed out"
bitfld.long 0x20 14. "RXFLUSH,Receive FIFO Flush" "0: No effect,1: All data flushed out"
newline
bitfld.long 0x20 10.--12. "RXIDEN,Receiver Idle Empty Enable" "0: Disable STAT[RDRF] to become 1 because of..,1: Enable STAT[RDRF] to become 1 because of..,2: Enable STAT[RDRF] to become 1 because of..,3: Enable STAT[RDRF] to become 1 because of..,4: Enable STAT[RDRF] to become 1 because of..,5: Enable STAT[RDRF] to become 1 because of..,6: Enable STAT[RDRF] to become 1 because of..,7: Enable STAT[RDRF] to become 1 because of.."
bitfld.long 0x20 9. "TXOFE,Transmit FIFO Overflow Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x20 8. "RXUFE,Receive FIFO Underflow Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x20 7. "TXFE,Transmit FIFO Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x20 4.--6. "TXFIFOSIZE,Transmit FIFO Buffer Depth" "0: 1,1: 4,2: 8,3: 16,4: 32,5: 64,6: 128,7: 256"
bitfld.long 0x20 3. "RXFE,Receive FIFO Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x20 0.--2. "RXFIFOSIZE,Receive FIFO Buffer Depth" "0: 1,1: 4,2: 8,3: 16,4: 32,5: 64,6: 128,7: 256"
line.long 0x24 "WATER,Watermark"
rbitfld.long 0x24 24.--26. "RXCOUNT,Receive Counter" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 16.--17. "RXWATER,Receive Watermark" "0,1,2,3"
newline
rbitfld.long 0x24 8.--10. "TXCOUNT,Transmit Counter" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 0.--1. "TXWATER,Transmit Watermark" "0,1,2,3"
rgroup.long 0x30++0x3
line.long 0x0 "DATARO,Data Read-Only"
hexmask.long.word 0x0 0.--15. 1. "DATA,Receive Data"
tree.end
tree "LPUART4"
base ad:0x400A3000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Identification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size"
hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size"
group.long 0x8++0x27
line.long 0x0 "GLOBAL,Global"
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
line.long 0x4 "PINCFG,Pin Configuration"
bitfld.long 0x4 0.--1. "TRGSEL,Trigger Select" "0: Input trigger disabled,1: Input trigger used instead of the RXD pin input,2: Input trigger used instead of the CTS_B pin input,3: Input trigger used to modulate the TXD pin.."
line.long 0x8 "BAUD,Baud Rate"
bitfld.long 0x8 31. "MAEN1,Match Address Mode Enable 1" "0: Disable,1: Enable"
bitfld.long 0x8 30. "MAEN2,Match Address Mode Enable 2" "0: Disable,1: Enable"
newline
bitfld.long 0x8 29. "M10,10-Bit Mode Select" "0: Receiver and transmitter use 7-bit to 9-bit data..,1: Receiver and transmitter use 10-bit data.."
hexmask.long.byte 0x8 24.--28. 1. "OSR,Oversampling Ratio"
newline
bitfld.long 0x8 23. "TDMAE,Transmitter DMA Enable" "0: Disable,1: Enable"
bitfld.long 0x8 21. "RDMAE,Receiver Full DMA Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 20. "RIDMAE,Receiver Idle DMA Enable" "0: Disable,1: Enable"
bitfld.long 0x8 18.--19. "MATCFG,Match Configuration" "0: Address match wake-up,1: Idle match wake-up,2: Match on and match off,3: Enables RWU on data match and match on or off.."
newline
bitfld.long 0x8 17. "BOTHEDGE,Both Edge Sampling" "0: Rising edge,1: Both rising and falling edges"
bitfld.long 0x8 16. "RESYNCDIS,Resynchronization Disable" "0: Enable,1: Disable"
newline
bitfld.long 0x8 15. "LBKDIE,LIN Break Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "RXEDGIE,RX Input Active Edge Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 13. "SBNS,Stop Bit Number Select" "0: One stop bit,1: Two stop bits"
hexmask.long.word 0x8 0.--12. 1. "SBR,Baud Rate Modulo Divisor"
line.long 0xC "STAT,Status"
eventfld.long 0xC 31. "LBKDIF,LIN Break Detect Interrupt Flag" "0: Not detected,1: Detected"
eventfld.long 0xC 30. "RXEDGIF,RXD Pin Active Edge Interrupt Flag" "0: Not occurred,1: Occurred"
newline
bitfld.long 0xC 29. "MSBF,MSB First" "0: LSB,1: MSB"
bitfld.long 0xC 28. "RXINV,Receive Data Inversion" "0: Inverted,1: Not inverted"
newline
bitfld.long 0xC 27. "RWUID,Receive Wake Up Idle Detect" "0: STAT[IDLE] does not become 1,1: STAT[IDLE] becomes 1"
bitfld.long 0xC 26. "BRK13,Break Character Generation Length" "0: 9 to 13 bit times,1: 12 to 15 bit times"
newline
bitfld.long 0xC 25. "LBKDE,LIN Break Detection Enable" "0: Disable,1: Enable"
rbitfld.long 0xC 24. "RAF,Receiver Active Flag" "0: Idle waiting for a start bit,1: Receiver active (RXD pin input not idle)"
newline
rbitfld.long 0xC 23. "TDRE,Transmit Data Register Empty Flag" "0: Greater than watermark,1: Equal to or less than watermark"
rbitfld.long 0xC 22. "TC,Transmission Complete Flag" "0: Transmitter active,1: Transmitter idle"
newline
rbitfld.long 0xC 21. "RDRF,Receive Data Register Full Flag" "0: Equal to or less than watermark,1: Greater than watermark"
eventfld.long 0xC 20. "IDLE,Idle Line Flag" "0: Idle line detected,1: Idle line not detected"
newline
eventfld.long 0xC 19. "OR,Receiver Overrun Flag" "0: No overrun,1: Receive overrun (new LPUART data is lost)"
eventfld.long 0xC 18. "NF,Noise Flag" "0: No noise detected,1: Noise detected"
newline
eventfld.long 0xC 17. "FE,Framing Error Flag" "0: No framing error detected (this does not..,1: Framing error detected"
eventfld.long 0xC 16. "PF,Parity Error Flag" "0: No parity error detected,1: Parity error detected"
newline
eventfld.long 0xC 15. "MA1F,Match 1 Flag" "0: Not equal to MA1,1: Equal to MA1"
eventfld.long 0xC 14. "MA2F,Match 2 Flag" "0: Not equal to MA2,1: Equal to MA2"
newline
bitfld.long 0xC 1. "AME,Address Mark Enable" "0: Disable,1: Enable"
bitfld.long 0xC 0. "LBKFE,LIN Break Flag Enable" "0: Disable,1: Enable"
line.long 0x10 "CTRL,Control"
bitfld.long 0x10 31. "R8T9,Receive Bit 8 Transmit Bit 9" "0,1"
bitfld.long 0x10 30. "R9T8,Receive Bit 9 Transmit Bit 8" "0,1"
newline
bitfld.long 0x10 29. "TXDIR,TXD Pin Direction in Single-Wire Mode" "0: Input,1: Output"
bitfld.long 0x10 28. "TXINV,Transmit Data Inversion" "0: Not inverted,1: Inverted"
newline
bitfld.long 0x10 27. "ORIE,Overrun Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 26. "NEIE,Noise Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 25. "FEIE,Framing Error Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 24. "PEIE,Parity Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 23. "TIE,Transmit Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 22. "TCIE,Transmission Complete Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 21. "RIE,Receiver Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 20. "ILIE,Idle Line Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 19. "TE,Transmitter Enable" "0: Disable,1: Enable"
bitfld.long 0x10 18. "RE,Receiver Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 17. "RWU,Receiver Wake-Up Control" "0: Normal receiver operation,1: LPUART receiver in standby waiting for a wake-up.."
bitfld.long 0x10 16. "SBK,Send Break" "0: Normal transmitter operation,1: Queue break character(s) to be sent"
newline
bitfld.long 0x10 15. "MA1IE,Match 1 (MA1F) Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 14. "MA2IE,Match 2 (MA2F) Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 11. "M7,7-Bit Mode Select" "0: 8-bit to 10-bit,1: 7-bit"
bitfld.long 0x10 8.--10. "IDLECFG,Idle Configuration" "0: 1,1: 2,2: 4,3: 8,4: 16,5: 32,6: 64,7: 128"
newline
bitfld.long 0x10 7. "LOOPS,Loop Mode Select" "0: Normal operation: RXD and TXD use separate pins,1: Loop mode or Single-Wire mode"
bitfld.long 0x10 6. "DOZEEN,Doze Mode" "0: Enable,1: Disable"
newline
bitfld.long 0x10 5. "RSRC,Receiver Source Select" "0: Internal Loopback mode,1: Single-wire mode"
bitfld.long 0x10 4. "M,9-Bit Or 8-Bit Mode Select" "0: 8-bit,1: 9-bit"
newline
bitfld.long 0x10 3. "WAKE,Receiver Wake-Up Method Select" "0: Idle,1: Mark"
bitfld.long 0x10 2. "ILT,Idle Line Type Select" "0: After the start bit,1: After the stop bit"
newline
bitfld.long 0x10 1. "PE,Parity Enable" "0: Disable,1: Enable"
bitfld.long 0x10 0. "PT,Parity Type" "0: Even parity,1: Odd parity"
line.long 0x14 "DATA,Data"
rbitfld.long 0x14 15. "NOISY,Noisy Data Received" "0: Received without noise,1: Received with noise"
rbitfld.long 0x14 14. "PARITYE,Parity Error" "0: Received without a parity error,1: Received with a parity error"
newline
bitfld.long 0x14 13. "FRETSC,Frame Error Transmit Special Character" "0: Received without a frame error on reads or..,1: Received with a frame error on reads or.."
rbitfld.long 0x14 12. "RXEMPT,Receive Buffer Empty" "0: Valid data,1: Invalid data and empty"
newline
rbitfld.long 0x14 11. "IDLINE,Idle Line" "0: Not idle,1: Idle"
rbitfld.long 0x14 10. "LINBRK,LIN Break" "0: Not detected,1: Detected"
newline
bitfld.long 0x14 9. "R9T9,Read receive FIFO bit 9 or write transmit FIFO bit 9" "0,1"
bitfld.long 0x14 8. "R8T8,Read receive FIFO bit 8 or write transmit FIFO bit 8" "0,1"
newline
bitfld.long 0x14 7. "R7T7,Read receive FIFO bit 7 or write transmit FIFO bit 7" "0,1"
bitfld.long 0x14 6. "R6T6,Read receive FIFO bit 6 or write transmit FIFO bit 6" "0,1"
newline
bitfld.long 0x14 5. "R5T5,Read receive FIFO bit 5 or write transmit FIFO bit 5" "0,1"
bitfld.long 0x14 4. "R4T4,Read receive FIFO bit 4 or write transmit FIFO bit 4" "0,1"
newline
bitfld.long 0x14 3. "R3T3,Read receive FIFO bit 3 or write transmit FIFO bit 3" "0,1"
bitfld.long 0x14 2. "R2T2,Read receive FIFO bit 2 or write transmit FIFO bit 2" "0,1"
newline
bitfld.long 0x14 1. "R1T1,Read receive FIFO bit 1 or write transmit FIFO bit 1" "0,1"
bitfld.long 0x14 0. "R0T0,Read receive FIFO bit 0 or write transmit FIFO bit 0" "0,1"
line.long 0x18 "MATCH,Match Address"
hexmask.long.word 0x18 16.--25. 1. "MA2,Match Address 2"
hexmask.long.word 0x18 0.--9. 1. "MA1,Match Address 1"
line.long 0x1C "MODIR,MODEM IrDA"
bitfld.long 0x1C 18. "IREN,IR Enable" "0: Disable,1: Enable"
bitfld.long 0x1C 16.--17. "TNP,Transmitter Narrow Pulse" "0: 1 / OSR,1: 2 / OSR,2: 3 / OSR,3: 4 / OSR"
newline
bitfld.long 0x1C 8.--9. "RTSWATER,Receive RTS Configuration" "0,1,2,3"
bitfld.long 0x1C 5. "TXCTSSRC,Transmit CTS Source" "0: The CTS_B pin,1: An internal connection to the receiver address.."
newline
bitfld.long 0x1C 4. "TXCTSC,Transmit CTS Configuration" "0: Sampled at the start of each character,1: Sampled when the transmitter is idle"
bitfld.long 0x1C 3. "RXRTSE,Receiver RTS Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x1C 2. "TXRTSPOL,Transmitter RTS Polarity" "0: Active low,1: Active high"
bitfld.long 0x1C 1. "TXRTSE,Transmitter RTS Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x1C 0. "TXCTSE,Transmitter CTS Enable" "0: Disable,1: Enable"
line.long 0x20 "FIFO,FIFO"
rbitfld.long 0x20 23. "TXEMPT,Transmit FIFO Or Buffer Empty" "0: Not empty,1: Empty"
rbitfld.long 0x20 22. "RXEMPT,Receive FIFO Or Buffer Empty" "0: Not empty,1: Empty"
newline
eventfld.long 0x20 17. "TXOF,Transmitter FIFO Overflow Flag" "0: No overflow,1: Overflow"
eventfld.long 0x20 16. "RXUF,Receiver FIFO Underflow Flag" "0: No underflow,1: Underflow"
newline
bitfld.long 0x20 15. "TXFLUSH,Transmit FIFO Flush" "0: No effect,1: All data flushed out"
bitfld.long 0x20 14. "RXFLUSH,Receive FIFO Flush" "0: No effect,1: All data flushed out"
newline
bitfld.long 0x20 10.--12. "RXIDEN,Receiver Idle Empty Enable" "0: Disable STAT[RDRF] to become 1 because of..,1: Enable STAT[RDRF] to become 1 because of..,2: Enable STAT[RDRF] to become 1 because of..,3: Enable STAT[RDRF] to become 1 because of..,4: Enable STAT[RDRF] to become 1 because of..,5: Enable STAT[RDRF] to become 1 because of..,6: Enable STAT[RDRF] to become 1 because of..,7: Enable STAT[RDRF] to become 1 because of.."
bitfld.long 0x20 9. "TXOFE,Transmit FIFO Overflow Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x20 8. "RXUFE,Receive FIFO Underflow Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x20 7. "TXFE,Transmit FIFO Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x20 4.--6. "TXFIFOSIZE,Transmit FIFO Buffer Depth" "0: 1,1: 4,2: 8,3: 16,4: 32,5: 64,6: 128,7: 256"
bitfld.long 0x20 3. "RXFE,Receive FIFO Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x20 0.--2. "RXFIFOSIZE,Receive FIFO Buffer Depth" "0: 1,1: 4,2: 8,3: 16,4: 32,5: 64,6: 128,7: 256"
line.long 0x24 "WATER,Watermark"
rbitfld.long 0x24 24.--26. "RXCOUNT,Receive Counter" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 16.--17. "RXWATER,Receive Watermark" "0,1,2,3"
newline
rbitfld.long 0x24 8.--10. "TXCOUNT,Transmit Counter" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 0.--1. "TXWATER,Transmit Watermark" "0,1,2,3"
rgroup.long 0x30++0x3
line.long 0x0 "DATARO,Data Read-Only"
hexmask.long.word 0x0 0.--15. 1. "DATA,Receive Data"
tree.end
endif
sif (cpuis("MC?A145*"))
tree "LPUART3"
base ad:0x400A2000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Identification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size"
hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size"
group.long 0x8++0x27
line.long 0x0 "GLOBAL,Global"
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
line.long 0x4 "PINCFG,Pin Configuration"
bitfld.long 0x4 0.--1. "TRGSEL,Trigger Select" "0: Input trigger disabled,1: Input trigger used instead of the RXD pin input,2: Input trigger used instead of the CTS_B pin input,3: Input trigger used to modulate the TXD pin.."
line.long 0x8 "BAUD,Baud Rate"
bitfld.long 0x8 31. "MAEN1,Match Address Mode Enable 1" "0: Disable,1: Enable"
bitfld.long 0x8 30. "MAEN2,Match Address Mode Enable 2" "0: Disable,1: Enable"
newline
bitfld.long 0x8 29. "M10,10-Bit Mode Select" "0: Receiver and transmitter use 7-bit to 9-bit data..,1: Receiver and transmitter use 10-bit data.."
hexmask.long.byte 0x8 24.--28. 1. "OSR,Oversampling Ratio"
newline
bitfld.long 0x8 23. "TDMAE,Transmitter DMA Enable" "0: Disable,1: Enable"
bitfld.long 0x8 21. "RDMAE,Receiver Full DMA Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 20. "RIDMAE,Receiver Idle DMA Enable" "0: Disable,1: Enable"
bitfld.long 0x8 18.--19. "MATCFG,Match Configuration" "0: Address match wake-up,1: Idle match wake-up,2: Match on and match off,3: Enables RWU on data match and match on or off.."
newline
bitfld.long 0x8 17. "BOTHEDGE,Both Edge Sampling" "0: Rising edge,1: Both rising and falling edges"
bitfld.long 0x8 16. "RESYNCDIS,Resynchronization Disable" "0: Enable,1: Disable"
newline
bitfld.long 0x8 15. "LBKDIE,LIN Break Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "RXEDGIE,RX Input Active Edge Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 13. "SBNS,Stop Bit Number Select" "0: One stop bit,1: Two stop bits"
hexmask.long.word 0x8 0.--12. 1. "SBR,Baud Rate Modulo Divisor"
line.long 0xC "STAT,Status"
eventfld.long 0xC 31. "LBKDIF,LIN Break Detect Interrupt Flag" "0: Not detected,1: Detected"
eventfld.long 0xC 30. "RXEDGIF,RXD Pin Active Edge Interrupt Flag" "0: Not occurred,1: Occurred"
newline
bitfld.long 0xC 29. "MSBF,MSB First" "0: LSB,1: MSB"
bitfld.long 0xC 28. "RXINV,Receive Data Inversion" "0: Inverted,1: Not inverted"
newline
bitfld.long 0xC 27. "RWUID,Receive Wake Up Idle Detect" "0: STAT[IDLE] does not become 1,1: STAT[IDLE] becomes 1"
bitfld.long 0xC 26. "BRK13,Break Character Generation Length" "0: 9 to 13 bit times,1: 12 to 15 bit times"
newline
bitfld.long 0xC 25. "LBKDE,LIN Break Detection Enable" "0: Disable,1: Enable"
rbitfld.long 0xC 24. "RAF,Receiver Active Flag" "0: Idle waiting for a start bit,1: Receiver active (RXD pin input not idle)"
newline
rbitfld.long 0xC 23. "TDRE,Transmit Data Register Empty Flag" "0: Greater than watermark,1: Equal to or less than watermark"
rbitfld.long 0xC 22. "TC,Transmission Complete Flag" "0: Transmitter active,1: Transmitter idle"
newline
rbitfld.long 0xC 21. "RDRF,Receive Data Register Full Flag" "0: Equal to or less than watermark,1: Greater than watermark"
eventfld.long 0xC 20. "IDLE,Idle Line Flag" "0: Idle line detected,1: Idle line not detected"
newline
eventfld.long 0xC 19. "OR,Receiver Overrun Flag" "0: No overrun,1: Receive overrun (new LPUART data is lost)"
eventfld.long 0xC 18. "NF,Noise Flag" "0: No noise detected,1: Noise detected"
newline
eventfld.long 0xC 17. "FE,Framing Error Flag" "0: No framing error detected (this does not..,1: Framing error detected"
eventfld.long 0xC 16. "PF,Parity Error Flag" "0: No parity error detected,1: Parity error detected"
newline
eventfld.long 0xC 15. "MA1F,Match 1 Flag" "0: Not equal to MA1,1: Equal to MA1"
eventfld.long 0xC 14. "MA2F,Match 2 Flag" "0: Not equal to MA2,1: Equal to MA2"
newline
bitfld.long 0xC 1. "AME,Address Mark Enable" "0: Disable,1: Enable"
bitfld.long 0xC 0. "LBKFE,LIN Break Flag Enable" "0: Disable,1: Enable"
line.long 0x10 "CTRL,Control"
bitfld.long 0x10 31. "R8T9,Receive Bit 8 Transmit Bit 9" "0,1"
bitfld.long 0x10 30. "R9T8,Receive Bit 9 Transmit Bit 8" "0,1"
newline
bitfld.long 0x10 29. "TXDIR,TXD Pin Direction in Single-Wire Mode" "0: Input,1: Output"
bitfld.long 0x10 28. "TXINV,Transmit Data Inversion" "0: Not inverted,1: Inverted"
newline
bitfld.long 0x10 27. "ORIE,Overrun Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 26. "NEIE,Noise Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 25. "FEIE,Framing Error Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 24. "PEIE,Parity Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 23. "TIE,Transmit Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 22. "TCIE,Transmission Complete Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 21. "RIE,Receiver Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 20. "ILIE,Idle Line Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 19. "TE,Transmitter Enable" "0: Disable,1: Enable"
bitfld.long 0x10 18. "RE,Receiver Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 17. "RWU,Receiver Wake-Up Control" "0: Normal receiver operation,1: LPUART receiver in standby waiting for a wake-up.."
bitfld.long 0x10 16. "SBK,Send Break" "0: Normal transmitter operation,1: Queue break character(s) to be sent"
newline
bitfld.long 0x10 15. "MA1IE,Match 1 (MA1F) Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 14. "MA2IE,Match 2 (MA2F) Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 11. "M7,7-Bit Mode Select" "0: 8-bit to 10-bit,1: 7-bit"
bitfld.long 0x10 8.--10. "IDLECFG,Idle Configuration" "0: 1,1: 2,2: 4,3: 8,4: 16,5: 32,6: 64,7: 128"
newline
bitfld.long 0x10 7. "LOOPS,Loop Mode Select" "0: Normal operation: RXD and TXD use separate pins,1: Loop mode or Single-Wire mode"
bitfld.long 0x10 6. "DOZEEN,Doze Mode" "0: Enable,1: Disable"
newline
bitfld.long 0x10 5. "RSRC,Receiver Source Select" "0: Internal Loopback mode,1: Single-wire mode"
bitfld.long 0x10 4. "M,9-Bit Or 8-Bit Mode Select" "0: 8-bit,1: 9-bit"
newline
bitfld.long 0x10 3. "WAKE,Receiver Wake-Up Method Select" "0: Idle,1: Mark"
bitfld.long 0x10 2. "ILT,Idle Line Type Select" "0: After the start bit,1: After the stop bit"
newline
bitfld.long 0x10 1. "PE,Parity Enable" "0: Disable,1: Enable"
bitfld.long 0x10 0. "PT,Parity Type" "0: Even parity,1: Odd parity"
line.long 0x14 "DATA,Data"
rbitfld.long 0x14 15. "NOISY,Noisy Data Received" "0: Received without noise,1: Received with noise"
rbitfld.long 0x14 14. "PARITYE,Parity Error" "0: Received without a parity error,1: Received with a parity error"
newline
bitfld.long 0x14 13. "FRETSC,Frame Error Transmit Special Character" "0: Received without a frame error on reads or..,1: Received with a frame error on reads or.."
rbitfld.long 0x14 12. "RXEMPT,Receive Buffer Empty" "0: Valid data,1: Invalid data and empty"
newline
rbitfld.long 0x14 11. "IDLINE,Idle Line" "0: Not idle,1: Idle"
rbitfld.long 0x14 10. "LINBRK,LIN Break" "0: Not detected,1: Detected"
newline
bitfld.long 0x14 9. "R9T9,Read receive FIFO bit 9 or write transmit FIFO bit 9" "0,1"
bitfld.long 0x14 8. "R8T8,Read receive FIFO bit 8 or write transmit FIFO bit 8" "0,1"
newline
bitfld.long 0x14 7. "R7T7,Read receive FIFO bit 7 or write transmit FIFO bit 7" "0,1"
bitfld.long 0x14 6. "R6T6,Read receive FIFO bit 6 or write transmit FIFO bit 6" "0,1"
newline
bitfld.long 0x14 5. "R5T5,Read receive FIFO bit 5 or write transmit FIFO bit 5" "0,1"
bitfld.long 0x14 4. "R4T4,Read receive FIFO bit 4 or write transmit FIFO bit 4" "0,1"
newline
bitfld.long 0x14 3. "R3T3,Read receive FIFO bit 3 or write transmit FIFO bit 3" "0,1"
bitfld.long 0x14 2. "R2T2,Read receive FIFO bit 2 or write transmit FIFO bit 2" "0,1"
newline
bitfld.long 0x14 1. "R1T1,Read receive FIFO bit 1 or write transmit FIFO bit 1" "0,1"
bitfld.long 0x14 0. "R0T0,Read receive FIFO bit 0 or write transmit FIFO bit 0" "0,1"
line.long 0x18 "MATCH,Match Address"
hexmask.long.word 0x18 16.--25. 1. "MA2,Match Address 2"
hexmask.long.word 0x18 0.--9. 1. "MA1,Match Address 1"
line.long 0x1C "MODIR,MODEM IrDA"
bitfld.long 0x1C 18. "IREN,IR Enable" "0: Disable,1: Enable"
bitfld.long 0x1C 16.--17. "TNP,Transmitter Narrow Pulse" "0: 1 / OSR,1: 2 / OSR,2: 3 / OSR,3: 4 / OSR"
newline
bitfld.long 0x1C 8.--9. "RTSWATER,Receive RTS Configuration" "0,1,2,3"
bitfld.long 0x1C 5. "TXCTSSRC,Transmit CTS Source" "0: The CTS_B pin,1: An internal connection to the receiver address.."
newline
bitfld.long 0x1C 4. "TXCTSC,Transmit CTS Configuration" "0: Sampled at the start of each character,1: Sampled when the transmitter is idle"
bitfld.long 0x1C 3. "RXRTSE,Receiver RTS Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x1C 2. "TXRTSPOL,Transmitter RTS Polarity" "0: Active low,1: Active high"
bitfld.long 0x1C 1. "TXRTSE,Transmitter RTS Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x1C 0. "TXCTSE,Transmitter CTS Enable" "0: Disable,1: Enable"
line.long 0x20 "FIFO,FIFO"
rbitfld.long 0x20 23. "TXEMPT,Transmit FIFO Or Buffer Empty" "0: Not empty,1: Empty"
rbitfld.long 0x20 22. "RXEMPT,Receive FIFO Or Buffer Empty" "0: Not empty,1: Empty"
newline
eventfld.long 0x20 17. "TXOF,Transmitter FIFO Overflow Flag" "0: No overflow,1: Overflow"
eventfld.long 0x20 16. "RXUF,Receiver FIFO Underflow Flag" "0: No underflow,1: Underflow"
newline
bitfld.long 0x20 15. "TXFLUSH,Transmit FIFO Flush" "0: No effect,1: All data flushed out"
bitfld.long 0x20 14. "RXFLUSH,Receive FIFO Flush" "0: No effect,1: All data flushed out"
newline
bitfld.long 0x20 10.--12. "RXIDEN,Receiver Idle Empty Enable" "0: Disable STAT[RDRF] to become 1 because of..,1: Enable STAT[RDRF] to become 1 because of..,2: Enable STAT[RDRF] to become 1 because of..,3: Enable STAT[RDRF] to become 1 because of..,4: Enable STAT[RDRF] to become 1 because of..,5: Enable STAT[RDRF] to become 1 because of..,6: Enable STAT[RDRF] to become 1 because of..,7: Enable STAT[RDRF] to become 1 because of.."
bitfld.long 0x20 9. "TXOFE,Transmit FIFO Overflow Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x20 8. "RXUFE,Receive FIFO Underflow Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x20 7. "TXFE,Transmit FIFO Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x20 4.--6. "TXFIFOSIZE,Transmit FIFO Buffer Depth" "0: 1,1: 4,2: 8,3: 16,4: 32,5: 64,6: 128,7: 256"
bitfld.long 0x20 3. "RXFE,Receive FIFO Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x20 0.--2. "RXFIFOSIZE,Receive FIFO Buffer Depth" "0: 1,1: 4,2: 8,3: 16,4: 32,5: 64,6: 128,7: 256"
line.long 0x24 "WATER,Watermark"
rbitfld.long 0x24 24.--26. "RXCOUNT,Receive Counter" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 16.--17. "RXWATER,Receive Watermark" "0,1,2,3"
newline
rbitfld.long 0x24 8.--10. "TXCOUNT,Transmit Counter" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 0.--1. "TXWATER,Transmit Watermark" "0,1,2,3"
rgroup.long 0x30++0x3
line.long 0x0 "DATARO,Data Read-Only"
hexmask.long.word 0x0 0.--15. 1. "DATA,Receive Data"
tree.end
tree "LPUART4"
base ad:0x400A3000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Identification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size"
hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size"
group.long 0x8++0x27
line.long 0x0 "GLOBAL,Global"
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
line.long 0x4 "PINCFG,Pin Configuration"
bitfld.long 0x4 0.--1. "TRGSEL,Trigger Select" "0: Input trigger disabled,1: Input trigger used instead of the RXD pin input,2: Input trigger used instead of the CTS_B pin input,3: Input trigger used to modulate the TXD pin.."
line.long 0x8 "BAUD,Baud Rate"
bitfld.long 0x8 31. "MAEN1,Match Address Mode Enable 1" "0: Disable,1: Enable"
bitfld.long 0x8 30. "MAEN2,Match Address Mode Enable 2" "0: Disable,1: Enable"
newline
bitfld.long 0x8 29. "M10,10-Bit Mode Select" "0: Receiver and transmitter use 7-bit to 9-bit data..,1: Receiver and transmitter use 10-bit data.."
hexmask.long.byte 0x8 24.--28. 1. "OSR,Oversampling Ratio"
newline
bitfld.long 0x8 23. "TDMAE,Transmitter DMA Enable" "0: Disable,1: Enable"
bitfld.long 0x8 21. "RDMAE,Receiver Full DMA Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 20. "RIDMAE,Receiver Idle DMA Enable" "0: Disable,1: Enable"
bitfld.long 0x8 18.--19. "MATCFG,Match Configuration" "0: Address match wake-up,1: Idle match wake-up,2: Match on and match off,3: Enables RWU on data match and match on or off.."
newline
bitfld.long 0x8 17. "BOTHEDGE,Both Edge Sampling" "0: Rising edge,1: Both rising and falling edges"
bitfld.long 0x8 16. "RESYNCDIS,Resynchronization Disable" "0: Enable,1: Disable"
newline
bitfld.long 0x8 15. "LBKDIE,LIN Break Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "RXEDGIE,RX Input Active Edge Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 13. "SBNS,Stop Bit Number Select" "0: One stop bit,1: Two stop bits"
hexmask.long.word 0x8 0.--12. 1. "SBR,Baud Rate Modulo Divisor"
line.long 0xC "STAT,Status"
eventfld.long 0xC 31. "LBKDIF,LIN Break Detect Interrupt Flag" "0: Not detected,1: Detected"
eventfld.long 0xC 30. "RXEDGIF,RXD Pin Active Edge Interrupt Flag" "0: Not occurred,1: Occurred"
newline
bitfld.long 0xC 29. "MSBF,MSB First" "0: LSB,1: MSB"
bitfld.long 0xC 28. "RXINV,Receive Data Inversion" "0: Inverted,1: Not inverted"
newline
bitfld.long 0xC 27. "RWUID,Receive Wake Up Idle Detect" "0: STAT[IDLE] does not become 1,1: STAT[IDLE] becomes 1"
bitfld.long 0xC 26. "BRK13,Break Character Generation Length" "0: 9 to 13 bit times,1: 12 to 15 bit times"
newline
bitfld.long 0xC 25. "LBKDE,LIN Break Detection Enable" "0: Disable,1: Enable"
rbitfld.long 0xC 24. "RAF,Receiver Active Flag" "0: Idle waiting for a start bit,1: Receiver active (RXD pin input not idle)"
newline
rbitfld.long 0xC 23. "TDRE,Transmit Data Register Empty Flag" "0: Greater than watermark,1: Equal to or less than watermark"
rbitfld.long 0xC 22. "TC,Transmission Complete Flag" "0: Transmitter active,1: Transmitter idle"
newline
rbitfld.long 0xC 21. "RDRF,Receive Data Register Full Flag" "0: Equal to or less than watermark,1: Greater than watermark"
eventfld.long 0xC 20. "IDLE,Idle Line Flag" "0: Idle line detected,1: Idle line not detected"
newline
eventfld.long 0xC 19. "OR,Receiver Overrun Flag" "0: No overrun,1: Receive overrun (new LPUART data is lost)"
eventfld.long 0xC 18. "NF,Noise Flag" "0: No noise detected,1: Noise detected"
newline
eventfld.long 0xC 17. "FE,Framing Error Flag" "0: No framing error detected (this does not..,1: Framing error detected"
eventfld.long 0xC 16. "PF,Parity Error Flag" "0: No parity error detected,1: Parity error detected"
newline
eventfld.long 0xC 15. "MA1F,Match 1 Flag" "0: Not equal to MA1,1: Equal to MA1"
eventfld.long 0xC 14. "MA2F,Match 2 Flag" "0: Not equal to MA2,1: Equal to MA2"
newline
bitfld.long 0xC 1. "AME,Address Mark Enable" "0: Disable,1: Enable"
bitfld.long 0xC 0. "LBKFE,LIN Break Flag Enable" "0: Disable,1: Enable"
line.long 0x10 "CTRL,Control"
bitfld.long 0x10 31. "R8T9,Receive Bit 8 Transmit Bit 9" "0,1"
bitfld.long 0x10 30. "R9T8,Receive Bit 9 Transmit Bit 8" "0,1"
newline
bitfld.long 0x10 29. "TXDIR,TXD Pin Direction in Single-Wire Mode" "0: Input,1: Output"
bitfld.long 0x10 28. "TXINV,Transmit Data Inversion" "0: Not inverted,1: Inverted"
newline
bitfld.long 0x10 27. "ORIE,Overrun Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 26. "NEIE,Noise Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 25. "FEIE,Framing Error Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 24. "PEIE,Parity Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 23. "TIE,Transmit Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 22. "TCIE,Transmission Complete Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 21. "RIE,Receiver Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 20. "ILIE,Idle Line Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 19. "TE,Transmitter Enable" "0: Disable,1: Enable"
bitfld.long 0x10 18. "RE,Receiver Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 17. "RWU,Receiver Wake-Up Control" "0: Normal receiver operation,1: LPUART receiver in standby waiting for a wake-up.."
bitfld.long 0x10 16. "SBK,Send Break" "0: Normal transmitter operation,1: Queue break character(s) to be sent"
newline
bitfld.long 0x10 15. "MA1IE,Match 1 (MA1F) Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 14. "MA2IE,Match 2 (MA2F) Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 11. "M7,7-Bit Mode Select" "0: 8-bit to 10-bit,1: 7-bit"
bitfld.long 0x10 8.--10. "IDLECFG,Idle Configuration" "0: 1,1: 2,2: 4,3: 8,4: 16,5: 32,6: 64,7: 128"
newline
bitfld.long 0x10 7. "LOOPS,Loop Mode Select" "0: Normal operation: RXD and TXD use separate pins,1: Loop mode or Single-Wire mode"
bitfld.long 0x10 6. "DOZEEN,Doze Mode" "0: Enable,1: Disable"
newline
bitfld.long 0x10 5. "RSRC,Receiver Source Select" "0: Internal Loopback mode,1: Single-wire mode"
bitfld.long 0x10 4. "M,9-Bit Or 8-Bit Mode Select" "0: 8-bit,1: 9-bit"
newline
bitfld.long 0x10 3. "WAKE,Receiver Wake-Up Method Select" "0: Idle,1: Mark"
bitfld.long 0x10 2. "ILT,Idle Line Type Select" "0: After the start bit,1: After the stop bit"
newline
bitfld.long 0x10 1. "PE,Parity Enable" "0: Disable,1: Enable"
bitfld.long 0x10 0. "PT,Parity Type" "0: Even parity,1: Odd parity"
line.long 0x14 "DATA,Data"
rbitfld.long 0x14 15. "NOISY,Noisy Data Received" "0: Received without noise,1: Received with noise"
rbitfld.long 0x14 14. "PARITYE,Parity Error" "0: Received without a parity error,1: Received with a parity error"
newline
bitfld.long 0x14 13. "FRETSC,Frame Error Transmit Special Character" "0: Received without a frame error on reads or..,1: Received with a frame error on reads or.."
rbitfld.long 0x14 12. "RXEMPT,Receive Buffer Empty" "0: Valid data,1: Invalid data and empty"
newline
rbitfld.long 0x14 11. "IDLINE,Idle Line" "0: Not idle,1: Idle"
rbitfld.long 0x14 10. "LINBRK,LIN Break" "0: Not detected,1: Detected"
newline
bitfld.long 0x14 9. "R9T9,Read receive FIFO bit 9 or write transmit FIFO bit 9" "0,1"
bitfld.long 0x14 8. "R8T8,Read receive FIFO bit 8 or write transmit FIFO bit 8" "0,1"
newline
bitfld.long 0x14 7. "R7T7,Read receive FIFO bit 7 or write transmit FIFO bit 7" "0,1"
bitfld.long 0x14 6. "R6T6,Read receive FIFO bit 6 or write transmit FIFO bit 6" "0,1"
newline
bitfld.long 0x14 5. "R5T5,Read receive FIFO bit 5 or write transmit FIFO bit 5" "0,1"
bitfld.long 0x14 4. "R4T4,Read receive FIFO bit 4 or write transmit FIFO bit 4" "0,1"
newline
bitfld.long 0x14 3. "R3T3,Read receive FIFO bit 3 or write transmit FIFO bit 3" "0,1"
bitfld.long 0x14 2. "R2T2,Read receive FIFO bit 2 or write transmit FIFO bit 2" "0,1"
newline
bitfld.long 0x14 1. "R1T1,Read receive FIFO bit 1 or write transmit FIFO bit 1" "0,1"
bitfld.long 0x14 0. "R0T0,Read receive FIFO bit 0 or write transmit FIFO bit 0" "0,1"
line.long 0x18 "MATCH,Match Address"
hexmask.long.word 0x18 16.--25. 1. "MA2,Match Address 2"
hexmask.long.word 0x18 0.--9. 1. "MA1,Match Address 1"
line.long 0x1C "MODIR,MODEM IrDA"
bitfld.long 0x1C 18. "IREN,IR Enable" "0: Disable,1: Enable"
bitfld.long 0x1C 16.--17. "TNP,Transmitter Narrow Pulse" "0: 1 / OSR,1: 2 / OSR,2: 3 / OSR,3: 4 / OSR"
newline
bitfld.long 0x1C 8.--9. "RTSWATER,Receive RTS Configuration" "0,1,2,3"
bitfld.long 0x1C 5. "TXCTSSRC,Transmit CTS Source" "0: The CTS_B pin,1: An internal connection to the receiver address.."
newline
bitfld.long 0x1C 4. "TXCTSC,Transmit CTS Configuration" "0: Sampled at the start of each character,1: Sampled when the transmitter is idle"
bitfld.long 0x1C 3. "RXRTSE,Receiver RTS Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x1C 2. "TXRTSPOL,Transmitter RTS Polarity" "0: Active low,1: Active high"
bitfld.long 0x1C 1. "TXRTSE,Transmitter RTS Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x1C 0. "TXCTSE,Transmitter CTS Enable" "0: Disable,1: Enable"
line.long 0x20 "FIFO,FIFO"
rbitfld.long 0x20 23. "TXEMPT,Transmit FIFO Or Buffer Empty" "0: Not empty,1: Empty"
rbitfld.long 0x20 22. "RXEMPT,Receive FIFO Or Buffer Empty" "0: Not empty,1: Empty"
newline
eventfld.long 0x20 17. "TXOF,Transmitter FIFO Overflow Flag" "0: No overflow,1: Overflow"
eventfld.long 0x20 16. "RXUF,Receiver FIFO Underflow Flag" "0: No underflow,1: Underflow"
newline
bitfld.long 0x20 15. "TXFLUSH,Transmit FIFO Flush" "0: No effect,1: All data flushed out"
bitfld.long 0x20 14. "RXFLUSH,Receive FIFO Flush" "0: No effect,1: All data flushed out"
newline
bitfld.long 0x20 10.--12. "RXIDEN,Receiver Idle Empty Enable" "0: Disable STAT[RDRF] to become 1 because of..,1: Enable STAT[RDRF] to become 1 because of..,2: Enable STAT[RDRF] to become 1 because of..,3: Enable STAT[RDRF] to become 1 because of..,4: Enable STAT[RDRF] to become 1 because of..,5: Enable STAT[RDRF] to become 1 because of..,6: Enable STAT[RDRF] to become 1 because of..,7: Enable STAT[RDRF] to become 1 because of.."
bitfld.long 0x20 9. "TXOFE,Transmit FIFO Overflow Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x20 8. "RXUFE,Receive FIFO Underflow Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x20 7. "TXFE,Transmit FIFO Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x20 4.--6. "TXFIFOSIZE,Transmit FIFO Buffer Depth" "0: 1,1: 4,2: 8,3: 16,4: 32,5: 64,6: 128,7: 256"
bitfld.long 0x20 3. "RXFE,Receive FIFO Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x20 0.--2. "RXFIFOSIZE,Receive FIFO Buffer Depth" "0: 1,1: 4,2: 8,3: 16,4: 32,5: 64,6: 128,7: 256"
line.long 0x24 "WATER,Watermark"
rbitfld.long 0x24 24.--26. "RXCOUNT,Receive Counter" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 16.--17. "RXWATER,Receive Watermark" "0,1,2,3"
newline
rbitfld.long 0x24 8.--10. "TXCOUNT,Transmit Counter" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 0.--1. "TXWATER,Transmit Watermark" "0,1,2,3"
rgroup.long 0x30++0x3
line.long 0x0 "DATARO,Data Read-Only"
hexmask.long.word 0x0 0.--15. 1. "DATA,Receive Data"
tree.end
endif
sif (cpuis("MC?A146*"))
tree "LPUART3"
base ad:0x400A2000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Identification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size"
hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size"
group.long 0x8++0x27
line.long 0x0 "GLOBAL,Global"
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
line.long 0x4 "PINCFG,Pin Configuration"
bitfld.long 0x4 0.--1. "TRGSEL,Trigger Select" "0: Input trigger disabled,1: Input trigger used instead of the RXD pin input,2: Input trigger used instead of the CTS_B pin input,3: Input trigger used to modulate the TXD pin.."
line.long 0x8 "BAUD,Baud Rate"
bitfld.long 0x8 31. "MAEN1,Match Address Mode Enable 1" "0: Disable,1: Enable"
bitfld.long 0x8 30. "MAEN2,Match Address Mode Enable 2" "0: Disable,1: Enable"
newline
bitfld.long 0x8 29. "M10,10-Bit Mode Select" "0: Receiver and transmitter use 7-bit to 9-bit data..,1: Receiver and transmitter use 10-bit data.."
hexmask.long.byte 0x8 24.--28. 1. "OSR,Oversampling Ratio"
newline
bitfld.long 0x8 23. "TDMAE,Transmitter DMA Enable" "0: Disable,1: Enable"
bitfld.long 0x8 21. "RDMAE,Receiver Full DMA Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 20. "RIDMAE,Receiver Idle DMA Enable" "0: Disable,1: Enable"
bitfld.long 0x8 18.--19. "MATCFG,Match Configuration" "0: Address match wake-up,1: Idle match wake-up,2: Match on and match off,3: Enables RWU on data match and match on or off.."
newline
bitfld.long 0x8 17. "BOTHEDGE,Both Edge Sampling" "0: Rising edge,1: Both rising and falling edges"
bitfld.long 0x8 16. "RESYNCDIS,Resynchronization Disable" "0: Enable,1: Disable"
newline
bitfld.long 0x8 15. "LBKDIE,LIN Break Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "RXEDGIE,RX Input Active Edge Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 13. "SBNS,Stop Bit Number Select" "0: One stop bit,1: Two stop bits"
hexmask.long.word 0x8 0.--12. 1. "SBR,Baud Rate Modulo Divisor"
line.long 0xC "STAT,Status"
eventfld.long 0xC 31. "LBKDIF,LIN Break Detect Interrupt Flag" "0: Not detected,1: Detected"
eventfld.long 0xC 30. "RXEDGIF,RXD Pin Active Edge Interrupt Flag" "0: Not occurred,1: Occurred"
newline
bitfld.long 0xC 29. "MSBF,MSB First" "0: LSB,1: MSB"
bitfld.long 0xC 28. "RXINV,Receive Data Inversion" "0: Inverted,1: Not inverted"
newline
bitfld.long 0xC 27. "RWUID,Receive Wake Up Idle Detect" "0: STAT[IDLE] does not become 1,1: STAT[IDLE] becomes 1"
bitfld.long 0xC 26. "BRK13,Break Character Generation Length" "0: 9 to 13 bit times,1: 12 to 15 bit times"
newline
bitfld.long 0xC 25. "LBKDE,LIN Break Detection Enable" "0: Disable,1: Enable"
rbitfld.long 0xC 24. "RAF,Receiver Active Flag" "0: Idle waiting for a start bit,1: Receiver active (RXD pin input not idle)"
newline
rbitfld.long 0xC 23. "TDRE,Transmit Data Register Empty Flag" "0: Greater than watermark,1: Equal to or less than watermark"
rbitfld.long 0xC 22. "TC,Transmission Complete Flag" "0: Transmitter active,1: Transmitter idle"
newline
rbitfld.long 0xC 21. "RDRF,Receive Data Register Full Flag" "0: Equal to or less than watermark,1: Greater than watermark"
eventfld.long 0xC 20. "IDLE,Idle Line Flag" "0: Idle line detected,1: Idle line not detected"
newline
eventfld.long 0xC 19. "OR,Receiver Overrun Flag" "0: No overrun,1: Receive overrun (new LPUART data is lost)"
eventfld.long 0xC 18. "NF,Noise Flag" "0: No noise detected,1: Noise detected"
newline
eventfld.long 0xC 17. "FE,Framing Error Flag" "0: No framing error detected (this does not..,1: Framing error detected"
eventfld.long 0xC 16. "PF,Parity Error Flag" "0: No parity error detected,1: Parity error detected"
newline
eventfld.long 0xC 15. "MA1F,Match 1 Flag" "0: Not equal to MA1,1: Equal to MA1"
eventfld.long 0xC 14. "MA2F,Match 2 Flag" "0: Not equal to MA2,1: Equal to MA2"
newline
bitfld.long 0xC 1. "AME,Address Mark Enable" "0: Disable,1: Enable"
bitfld.long 0xC 0. "LBKFE,LIN Break Flag Enable" "0: Disable,1: Enable"
line.long 0x10 "CTRL,Control"
bitfld.long 0x10 31. "R8T9,Receive Bit 8 Transmit Bit 9" "0,1"
bitfld.long 0x10 30. "R9T8,Receive Bit 9 Transmit Bit 8" "0,1"
newline
bitfld.long 0x10 29. "TXDIR,TXD Pin Direction in Single-Wire Mode" "0: Input,1: Output"
bitfld.long 0x10 28. "TXINV,Transmit Data Inversion" "0: Not inverted,1: Inverted"
newline
bitfld.long 0x10 27. "ORIE,Overrun Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 26. "NEIE,Noise Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 25. "FEIE,Framing Error Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 24. "PEIE,Parity Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 23. "TIE,Transmit Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 22. "TCIE,Transmission Complete Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 21. "RIE,Receiver Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 20. "ILIE,Idle Line Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 19. "TE,Transmitter Enable" "0: Disable,1: Enable"
bitfld.long 0x10 18. "RE,Receiver Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 17. "RWU,Receiver Wake-Up Control" "0: Normal receiver operation,1: LPUART receiver in standby waiting for a wake-up.."
bitfld.long 0x10 16. "SBK,Send Break" "0: Normal transmitter operation,1: Queue break character(s) to be sent"
newline
bitfld.long 0x10 15. "MA1IE,Match 1 (MA1F) Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 14. "MA2IE,Match 2 (MA2F) Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 11. "M7,7-Bit Mode Select" "0: 8-bit to 10-bit,1: 7-bit"
bitfld.long 0x10 8.--10. "IDLECFG,Idle Configuration" "0: 1,1: 2,2: 4,3: 8,4: 16,5: 32,6: 64,7: 128"
newline
bitfld.long 0x10 7. "LOOPS,Loop Mode Select" "0: Normal operation: RXD and TXD use separate pins,1: Loop mode or Single-Wire mode"
bitfld.long 0x10 6. "DOZEEN,Doze Mode" "0: Enable,1: Disable"
newline
bitfld.long 0x10 5. "RSRC,Receiver Source Select" "0: Internal Loopback mode,1: Single-wire mode"
bitfld.long 0x10 4. "M,9-Bit Or 8-Bit Mode Select" "0: 8-bit,1: 9-bit"
newline
bitfld.long 0x10 3. "WAKE,Receiver Wake-Up Method Select" "0: Idle,1: Mark"
bitfld.long 0x10 2. "ILT,Idle Line Type Select" "0: After the start bit,1: After the stop bit"
newline
bitfld.long 0x10 1. "PE,Parity Enable" "0: Disable,1: Enable"
bitfld.long 0x10 0. "PT,Parity Type" "0: Even parity,1: Odd parity"
line.long 0x14 "DATA,Data"
rbitfld.long 0x14 15. "NOISY,Noisy Data Received" "0: Received without noise,1: Received with noise"
rbitfld.long 0x14 14. "PARITYE,Parity Error" "0: Received without a parity error,1: Received with a parity error"
newline
bitfld.long 0x14 13. "FRETSC,Frame Error Transmit Special Character" "0: Received without a frame error on reads or..,1: Received with a frame error on reads or.."
rbitfld.long 0x14 12. "RXEMPT,Receive Buffer Empty" "0: Valid data,1: Invalid data and empty"
newline
rbitfld.long 0x14 11. "IDLINE,Idle Line" "0: Not idle,1: Idle"
rbitfld.long 0x14 10. "LINBRK,LIN Break" "0: Not detected,1: Detected"
newline
bitfld.long 0x14 9. "R9T9,Read receive FIFO bit 9 or write transmit FIFO bit 9" "0,1"
bitfld.long 0x14 8. "R8T8,Read receive FIFO bit 8 or write transmit FIFO bit 8" "0,1"
newline
bitfld.long 0x14 7. "R7T7,Read receive FIFO bit 7 or write transmit FIFO bit 7" "0,1"
bitfld.long 0x14 6. "R6T6,Read receive FIFO bit 6 or write transmit FIFO bit 6" "0,1"
newline
bitfld.long 0x14 5. "R5T5,Read receive FIFO bit 5 or write transmit FIFO bit 5" "0,1"
bitfld.long 0x14 4. "R4T4,Read receive FIFO bit 4 or write transmit FIFO bit 4" "0,1"
newline
bitfld.long 0x14 3. "R3T3,Read receive FIFO bit 3 or write transmit FIFO bit 3" "0,1"
bitfld.long 0x14 2. "R2T2,Read receive FIFO bit 2 or write transmit FIFO bit 2" "0,1"
newline
bitfld.long 0x14 1. "R1T1,Read receive FIFO bit 1 or write transmit FIFO bit 1" "0,1"
bitfld.long 0x14 0. "R0T0,Read receive FIFO bit 0 or write transmit FIFO bit 0" "0,1"
line.long 0x18 "MATCH,Match Address"
hexmask.long.word 0x18 16.--25. 1. "MA2,Match Address 2"
hexmask.long.word 0x18 0.--9. 1. "MA1,Match Address 1"
line.long 0x1C "MODIR,MODEM IrDA"
bitfld.long 0x1C 18. "IREN,IR Enable" "0: Disable,1: Enable"
bitfld.long 0x1C 16.--17. "TNP,Transmitter Narrow Pulse" "0: 1 / OSR,1: 2 / OSR,2: 3 / OSR,3: 4 / OSR"
newline
bitfld.long 0x1C 8.--9. "RTSWATER,Receive RTS Configuration" "0,1,2,3"
bitfld.long 0x1C 5. "TXCTSSRC,Transmit CTS Source" "0: The CTS_B pin,1: An internal connection to the receiver address.."
newline
bitfld.long 0x1C 4. "TXCTSC,Transmit CTS Configuration" "0: Sampled at the start of each character,1: Sampled when the transmitter is idle"
bitfld.long 0x1C 3. "RXRTSE,Receiver RTS Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x1C 2. "TXRTSPOL,Transmitter RTS Polarity" "0: Active low,1: Active high"
bitfld.long 0x1C 1. "TXRTSE,Transmitter RTS Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x1C 0. "TXCTSE,Transmitter CTS Enable" "0: Disable,1: Enable"
line.long 0x20 "FIFO,FIFO"
rbitfld.long 0x20 23. "TXEMPT,Transmit FIFO Or Buffer Empty" "0: Not empty,1: Empty"
rbitfld.long 0x20 22. "RXEMPT,Receive FIFO Or Buffer Empty" "0: Not empty,1: Empty"
newline
eventfld.long 0x20 17. "TXOF,Transmitter FIFO Overflow Flag" "0: No overflow,1: Overflow"
eventfld.long 0x20 16. "RXUF,Receiver FIFO Underflow Flag" "0: No underflow,1: Underflow"
newline
bitfld.long 0x20 15. "TXFLUSH,Transmit FIFO Flush" "0: No effect,1: All data flushed out"
bitfld.long 0x20 14. "RXFLUSH,Receive FIFO Flush" "0: No effect,1: All data flushed out"
newline
bitfld.long 0x20 10.--12. "RXIDEN,Receiver Idle Empty Enable" "0: Disable STAT[RDRF] to become 1 because of..,1: Enable STAT[RDRF] to become 1 because of..,2: Enable STAT[RDRF] to become 1 because of..,3: Enable STAT[RDRF] to become 1 because of..,4: Enable STAT[RDRF] to become 1 because of..,5: Enable STAT[RDRF] to become 1 because of..,6: Enable STAT[RDRF] to become 1 because of..,7: Enable STAT[RDRF] to become 1 because of.."
bitfld.long 0x20 9. "TXOFE,Transmit FIFO Overflow Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x20 8. "RXUFE,Receive FIFO Underflow Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x20 7. "TXFE,Transmit FIFO Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x20 4.--6. "TXFIFOSIZE,Transmit FIFO Buffer Depth" "0: 1,1: 4,2: 8,3: 16,4: 32,5: 64,6: 128,7: 256"
bitfld.long 0x20 3. "RXFE,Receive FIFO Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x20 0.--2. "RXFIFOSIZE,Receive FIFO Buffer Depth" "0: 1,1: 4,2: 8,3: 16,4: 32,5: 64,6: 128,7: 256"
line.long 0x24 "WATER,Watermark"
rbitfld.long 0x24 24.--26. "RXCOUNT,Receive Counter" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 16.--17. "RXWATER,Receive Watermark" "0,1,2,3"
newline
rbitfld.long 0x24 8.--10. "TXCOUNT,Transmit Counter" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 0.--1. "TXWATER,Transmit Watermark" "0,1,2,3"
rgroup.long 0x30++0x3
line.long 0x0 "DATARO,Data Read-Only"
hexmask.long.word 0x0 0.--15. 1. "DATA,Receive Data"
tree.end
tree "LPUART4"
base ad:0x400A3000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Identification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size"
hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size"
group.long 0x8++0x27
line.long 0x0 "GLOBAL,Global"
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
line.long 0x4 "PINCFG,Pin Configuration"
bitfld.long 0x4 0.--1. "TRGSEL,Trigger Select" "0: Input trigger disabled,1: Input trigger used instead of the RXD pin input,2: Input trigger used instead of the CTS_B pin input,3: Input trigger used to modulate the TXD pin.."
line.long 0x8 "BAUD,Baud Rate"
bitfld.long 0x8 31. "MAEN1,Match Address Mode Enable 1" "0: Disable,1: Enable"
bitfld.long 0x8 30. "MAEN2,Match Address Mode Enable 2" "0: Disable,1: Enable"
newline
bitfld.long 0x8 29. "M10,10-Bit Mode Select" "0: Receiver and transmitter use 7-bit to 9-bit data..,1: Receiver and transmitter use 10-bit data.."
hexmask.long.byte 0x8 24.--28. 1. "OSR,Oversampling Ratio"
newline
bitfld.long 0x8 23. "TDMAE,Transmitter DMA Enable" "0: Disable,1: Enable"
bitfld.long 0x8 21. "RDMAE,Receiver Full DMA Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 20. "RIDMAE,Receiver Idle DMA Enable" "0: Disable,1: Enable"
bitfld.long 0x8 18.--19. "MATCFG,Match Configuration" "0: Address match wake-up,1: Idle match wake-up,2: Match on and match off,3: Enables RWU on data match and match on or off.."
newline
bitfld.long 0x8 17. "BOTHEDGE,Both Edge Sampling" "0: Rising edge,1: Both rising and falling edges"
bitfld.long 0x8 16. "RESYNCDIS,Resynchronization Disable" "0: Enable,1: Disable"
newline
bitfld.long 0x8 15. "LBKDIE,LIN Break Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "RXEDGIE,RX Input Active Edge Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 13. "SBNS,Stop Bit Number Select" "0: One stop bit,1: Two stop bits"
hexmask.long.word 0x8 0.--12. 1. "SBR,Baud Rate Modulo Divisor"
line.long 0xC "STAT,Status"
eventfld.long 0xC 31. "LBKDIF,LIN Break Detect Interrupt Flag" "0: Not detected,1: Detected"
eventfld.long 0xC 30. "RXEDGIF,RXD Pin Active Edge Interrupt Flag" "0: Not occurred,1: Occurred"
newline
bitfld.long 0xC 29. "MSBF,MSB First" "0: LSB,1: MSB"
bitfld.long 0xC 28. "RXINV,Receive Data Inversion" "0: Inverted,1: Not inverted"
newline
bitfld.long 0xC 27. "RWUID,Receive Wake Up Idle Detect" "0: STAT[IDLE] does not become 1,1: STAT[IDLE] becomes 1"
bitfld.long 0xC 26. "BRK13,Break Character Generation Length" "0: 9 to 13 bit times,1: 12 to 15 bit times"
newline
bitfld.long 0xC 25. "LBKDE,LIN Break Detection Enable" "0: Disable,1: Enable"
rbitfld.long 0xC 24. "RAF,Receiver Active Flag" "0: Idle waiting for a start bit,1: Receiver active (RXD pin input not idle)"
newline
rbitfld.long 0xC 23. "TDRE,Transmit Data Register Empty Flag" "0: Greater than watermark,1: Equal to or less than watermark"
rbitfld.long 0xC 22. "TC,Transmission Complete Flag" "0: Transmitter active,1: Transmitter idle"
newline
rbitfld.long 0xC 21. "RDRF,Receive Data Register Full Flag" "0: Equal to or less than watermark,1: Greater than watermark"
eventfld.long 0xC 20. "IDLE,Idle Line Flag" "0: Idle line detected,1: Idle line not detected"
newline
eventfld.long 0xC 19. "OR,Receiver Overrun Flag" "0: No overrun,1: Receive overrun (new LPUART data is lost)"
eventfld.long 0xC 18. "NF,Noise Flag" "0: No noise detected,1: Noise detected"
newline
eventfld.long 0xC 17. "FE,Framing Error Flag" "0: No framing error detected (this does not..,1: Framing error detected"
eventfld.long 0xC 16. "PF,Parity Error Flag" "0: No parity error detected,1: Parity error detected"
newline
eventfld.long 0xC 15. "MA1F,Match 1 Flag" "0: Not equal to MA1,1: Equal to MA1"
eventfld.long 0xC 14. "MA2F,Match 2 Flag" "0: Not equal to MA2,1: Equal to MA2"
newline
bitfld.long 0xC 1. "AME,Address Mark Enable" "0: Disable,1: Enable"
bitfld.long 0xC 0. "LBKFE,LIN Break Flag Enable" "0: Disable,1: Enable"
line.long 0x10 "CTRL,Control"
bitfld.long 0x10 31. "R8T9,Receive Bit 8 Transmit Bit 9" "0,1"
bitfld.long 0x10 30. "R9T8,Receive Bit 9 Transmit Bit 8" "0,1"
newline
bitfld.long 0x10 29. "TXDIR,TXD Pin Direction in Single-Wire Mode" "0: Input,1: Output"
bitfld.long 0x10 28. "TXINV,Transmit Data Inversion" "0: Not inverted,1: Inverted"
newline
bitfld.long 0x10 27. "ORIE,Overrun Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 26. "NEIE,Noise Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 25. "FEIE,Framing Error Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 24. "PEIE,Parity Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 23. "TIE,Transmit Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 22. "TCIE,Transmission Complete Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 21. "RIE,Receiver Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 20. "ILIE,Idle Line Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 19. "TE,Transmitter Enable" "0: Disable,1: Enable"
bitfld.long 0x10 18. "RE,Receiver Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 17. "RWU,Receiver Wake-Up Control" "0: Normal receiver operation,1: LPUART receiver in standby waiting for a wake-up.."
bitfld.long 0x10 16. "SBK,Send Break" "0: Normal transmitter operation,1: Queue break character(s) to be sent"
newline
bitfld.long 0x10 15. "MA1IE,Match 1 (MA1F) Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 14. "MA2IE,Match 2 (MA2F) Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 11. "M7,7-Bit Mode Select" "0: 8-bit to 10-bit,1: 7-bit"
bitfld.long 0x10 8.--10. "IDLECFG,Idle Configuration" "0: 1,1: 2,2: 4,3: 8,4: 16,5: 32,6: 64,7: 128"
newline
bitfld.long 0x10 7. "LOOPS,Loop Mode Select" "0: Normal operation: RXD and TXD use separate pins,1: Loop mode or Single-Wire mode"
bitfld.long 0x10 6. "DOZEEN,Doze Mode" "0: Enable,1: Disable"
newline
bitfld.long 0x10 5. "RSRC,Receiver Source Select" "0: Internal Loopback mode,1: Single-wire mode"
bitfld.long 0x10 4. "M,9-Bit Or 8-Bit Mode Select" "0: 8-bit,1: 9-bit"
newline
bitfld.long 0x10 3. "WAKE,Receiver Wake-Up Method Select" "0: Idle,1: Mark"
bitfld.long 0x10 2. "ILT,Idle Line Type Select" "0: After the start bit,1: After the stop bit"
newline
bitfld.long 0x10 1. "PE,Parity Enable" "0: Disable,1: Enable"
bitfld.long 0x10 0. "PT,Parity Type" "0: Even parity,1: Odd parity"
line.long 0x14 "DATA,Data"
rbitfld.long 0x14 15. "NOISY,Noisy Data Received" "0: Received without noise,1: Received with noise"
rbitfld.long 0x14 14. "PARITYE,Parity Error" "0: Received without a parity error,1: Received with a parity error"
newline
bitfld.long 0x14 13. "FRETSC,Frame Error Transmit Special Character" "0: Received without a frame error on reads or..,1: Received with a frame error on reads or.."
rbitfld.long 0x14 12. "RXEMPT,Receive Buffer Empty" "0: Valid data,1: Invalid data and empty"
newline
rbitfld.long 0x14 11. "IDLINE,Idle Line" "0: Not idle,1: Idle"
rbitfld.long 0x14 10. "LINBRK,LIN Break" "0: Not detected,1: Detected"
newline
bitfld.long 0x14 9. "R9T9,Read receive FIFO bit 9 or write transmit FIFO bit 9" "0,1"
bitfld.long 0x14 8. "R8T8,Read receive FIFO bit 8 or write transmit FIFO bit 8" "0,1"
newline
bitfld.long 0x14 7. "R7T7,Read receive FIFO bit 7 or write transmit FIFO bit 7" "0,1"
bitfld.long 0x14 6. "R6T6,Read receive FIFO bit 6 or write transmit FIFO bit 6" "0,1"
newline
bitfld.long 0x14 5. "R5T5,Read receive FIFO bit 5 or write transmit FIFO bit 5" "0,1"
bitfld.long 0x14 4. "R4T4,Read receive FIFO bit 4 or write transmit FIFO bit 4" "0,1"
newline
bitfld.long 0x14 3. "R3T3,Read receive FIFO bit 3 or write transmit FIFO bit 3" "0,1"
bitfld.long 0x14 2. "R2T2,Read receive FIFO bit 2 or write transmit FIFO bit 2" "0,1"
newline
bitfld.long 0x14 1. "R1T1,Read receive FIFO bit 1 or write transmit FIFO bit 1" "0,1"
bitfld.long 0x14 0. "R0T0,Read receive FIFO bit 0 or write transmit FIFO bit 0" "0,1"
line.long 0x18 "MATCH,Match Address"
hexmask.long.word 0x18 16.--25. 1. "MA2,Match Address 2"
hexmask.long.word 0x18 0.--9. 1. "MA1,Match Address 1"
line.long 0x1C "MODIR,MODEM IrDA"
bitfld.long 0x1C 18. "IREN,IR Enable" "0: Disable,1: Enable"
bitfld.long 0x1C 16.--17. "TNP,Transmitter Narrow Pulse" "0: 1 / OSR,1: 2 / OSR,2: 3 / OSR,3: 4 / OSR"
newline
bitfld.long 0x1C 8.--9. "RTSWATER,Receive RTS Configuration" "0,1,2,3"
bitfld.long 0x1C 5. "TXCTSSRC,Transmit CTS Source" "0: The CTS_B pin,1: An internal connection to the receiver address.."
newline
bitfld.long 0x1C 4. "TXCTSC,Transmit CTS Configuration" "0: Sampled at the start of each character,1: Sampled when the transmitter is idle"
bitfld.long 0x1C 3. "RXRTSE,Receiver RTS Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x1C 2. "TXRTSPOL,Transmitter RTS Polarity" "0: Active low,1: Active high"
bitfld.long 0x1C 1. "TXRTSE,Transmitter RTS Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x1C 0. "TXCTSE,Transmitter CTS Enable" "0: Disable,1: Enable"
line.long 0x20 "FIFO,FIFO"
rbitfld.long 0x20 23. "TXEMPT,Transmit FIFO Or Buffer Empty" "0: Not empty,1: Empty"
rbitfld.long 0x20 22. "RXEMPT,Receive FIFO Or Buffer Empty" "0: Not empty,1: Empty"
newline
eventfld.long 0x20 17. "TXOF,Transmitter FIFO Overflow Flag" "0: No overflow,1: Overflow"
eventfld.long 0x20 16. "RXUF,Receiver FIFO Underflow Flag" "0: No underflow,1: Underflow"
newline
bitfld.long 0x20 15. "TXFLUSH,Transmit FIFO Flush" "0: No effect,1: All data flushed out"
bitfld.long 0x20 14. "RXFLUSH,Receive FIFO Flush" "0: No effect,1: All data flushed out"
newline
bitfld.long 0x20 10.--12. "RXIDEN,Receiver Idle Empty Enable" "0: Disable STAT[RDRF] to become 1 because of..,1: Enable STAT[RDRF] to become 1 because of..,2: Enable STAT[RDRF] to become 1 because of..,3: Enable STAT[RDRF] to become 1 because of..,4: Enable STAT[RDRF] to become 1 because of..,5: Enable STAT[RDRF] to become 1 because of..,6: Enable STAT[RDRF] to become 1 because of..,7: Enable STAT[RDRF] to become 1 because of.."
bitfld.long 0x20 9. "TXOFE,Transmit FIFO Overflow Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x20 8. "RXUFE,Receive FIFO Underflow Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x20 7. "TXFE,Transmit FIFO Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x20 4.--6. "TXFIFOSIZE,Transmit FIFO Buffer Depth" "0: 1,1: 4,2: 8,3: 16,4: 32,5: 64,6: 128,7: 256"
bitfld.long 0x20 3. "RXFE,Receive FIFO Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x20 0.--2. "RXFIFOSIZE,Receive FIFO Buffer Depth" "0: 1,1: 4,2: 8,3: 16,4: 32,5: 64,6: 128,7: 256"
line.long 0x24 "WATER,Watermark"
rbitfld.long 0x24 24.--26. "RXCOUNT,Receive Counter" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 16.--17. "RXWATER,Receive Watermark" "0,1,2,3"
newline
rbitfld.long 0x24 8.--10. "TXCOUNT,Transmit Counter" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 0.--1. "TXWATER,Transmit Watermark" "0,1,2,3"
rgroup.long 0x30++0x3
line.long 0x0 "DATARO,Data Read-Only"
hexmask.long.word 0x0 0.--15. 1. "DATA,Receive Data"
tree.end
endif
sif (cpuis("MC?A154*"))
tree "LPUART3"
base ad:0x400A2000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Identification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size"
hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size"
group.long 0x8++0x27
line.long 0x0 "GLOBAL,Global"
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
line.long 0x4 "PINCFG,Pin Configuration"
bitfld.long 0x4 0.--1. "TRGSEL,Trigger Select" "0: Input trigger disabled,1: Input trigger used instead of the RXD pin input,2: Input trigger used instead of the CTS_B pin input,3: Input trigger used to modulate the TXD pin.."
line.long 0x8 "BAUD,Baud Rate"
bitfld.long 0x8 31. "MAEN1,Match Address Mode Enable 1" "0: Disable,1: Enable"
bitfld.long 0x8 30. "MAEN2,Match Address Mode Enable 2" "0: Disable,1: Enable"
newline
bitfld.long 0x8 29. "M10,10-Bit Mode Select" "0: Receiver and transmitter use 7-bit to 9-bit data..,1: Receiver and transmitter use 10-bit data.."
hexmask.long.byte 0x8 24.--28. 1. "OSR,Oversampling Ratio"
newline
bitfld.long 0x8 23. "TDMAE,Transmitter DMA Enable" "0: Disable,1: Enable"
bitfld.long 0x8 21. "RDMAE,Receiver Full DMA Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 20. "RIDMAE,Receiver Idle DMA Enable" "0: Disable,1: Enable"
bitfld.long 0x8 18.--19. "MATCFG,Match Configuration" "0: Address match wake-up,1: Idle match wake-up,2: Match on and match off,3: Enables RWU on data match and match on or off.."
newline
bitfld.long 0x8 17. "BOTHEDGE,Both Edge Sampling" "0: Rising edge,1: Both rising and falling edges"
bitfld.long 0x8 16. "RESYNCDIS,Resynchronization Disable" "0: Enable,1: Disable"
newline
bitfld.long 0x8 15. "LBKDIE,LIN Break Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "RXEDGIE,RX Input Active Edge Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 13. "SBNS,Stop Bit Number Select" "0: One stop bit,1: Two stop bits"
hexmask.long.word 0x8 0.--12. 1. "SBR,Baud Rate Modulo Divisor"
line.long 0xC "STAT,Status"
eventfld.long 0xC 31. "LBKDIF,LIN Break Detect Interrupt Flag" "0: Not detected,1: Detected"
eventfld.long 0xC 30. "RXEDGIF,RXD Pin Active Edge Interrupt Flag" "0: Not occurred,1: Occurred"
newline
bitfld.long 0xC 29. "MSBF,MSB First" "0: LSB,1: MSB"
bitfld.long 0xC 28. "RXINV,Receive Data Inversion" "0: Inverted,1: Not inverted"
newline
bitfld.long 0xC 27. "RWUID,Receive Wake Up Idle Detect" "0: STAT[IDLE] does not become 1,1: STAT[IDLE] becomes 1"
bitfld.long 0xC 26. "BRK13,Break Character Generation Length" "0: 9 to 13 bit times,1: 12 to 15 bit times"
newline
bitfld.long 0xC 25. "LBKDE,LIN Break Detection Enable" "0: Disable,1: Enable"
rbitfld.long 0xC 24. "RAF,Receiver Active Flag" "0: Idle waiting for a start bit,1: Receiver active (RXD pin input not idle)"
newline
rbitfld.long 0xC 23. "TDRE,Transmit Data Register Empty Flag" "0: Greater than watermark,1: Equal to or less than watermark"
rbitfld.long 0xC 22. "TC,Transmission Complete Flag" "0: Transmitter active,1: Transmitter idle"
newline
rbitfld.long 0xC 21. "RDRF,Receive Data Register Full Flag" "0: Equal to or less than watermark,1: Greater than watermark"
eventfld.long 0xC 20. "IDLE,Idle Line Flag" "0: Idle line detected,1: Idle line not detected"
newline
eventfld.long 0xC 19. "OR,Receiver Overrun Flag" "0: No overrun,1: Receive overrun (new LPUART data is lost)"
eventfld.long 0xC 18. "NF,Noise Flag" "0: No noise detected,1: Noise detected"
newline
eventfld.long 0xC 17. "FE,Framing Error Flag" "0: No framing error detected (this does not..,1: Framing error detected"
eventfld.long 0xC 16. "PF,Parity Error Flag" "0: No parity error detected,1: Parity error detected"
newline
eventfld.long 0xC 15. "MA1F,Match 1 Flag" "0: Not equal to MA1,1: Equal to MA1"
eventfld.long 0xC 14. "MA2F,Match 2 Flag" "0: Not equal to MA2,1: Equal to MA2"
newline
bitfld.long 0xC 1. "AME,Address Mark Enable" "0: Disable,1: Enable"
bitfld.long 0xC 0. "LBKFE,LIN Break Flag Enable" "0: Disable,1: Enable"
line.long 0x10 "CTRL,Control"
bitfld.long 0x10 31. "R8T9,Receive Bit 8 Transmit Bit 9" "0,1"
bitfld.long 0x10 30. "R9T8,Receive Bit 9 Transmit Bit 8" "0,1"
newline
bitfld.long 0x10 29. "TXDIR,TXD Pin Direction in Single-Wire Mode" "0: Input,1: Output"
bitfld.long 0x10 28. "TXINV,Transmit Data Inversion" "0: Not inverted,1: Inverted"
newline
bitfld.long 0x10 27. "ORIE,Overrun Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 26. "NEIE,Noise Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 25. "FEIE,Framing Error Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 24. "PEIE,Parity Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 23. "TIE,Transmit Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 22. "TCIE,Transmission Complete Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 21. "RIE,Receiver Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 20. "ILIE,Idle Line Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 19. "TE,Transmitter Enable" "0: Disable,1: Enable"
bitfld.long 0x10 18. "RE,Receiver Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 17. "RWU,Receiver Wake-Up Control" "0: Normal receiver operation,1: LPUART receiver in standby waiting for a wake-up.."
bitfld.long 0x10 16. "SBK,Send Break" "0: Normal transmitter operation,1: Queue break character(s) to be sent"
newline
bitfld.long 0x10 15. "MA1IE,Match 1 (MA1F) Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 14. "MA2IE,Match 2 (MA2F) Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 11. "M7,7-Bit Mode Select" "0: 8-bit to 10-bit,1: 7-bit"
bitfld.long 0x10 8.--10. "IDLECFG,Idle Configuration" "0: 1,1: 2,2: 4,3: 8,4: 16,5: 32,6: 64,7: 128"
newline
bitfld.long 0x10 7. "LOOPS,Loop Mode Select" "0: Normal operation: RXD and TXD use separate pins,1: Loop mode or Single-Wire mode"
bitfld.long 0x10 6. "DOZEEN,Doze Mode" "0: Enable,1: Disable"
newline
bitfld.long 0x10 5. "RSRC,Receiver Source Select" "0: Internal Loopback mode,1: Single-wire mode"
bitfld.long 0x10 4. "M,9-Bit Or 8-Bit Mode Select" "0: 8-bit,1: 9-bit"
newline
bitfld.long 0x10 3. "WAKE,Receiver Wake-Up Method Select" "0: Idle,1: Mark"
bitfld.long 0x10 2. "ILT,Idle Line Type Select" "0: After the start bit,1: After the stop bit"
newline
bitfld.long 0x10 1. "PE,Parity Enable" "0: Disable,1: Enable"
bitfld.long 0x10 0. "PT,Parity Type" "0: Even parity,1: Odd parity"
line.long 0x14 "DATA,Data"
rbitfld.long 0x14 15. "NOISY,Noisy Data Received" "0: Received without noise,1: Received with noise"
rbitfld.long 0x14 14. "PARITYE,Parity Error" "0: Received without a parity error,1: Received with a parity error"
newline
bitfld.long 0x14 13. "FRETSC,Frame Error Transmit Special Character" "0: Received without a frame error on reads or..,1: Received with a frame error on reads or.."
rbitfld.long 0x14 12. "RXEMPT,Receive Buffer Empty" "0: Valid data,1: Invalid data and empty"
newline
rbitfld.long 0x14 11. "IDLINE,Idle Line" "0: Not idle,1: Idle"
rbitfld.long 0x14 10. "LINBRK,LIN Break" "0: Not detected,1: Detected"
newline
bitfld.long 0x14 9. "R9T9,Read receive FIFO bit 9 or write transmit FIFO bit 9" "0,1"
bitfld.long 0x14 8. "R8T8,Read receive FIFO bit 8 or write transmit FIFO bit 8" "0,1"
newline
bitfld.long 0x14 7. "R7T7,Read receive FIFO bit 7 or write transmit FIFO bit 7" "0,1"
bitfld.long 0x14 6. "R6T6,Read receive FIFO bit 6 or write transmit FIFO bit 6" "0,1"
newline
bitfld.long 0x14 5. "R5T5,Read receive FIFO bit 5 or write transmit FIFO bit 5" "0,1"
bitfld.long 0x14 4. "R4T4,Read receive FIFO bit 4 or write transmit FIFO bit 4" "0,1"
newline
bitfld.long 0x14 3. "R3T3,Read receive FIFO bit 3 or write transmit FIFO bit 3" "0,1"
bitfld.long 0x14 2. "R2T2,Read receive FIFO bit 2 or write transmit FIFO bit 2" "0,1"
newline
bitfld.long 0x14 1. "R1T1,Read receive FIFO bit 1 or write transmit FIFO bit 1" "0,1"
bitfld.long 0x14 0. "R0T0,Read receive FIFO bit 0 or write transmit FIFO bit 0" "0,1"
line.long 0x18 "MATCH,Match Address"
hexmask.long.word 0x18 16.--25. 1. "MA2,Match Address 2"
hexmask.long.word 0x18 0.--9. 1. "MA1,Match Address 1"
line.long 0x1C "MODIR,MODEM IrDA"
bitfld.long 0x1C 18. "IREN,IR Enable" "0: Disable,1: Enable"
bitfld.long 0x1C 16.--17. "TNP,Transmitter Narrow Pulse" "0: 1 / OSR,1: 2 / OSR,2: 3 / OSR,3: 4 / OSR"
newline
bitfld.long 0x1C 8.--9. "RTSWATER,Receive RTS Configuration" "0,1,2,3"
bitfld.long 0x1C 5. "TXCTSSRC,Transmit CTS Source" "0: The CTS_B pin,1: An internal connection to the receiver address.."
newline
bitfld.long 0x1C 4. "TXCTSC,Transmit CTS Configuration" "0: Sampled at the start of each character,1: Sampled when the transmitter is idle"
bitfld.long 0x1C 3. "RXRTSE,Receiver RTS Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x1C 2. "TXRTSPOL,Transmitter RTS Polarity" "0: Active low,1: Active high"
bitfld.long 0x1C 1. "TXRTSE,Transmitter RTS Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x1C 0. "TXCTSE,Transmitter CTS Enable" "0: Disable,1: Enable"
line.long 0x20 "FIFO,FIFO"
rbitfld.long 0x20 23. "TXEMPT,Transmit FIFO Or Buffer Empty" "0: Not empty,1: Empty"
rbitfld.long 0x20 22. "RXEMPT,Receive FIFO Or Buffer Empty" "0: Not empty,1: Empty"
newline
eventfld.long 0x20 17. "TXOF,Transmitter FIFO Overflow Flag" "0: No overflow,1: Overflow"
eventfld.long 0x20 16. "RXUF,Receiver FIFO Underflow Flag" "0: No underflow,1: Underflow"
newline
bitfld.long 0x20 15. "TXFLUSH,Transmit FIFO Flush" "0: No effect,1: All data flushed out"
bitfld.long 0x20 14. "RXFLUSH,Receive FIFO Flush" "0: No effect,1: All data flushed out"
newline
bitfld.long 0x20 10.--12. "RXIDEN,Receiver Idle Empty Enable" "0: Disable STAT[RDRF] to become 1 because of..,1: Enable STAT[RDRF] to become 1 because of..,2: Enable STAT[RDRF] to become 1 because of..,3: Enable STAT[RDRF] to become 1 because of..,4: Enable STAT[RDRF] to become 1 because of..,5: Enable STAT[RDRF] to become 1 because of..,6: Enable STAT[RDRF] to become 1 because of..,7: Enable STAT[RDRF] to become 1 because of.."
bitfld.long 0x20 9. "TXOFE,Transmit FIFO Overflow Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x20 8. "RXUFE,Receive FIFO Underflow Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x20 7. "TXFE,Transmit FIFO Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x20 4.--6. "TXFIFOSIZE,Transmit FIFO Buffer Depth" "0: 1,1: 4,2: 8,3: 16,4: 32,5: 64,6: 128,7: 256"
bitfld.long 0x20 3. "RXFE,Receive FIFO Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x20 0.--2. "RXFIFOSIZE,Receive FIFO Buffer Depth" "0: 1,1: 4,2: 8,3: 16,4: 32,5: 64,6: 128,7: 256"
line.long 0x24 "WATER,Watermark"
rbitfld.long 0x24 24.--26. "RXCOUNT,Receive Counter" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 16.--17. "RXWATER,Receive Watermark" "0,1,2,3"
newline
rbitfld.long 0x24 8.--10. "TXCOUNT,Transmit Counter" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 0.--1. "TXWATER,Transmit Watermark" "0,1,2,3"
rgroup.long 0x30++0x3
line.long 0x0 "DATARO,Data Read-Only"
hexmask.long.word 0x0 0.--15. 1. "DATA,Receive Data"
tree.end
tree "LPUART4"
base ad:0x400A3000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Identification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size"
hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size"
group.long 0x8++0x27
line.long 0x0 "GLOBAL,Global"
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
line.long 0x4 "PINCFG,Pin Configuration"
bitfld.long 0x4 0.--1. "TRGSEL,Trigger Select" "0: Input trigger disabled,1: Input trigger used instead of the RXD pin input,2: Input trigger used instead of the CTS_B pin input,3: Input trigger used to modulate the TXD pin.."
line.long 0x8 "BAUD,Baud Rate"
bitfld.long 0x8 31. "MAEN1,Match Address Mode Enable 1" "0: Disable,1: Enable"
bitfld.long 0x8 30. "MAEN2,Match Address Mode Enable 2" "0: Disable,1: Enable"
newline
bitfld.long 0x8 29. "M10,10-Bit Mode Select" "0: Receiver and transmitter use 7-bit to 9-bit data..,1: Receiver and transmitter use 10-bit data.."
hexmask.long.byte 0x8 24.--28. 1. "OSR,Oversampling Ratio"
newline
bitfld.long 0x8 23. "TDMAE,Transmitter DMA Enable" "0: Disable,1: Enable"
bitfld.long 0x8 21. "RDMAE,Receiver Full DMA Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 20. "RIDMAE,Receiver Idle DMA Enable" "0: Disable,1: Enable"
bitfld.long 0x8 18.--19. "MATCFG,Match Configuration" "0: Address match wake-up,1: Idle match wake-up,2: Match on and match off,3: Enables RWU on data match and match on or off.."
newline
bitfld.long 0x8 17. "BOTHEDGE,Both Edge Sampling" "0: Rising edge,1: Both rising and falling edges"
bitfld.long 0x8 16. "RESYNCDIS,Resynchronization Disable" "0: Enable,1: Disable"
newline
bitfld.long 0x8 15. "LBKDIE,LIN Break Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "RXEDGIE,RX Input Active Edge Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 13. "SBNS,Stop Bit Number Select" "0: One stop bit,1: Two stop bits"
hexmask.long.word 0x8 0.--12. 1. "SBR,Baud Rate Modulo Divisor"
line.long 0xC "STAT,Status"
eventfld.long 0xC 31. "LBKDIF,LIN Break Detect Interrupt Flag" "0: Not detected,1: Detected"
eventfld.long 0xC 30. "RXEDGIF,RXD Pin Active Edge Interrupt Flag" "0: Not occurred,1: Occurred"
newline
bitfld.long 0xC 29. "MSBF,MSB First" "0: LSB,1: MSB"
bitfld.long 0xC 28. "RXINV,Receive Data Inversion" "0: Inverted,1: Not inverted"
newline
bitfld.long 0xC 27. "RWUID,Receive Wake Up Idle Detect" "0: STAT[IDLE] does not become 1,1: STAT[IDLE] becomes 1"
bitfld.long 0xC 26. "BRK13,Break Character Generation Length" "0: 9 to 13 bit times,1: 12 to 15 bit times"
newline
bitfld.long 0xC 25. "LBKDE,LIN Break Detection Enable" "0: Disable,1: Enable"
rbitfld.long 0xC 24. "RAF,Receiver Active Flag" "0: Idle waiting for a start bit,1: Receiver active (RXD pin input not idle)"
newline
rbitfld.long 0xC 23. "TDRE,Transmit Data Register Empty Flag" "0: Greater than watermark,1: Equal to or less than watermark"
rbitfld.long 0xC 22. "TC,Transmission Complete Flag" "0: Transmitter active,1: Transmitter idle"
newline
rbitfld.long 0xC 21. "RDRF,Receive Data Register Full Flag" "0: Equal to or less than watermark,1: Greater than watermark"
eventfld.long 0xC 20. "IDLE,Idle Line Flag" "0: Idle line detected,1: Idle line not detected"
newline
eventfld.long 0xC 19. "OR,Receiver Overrun Flag" "0: No overrun,1: Receive overrun (new LPUART data is lost)"
eventfld.long 0xC 18. "NF,Noise Flag" "0: No noise detected,1: Noise detected"
newline
eventfld.long 0xC 17. "FE,Framing Error Flag" "0: No framing error detected (this does not..,1: Framing error detected"
eventfld.long 0xC 16. "PF,Parity Error Flag" "0: No parity error detected,1: Parity error detected"
newline
eventfld.long 0xC 15. "MA1F,Match 1 Flag" "0: Not equal to MA1,1: Equal to MA1"
eventfld.long 0xC 14. "MA2F,Match 2 Flag" "0: Not equal to MA2,1: Equal to MA2"
newline
bitfld.long 0xC 1. "AME,Address Mark Enable" "0: Disable,1: Enable"
bitfld.long 0xC 0. "LBKFE,LIN Break Flag Enable" "0: Disable,1: Enable"
line.long 0x10 "CTRL,Control"
bitfld.long 0x10 31. "R8T9,Receive Bit 8 Transmit Bit 9" "0,1"
bitfld.long 0x10 30. "R9T8,Receive Bit 9 Transmit Bit 8" "0,1"
newline
bitfld.long 0x10 29. "TXDIR,TXD Pin Direction in Single-Wire Mode" "0: Input,1: Output"
bitfld.long 0x10 28. "TXINV,Transmit Data Inversion" "0: Not inverted,1: Inverted"
newline
bitfld.long 0x10 27. "ORIE,Overrun Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 26. "NEIE,Noise Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 25. "FEIE,Framing Error Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 24. "PEIE,Parity Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 23. "TIE,Transmit Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 22. "TCIE,Transmission Complete Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 21. "RIE,Receiver Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 20. "ILIE,Idle Line Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 19. "TE,Transmitter Enable" "0: Disable,1: Enable"
bitfld.long 0x10 18. "RE,Receiver Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 17. "RWU,Receiver Wake-Up Control" "0: Normal receiver operation,1: LPUART receiver in standby waiting for a wake-up.."
bitfld.long 0x10 16. "SBK,Send Break" "0: Normal transmitter operation,1: Queue break character(s) to be sent"
newline
bitfld.long 0x10 15. "MA1IE,Match 1 (MA1F) Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 14. "MA2IE,Match 2 (MA2F) Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 11. "M7,7-Bit Mode Select" "0: 8-bit to 10-bit,1: 7-bit"
bitfld.long 0x10 8.--10. "IDLECFG,Idle Configuration" "0: 1,1: 2,2: 4,3: 8,4: 16,5: 32,6: 64,7: 128"
newline
bitfld.long 0x10 7. "LOOPS,Loop Mode Select" "0: Normal operation: RXD and TXD use separate pins,1: Loop mode or Single-Wire mode"
bitfld.long 0x10 6. "DOZEEN,Doze Mode" "0: Enable,1: Disable"
newline
bitfld.long 0x10 5. "RSRC,Receiver Source Select" "0: Internal Loopback mode,1: Single-wire mode"
bitfld.long 0x10 4. "M,9-Bit Or 8-Bit Mode Select" "0: 8-bit,1: 9-bit"
newline
bitfld.long 0x10 3. "WAKE,Receiver Wake-Up Method Select" "0: Idle,1: Mark"
bitfld.long 0x10 2. "ILT,Idle Line Type Select" "0: After the start bit,1: After the stop bit"
newline
bitfld.long 0x10 1. "PE,Parity Enable" "0: Disable,1: Enable"
bitfld.long 0x10 0. "PT,Parity Type" "0: Even parity,1: Odd parity"
line.long 0x14 "DATA,Data"
rbitfld.long 0x14 15. "NOISY,Noisy Data Received" "0: Received without noise,1: Received with noise"
rbitfld.long 0x14 14. "PARITYE,Parity Error" "0: Received without a parity error,1: Received with a parity error"
newline
bitfld.long 0x14 13. "FRETSC,Frame Error Transmit Special Character" "0: Received without a frame error on reads or..,1: Received with a frame error on reads or.."
rbitfld.long 0x14 12. "RXEMPT,Receive Buffer Empty" "0: Valid data,1: Invalid data and empty"
newline
rbitfld.long 0x14 11. "IDLINE,Idle Line" "0: Not idle,1: Idle"
rbitfld.long 0x14 10. "LINBRK,LIN Break" "0: Not detected,1: Detected"
newline
bitfld.long 0x14 9. "R9T9,Read receive FIFO bit 9 or write transmit FIFO bit 9" "0,1"
bitfld.long 0x14 8. "R8T8,Read receive FIFO bit 8 or write transmit FIFO bit 8" "0,1"
newline
bitfld.long 0x14 7. "R7T7,Read receive FIFO bit 7 or write transmit FIFO bit 7" "0,1"
bitfld.long 0x14 6. "R6T6,Read receive FIFO bit 6 or write transmit FIFO bit 6" "0,1"
newline
bitfld.long 0x14 5. "R5T5,Read receive FIFO bit 5 or write transmit FIFO bit 5" "0,1"
bitfld.long 0x14 4. "R4T4,Read receive FIFO bit 4 or write transmit FIFO bit 4" "0,1"
newline
bitfld.long 0x14 3. "R3T3,Read receive FIFO bit 3 or write transmit FIFO bit 3" "0,1"
bitfld.long 0x14 2. "R2T2,Read receive FIFO bit 2 or write transmit FIFO bit 2" "0,1"
newline
bitfld.long 0x14 1. "R1T1,Read receive FIFO bit 1 or write transmit FIFO bit 1" "0,1"
bitfld.long 0x14 0. "R0T0,Read receive FIFO bit 0 or write transmit FIFO bit 0" "0,1"
line.long 0x18 "MATCH,Match Address"
hexmask.long.word 0x18 16.--25. 1. "MA2,Match Address 2"
hexmask.long.word 0x18 0.--9. 1. "MA1,Match Address 1"
line.long 0x1C "MODIR,MODEM IrDA"
bitfld.long 0x1C 18. "IREN,IR Enable" "0: Disable,1: Enable"
bitfld.long 0x1C 16.--17. "TNP,Transmitter Narrow Pulse" "0: 1 / OSR,1: 2 / OSR,2: 3 / OSR,3: 4 / OSR"
newline
bitfld.long 0x1C 8.--9. "RTSWATER,Receive RTS Configuration" "0,1,2,3"
bitfld.long 0x1C 5. "TXCTSSRC,Transmit CTS Source" "0: The CTS_B pin,1: An internal connection to the receiver address.."
newline
bitfld.long 0x1C 4. "TXCTSC,Transmit CTS Configuration" "0: Sampled at the start of each character,1: Sampled when the transmitter is idle"
bitfld.long 0x1C 3. "RXRTSE,Receiver RTS Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x1C 2. "TXRTSPOL,Transmitter RTS Polarity" "0: Active low,1: Active high"
bitfld.long 0x1C 1. "TXRTSE,Transmitter RTS Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x1C 0. "TXCTSE,Transmitter CTS Enable" "0: Disable,1: Enable"
line.long 0x20 "FIFO,FIFO"
rbitfld.long 0x20 23. "TXEMPT,Transmit FIFO Or Buffer Empty" "0: Not empty,1: Empty"
rbitfld.long 0x20 22. "RXEMPT,Receive FIFO Or Buffer Empty" "0: Not empty,1: Empty"
newline
eventfld.long 0x20 17. "TXOF,Transmitter FIFO Overflow Flag" "0: No overflow,1: Overflow"
eventfld.long 0x20 16. "RXUF,Receiver FIFO Underflow Flag" "0: No underflow,1: Underflow"
newline
bitfld.long 0x20 15. "TXFLUSH,Transmit FIFO Flush" "0: No effect,1: All data flushed out"
bitfld.long 0x20 14. "RXFLUSH,Receive FIFO Flush" "0: No effect,1: All data flushed out"
newline
bitfld.long 0x20 10.--12. "RXIDEN,Receiver Idle Empty Enable" "0: Disable STAT[RDRF] to become 1 because of..,1: Enable STAT[RDRF] to become 1 because of..,2: Enable STAT[RDRF] to become 1 because of..,3: Enable STAT[RDRF] to become 1 because of..,4: Enable STAT[RDRF] to become 1 because of..,5: Enable STAT[RDRF] to become 1 because of..,6: Enable STAT[RDRF] to become 1 because of..,7: Enable STAT[RDRF] to become 1 because of.."
bitfld.long 0x20 9. "TXOFE,Transmit FIFO Overflow Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x20 8. "RXUFE,Receive FIFO Underflow Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x20 7. "TXFE,Transmit FIFO Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x20 4.--6. "TXFIFOSIZE,Transmit FIFO Buffer Depth" "0: 1,1: 4,2: 8,3: 16,4: 32,5: 64,6: 128,7: 256"
bitfld.long 0x20 3. "RXFE,Receive FIFO Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x20 0.--2. "RXFIFOSIZE,Receive FIFO Buffer Depth" "0: 1,1: 4,2: 8,3: 16,4: 32,5: 64,6: 128,7: 256"
line.long 0x24 "WATER,Watermark"
rbitfld.long 0x24 24.--26. "RXCOUNT,Receive Counter" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 16.--17. "RXWATER,Receive Watermark" "0,1,2,3"
newline
rbitfld.long 0x24 8.--10. "TXCOUNT,Transmit Counter" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 0.--1. "TXWATER,Transmit Watermark" "0,1,2,3"
rgroup.long 0x30++0x3
line.long 0x0 "DATARO,Data Read-Only"
hexmask.long.word 0x0 0.--15. 1. "DATA,Receive Data"
tree.end
endif
sif (cpuis("MC?A155*"))
tree "LPUART3"
base ad:0x400A2000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Identification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size"
hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size"
group.long 0x8++0x27
line.long 0x0 "GLOBAL,Global"
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
line.long 0x4 "PINCFG,Pin Configuration"
bitfld.long 0x4 0.--1. "TRGSEL,Trigger Select" "0: Input trigger disabled,1: Input trigger used instead of the RXD pin input,2: Input trigger used instead of the CTS_B pin input,3: Input trigger used to modulate the TXD pin.."
line.long 0x8 "BAUD,Baud Rate"
bitfld.long 0x8 31. "MAEN1,Match Address Mode Enable 1" "0: Disable,1: Enable"
bitfld.long 0x8 30. "MAEN2,Match Address Mode Enable 2" "0: Disable,1: Enable"
newline
bitfld.long 0x8 29. "M10,10-Bit Mode Select" "0: Receiver and transmitter use 7-bit to 9-bit data..,1: Receiver and transmitter use 10-bit data.."
hexmask.long.byte 0x8 24.--28. 1. "OSR,Oversampling Ratio"
newline
bitfld.long 0x8 23. "TDMAE,Transmitter DMA Enable" "0: Disable,1: Enable"
bitfld.long 0x8 21. "RDMAE,Receiver Full DMA Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 20. "RIDMAE,Receiver Idle DMA Enable" "0: Disable,1: Enable"
bitfld.long 0x8 18.--19. "MATCFG,Match Configuration" "0: Address match wake-up,1: Idle match wake-up,2: Match on and match off,3: Enables RWU on data match and match on or off.."
newline
bitfld.long 0x8 17. "BOTHEDGE,Both Edge Sampling" "0: Rising edge,1: Both rising and falling edges"
bitfld.long 0x8 16. "RESYNCDIS,Resynchronization Disable" "0: Enable,1: Disable"
newline
bitfld.long 0x8 15. "LBKDIE,LIN Break Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "RXEDGIE,RX Input Active Edge Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 13. "SBNS,Stop Bit Number Select" "0: One stop bit,1: Two stop bits"
hexmask.long.word 0x8 0.--12. 1. "SBR,Baud Rate Modulo Divisor"
line.long 0xC "STAT,Status"
eventfld.long 0xC 31. "LBKDIF,LIN Break Detect Interrupt Flag" "0: Not detected,1: Detected"
eventfld.long 0xC 30. "RXEDGIF,RXD Pin Active Edge Interrupt Flag" "0: Not occurred,1: Occurred"
newline
bitfld.long 0xC 29. "MSBF,MSB First" "0: LSB,1: MSB"
bitfld.long 0xC 28. "RXINV,Receive Data Inversion" "0: Inverted,1: Not inverted"
newline
bitfld.long 0xC 27. "RWUID,Receive Wake Up Idle Detect" "0: STAT[IDLE] does not become 1,1: STAT[IDLE] becomes 1"
bitfld.long 0xC 26. "BRK13,Break Character Generation Length" "0: 9 to 13 bit times,1: 12 to 15 bit times"
newline
bitfld.long 0xC 25. "LBKDE,LIN Break Detection Enable" "0: Disable,1: Enable"
rbitfld.long 0xC 24. "RAF,Receiver Active Flag" "0: Idle waiting for a start bit,1: Receiver active (RXD pin input not idle)"
newline
rbitfld.long 0xC 23. "TDRE,Transmit Data Register Empty Flag" "0: Greater than watermark,1: Equal to or less than watermark"
rbitfld.long 0xC 22. "TC,Transmission Complete Flag" "0: Transmitter active,1: Transmitter idle"
newline
rbitfld.long 0xC 21. "RDRF,Receive Data Register Full Flag" "0: Equal to or less than watermark,1: Greater than watermark"
eventfld.long 0xC 20. "IDLE,Idle Line Flag" "0: Idle line detected,1: Idle line not detected"
newline
eventfld.long 0xC 19. "OR,Receiver Overrun Flag" "0: No overrun,1: Receive overrun (new LPUART data is lost)"
eventfld.long 0xC 18. "NF,Noise Flag" "0: No noise detected,1: Noise detected"
newline
eventfld.long 0xC 17. "FE,Framing Error Flag" "0: No framing error detected (this does not..,1: Framing error detected"
eventfld.long 0xC 16. "PF,Parity Error Flag" "0: No parity error detected,1: Parity error detected"
newline
eventfld.long 0xC 15. "MA1F,Match 1 Flag" "0: Not equal to MA1,1: Equal to MA1"
eventfld.long 0xC 14. "MA2F,Match 2 Flag" "0: Not equal to MA2,1: Equal to MA2"
newline
bitfld.long 0xC 1. "AME,Address Mark Enable" "0: Disable,1: Enable"
bitfld.long 0xC 0. "LBKFE,LIN Break Flag Enable" "0: Disable,1: Enable"
line.long 0x10 "CTRL,Control"
bitfld.long 0x10 31. "R8T9,Receive Bit 8 Transmit Bit 9" "0,1"
bitfld.long 0x10 30. "R9T8,Receive Bit 9 Transmit Bit 8" "0,1"
newline
bitfld.long 0x10 29. "TXDIR,TXD Pin Direction in Single-Wire Mode" "0: Input,1: Output"
bitfld.long 0x10 28. "TXINV,Transmit Data Inversion" "0: Not inverted,1: Inverted"
newline
bitfld.long 0x10 27. "ORIE,Overrun Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 26. "NEIE,Noise Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 25. "FEIE,Framing Error Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 24. "PEIE,Parity Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 23. "TIE,Transmit Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 22. "TCIE,Transmission Complete Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 21. "RIE,Receiver Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 20. "ILIE,Idle Line Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 19. "TE,Transmitter Enable" "0: Disable,1: Enable"
bitfld.long 0x10 18. "RE,Receiver Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 17. "RWU,Receiver Wake-Up Control" "0: Normal receiver operation,1: LPUART receiver in standby waiting for a wake-up.."
bitfld.long 0x10 16. "SBK,Send Break" "0: Normal transmitter operation,1: Queue break character(s) to be sent"
newline
bitfld.long 0x10 15. "MA1IE,Match 1 (MA1F) Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 14. "MA2IE,Match 2 (MA2F) Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 11. "M7,7-Bit Mode Select" "0: 8-bit to 10-bit,1: 7-bit"
bitfld.long 0x10 8.--10. "IDLECFG,Idle Configuration" "0: 1,1: 2,2: 4,3: 8,4: 16,5: 32,6: 64,7: 128"
newline
bitfld.long 0x10 7. "LOOPS,Loop Mode Select" "0: Normal operation: RXD and TXD use separate pins,1: Loop mode or Single-Wire mode"
bitfld.long 0x10 6. "DOZEEN,Doze Mode" "0: Enable,1: Disable"
newline
bitfld.long 0x10 5. "RSRC,Receiver Source Select" "0: Internal Loopback mode,1: Single-wire mode"
bitfld.long 0x10 4. "M,9-Bit Or 8-Bit Mode Select" "0: 8-bit,1: 9-bit"
newline
bitfld.long 0x10 3. "WAKE,Receiver Wake-Up Method Select" "0: Idle,1: Mark"
bitfld.long 0x10 2. "ILT,Idle Line Type Select" "0: After the start bit,1: After the stop bit"
newline
bitfld.long 0x10 1. "PE,Parity Enable" "0: Disable,1: Enable"
bitfld.long 0x10 0. "PT,Parity Type" "0: Even parity,1: Odd parity"
line.long 0x14 "DATA,Data"
rbitfld.long 0x14 15. "NOISY,Noisy Data Received" "0: Received without noise,1: Received with noise"
rbitfld.long 0x14 14. "PARITYE,Parity Error" "0: Received without a parity error,1: Received with a parity error"
newline
bitfld.long 0x14 13. "FRETSC,Frame Error Transmit Special Character" "0: Received without a frame error on reads or..,1: Received with a frame error on reads or.."
rbitfld.long 0x14 12. "RXEMPT,Receive Buffer Empty" "0: Valid data,1: Invalid data and empty"
newline
rbitfld.long 0x14 11. "IDLINE,Idle Line" "0: Not idle,1: Idle"
rbitfld.long 0x14 10. "LINBRK,LIN Break" "0: Not detected,1: Detected"
newline
bitfld.long 0x14 9. "R9T9,Read receive FIFO bit 9 or write transmit FIFO bit 9" "0,1"
bitfld.long 0x14 8. "R8T8,Read receive FIFO bit 8 or write transmit FIFO bit 8" "0,1"
newline
bitfld.long 0x14 7. "R7T7,Read receive FIFO bit 7 or write transmit FIFO bit 7" "0,1"
bitfld.long 0x14 6. "R6T6,Read receive FIFO bit 6 or write transmit FIFO bit 6" "0,1"
newline
bitfld.long 0x14 5. "R5T5,Read receive FIFO bit 5 or write transmit FIFO bit 5" "0,1"
bitfld.long 0x14 4. "R4T4,Read receive FIFO bit 4 or write transmit FIFO bit 4" "0,1"
newline
bitfld.long 0x14 3. "R3T3,Read receive FIFO bit 3 or write transmit FIFO bit 3" "0,1"
bitfld.long 0x14 2. "R2T2,Read receive FIFO bit 2 or write transmit FIFO bit 2" "0,1"
newline
bitfld.long 0x14 1. "R1T1,Read receive FIFO bit 1 or write transmit FIFO bit 1" "0,1"
bitfld.long 0x14 0. "R0T0,Read receive FIFO bit 0 or write transmit FIFO bit 0" "0,1"
line.long 0x18 "MATCH,Match Address"
hexmask.long.word 0x18 16.--25. 1. "MA2,Match Address 2"
hexmask.long.word 0x18 0.--9. 1. "MA1,Match Address 1"
line.long 0x1C "MODIR,MODEM IrDA"
bitfld.long 0x1C 18. "IREN,IR Enable" "0: Disable,1: Enable"
bitfld.long 0x1C 16.--17. "TNP,Transmitter Narrow Pulse" "0: 1 / OSR,1: 2 / OSR,2: 3 / OSR,3: 4 / OSR"
newline
bitfld.long 0x1C 8.--9. "RTSWATER,Receive RTS Configuration" "0,1,2,3"
bitfld.long 0x1C 5. "TXCTSSRC,Transmit CTS Source" "0: The CTS_B pin,1: An internal connection to the receiver address.."
newline
bitfld.long 0x1C 4. "TXCTSC,Transmit CTS Configuration" "0: Sampled at the start of each character,1: Sampled when the transmitter is idle"
bitfld.long 0x1C 3. "RXRTSE,Receiver RTS Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x1C 2. "TXRTSPOL,Transmitter RTS Polarity" "0: Active low,1: Active high"
bitfld.long 0x1C 1. "TXRTSE,Transmitter RTS Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x1C 0. "TXCTSE,Transmitter CTS Enable" "0: Disable,1: Enable"
line.long 0x20 "FIFO,FIFO"
rbitfld.long 0x20 23. "TXEMPT,Transmit FIFO Or Buffer Empty" "0: Not empty,1: Empty"
rbitfld.long 0x20 22. "RXEMPT,Receive FIFO Or Buffer Empty" "0: Not empty,1: Empty"
newline
eventfld.long 0x20 17. "TXOF,Transmitter FIFO Overflow Flag" "0: No overflow,1: Overflow"
eventfld.long 0x20 16. "RXUF,Receiver FIFO Underflow Flag" "0: No underflow,1: Underflow"
newline
bitfld.long 0x20 15. "TXFLUSH,Transmit FIFO Flush" "0: No effect,1: All data flushed out"
bitfld.long 0x20 14. "RXFLUSH,Receive FIFO Flush" "0: No effect,1: All data flushed out"
newline
bitfld.long 0x20 10.--12. "RXIDEN,Receiver Idle Empty Enable" "0: Disable STAT[RDRF] to become 1 because of..,1: Enable STAT[RDRF] to become 1 because of..,2: Enable STAT[RDRF] to become 1 because of..,3: Enable STAT[RDRF] to become 1 because of..,4: Enable STAT[RDRF] to become 1 because of..,5: Enable STAT[RDRF] to become 1 because of..,6: Enable STAT[RDRF] to become 1 because of..,7: Enable STAT[RDRF] to become 1 because of.."
bitfld.long 0x20 9. "TXOFE,Transmit FIFO Overflow Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x20 8. "RXUFE,Receive FIFO Underflow Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x20 7. "TXFE,Transmit FIFO Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x20 4.--6. "TXFIFOSIZE,Transmit FIFO Buffer Depth" "0: 1,1: 4,2: 8,3: 16,4: 32,5: 64,6: 128,7: 256"
bitfld.long 0x20 3. "RXFE,Receive FIFO Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x20 0.--2. "RXFIFOSIZE,Receive FIFO Buffer Depth" "0: 1,1: 4,2: 8,3: 16,4: 32,5: 64,6: 128,7: 256"
line.long 0x24 "WATER,Watermark"
rbitfld.long 0x24 24.--26. "RXCOUNT,Receive Counter" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 16.--17. "RXWATER,Receive Watermark" "0,1,2,3"
newline
rbitfld.long 0x24 8.--10. "TXCOUNT,Transmit Counter" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 0.--1. "TXWATER,Transmit Watermark" "0,1,2,3"
rgroup.long 0x30++0x3
line.long 0x0 "DATARO,Data Read-Only"
hexmask.long.word 0x0 0.--15. 1. "DATA,Receive Data"
tree.end
tree "LPUART4"
base ad:0x400A3000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Identification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size"
hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size"
group.long 0x8++0x27
line.long 0x0 "GLOBAL,Global"
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
line.long 0x4 "PINCFG,Pin Configuration"
bitfld.long 0x4 0.--1. "TRGSEL,Trigger Select" "0: Input trigger disabled,1: Input trigger used instead of the RXD pin input,2: Input trigger used instead of the CTS_B pin input,3: Input trigger used to modulate the TXD pin.."
line.long 0x8 "BAUD,Baud Rate"
bitfld.long 0x8 31. "MAEN1,Match Address Mode Enable 1" "0: Disable,1: Enable"
bitfld.long 0x8 30. "MAEN2,Match Address Mode Enable 2" "0: Disable,1: Enable"
newline
bitfld.long 0x8 29. "M10,10-Bit Mode Select" "0: Receiver and transmitter use 7-bit to 9-bit data..,1: Receiver and transmitter use 10-bit data.."
hexmask.long.byte 0x8 24.--28. 1. "OSR,Oversampling Ratio"
newline
bitfld.long 0x8 23. "TDMAE,Transmitter DMA Enable" "0: Disable,1: Enable"
bitfld.long 0x8 21. "RDMAE,Receiver Full DMA Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 20. "RIDMAE,Receiver Idle DMA Enable" "0: Disable,1: Enable"
bitfld.long 0x8 18.--19. "MATCFG,Match Configuration" "0: Address match wake-up,1: Idle match wake-up,2: Match on and match off,3: Enables RWU on data match and match on or off.."
newline
bitfld.long 0x8 17. "BOTHEDGE,Both Edge Sampling" "0: Rising edge,1: Both rising and falling edges"
bitfld.long 0x8 16. "RESYNCDIS,Resynchronization Disable" "0: Enable,1: Disable"
newline
bitfld.long 0x8 15. "LBKDIE,LIN Break Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "RXEDGIE,RX Input Active Edge Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 13. "SBNS,Stop Bit Number Select" "0: One stop bit,1: Two stop bits"
hexmask.long.word 0x8 0.--12. 1. "SBR,Baud Rate Modulo Divisor"
line.long 0xC "STAT,Status"
eventfld.long 0xC 31. "LBKDIF,LIN Break Detect Interrupt Flag" "0: Not detected,1: Detected"
eventfld.long 0xC 30. "RXEDGIF,RXD Pin Active Edge Interrupt Flag" "0: Not occurred,1: Occurred"
newline
bitfld.long 0xC 29. "MSBF,MSB First" "0: LSB,1: MSB"
bitfld.long 0xC 28. "RXINV,Receive Data Inversion" "0: Inverted,1: Not inverted"
newline
bitfld.long 0xC 27. "RWUID,Receive Wake Up Idle Detect" "0: STAT[IDLE] does not become 1,1: STAT[IDLE] becomes 1"
bitfld.long 0xC 26. "BRK13,Break Character Generation Length" "0: 9 to 13 bit times,1: 12 to 15 bit times"
newline
bitfld.long 0xC 25. "LBKDE,LIN Break Detection Enable" "0: Disable,1: Enable"
rbitfld.long 0xC 24. "RAF,Receiver Active Flag" "0: Idle waiting for a start bit,1: Receiver active (RXD pin input not idle)"
newline
rbitfld.long 0xC 23. "TDRE,Transmit Data Register Empty Flag" "0: Greater than watermark,1: Equal to or less than watermark"
rbitfld.long 0xC 22. "TC,Transmission Complete Flag" "0: Transmitter active,1: Transmitter idle"
newline
rbitfld.long 0xC 21. "RDRF,Receive Data Register Full Flag" "0: Equal to or less than watermark,1: Greater than watermark"
eventfld.long 0xC 20. "IDLE,Idle Line Flag" "0: Idle line detected,1: Idle line not detected"
newline
eventfld.long 0xC 19. "OR,Receiver Overrun Flag" "0: No overrun,1: Receive overrun (new LPUART data is lost)"
eventfld.long 0xC 18. "NF,Noise Flag" "0: No noise detected,1: Noise detected"
newline
eventfld.long 0xC 17. "FE,Framing Error Flag" "0: No framing error detected (this does not..,1: Framing error detected"
eventfld.long 0xC 16. "PF,Parity Error Flag" "0: No parity error detected,1: Parity error detected"
newline
eventfld.long 0xC 15. "MA1F,Match 1 Flag" "0: Not equal to MA1,1: Equal to MA1"
eventfld.long 0xC 14. "MA2F,Match 2 Flag" "0: Not equal to MA2,1: Equal to MA2"
newline
bitfld.long 0xC 1. "AME,Address Mark Enable" "0: Disable,1: Enable"
bitfld.long 0xC 0. "LBKFE,LIN Break Flag Enable" "0: Disable,1: Enable"
line.long 0x10 "CTRL,Control"
bitfld.long 0x10 31. "R8T9,Receive Bit 8 Transmit Bit 9" "0,1"
bitfld.long 0x10 30. "R9T8,Receive Bit 9 Transmit Bit 8" "0,1"
newline
bitfld.long 0x10 29. "TXDIR,TXD Pin Direction in Single-Wire Mode" "0: Input,1: Output"
bitfld.long 0x10 28. "TXINV,Transmit Data Inversion" "0: Not inverted,1: Inverted"
newline
bitfld.long 0x10 27. "ORIE,Overrun Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 26. "NEIE,Noise Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 25. "FEIE,Framing Error Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 24. "PEIE,Parity Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 23. "TIE,Transmit Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 22. "TCIE,Transmission Complete Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 21. "RIE,Receiver Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 20. "ILIE,Idle Line Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 19. "TE,Transmitter Enable" "0: Disable,1: Enable"
bitfld.long 0x10 18. "RE,Receiver Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 17. "RWU,Receiver Wake-Up Control" "0: Normal receiver operation,1: LPUART receiver in standby waiting for a wake-up.."
bitfld.long 0x10 16. "SBK,Send Break" "0: Normal transmitter operation,1: Queue break character(s) to be sent"
newline
bitfld.long 0x10 15. "MA1IE,Match 1 (MA1F) Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 14. "MA2IE,Match 2 (MA2F) Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 11. "M7,7-Bit Mode Select" "0: 8-bit to 10-bit,1: 7-bit"
bitfld.long 0x10 8.--10. "IDLECFG,Idle Configuration" "0: 1,1: 2,2: 4,3: 8,4: 16,5: 32,6: 64,7: 128"
newline
bitfld.long 0x10 7. "LOOPS,Loop Mode Select" "0: Normal operation: RXD and TXD use separate pins,1: Loop mode or Single-Wire mode"
bitfld.long 0x10 6. "DOZEEN,Doze Mode" "0: Enable,1: Disable"
newline
bitfld.long 0x10 5. "RSRC,Receiver Source Select" "0: Internal Loopback mode,1: Single-wire mode"
bitfld.long 0x10 4. "M,9-Bit Or 8-Bit Mode Select" "0: 8-bit,1: 9-bit"
newline
bitfld.long 0x10 3. "WAKE,Receiver Wake-Up Method Select" "0: Idle,1: Mark"
bitfld.long 0x10 2. "ILT,Idle Line Type Select" "0: After the start bit,1: After the stop bit"
newline
bitfld.long 0x10 1. "PE,Parity Enable" "0: Disable,1: Enable"
bitfld.long 0x10 0. "PT,Parity Type" "0: Even parity,1: Odd parity"
line.long 0x14 "DATA,Data"
rbitfld.long 0x14 15. "NOISY,Noisy Data Received" "0: Received without noise,1: Received with noise"
rbitfld.long 0x14 14. "PARITYE,Parity Error" "0: Received without a parity error,1: Received with a parity error"
newline
bitfld.long 0x14 13. "FRETSC,Frame Error Transmit Special Character" "0: Received without a frame error on reads or..,1: Received with a frame error on reads or.."
rbitfld.long 0x14 12. "RXEMPT,Receive Buffer Empty" "0: Valid data,1: Invalid data and empty"
newline
rbitfld.long 0x14 11. "IDLINE,Idle Line" "0: Not idle,1: Idle"
rbitfld.long 0x14 10. "LINBRK,LIN Break" "0: Not detected,1: Detected"
newline
bitfld.long 0x14 9. "R9T9,Read receive FIFO bit 9 or write transmit FIFO bit 9" "0,1"
bitfld.long 0x14 8. "R8T8,Read receive FIFO bit 8 or write transmit FIFO bit 8" "0,1"
newline
bitfld.long 0x14 7. "R7T7,Read receive FIFO bit 7 or write transmit FIFO bit 7" "0,1"
bitfld.long 0x14 6. "R6T6,Read receive FIFO bit 6 or write transmit FIFO bit 6" "0,1"
newline
bitfld.long 0x14 5. "R5T5,Read receive FIFO bit 5 or write transmit FIFO bit 5" "0,1"
bitfld.long 0x14 4. "R4T4,Read receive FIFO bit 4 or write transmit FIFO bit 4" "0,1"
newline
bitfld.long 0x14 3. "R3T3,Read receive FIFO bit 3 or write transmit FIFO bit 3" "0,1"
bitfld.long 0x14 2. "R2T2,Read receive FIFO bit 2 or write transmit FIFO bit 2" "0,1"
newline
bitfld.long 0x14 1. "R1T1,Read receive FIFO bit 1 or write transmit FIFO bit 1" "0,1"
bitfld.long 0x14 0. "R0T0,Read receive FIFO bit 0 or write transmit FIFO bit 0" "0,1"
line.long 0x18 "MATCH,Match Address"
hexmask.long.word 0x18 16.--25. 1. "MA2,Match Address 2"
hexmask.long.word 0x18 0.--9. 1. "MA1,Match Address 1"
line.long 0x1C "MODIR,MODEM IrDA"
bitfld.long 0x1C 18. "IREN,IR Enable" "0: Disable,1: Enable"
bitfld.long 0x1C 16.--17. "TNP,Transmitter Narrow Pulse" "0: 1 / OSR,1: 2 / OSR,2: 3 / OSR,3: 4 / OSR"
newline
bitfld.long 0x1C 8.--9. "RTSWATER,Receive RTS Configuration" "0,1,2,3"
bitfld.long 0x1C 5. "TXCTSSRC,Transmit CTS Source" "0: The CTS_B pin,1: An internal connection to the receiver address.."
newline
bitfld.long 0x1C 4. "TXCTSC,Transmit CTS Configuration" "0: Sampled at the start of each character,1: Sampled when the transmitter is idle"
bitfld.long 0x1C 3. "RXRTSE,Receiver RTS Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x1C 2. "TXRTSPOL,Transmitter RTS Polarity" "0: Active low,1: Active high"
bitfld.long 0x1C 1. "TXRTSE,Transmitter RTS Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x1C 0. "TXCTSE,Transmitter CTS Enable" "0: Disable,1: Enable"
line.long 0x20 "FIFO,FIFO"
rbitfld.long 0x20 23. "TXEMPT,Transmit FIFO Or Buffer Empty" "0: Not empty,1: Empty"
rbitfld.long 0x20 22. "RXEMPT,Receive FIFO Or Buffer Empty" "0: Not empty,1: Empty"
newline
eventfld.long 0x20 17. "TXOF,Transmitter FIFO Overflow Flag" "0: No overflow,1: Overflow"
eventfld.long 0x20 16. "RXUF,Receiver FIFO Underflow Flag" "0: No underflow,1: Underflow"
newline
bitfld.long 0x20 15. "TXFLUSH,Transmit FIFO Flush" "0: No effect,1: All data flushed out"
bitfld.long 0x20 14. "RXFLUSH,Receive FIFO Flush" "0: No effect,1: All data flushed out"
newline
bitfld.long 0x20 10.--12. "RXIDEN,Receiver Idle Empty Enable" "0: Disable STAT[RDRF] to become 1 because of..,1: Enable STAT[RDRF] to become 1 because of..,2: Enable STAT[RDRF] to become 1 because of..,3: Enable STAT[RDRF] to become 1 because of..,4: Enable STAT[RDRF] to become 1 because of..,5: Enable STAT[RDRF] to become 1 because of..,6: Enable STAT[RDRF] to become 1 because of..,7: Enable STAT[RDRF] to become 1 because of.."
bitfld.long 0x20 9. "TXOFE,Transmit FIFO Overflow Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x20 8. "RXUFE,Receive FIFO Underflow Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x20 7. "TXFE,Transmit FIFO Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x20 4.--6. "TXFIFOSIZE,Transmit FIFO Buffer Depth" "0: 1,1: 4,2: 8,3: 16,4: 32,5: 64,6: 128,7: 256"
bitfld.long 0x20 3. "RXFE,Receive FIFO Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x20 0.--2. "RXFIFOSIZE,Receive FIFO Buffer Depth" "0: 1,1: 4,2: 8,3: 16,4: 32,5: 64,6: 128,7: 256"
line.long 0x24 "WATER,Watermark"
rbitfld.long 0x24 24.--26. "RXCOUNT,Receive Counter" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 16.--17. "RXWATER,Receive Watermark" "0,1,2,3"
newline
rbitfld.long 0x24 8.--10. "TXCOUNT,Transmit Counter" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 0.--1. "TXWATER,Transmit Watermark" "0,1,2,3"
rgroup.long 0x30++0x3
line.long 0x0 "DATARO,Data Read-Only"
hexmask.long.word 0x0 0.--15. 1. "DATA,Receive Data"
tree.end
endif
sif (cpuis("MC?A156*"))
tree "LPUART3"
base ad:0x400A2000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Identification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size"
hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size"
group.long 0x8++0x27
line.long 0x0 "GLOBAL,Global"
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
line.long 0x4 "PINCFG,Pin Configuration"
bitfld.long 0x4 0.--1. "TRGSEL,Trigger Select" "0: Input trigger disabled,1: Input trigger used instead of the RXD pin input,2: Input trigger used instead of the CTS_B pin input,3: Input trigger used to modulate the TXD pin.."
line.long 0x8 "BAUD,Baud Rate"
bitfld.long 0x8 31. "MAEN1,Match Address Mode Enable 1" "0: Disable,1: Enable"
bitfld.long 0x8 30. "MAEN2,Match Address Mode Enable 2" "0: Disable,1: Enable"
newline
bitfld.long 0x8 29. "M10,10-Bit Mode Select" "0: Receiver and transmitter use 7-bit to 9-bit data..,1: Receiver and transmitter use 10-bit data.."
hexmask.long.byte 0x8 24.--28. 1. "OSR,Oversampling Ratio"
newline
bitfld.long 0x8 23. "TDMAE,Transmitter DMA Enable" "0: Disable,1: Enable"
bitfld.long 0x8 21. "RDMAE,Receiver Full DMA Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 20. "RIDMAE,Receiver Idle DMA Enable" "0: Disable,1: Enable"
bitfld.long 0x8 18.--19. "MATCFG,Match Configuration" "0: Address match wake-up,1: Idle match wake-up,2: Match on and match off,3: Enables RWU on data match and match on or off.."
newline
bitfld.long 0x8 17. "BOTHEDGE,Both Edge Sampling" "0: Rising edge,1: Both rising and falling edges"
bitfld.long 0x8 16. "RESYNCDIS,Resynchronization Disable" "0: Enable,1: Disable"
newline
bitfld.long 0x8 15. "LBKDIE,LIN Break Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "RXEDGIE,RX Input Active Edge Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 13. "SBNS,Stop Bit Number Select" "0: One stop bit,1: Two stop bits"
hexmask.long.word 0x8 0.--12. 1. "SBR,Baud Rate Modulo Divisor"
line.long 0xC "STAT,Status"
eventfld.long 0xC 31. "LBKDIF,LIN Break Detect Interrupt Flag" "0: Not detected,1: Detected"
eventfld.long 0xC 30. "RXEDGIF,RXD Pin Active Edge Interrupt Flag" "0: Not occurred,1: Occurred"
newline
bitfld.long 0xC 29. "MSBF,MSB First" "0: LSB,1: MSB"
bitfld.long 0xC 28. "RXINV,Receive Data Inversion" "0: Inverted,1: Not inverted"
newline
bitfld.long 0xC 27. "RWUID,Receive Wake Up Idle Detect" "0: STAT[IDLE] does not become 1,1: STAT[IDLE] becomes 1"
bitfld.long 0xC 26. "BRK13,Break Character Generation Length" "0: 9 to 13 bit times,1: 12 to 15 bit times"
newline
bitfld.long 0xC 25. "LBKDE,LIN Break Detection Enable" "0: Disable,1: Enable"
rbitfld.long 0xC 24. "RAF,Receiver Active Flag" "0: Idle waiting for a start bit,1: Receiver active (RXD pin input not idle)"
newline
rbitfld.long 0xC 23. "TDRE,Transmit Data Register Empty Flag" "0: Greater than watermark,1: Equal to or less than watermark"
rbitfld.long 0xC 22. "TC,Transmission Complete Flag" "0: Transmitter active,1: Transmitter idle"
newline
rbitfld.long 0xC 21. "RDRF,Receive Data Register Full Flag" "0: Equal to or less than watermark,1: Greater than watermark"
eventfld.long 0xC 20. "IDLE,Idle Line Flag" "0: Idle line detected,1: Idle line not detected"
newline
eventfld.long 0xC 19. "OR,Receiver Overrun Flag" "0: No overrun,1: Receive overrun (new LPUART data is lost)"
eventfld.long 0xC 18. "NF,Noise Flag" "0: No noise detected,1: Noise detected"
newline
eventfld.long 0xC 17. "FE,Framing Error Flag" "0: No framing error detected (this does not..,1: Framing error detected"
eventfld.long 0xC 16. "PF,Parity Error Flag" "0: No parity error detected,1: Parity error detected"
newline
eventfld.long 0xC 15. "MA1F,Match 1 Flag" "0: Not equal to MA1,1: Equal to MA1"
eventfld.long 0xC 14. "MA2F,Match 2 Flag" "0: Not equal to MA2,1: Equal to MA2"
newline
bitfld.long 0xC 1. "AME,Address Mark Enable" "0: Disable,1: Enable"
bitfld.long 0xC 0. "LBKFE,LIN Break Flag Enable" "0: Disable,1: Enable"
line.long 0x10 "CTRL,Control"
bitfld.long 0x10 31. "R8T9,Receive Bit 8 Transmit Bit 9" "0,1"
bitfld.long 0x10 30. "R9T8,Receive Bit 9 Transmit Bit 8" "0,1"
newline
bitfld.long 0x10 29. "TXDIR,TXD Pin Direction in Single-Wire Mode" "0: Input,1: Output"
bitfld.long 0x10 28. "TXINV,Transmit Data Inversion" "0: Not inverted,1: Inverted"
newline
bitfld.long 0x10 27. "ORIE,Overrun Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 26. "NEIE,Noise Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 25. "FEIE,Framing Error Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 24. "PEIE,Parity Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 23. "TIE,Transmit Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 22. "TCIE,Transmission Complete Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 21. "RIE,Receiver Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 20. "ILIE,Idle Line Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 19. "TE,Transmitter Enable" "0: Disable,1: Enable"
bitfld.long 0x10 18. "RE,Receiver Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 17. "RWU,Receiver Wake-Up Control" "0: Normal receiver operation,1: LPUART receiver in standby waiting for a wake-up.."
bitfld.long 0x10 16. "SBK,Send Break" "0: Normal transmitter operation,1: Queue break character(s) to be sent"
newline
bitfld.long 0x10 15. "MA1IE,Match 1 (MA1F) Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 14. "MA2IE,Match 2 (MA2F) Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 11. "M7,7-Bit Mode Select" "0: 8-bit to 10-bit,1: 7-bit"
bitfld.long 0x10 8.--10. "IDLECFG,Idle Configuration" "0: 1,1: 2,2: 4,3: 8,4: 16,5: 32,6: 64,7: 128"
newline
bitfld.long 0x10 7. "LOOPS,Loop Mode Select" "0: Normal operation: RXD and TXD use separate pins,1: Loop mode or Single-Wire mode"
bitfld.long 0x10 6. "DOZEEN,Doze Mode" "0: Enable,1: Disable"
newline
bitfld.long 0x10 5. "RSRC,Receiver Source Select" "0: Internal Loopback mode,1: Single-wire mode"
bitfld.long 0x10 4. "M,9-Bit Or 8-Bit Mode Select" "0: 8-bit,1: 9-bit"
newline
bitfld.long 0x10 3. "WAKE,Receiver Wake-Up Method Select" "0: Idle,1: Mark"
bitfld.long 0x10 2. "ILT,Idle Line Type Select" "0: After the start bit,1: After the stop bit"
newline
bitfld.long 0x10 1. "PE,Parity Enable" "0: Disable,1: Enable"
bitfld.long 0x10 0. "PT,Parity Type" "0: Even parity,1: Odd parity"
line.long 0x14 "DATA,Data"
rbitfld.long 0x14 15. "NOISY,Noisy Data Received" "0: Received without noise,1: Received with noise"
rbitfld.long 0x14 14. "PARITYE,Parity Error" "0: Received without a parity error,1: Received with a parity error"
newline
bitfld.long 0x14 13. "FRETSC,Frame Error Transmit Special Character" "0: Received without a frame error on reads or..,1: Received with a frame error on reads or.."
rbitfld.long 0x14 12. "RXEMPT,Receive Buffer Empty" "0: Valid data,1: Invalid data and empty"
newline
rbitfld.long 0x14 11. "IDLINE,Idle Line" "0: Not idle,1: Idle"
rbitfld.long 0x14 10. "LINBRK,LIN Break" "0: Not detected,1: Detected"
newline
bitfld.long 0x14 9. "R9T9,Read receive FIFO bit 9 or write transmit FIFO bit 9" "0,1"
bitfld.long 0x14 8. "R8T8,Read receive FIFO bit 8 or write transmit FIFO bit 8" "0,1"
newline
bitfld.long 0x14 7. "R7T7,Read receive FIFO bit 7 or write transmit FIFO bit 7" "0,1"
bitfld.long 0x14 6. "R6T6,Read receive FIFO bit 6 or write transmit FIFO bit 6" "0,1"
newline
bitfld.long 0x14 5. "R5T5,Read receive FIFO bit 5 or write transmit FIFO bit 5" "0,1"
bitfld.long 0x14 4. "R4T4,Read receive FIFO bit 4 or write transmit FIFO bit 4" "0,1"
newline
bitfld.long 0x14 3. "R3T3,Read receive FIFO bit 3 or write transmit FIFO bit 3" "0,1"
bitfld.long 0x14 2. "R2T2,Read receive FIFO bit 2 or write transmit FIFO bit 2" "0,1"
newline
bitfld.long 0x14 1. "R1T1,Read receive FIFO bit 1 or write transmit FIFO bit 1" "0,1"
bitfld.long 0x14 0. "R0T0,Read receive FIFO bit 0 or write transmit FIFO bit 0" "0,1"
line.long 0x18 "MATCH,Match Address"
hexmask.long.word 0x18 16.--25. 1. "MA2,Match Address 2"
hexmask.long.word 0x18 0.--9. 1. "MA1,Match Address 1"
line.long 0x1C "MODIR,MODEM IrDA"
bitfld.long 0x1C 18. "IREN,IR Enable" "0: Disable,1: Enable"
bitfld.long 0x1C 16.--17. "TNP,Transmitter Narrow Pulse" "0: 1 / OSR,1: 2 / OSR,2: 3 / OSR,3: 4 / OSR"
newline
bitfld.long 0x1C 8.--9. "RTSWATER,Receive RTS Configuration" "0,1,2,3"
bitfld.long 0x1C 5. "TXCTSSRC,Transmit CTS Source" "0: The CTS_B pin,1: An internal connection to the receiver address.."
newline
bitfld.long 0x1C 4. "TXCTSC,Transmit CTS Configuration" "0: Sampled at the start of each character,1: Sampled when the transmitter is idle"
bitfld.long 0x1C 3. "RXRTSE,Receiver RTS Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x1C 2. "TXRTSPOL,Transmitter RTS Polarity" "0: Active low,1: Active high"
bitfld.long 0x1C 1. "TXRTSE,Transmitter RTS Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x1C 0. "TXCTSE,Transmitter CTS Enable" "0: Disable,1: Enable"
line.long 0x20 "FIFO,FIFO"
rbitfld.long 0x20 23. "TXEMPT,Transmit FIFO Or Buffer Empty" "0: Not empty,1: Empty"
rbitfld.long 0x20 22. "RXEMPT,Receive FIFO Or Buffer Empty" "0: Not empty,1: Empty"
newline
eventfld.long 0x20 17. "TXOF,Transmitter FIFO Overflow Flag" "0: No overflow,1: Overflow"
eventfld.long 0x20 16. "RXUF,Receiver FIFO Underflow Flag" "0: No underflow,1: Underflow"
newline
bitfld.long 0x20 15. "TXFLUSH,Transmit FIFO Flush" "0: No effect,1: All data flushed out"
bitfld.long 0x20 14. "RXFLUSH,Receive FIFO Flush" "0: No effect,1: All data flushed out"
newline
bitfld.long 0x20 10.--12. "RXIDEN,Receiver Idle Empty Enable" "0: Disable STAT[RDRF] to become 1 because of..,1: Enable STAT[RDRF] to become 1 because of..,2: Enable STAT[RDRF] to become 1 because of..,3: Enable STAT[RDRF] to become 1 because of..,4: Enable STAT[RDRF] to become 1 because of..,5: Enable STAT[RDRF] to become 1 because of..,6: Enable STAT[RDRF] to become 1 because of..,7: Enable STAT[RDRF] to become 1 because of.."
bitfld.long 0x20 9. "TXOFE,Transmit FIFO Overflow Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x20 8. "RXUFE,Receive FIFO Underflow Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x20 7. "TXFE,Transmit FIFO Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x20 4.--6. "TXFIFOSIZE,Transmit FIFO Buffer Depth" "0: 1,1: 4,2: 8,3: 16,4: 32,5: 64,6: 128,7: 256"
bitfld.long 0x20 3. "RXFE,Receive FIFO Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x20 0.--2. "RXFIFOSIZE,Receive FIFO Buffer Depth" "0: 1,1: 4,2: 8,3: 16,4: 32,5: 64,6: 128,7: 256"
line.long 0x24 "WATER,Watermark"
rbitfld.long 0x24 24.--26. "RXCOUNT,Receive Counter" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 16.--17. "RXWATER,Receive Watermark" "0,1,2,3"
newline
rbitfld.long 0x24 8.--10. "TXCOUNT,Transmit Counter" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 0.--1. "TXWATER,Transmit Watermark" "0,1,2,3"
rgroup.long 0x30++0x3
line.long 0x0 "DATARO,Data Read-Only"
hexmask.long.word 0x0 0.--15. 1. "DATA,Receive Data"
tree.end
tree "LPUART4"
base ad:0x400A3000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Identification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size"
hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size"
group.long 0x8++0x27
line.long 0x0 "GLOBAL,Global"
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
line.long 0x4 "PINCFG,Pin Configuration"
bitfld.long 0x4 0.--1. "TRGSEL,Trigger Select" "0: Input trigger disabled,1: Input trigger used instead of the RXD pin input,2: Input trigger used instead of the CTS_B pin input,3: Input trigger used to modulate the TXD pin.."
line.long 0x8 "BAUD,Baud Rate"
bitfld.long 0x8 31. "MAEN1,Match Address Mode Enable 1" "0: Disable,1: Enable"
bitfld.long 0x8 30. "MAEN2,Match Address Mode Enable 2" "0: Disable,1: Enable"
newline
bitfld.long 0x8 29. "M10,10-Bit Mode Select" "0: Receiver and transmitter use 7-bit to 9-bit data..,1: Receiver and transmitter use 10-bit data.."
hexmask.long.byte 0x8 24.--28. 1. "OSR,Oversampling Ratio"
newline
bitfld.long 0x8 23. "TDMAE,Transmitter DMA Enable" "0: Disable,1: Enable"
bitfld.long 0x8 21. "RDMAE,Receiver Full DMA Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 20. "RIDMAE,Receiver Idle DMA Enable" "0: Disable,1: Enable"
bitfld.long 0x8 18.--19. "MATCFG,Match Configuration" "0: Address match wake-up,1: Idle match wake-up,2: Match on and match off,3: Enables RWU on data match and match on or off.."
newline
bitfld.long 0x8 17. "BOTHEDGE,Both Edge Sampling" "0: Rising edge,1: Both rising and falling edges"
bitfld.long 0x8 16. "RESYNCDIS,Resynchronization Disable" "0: Enable,1: Disable"
newline
bitfld.long 0x8 15. "LBKDIE,LIN Break Detect Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x8 14. "RXEDGIE,RX Input Active Edge Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 13. "SBNS,Stop Bit Number Select" "0: One stop bit,1: Two stop bits"
hexmask.long.word 0x8 0.--12. 1. "SBR,Baud Rate Modulo Divisor"
line.long 0xC "STAT,Status"
eventfld.long 0xC 31. "LBKDIF,LIN Break Detect Interrupt Flag" "0: Not detected,1: Detected"
eventfld.long 0xC 30. "RXEDGIF,RXD Pin Active Edge Interrupt Flag" "0: Not occurred,1: Occurred"
newline
bitfld.long 0xC 29. "MSBF,MSB First" "0: LSB,1: MSB"
bitfld.long 0xC 28. "RXINV,Receive Data Inversion" "0: Inverted,1: Not inverted"
newline
bitfld.long 0xC 27. "RWUID,Receive Wake Up Idle Detect" "0: STAT[IDLE] does not become 1,1: STAT[IDLE] becomes 1"
bitfld.long 0xC 26. "BRK13,Break Character Generation Length" "0: 9 to 13 bit times,1: 12 to 15 bit times"
newline
bitfld.long 0xC 25. "LBKDE,LIN Break Detection Enable" "0: Disable,1: Enable"
rbitfld.long 0xC 24. "RAF,Receiver Active Flag" "0: Idle waiting for a start bit,1: Receiver active (RXD pin input not idle)"
newline
rbitfld.long 0xC 23. "TDRE,Transmit Data Register Empty Flag" "0: Greater than watermark,1: Equal to or less than watermark"
rbitfld.long 0xC 22. "TC,Transmission Complete Flag" "0: Transmitter active,1: Transmitter idle"
newline
rbitfld.long 0xC 21. "RDRF,Receive Data Register Full Flag" "0: Equal to or less than watermark,1: Greater than watermark"
eventfld.long 0xC 20. "IDLE,Idle Line Flag" "0: Idle line detected,1: Idle line not detected"
newline
eventfld.long 0xC 19. "OR,Receiver Overrun Flag" "0: No overrun,1: Receive overrun (new LPUART data is lost)"
eventfld.long 0xC 18. "NF,Noise Flag" "0: No noise detected,1: Noise detected"
newline
eventfld.long 0xC 17. "FE,Framing Error Flag" "0: No framing error detected (this does not..,1: Framing error detected"
eventfld.long 0xC 16. "PF,Parity Error Flag" "0: No parity error detected,1: Parity error detected"
newline
eventfld.long 0xC 15. "MA1F,Match 1 Flag" "0: Not equal to MA1,1: Equal to MA1"
eventfld.long 0xC 14. "MA2F,Match 2 Flag" "0: Not equal to MA2,1: Equal to MA2"
newline
bitfld.long 0xC 1. "AME,Address Mark Enable" "0: Disable,1: Enable"
bitfld.long 0xC 0. "LBKFE,LIN Break Flag Enable" "0: Disable,1: Enable"
line.long 0x10 "CTRL,Control"
bitfld.long 0x10 31. "R8T9,Receive Bit 8 Transmit Bit 9" "0,1"
bitfld.long 0x10 30. "R9T8,Receive Bit 9 Transmit Bit 8" "0,1"
newline
bitfld.long 0x10 29. "TXDIR,TXD Pin Direction in Single-Wire Mode" "0: Input,1: Output"
bitfld.long 0x10 28. "TXINV,Transmit Data Inversion" "0: Not inverted,1: Inverted"
newline
bitfld.long 0x10 27. "ORIE,Overrun Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 26. "NEIE,Noise Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 25. "FEIE,Framing Error Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 24. "PEIE,Parity Error Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 23. "TIE,Transmit Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 22. "TCIE,Transmission Complete Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 21. "RIE,Receiver Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 20. "ILIE,Idle Line Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 19. "TE,Transmitter Enable" "0: Disable,1: Enable"
bitfld.long 0x10 18. "RE,Receiver Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 17. "RWU,Receiver Wake-Up Control" "0: Normal receiver operation,1: LPUART receiver in standby waiting for a wake-up.."
bitfld.long 0x10 16. "SBK,Send Break" "0: Normal transmitter operation,1: Queue break character(s) to be sent"
newline
bitfld.long 0x10 15. "MA1IE,Match 1 (MA1F) Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x10 14. "MA2IE,Match 2 (MA2F) Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x10 11. "M7,7-Bit Mode Select" "0: 8-bit to 10-bit,1: 7-bit"
bitfld.long 0x10 8.--10. "IDLECFG,Idle Configuration" "0: 1,1: 2,2: 4,3: 8,4: 16,5: 32,6: 64,7: 128"
newline
bitfld.long 0x10 7. "LOOPS,Loop Mode Select" "0: Normal operation: RXD and TXD use separate pins,1: Loop mode or Single-Wire mode"
bitfld.long 0x10 6. "DOZEEN,Doze Mode" "0: Enable,1: Disable"
newline
bitfld.long 0x10 5. "RSRC,Receiver Source Select" "0: Internal Loopback mode,1: Single-wire mode"
bitfld.long 0x10 4. "M,9-Bit Or 8-Bit Mode Select" "0: 8-bit,1: 9-bit"
newline
bitfld.long 0x10 3. "WAKE,Receiver Wake-Up Method Select" "0: Idle,1: Mark"
bitfld.long 0x10 2. "ILT,Idle Line Type Select" "0: After the start bit,1: After the stop bit"
newline
bitfld.long 0x10 1. "PE,Parity Enable" "0: Disable,1: Enable"
bitfld.long 0x10 0. "PT,Parity Type" "0: Even parity,1: Odd parity"
line.long 0x14 "DATA,Data"
rbitfld.long 0x14 15. "NOISY,Noisy Data Received" "0: Received without noise,1: Received with noise"
rbitfld.long 0x14 14. "PARITYE,Parity Error" "0: Received without a parity error,1: Received with a parity error"
newline
bitfld.long 0x14 13. "FRETSC,Frame Error Transmit Special Character" "0: Received without a frame error on reads or..,1: Received with a frame error on reads or.."
rbitfld.long 0x14 12. "RXEMPT,Receive Buffer Empty" "0: Valid data,1: Invalid data and empty"
newline
rbitfld.long 0x14 11. "IDLINE,Idle Line" "0: Not idle,1: Idle"
rbitfld.long 0x14 10. "LINBRK,LIN Break" "0: Not detected,1: Detected"
newline
bitfld.long 0x14 9. "R9T9,Read receive FIFO bit 9 or write transmit FIFO bit 9" "0,1"
bitfld.long 0x14 8. "R8T8,Read receive FIFO bit 8 or write transmit FIFO bit 8" "0,1"
newline
bitfld.long 0x14 7. "R7T7,Read receive FIFO bit 7 or write transmit FIFO bit 7" "0,1"
bitfld.long 0x14 6. "R6T6,Read receive FIFO bit 6 or write transmit FIFO bit 6" "0,1"
newline
bitfld.long 0x14 5. "R5T5,Read receive FIFO bit 5 or write transmit FIFO bit 5" "0,1"
bitfld.long 0x14 4. "R4T4,Read receive FIFO bit 4 or write transmit FIFO bit 4" "0,1"
newline
bitfld.long 0x14 3. "R3T3,Read receive FIFO bit 3 or write transmit FIFO bit 3" "0,1"
bitfld.long 0x14 2. "R2T2,Read receive FIFO bit 2 or write transmit FIFO bit 2" "0,1"
newline
bitfld.long 0x14 1. "R1T1,Read receive FIFO bit 1 or write transmit FIFO bit 1" "0,1"
bitfld.long 0x14 0. "R0T0,Read receive FIFO bit 0 or write transmit FIFO bit 0" "0,1"
line.long 0x18 "MATCH,Match Address"
hexmask.long.word 0x18 16.--25. 1. "MA2,Match Address 2"
hexmask.long.word 0x18 0.--9. 1. "MA1,Match Address 1"
line.long 0x1C "MODIR,MODEM IrDA"
bitfld.long 0x1C 18. "IREN,IR Enable" "0: Disable,1: Enable"
bitfld.long 0x1C 16.--17. "TNP,Transmitter Narrow Pulse" "0: 1 / OSR,1: 2 / OSR,2: 3 / OSR,3: 4 / OSR"
newline
bitfld.long 0x1C 8.--9. "RTSWATER,Receive RTS Configuration" "0,1,2,3"
bitfld.long 0x1C 5. "TXCTSSRC,Transmit CTS Source" "0: The CTS_B pin,1: An internal connection to the receiver address.."
newline
bitfld.long 0x1C 4. "TXCTSC,Transmit CTS Configuration" "0: Sampled at the start of each character,1: Sampled when the transmitter is idle"
bitfld.long 0x1C 3. "RXRTSE,Receiver RTS Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x1C 2. "TXRTSPOL,Transmitter RTS Polarity" "0: Active low,1: Active high"
bitfld.long 0x1C 1. "TXRTSE,Transmitter RTS Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x1C 0. "TXCTSE,Transmitter CTS Enable" "0: Disable,1: Enable"
line.long 0x20 "FIFO,FIFO"
rbitfld.long 0x20 23. "TXEMPT,Transmit FIFO Or Buffer Empty" "0: Not empty,1: Empty"
rbitfld.long 0x20 22. "RXEMPT,Receive FIFO Or Buffer Empty" "0: Not empty,1: Empty"
newline
eventfld.long 0x20 17. "TXOF,Transmitter FIFO Overflow Flag" "0: No overflow,1: Overflow"
eventfld.long 0x20 16. "RXUF,Receiver FIFO Underflow Flag" "0: No underflow,1: Underflow"
newline
bitfld.long 0x20 15. "TXFLUSH,Transmit FIFO Flush" "0: No effect,1: All data flushed out"
bitfld.long 0x20 14. "RXFLUSH,Receive FIFO Flush" "0: No effect,1: All data flushed out"
newline
bitfld.long 0x20 10.--12. "RXIDEN,Receiver Idle Empty Enable" "0: Disable STAT[RDRF] to become 1 because of..,1: Enable STAT[RDRF] to become 1 because of..,2: Enable STAT[RDRF] to become 1 because of..,3: Enable STAT[RDRF] to become 1 because of..,4: Enable STAT[RDRF] to become 1 because of..,5: Enable STAT[RDRF] to become 1 because of..,6: Enable STAT[RDRF] to become 1 because of..,7: Enable STAT[RDRF] to become 1 because of.."
bitfld.long 0x20 9. "TXOFE,Transmit FIFO Overflow Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x20 8. "RXUFE,Receive FIFO Underflow Interrupt Enable" "0: Disable,1: Enable"
bitfld.long 0x20 7. "TXFE,Transmit FIFO Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x20 4.--6. "TXFIFOSIZE,Transmit FIFO Buffer Depth" "0: 1,1: 4,2: 8,3: 16,4: 32,5: 64,6: 128,7: 256"
bitfld.long 0x20 3. "RXFE,Receive FIFO Enable" "0: Disable,1: Enable"
newline
rbitfld.long 0x20 0.--2. "RXFIFOSIZE,Receive FIFO Buffer Depth" "0: 1,1: 4,2: 8,3: 16,4: 32,5: 64,6: 128,7: 256"
line.long 0x24 "WATER,Watermark"
rbitfld.long 0x24 24.--26. "RXCOUNT,Receive Counter" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 16.--17. "RXWATER,Receive Watermark" "0,1,2,3"
newline
rbitfld.long 0x24 8.--10. "TXCOUNT,Transmit Counter" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 0.--1. "TXWATER,Transmit Watermark" "0,1,2,3"
rgroup.long 0x30++0x3
line.long 0x0 "DATARO,Data Read-Only"
hexmask.long.word 0x0 0.--15. 1. "DATA,Receive Data"
tree.end
endif
tree.end
tree "MBC (Memory Block Checker)"
base ad:0x4008E000
rgroup.long 0x0++0xB
line.long 0x0 "MBC0_MEM0_GLBCFG,MBC Global Configuration Register"
hexmask.long.byte 0x0 16.--20. 1. "SIZE_LOG2,Log2 size per block"
hexmask.long.word 0x0 0.--9. 1. "NBLKS,Number of blocks in this memory"
line.long 0x4 "MBC0_MEM1_GLBCFG,MBC Global Configuration Register"
hexmask.long.byte 0x4 16.--20. 1. "SIZE_LOG2,Log2 size per block"
hexmask.long.word 0x4 0.--9. 1. "NBLKS,Number of blocks in this memory"
line.long 0x8 "MBC0_MEM2_GLBCFG,MBC Global Configuration Register"
hexmask.long.byte 0x8 16.--20. 1. "SIZE_LOG2,Log2 size per block"
hexmask.long.word 0x8 0.--9. 1. "NBLKS,Number of blocks in this memory"
group.long 0xC++0x3
line.long 0x0 "MBC0_MEM3_GLBCFG,MBC Global Configuration Register"
bitfld.long 0x0 30.--31. "CLRE,Clear Error" "0,1,2,3"
hexmask.long.byte 0x0 16.--20. 1. "SIZE_LOG2,Log2 size per block"
newline
hexmask.long.word 0x0 0.--9. 1. "NBLKS,Number of blocks in this memory"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
group.long 0x10++0xF
line.long 0x0 "MBC0_NSE_BLK_INDEX,MBC NonSecure Enable Block Index"
bitfld.long 0x0 31. "AI,Auto Increment" "0: No effect.,1: Add 1 to the WNDX field after the register write."
bitfld.long 0x0 16. "DID_SEL0,DID Select" "0: No effect.,1: Selects NSE bits for this domain."
newline
hexmask.long.byte 0x0 8.--11. 1. "MEM_SEL,Memory Select"
hexmask.long.byte 0x0 2.--5. 1. "WNDX,Word index into the block NSE bitmap. It selects the BLK_NSE_Wn register where WNDX determines the value of n."
line.long 0x4 "MBC0_NSE_BLK_SET,MBC NonSecure Enable Block Set"
hexmask.long 0x4 0.--31. 1. "W1SET,Write-1 Set"
line.long 0x8 "MBC0_NSE_BLK_CLR,MBC NonSecure Enable Block Clear"
hexmask.long 0x8 0.--31. 1. "W1CLR,Write-1 Clear"
line.long 0xC "MBC0_NSE_BLK_CLR_ALL,MBC NonSecure Enable Block Clear All"
bitfld.long 0xC 16. "DID_SEL0,DID Select" "0: No effect.,1: Clear all NSE bits for this domain."
hexmask.long.byte 0xC 8.--11. 1. "MEMSEL,Memory Select"
group.long 0x140++0x3
line.long 0x0 "MBC0_DOM0_MEM0_BLK_NSE_W0,MBC Memory Block NonSecure Enable Word"
bitfld.long 0x0 31. "BIT31,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 30. "BIT30,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 29. "BIT29,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 28. "BIT28,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 27. "BIT27,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 26. "BIT26,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 25. "BIT25,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 24. "BIT24,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 23. "BIT23,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 22. "BIT22,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 21. "BIT21,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 20. "BIT20,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 19. "BIT19,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 18. "BIT18,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 17. "BIT17,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 16. "BIT16,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 15. "BIT15,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 14. "BIT14,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 13. "BIT13,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 12. "BIT12,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 11. "BIT11,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 10. "BIT10,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 9. "BIT9,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 8. "BIT8,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 7. "BIT7,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 6. "BIT6,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 5. "BIT5,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 4. "BIT4,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 3. "BIT3,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 2. "BIT2,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 1. "BIT1,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 0. "BIT0,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
group.long 0x1A0++0x3
line.long 0x0 "MBC0_DOM0_MEM1_BLK_NSE_W0,MBC Memory Block NonSecure Enable Word"
bitfld.long 0x0 31. "BIT31,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 30. "BIT30,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 29. "BIT29,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 28. "BIT28,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 27. "BIT27,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 26. "BIT26,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 25. "BIT25,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 24. "BIT24,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 23. "BIT23,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 22. "BIT22,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 21. "BIT21,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 20. "BIT20,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 19. "BIT19,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 18. "BIT18,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 17. "BIT17,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 16. "BIT16,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 15. "BIT15,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 14. "BIT14,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 13. "BIT13,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 12. "BIT12,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 11. "BIT11,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 10. "BIT10,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 9. "BIT9,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 8. "BIT8,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 7. "BIT7,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 6. "BIT6,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 5. "BIT5,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 4. "BIT4,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 3. "BIT3,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 2. "BIT2,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 1. "BIT1,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 0. "BIT0,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
group.long 0x1C8++0x3
line.long 0x0 "MBC0_DOM0_MEM2_BLK_NSE_W0,MBC Memory Block NonSecure Enable Word"
bitfld.long 0x0 31. "BIT31,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 30. "BIT30,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 29. "BIT29,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 28. "BIT28,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 27. "BIT27,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 26. "BIT26,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 25. "BIT25,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 24. "BIT24,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 23. "BIT23,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 22. "BIT22,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 21. "BIT21,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 20. "BIT20,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 19. "BIT19,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 18. "BIT18,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 17. "BIT17,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 16. "BIT16,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 15. "BIT15,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 14. "BIT14,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 13. "BIT13,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 12. "BIT12,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 11. "BIT11,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 10. "BIT10,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 9. "BIT9,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 8. "BIT8,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 7. "BIT7,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 6. "BIT6,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 5. "BIT5,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 4. "BIT4,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 3. "BIT3,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 2. "BIT2,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 1. "BIT1,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 0. "BIT0,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
endif
sif (cpuis("MC?A152*"))
group.long 0x10++0xF
line.long 0x0 "MBC0_NSE_BLK_INDEX,MBC NonSecure Enable Block Index"
bitfld.long 0x0 31. "AI,Auto Increment" "0: No effect.,1: Add 1 to the WNDX field after the register write."
bitfld.long 0x0 16. "DID_SEL0,DID Select" "0: No effect.,1: Selects NSE bits for this domain."
newline
hexmask.long.byte 0x0 8.--11. 1. "MEM_SEL,Memory Select"
hexmask.long.byte 0x0 2.--5. 1. "WNDX,Word index into the block NSE bitmap. It selects the BLK_NSE_Wn register where WNDX determines the value of n."
line.long 0x4 "MBC0_NSE_BLK_SET,MBC NonSecure Enable Block Set"
hexmask.long 0x4 0.--31. 1. "W1SET,Write-1 Set"
line.long 0x8 "MBC0_NSE_BLK_CLR,MBC NonSecure Enable Block Clear"
hexmask.long 0x8 0.--31. 1. "W1CLR,Write-1 Clear"
line.long 0xC "MBC0_NSE_BLK_CLR_ALL,MBC NonSecure Enable Block Clear All"
bitfld.long 0xC 16. "DID_SEL0,DID Select" "0: No effect.,1: Clear all NSE bits for this domain."
hexmask.long.byte 0xC 8.--11. 1. "MEMSEL,Memory Select"
group.long 0x140++0x3
line.long 0x0 "MBC0_DOM0_MEM0_BLK_NSE_W0,MBC Memory Block NonSecure Enable Word"
bitfld.long 0x0 31. "BIT31,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 30. "BIT30,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 29. "BIT29,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 28. "BIT28,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 27. "BIT27,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 26. "BIT26,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 25. "BIT25,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 24. "BIT24,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 23. "BIT23,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 22. "BIT22,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 21. "BIT21,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 20. "BIT20,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 19. "BIT19,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 18. "BIT18,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 17. "BIT17,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 16. "BIT16,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 15. "BIT15,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 14. "BIT14,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 13. "BIT13,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 12. "BIT12,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 11. "BIT11,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 10. "BIT10,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 9. "BIT9,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 8. "BIT8,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 7. "BIT7,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 6. "BIT6,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 5. "BIT5,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 4. "BIT4,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 3. "BIT3,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 2. "BIT2,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 1. "BIT1,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 0. "BIT0,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
group.long 0x1A0++0x3
line.long 0x0 "MBC0_DOM0_MEM1_BLK_NSE_W0,MBC Memory Block NonSecure Enable Word"
bitfld.long 0x0 31. "BIT31,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 30. "BIT30,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 29. "BIT29,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 28. "BIT28,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 27. "BIT27,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 26. "BIT26,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 25. "BIT25,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 24. "BIT24,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 23. "BIT23,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 22. "BIT22,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 21. "BIT21,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 20. "BIT20,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 19. "BIT19,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 18. "BIT18,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 17. "BIT17,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 16. "BIT16,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 15. "BIT15,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 14. "BIT14,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 13. "BIT13,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 12. "BIT12,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 11. "BIT11,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 10. "BIT10,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 9. "BIT9,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 8. "BIT8,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 7. "BIT7,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 6. "BIT6,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 5. "BIT5,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 4. "BIT4,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 3. "BIT3,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 2. "BIT2,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 1. "BIT1,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 0. "BIT0,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
endif
sif (cpuis("MC?A153*"))
group.long 0x10++0xF
line.long 0x0 "MBC0_NSE_BLK_INDEX,MBC NonSecure Enable Block Index"
bitfld.long 0x0 31. "AI,Auto Increment" "0: No effect.,1: Add 1 to the WNDX field after the register write."
bitfld.long 0x0 16. "DID_SEL0,DID Select" "0: No effect.,1: Selects NSE bits for this domain."
newline
hexmask.long.byte 0x0 8.--11. 1. "MEM_SEL,Memory Select"
hexmask.long.byte 0x0 2.--5. 1. "WNDX,Word index into the block NSE bitmap. It selects the BLK_NSE_Wn register where WNDX determines the value of n."
line.long 0x4 "MBC0_NSE_BLK_SET,MBC NonSecure Enable Block Set"
hexmask.long 0x4 0.--31. 1. "W1SET,Write-1 Set"
line.long 0x8 "MBC0_NSE_BLK_CLR,MBC NonSecure Enable Block Clear"
hexmask.long 0x8 0.--31. 1. "W1CLR,Write-1 Clear"
line.long 0xC "MBC0_NSE_BLK_CLR_ALL,MBC NonSecure Enable Block Clear All"
bitfld.long 0xC 16. "DID_SEL0,DID Select" "0: No effect.,1: Clear all NSE bits for this domain."
hexmask.long.byte 0xC 8.--11. 1. "MEMSEL,Memory Select"
group.long 0x140++0x3
line.long 0x0 "MBC0_DOM0_MEM0_BLK_NSE_W0,MBC Memory Block NonSecure Enable Word"
bitfld.long 0x0 31. "BIT31,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 30. "BIT30,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 29. "BIT29,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 28. "BIT28,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 27. "BIT27,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 26. "BIT26,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 25. "BIT25,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 24. "BIT24,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 23. "BIT23,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 22. "BIT22,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 21. "BIT21,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 20. "BIT20,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 19. "BIT19,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 18. "BIT18,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 17. "BIT17,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 16. "BIT16,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 15. "BIT15,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 14. "BIT14,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 13. "BIT13,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 12. "BIT12,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 11. "BIT11,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 10. "BIT10,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 9. "BIT9,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 8. "BIT8,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 7. "BIT7,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 6. "BIT6,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 5. "BIT5,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 4. "BIT4,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 3. "BIT3,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 2. "BIT2,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 1. "BIT1,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 0. "BIT0,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
group.long 0x1A0++0x3
line.long 0x0 "MBC0_DOM0_MEM1_BLK_NSE_W0,MBC Memory Block NonSecure Enable Word"
bitfld.long 0x0 31. "BIT31,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 30. "BIT30,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 29. "BIT29,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 28. "BIT28,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 27. "BIT27,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 26. "BIT26,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 25. "BIT25,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 24. "BIT24,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 23. "BIT23,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 22. "BIT22,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 21. "BIT21,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 20. "BIT20,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 19. "BIT19,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 18. "BIT18,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 17. "BIT17,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 16. "BIT16,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 15. "BIT15,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 14. "BIT14,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 13. "BIT13,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 12. "BIT12,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 11. "BIT11,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 10. "BIT10,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 9. "BIT9,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 8. "BIT8,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 7. "BIT7,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 6. "BIT6,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 5. "BIT5,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 4. "BIT4,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 3. "BIT3,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 2. "BIT2,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 1. "BIT1,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 0. "BIT0,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
endif
group.long 0x20++0x27
line.long 0x0 "MBC0_MEMN_GLBAC0,MBC Global Access Control"
bitfld.long 0x0 14. "SPR,SecurePriv Read" "0: Read access is not allowed in Secure Privilege..,1: Read access is allowed in Secure Privilege mode."
bitfld.long 0x0 13. "SPW,SecurePriv Write" "0: Write access is not allowed in Secure Privilege..,1: Write access is allowed in Secure Privilege mode."
newline
bitfld.long 0x0 12. "SPX,SecurePriv Execute" "0: Execute access is not allowed in Secure..,1: Execute access is allowed in Secure Privilege.."
bitfld.long 0x0 10. "SUR,SecureUser Read" "0: Read access is not allowed in Secure User mode.,1: Read access is allowed in Secure User mode."
newline
bitfld.long 0x0 9. "SUW,SecureUser Write" "0: Write access is not allowed in Secure User mode.,1: Write access is allowed in Secure User mode."
bitfld.long 0x0 8. "SUX,SecureUser Execute" "0: Execute access is not allowed in Secure User mode.,1: Execute access is allowed in Secure User mode."
newline
bitfld.long 0x0 6. "NPR,NonsecurePriv Read" "0: Read access is not allowed in Nonsecure..,1: Read access is allowed in Nonsecure Privilege.."
bitfld.long 0x0 5. "NPW,NonsecurePriv Write" "0: Write access is not allowed in Nonsecure..,1: Write access is allowed in Nonsecure Privilege.."
newline
bitfld.long 0x0 4. "NPX,NonsecurePriv Execute" "0: Execute access is not allowed in Nonsecure..,1: Execute access is allowed in Nonsecure Privilege.."
bitfld.long 0x0 2. "NUR,NonsecureUser Read" "0: Read access is not allowed in Nonsecure User mode.,1: Read access is allowed in Nonsecure User mode."
newline
bitfld.long 0x0 1. "NUW,NonsecureUser Write" "0: Write access is not allowed in Nonsecure User..,1: Write access is allowed in Nonsecure User mode."
bitfld.long 0x0 0. "NUX,NonsecureUser Execute" "0: Execute access is not allowed in Nonsecure User..,1: Execute access is allowed in Nonsecure User mode."
line.long 0x4 "MBC0_MEMN_GLBAC1,MBC Global Access Control"
bitfld.long 0x4 31. "LK,LOCK" "0: This register is not locked and can be altered.,1: This register is locked and cannot be altered."
bitfld.long 0x4 14. "SPR,SecurePriv Read" "0: Read access is not allowed in Secure Privilege..,1: Read access is allowed in Secure Privilege mode."
newline
bitfld.long 0x4 13. "SPW,SecurePriv Write" "0: Write access is not allowed in Secure Privilege..,1: Write access is allowed in Secure Privilege mode."
bitfld.long 0x4 12. "SPX,SecurePriv Execute" "0: Execute access is not allowed in Secure..,1: Execute access is allowed in Secure Privilege.."
newline
bitfld.long 0x4 10. "SUR,SecureUser Read" "0: Read access is not allowed in Secure User mode.,1: Read access is allowed in Secure User mode."
bitfld.long 0x4 9. "SUW,SecureUser Write" "0: Write access is not allowed in Secure User mode.,1: Write access is allowed in Secure User mode."
newline
bitfld.long 0x4 8. "SUX,SecureUser Execute" "0: Execute access is not allowed in Secure User mode.,1: Execute access is allowed in Secure User mode."
bitfld.long 0x4 6. "NPR,NonsecurePriv Read" "0: Read access is not allowed in Nonsecure..,1: Read access is allowed in Nonsecure Privilege.."
newline
bitfld.long 0x4 5. "NPW,NonsecurePriv Write" "0: Write access is not allowed in Nonsecure..,1: Write access is allowed in Nonsecure Privilege.."
bitfld.long 0x4 4. "NPX,NonsecurePriv Execute" "0: Execute access is not allowed in Nonsecure..,1: Execute access is allowed in Nonsecure Privilege.."
newline
bitfld.long 0x4 2. "NUR,NonsecureUser Read" "0: Read access is not allowed in Nonsecure User mode.,1: Read access is allowed in Nonsecure User mode."
bitfld.long 0x4 1. "NUW,NonsecureUser Write" "0: Write access is not allowed in Nonsecure User..,1: Write access is allowed in Nonsecure User mode."
newline
bitfld.long 0x4 0. "NUX,NonsecureUser Execute" "0: Execute access is not allowed in Nonsecure User..,1: Execute access is allowed in Nonsecure User mode."
line.long 0x8 "MBC0_MEMN_GLBAC2,MBC Global Access Control"
bitfld.long 0x8 31. "LK,LOCK" "0: This register is not locked and can be altered.,1: This register is locked and cannot be altered."
bitfld.long 0x8 14. "SPR,SecurePriv Read" "0: Read access is not allowed in Secure Privilege..,1: Read access is allowed in Secure Privilege mode."
newline
bitfld.long 0x8 13. "SPW,SecurePriv Write" "0: Write access is not allowed in Secure Privilege..,1: Write access is allowed in Secure Privilege mode."
bitfld.long 0x8 12. "SPX,SecurePriv Execute" "0: Execute access is not allowed in Secure..,1: Execute access is allowed in Secure Privilege.."
newline
bitfld.long 0x8 10. "SUR,SecureUser Read" "0: Read access is not allowed in Secure User mode.,1: Read access is allowed in Secure User mode."
bitfld.long 0x8 9. "SUW,SecureUser Write" "0: Write access is not allowed in Secure User mode.,1: Write access is allowed in Secure User mode."
newline
bitfld.long 0x8 8. "SUX,SecureUser Execute" "0: Execute access is not allowed in Secure User mode.,1: Execute access is allowed in Secure User mode."
bitfld.long 0x8 6. "NPR,NonsecurePriv Read" "0: Read access is not allowed in Nonsecure..,1: Read access is allowed in Nonsecure Privilege.."
newline
bitfld.long 0x8 5. "NPW,NonsecurePriv Write" "0: Write access is not allowed in Nonsecure..,1: Write access is allowed in Nonsecure Privilege.."
bitfld.long 0x8 4. "NPX,NonsecurePriv Execute" "0: Execute access is not allowed in Nonsecure..,1: Execute access is allowed in Nonsecure Privilege.."
newline
bitfld.long 0x8 2. "NUR,NonsecureUser Read" "0: Read access is not allowed in Nonsecure User mode.,1: Read access is allowed in Nonsecure User mode."
bitfld.long 0x8 1. "NUW,NonsecureUser Write" "0: Write access is not allowed in Nonsecure User..,1: Write access is allowed in Nonsecure User mode."
newline
bitfld.long 0x8 0. "NUX,NonsecureUser Execute" "0: Execute access is not allowed in Nonsecure User..,1: Execute access is allowed in Nonsecure User mode."
line.long 0xC "MBC0_MEMN_GLBAC3,MBC Global Access Control"
bitfld.long 0xC 31. "LK,LOCK" "0: This register is not locked and can be altered.,1: This register is locked and cannot be altered."
bitfld.long 0xC 14. "SPR,SecurePriv Read" "0: Read access is not allowed in Secure Privilege..,1: Read access is allowed in Secure Privilege mode."
newline
bitfld.long 0xC 13. "SPW,SecurePriv Write" "0: Write access is not allowed in Secure Privilege..,1: Write access is allowed in Secure Privilege mode."
bitfld.long 0xC 12. "SPX,SecurePriv Execute" "0: Execute access is not allowed in Secure..,1: Execute access is allowed in Secure Privilege.."
newline
bitfld.long 0xC 10. "SUR,SecureUser Read" "0: Read access is not allowed in Secure User mode.,1: Read access is allowed in Secure User mode."
bitfld.long 0xC 9. "SUW,SecureUser Write" "0: Write access is not allowed in Secure User mode.,1: Write access is allowed in Secure User mode."
newline
bitfld.long 0xC 8. "SUX,SecureUser Execute" "0: Execute access is not allowed in Secure User mode.,1: Execute access is allowed in Secure User mode."
bitfld.long 0xC 6. "NPR,NonsecurePriv Read" "0: Read access is not allowed in Nonsecure..,1: Read access is allowed in Nonsecure Privilege.."
newline
bitfld.long 0xC 5. "NPW,NonsecurePriv Write" "0: Write access is not allowed in Nonsecure..,1: Write access is allowed in Nonsecure Privilege.."
bitfld.long 0xC 4. "NPX,NonsecurePriv Execute" "0: Execute access is not allowed in Nonsecure..,1: Execute access is allowed in Nonsecure Privilege.."
newline
bitfld.long 0xC 2. "NUR,NonsecureUser Read" "0: Read access is not allowed in Nonsecure User mode.,1: Read access is allowed in Nonsecure User mode."
bitfld.long 0xC 1. "NUW,NonsecureUser Write" "0: Write access is not allowed in Nonsecure User..,1: Write access is allowed in Nonsecure User mode."
newline
bitfld.long 0xC 0. "NUX,NonsecureUser Execute" "0: Execute access is not allowed in Nonsecure User..,1: Execute access is allowed in Nonsecure User mode."
line.long 0x10 "MBC0_MEMN_GLBAC4,MBC Global Access Control"
bitfld.long 0x10 31. "LK,LOCK" "0: This register is not locked and can be altered.,1: This register is locked and cannot be altered."
bitfld.long 0x10 14. "SPR,SecurePriv Read" "0: Read access is not allowed in Secure Privilege..,1: Read access is allowed in Secure Privilege mode."
newline
bitfld.long 0x10 13. "SPW,SecurePriv Write" "0: Write access is not allowed in Secure Privilege..,1: Write access is allowed in Secure Privilege mode."
bitfld.long 0x10 12. "SPX,SecurePriv Execute" "0: Execute access is not allowed in Secure..,1: Execute access is allowed in Secure Privilege.."
newline
bitfld.long 0x10 10. "SUR,SecureUser Read" "0: Read access is not allowed in Secure User mode.,1: Read access is allowed in Secure User mode."
bitfld.long 0x10 9. "SUW,SecureUser Write" "0: Write access is not allowed in Secure User mode.,1: Write access is allowed in Secure User mode."
newline
bitfld.long 0x10 8. "SUX,SecureUser Execute" "0: Execute access is not allowed in Secure User mode.,1: Execute access is allowed in Secure User mode."
bitfld.long 0x10 6. "NPR,NonsecurePriv Read" "0: Read access is not allowed in Nonsecure..,1: Read access is allowed in Nonsecure Privilege.."
newline
bitfld.long 0x10 5. "NPW,NonsecurePriv Write" "0: Write access is not allowed in Nonsecure..,1: Write access is allowed in Nonsecure Privilege.."
bitfld.long 0x10 4. "NPX,NonsecurePriv Execute" "0: Execute access is not allowed in Nonsecure..,1: Execute access is allowed in Nonsecure Privilege.."
newline
bitfld.long 0x10 2. "NUR,NonsecureUser Read" "0: Read access is not allowed in Nonsecure User mode.,1: Read access is allowed in Nonsecure User mode."
bitfld.long 0x10 1. "NUW,NonsecureUser Write" "0: Write access is not allowed in Nonsecure User..,1: Write access is allowed in Nonsecure User mode."
newline
bitfld.long 0x10 0. "NUX,NonsecureUser Execute" "0: Execute access is not allowed in Nonsecure User..,1: Execute access is allowed in Nonsecure User mode."
line.long 0x14 "MBC0_MEMN_GLBAC5,MBC Global Access Control"
bitfld.long 0x14 31. "LK,LOCK" "0: This register is not locked and can be altered.,1: This register is locked and cannot be altered."
bitfld.long 0x14 14. "SPR,SecurePriv Read" "0: Read access is not allowed in Secure Privilege..,1: Read access is allowed in Secure Privilege mode."
newline
bitfld.long 0x14 13. "SPW,SecurePriv Write" "0: Write access is not allowed in Secure Privilege..,1: Write access is allowed in Secure Privilege mode."
bitfld.long 0x14 12. "SPX,SecurePriv Execute" "0: Execute access is not allowed in Secure..,1: Execute access is allowed in Secure Privilege.."
newline
bitfld.long 0x14 10. "SUR,SecureUser Read" "0: Read access is not allowed in Secure User mode.,1: Read access is allowed in Secure User mode."
bitfld.long 0x14 9. "SUW,SecureUser Write" "0: Write access is not allowed in Secure User mode.,1: Write access is allowed in Secure User mode."
newline
bitfld.long 0x14 8. "SUX,SecureUser Execute" "0: Execute access is not allowed in Secure User mode.,1: Execute access is allowed in Secure User mode."
bitfld.long 0x14 6. "NPR,NonsecurePriv Read" "0: Read access is not allowed in Nonsecure..,1: Read access is allowed in Nonsecure Privilege.."
newline
bitfld.long 0x14 5. "NPW,NonsecurePriv Write" "0: Write access is not allowed in Nonsecure..,1: Write access is allowed in Nonsecure Privilege.."
bitfld.long 0x14 4. "NPX,NonsecurePriv Execute" "0: Execute access is not allowed in Nonsecure..,1: Execute access is allowed in Nonsecure Privilege.."
newline
bitfld.long 0x14 2. "NUR,NonsecureUser Read" "0: Read access is not allowed in Nonsecure User mode.,1: Read access is allowed in Nonsecure User mode."
bitfld.long 0x14 1. "NUW,NonsecureUser Write" "0: Write access is not allowed in Nonsecure User..,1: Write access is allowed in Nonsecure User mode."
newline
bitfld.long 0x14 0. "NUX,NonsecureUser Execute" "0: Execute access is not allowed in Nonsecure User..,1: Execute access is allowed in Nonsecure User mode."
line.long 0x18 "MBC0_MEMN_GLBAC6,MBC Global Access Control"
bitfld.long 0x18 31. "LK,LOCK" "0: This register is not locked and can be altered.,1: This register is locked and cannot be altered."
bitfld.long 0x18 14. "SPR,SecurePriv Read" "0: Read access is not allowed in Secure Privilege..,1: Read access is allowed in Secure Privilege mode."
newline
bitfld.long 0x18 13. "SPW,SecurePriv Write" "0: Write access is not allowed in Secure Privilege..,1: Write access is allowed in Secure Privilege mode."
bitfld.long 0x18 12. "SPX,SecurePriv Execute" "0: Execute access is not allowed in Secure..,1: Execute access is allowed in Secure Privilege.."
newline
bitfld.long 0x18 10. "SUR,SecureUser Read" "0: Read access is not allowed in Secure User mode.,1: Read access is allowed in Secure User mode."
bitfld.long 0x18 9. "SUW,SecureUser Write" "0: Write access is not allowed in Secure User mode.,1: Write access is allowed in Secure User mode."
newline
bitfld.long 0x18 8. "SUX,SecureUser Execute" "0: Execute access is not allowed in Secure User mode.,1: Execute access is allowed in Secure User mode."
bitfld.long 0x18 6. "NPR,NonsecurePriv Read" "0: Read access is not allowed in Nonsecure..,1: Read access is allowed in Nonsecure Privilege.."
newline
bitfld.long 0x18 5. "NPW,NonsecurePriv Write" "0: Write access is not allowed in Nonsecure..,1: Write access is allowed in Nonsecure Privilege.."
bitfld.long 0x18 4. "NPX,NonsecurePriv Execute" "0: Execute access is not allowed in Nonsecure..,1: Execute access is allowed in Nonsecure Privilege.."
newline
bitfld.long 0x18 2. "NUR,NonsecureUser Read" "0: Read access is not allowed in Nonsecure User mode.,1: Read access is allowed in Nonsecure User mode."
bitfld.long 0x18 1. "NUW,NonsecureUser Write" "0: Write access is not allowed in Nonsecure User..,1: Write access is allowed in Nonsecure User mode."
newline
bitfld.long 0x18 0. "NUX,NonsecureUser Execute" "0: Execute access is not allowed in Nonsecure User..,1: Execute access is allowed in Nonsecure User mode."
line.long 0x1C "MBC0_MEMN_GLBAC7,MBC Global Access Control"
bitfld.long 0x1C 31. "LK,LOCK" "0: This register is not locked and can be altered.,1: This register is locked and cannot be altered."
bitfld.long 0x1C 14. "SPR,SecurePriv Read" "0: Read access is not allowed in Secure Privilege..,1: Read access is allowed in Secure Privilege mode."
newline
bitfld.long 0x1C 13. "SPW,SecurePriv Write" "0: Write access is not allowed in Secure Privilege..,1: Write access is allowed in Secure Privilege mode."
bitfld.long 0x1C 12. "SPX,SecurePriv Execute" "0: Execute access is not allowed in Secure..,1: Execute access is allowed in Secure Privilege.."
newline
bitfld.long 0x1C 10. "SUR,SecureUser Read" "0: Read access is not allowed in Secure User mode.,1: Read access is allowed in Secure User mode."
bitfld.long 0x1C 9. "SUW,SecureUser Write" "0: Write access is not allowed in Secure User mode.,1: Write access is allowed in Secure User mode."
newline
bitfld.long 0x1C 8. "SUX,SecureUser Execute" "0: Execute access is not allowed in Secure User mode.,1: Execute access is allowed in Secure User mode."
bitfld.long 0x1C 6. "NPR,NonsecurePriv Read" "0: Read access is not allowed in Nonsecure..,1: Read access is allowed in Nonsecure Privilege.."
newline
bitfld.long 0x1C 5. "NPW,NonsecurePriv Write" "0: Write access is not allowed in Nonsecure..,1: Write access is allowed in Nonsecure Privilege.."
bitfld.long 0x1C 4. "NPX,NonsecurePriv Execute" "0: Execute access is not allowed in Nonsecure..,1: Execute access is allowed in Nonsecure Privilege.."
newline
bitfld.long 0x1C 2. "NUR,NonsecureUser Read" "0: Read access is not allowed in Nonsecure User mode.,1: Read access is allowed in Nonsecure User mode."
bitfld.long 0x1C 1. "NUW,NonsecureUser Write" "0: Write access is not allowed in Nonsecure User..,1: Write access is allowed in Nonsecure User mode."
newline
bitfld.long 0x1C 0. "NUX,NonsecureUser Execute" "0: Execute access is not allowed in Nonsecure User..,1: Execute access is allowed in Nonsecure User mode."
line.long 0x20 "MBC0_DOM0_MEM0_BLK_CFG_W0,MBC Memory Block Configuration Word"
bitfld.long 0x20 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x20 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x20 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x20 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x20 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x20 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x20 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x20 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x20 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x20 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x20 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x20 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x20 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x20 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x20 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x20 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
line.long 0x24 "MBC0_DOM0_MEM0_BLK_CFG_W1,MBC Memory Block Configuration Word"
bitfld.long 0x24 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x24 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x24 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x24 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x24 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x24 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x24 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x24 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x24 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x24 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x24 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x24 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x24 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x24 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x24 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x24 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
sif (cpuis("MC?A144*"))
group.long 0x48++0x17
line.long 0x0 "MBC0_DOM0_MEM0_BLK_CFG_W2,MBC Memory Block Configuration Word"
bitfld.long 0x0 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
line.long 0x4 "MBC0_DOM0_MEM0_BLK_CFG_W3,MBC Memory Block Configuration Word"
bitfld.long 0x4 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
line.long 0x8 "MBC0_DOM0_MEM0_BLK_CFG_W4,MBC Memory Block Configuration Word"
bitfld.long 0x8 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
line.long 0xC "MBC0_DOM0_MEM0_BLK_CFG_W5,MBC Memory Block Configuration Word"
bitfld.long 0xC 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
line.long 0x10 "MBC0_DOM0_MEM0_BLK_CFG_W6,MBC Memory Block Configuration Word"
bitfld.long 0x10 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
line.long 0x14 "MBC0_DOM0_MEM0_BLK_CFG_W7,MBC Memory Block Configuration Word"
bitfld.long 0x14 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
endif
sif (cpuis("MC?A145*"))
group.long 0x48++0x17
line.long 0x0 "MBC0_DOM0_MEM0_BLK_CFG_W2,MBC Memory Block Configuration Word"
bitfld.long 0x0 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
line.long 0x4 "MBC0_DOM0_MEM0_BLK_CFG_W3,MBC Memory Block Configuration Word"
bitfld.long 0x4 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
line.long 0x8 "MBC0_DOM0_MEM0_BLK_CFG_W4,MBC Memory Block Configuration Word"
bitfld.long 0x8 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
line.long 0xC "MBC0_DOM0_MEM0_BLK_CFG_W5,MBC Memory Block Configuration Word"
bitfld.long 0xC 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
line.long 0x10 "MBC0_DOM0_MEM0_BLK_CFG_W6,MBC Memory Block Configuration Word"
bitfld.long 0x10 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
line.long 0x14 "MBC0_DOM0_MEM0_BLK_CFG_W7,MBC Memory Block Configuration Word"
bitfld.long 0x14 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
endif
sif (cpuis("MC?A146*"))
group.long 0x48++0x17
line.long 0x0 "MBC0_DOM0_MEM0_BLK_CFG_W2,MBC Memory Block Configuration Word"
bitfld.long 0x0 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
line.long 0x4 "MBC0_DOM0_MEM0_BLK_CFG_W3,MBC Memory Block Configuration Word"
bitfld.long 0x4 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
line.long 0x8 "MBC0_DOM0_MEM0_BLK_CFG_W4,MBC Memory Block Configuration Word"
bitfld.long 0x8 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
line.long 0xC "MBC0_DOM0_MEM0_BLK_CFG_W5,MBC Memory Block Configuration Word"
bitfld.long 0xC 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
line.long 0x10 "MBC0_DOM0_MEM0_BLK_CFG_W6,MBC Memory Block Configuration Word"
bitfld.long 0x10 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
line.long 0x14 "MBC0_DOM0_MEM0_BLK_CFG_W7,MBC Memory Block Configuration Word"
bitfld.long 0x14 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
endif
sif (cpuis("MC?A154*"))
group.long 0x48++0x17
line.long 0x0 "MBC0_DOM0_MEM0_BLK_CFG_W2,MBC Memory Block Configuration Word"
bitfld.long 0x0 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
line.long 0x4 "MBC0_DOM0_MEM0_BLK_CFG_W3,MBC Memory Block Configuration Word"
bitfld.long 0x4 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
line.long 0x8 "MBC0_DOM0_MEM0_BLK_CFG_W4,MBC Memory Block Configuration Word"
bitfld.long 0x8 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
line.long 0xC "MBC0_DOM0_MEM0_BLK_CFG_W5,MBC Memory Block Configuration Word"
bitfld.long 0xC 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
line.long 0x10 "MBC0_DOM0_MEM0_BLK_CFG_W6,MBC Memory Block Configuration Word"
bitfld.long 0x10 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
line.long 0x14 "MBC0_DOM0_MEM0_BLK_CFG_W7,MBC Memory Block Configuration Word"
bitfld.long 0x14 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
endif
sif (cpuis("MC?A155*"))
group.long 0x48++0x17
line.long 0x0 "MBC0_DOM0_MEM0_BLK_CFG_W2,MBC Memory Block Configuration Word"
bitfld.long 0x0 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
line.long 0x4 "MBC0_DOM0_MEM0_BLK_CFG_W3,MBC Memory Block Configuration Word"
bitfld.long 0x4 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
line.long 0x8 "MBC0_DOM0_MEM0_BLK_CFG_W4,MBC Memory Block Configuration Word"
bitfld.long 0x8 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
line.long 0xC "MBC0_DOM0_MEM0_BLK_CFG_W5,MBC Memory Block Configuration Word"
bitfld.long 0xC 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
line.long 0x10 "MBC0_DOM0_MEM0_BLK_CFG_W6,MBC Memory Block Configuration Word"
bitfld.long 0x10 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
line.long 0x14 "MBC0_DOM0_MEM0_BLK_CFG_W7,MBC Memory Block Configuration Word"
bitfld.long 0x14 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
endif
sif (cpuis("MC?A156*"))
group.long 0x48++0x17
line.long 0x0 "MBC0_DOM0_MEM0_BLK_CFG_W2,MBC Memory Block Configuration Word"
bitfld.long 0x0 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
line.long 0x4 "MBC0_DOM0_MEM0_BLK_CFG_W3,MBC Memory Block Configuration Word"
bitfld.long 0x4 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x4 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x4 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
line.long 0x8 "MBC0_DOM0_MEM0_BLK_CFG_W4,MBC Memory Block Configuration Word"
bitfld.long 0x8 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x8 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x8 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
line.long 0xC "MBC0_DOM0_MEM0_BLK_CFG_W5,MBC Memory Block Configuration Word"
bitfld.long 0xC 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0xC 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0xC 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
line.long 0x10 "MBC0_DOM0_MEM0_BLK_CFG_W6,MBC Memory Block Configuration Word"
bitfld.long 0x10 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x10 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x10 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
line.long 0x14 "MBC0_DOM0_MEM0_BLK_CFG_W7,MBC Memory Block Configuration Word"
bitfld.long 0x14 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x14 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x14 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
endif
group.long 0x180++0x3
line.long 0x0 "MBC0_DOM0_MEM1_BLK_CFG_W0,MBC Memory Block Configuration Word"
bitfld.long 0x0 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
group.long 0x1A8++0x3
line.long 0x0 "MBC0_DOM0_MEM2_BLK_CFG_W0,MBC Memory Block Configuration Word"
bitfld.long 0x0 31. "NSE7,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 28.--30. "MBACSEL7,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 27. "NSE6,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 24.--26. "MBACSEL6,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 23. "NSE5,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 20.--22. "MBACSEL5,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 19. "NSE4,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 16.--18. "MBACSEL4,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 15. "NSE3,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 12.--14. "MBACSEL3,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 11. "NSE2,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 8.--10. "MBACSEL2,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 7. "NSE1,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 4.--6. "MBACSEL1,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
newline
bitfld.long 0x0 3. "NSE0,NonSecure Enable for block B" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 0.--2. "MBACSEL0,Memory Block Access Control Select for block B" "0: select MBC_MEMN_GLBAC0 access control policy for..,1: select MBC_MEMN_GLBAC1 access control policy for..,2: select MBC_MEMN_GLBAC2 access control policy for..,3: select MBC_MEMN_GLBAC3 access control policy for..,4: select MBC_MEMN_GLBAC4 access control policy for..,5: select MBC_MEMN_GLBAC5 access control policy for..,6: select MBC_MEMN_GLBAC6 access control policy for..,7: select MBC_MEMN_GLBAC7 access control policy for.."
sif (cpuis("MC?A152*"))
group.long 0x1C8++0x3
line.long 0x0 "MBC0_DOM0_MEM2_BLK_NSE_W0,MBC Memory Block NonSecure Enable Word"
bitfld.long 0x0 31. "BIT31,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 30. "BIT30,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 29. "BIT29,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 28. "BIT28,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 27. "BIT27,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 26. "BIT26,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 25. "BIT25,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 24. "BIT24,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 23. "BIT23,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 22. "BIT22,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 21. "BIT21,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 20. "BIT20,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 19. "BIT19,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 18. "BIT18,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 17. "BIT17,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 16. "BIT16,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 15. "BIT15,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 14. "BIT14,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 13. "BIT13,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 12. "BIT12,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 11. "BIT11,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 10. "BIT10,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 9. "BIT9,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 8. "BIT8,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 7. "BIT7,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 6. "BIT6,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 5. "BIT5,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 4. "BIT4,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 3. "BIT3,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 2. "BIT2,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 1. "BIT1,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 0. "BIT0,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
endif
sif (cpuis("MC?A153*"))
group.long 0x1C8++0x3
line.long 0x0 "MBC0_DOM0_MEM2_BLK_NSE_W0,MBC Memory Block NonSecure Enable Word"
bitfld.long 0x0 31. "BIT31,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 30. "BIT30,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 29. "BIT29,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 28. "BIT28,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 27. "BIT27,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 26. "BIT26,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 25. "BIT25,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 24. "BIT24,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 23. "BIT23,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 22. "BIT22,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 21. "BIT21,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 20. "BIT20,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 19. "BIT19,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 18. "BIT18,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 17. "BIT17,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 16. "BIT16,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 15. "BIT15,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 14. "BIT14,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 13. "BIT13,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 12. "BIT12,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 11. "BIT11,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 10. "BIT10,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 9. "BIT9,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 8. "BIT8,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 7. "BIT7,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 6. "BIT6,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 5. "BIT5,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 4. "BIT4,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 3. "BIT3,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 2. "BIT2,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
newline
bitfld.long 0x0 1. "BIT1,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
bitfld.long 0x0 0. "BIT0,Bit b NonSecure Enable [b = 0 - 31]" "0: Secure accesses to block B are based on..,1: Secure accesses to block B are not allowed.."
endif
tree.end
tree "MRCC"
base ad:0x40091000
group.long 0x0++0x3
line.long 0x0 "MRCC_GLB_RST0,Peripheral Reset Control 0"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
bitfld.long 0x0 31. "PORT2,Write to PORT2" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 30. "PORT1,Write to PORT1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 29. "PORT0,Write to PORT0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 28. "CMP1,Write to CMP1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 26. "ADC0,Write to ADC0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 25. "OSTIMER0,Write to OSTIMER0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 24. "FLEXPWM0,Write to FLEXPWM0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 23. "QDC0,Write to QDC0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 22. "USB0,Write to USB0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 21. "LPUART2,Write to LPUART2" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 20. "LPUART1,Write to LPUART1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 19. "LPUART0,Write to LPUART0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 18. "LPSPI1,Write to LPSPI1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 17. "LPSPI0,Write to LPSPI0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 16. "LPI2C0,Write to LPI2C0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 12. "ERM,Write to ERM" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 11. "EIM,Write to EIM" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 10. "CRC,Write to CRC" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 9. "AOI0,Write to AOI0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 8. "DMA,Write to DMA" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 6. "UTICK0,Write to UTICK0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 5. "FREQME,Write to FREQME" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
endif
sif (cpuis("MC?A144*"))
bitfld.long 0x0 31. "FLEXPWM1,FLEXPWM1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 30. "FLEXPWM0,FLEXPWM0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 29. "QDC1,QDC1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 28. "QDC0,QDC0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 27. "USB0,USB0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 26. "LPUART4,LPUART4" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 25. "LPUART3,LPUART3" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 24. "LPUART2,LPUART2" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 23. "LPUART1,LPUART1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 22. "LPUART0,LPUART0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 21. "LPSPI1,LPSPI1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 20. "LPSPI0,LPSPI0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 19. "LPI2C1,LPI2C1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 18. "LPI2C0,LPI2C0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 17. "FLEXIO0,FLEXIO0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 16. "AOI1,AOI1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
endif
sif (cpuis("MC?A145*"))
bitfld.long 0x0 31. "FLEXPWM1,FLEXPWM1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 30. "FLEXPWM0,FLEXPWM0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 29. "QDC1,QDC1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 28. "QDC0,QDC0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 27. "USB0,USB0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 26. "LPUART4,LPUART4" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 25. "LPUART3,LPUART3" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 24. "LPUART2,LPUART2" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 23. "LPUART1,LPUART1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 22. "LPUART0,LPUART0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 21. "LPSPI1,LPSPI1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 20. "LPSPI0,LPSPI0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 19. "LPI2C1,LPI2C1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 18. "LPI2C0,LPI2C0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 17. "FLEXIO0,FLEXIO0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 16. "AOI1,AOI1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
endif
sif (cpuis("MC?A146*"))
bitfld.long 0x0 31. "FLEXPWM1,FLEXPWM1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 30. "FLEXPWM0,FLEXPWM0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 29. "QDC1,QDC1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 28. "QDC0,QDC0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 27. "USB0,USB0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 26. "LPUART4,LPUART4" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 25. "LPUART3,LPUART3" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 24. "LPUART2,LPUART2" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 23. "LPUART1,LPUART1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 22. "LPUART0,LPUART0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 21. "LPSPI1,LPSPI1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 20. "LPSPI0,LPSPI0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 19. "LPI2C1,LPI2C1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 18. "LPI2C0,LPI2C0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 17. "FLEXIO0,FLEXIO0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 16. "AOI1,AOI1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
endif
sif (cpuis("MC?A154*"))
bitfld.long 0x0 31. "FLEXPWM1,FLEXPWM1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 30. "FLEXPWM0,FLEXPWM0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 29. "QDC1,QDC1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 28. "QDC0,QDC0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 27. "USB0,USB0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 26. "LPUART4,LPUART4" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 25. "LPUART3,LPUART3" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 24. "LPUART2,LPUART2" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 23. "LPUART1,LPUART1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 22. "LPUART0,LPUART0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 21. "LPSPI1,LPSPI1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 20. "LPSPI0,LPSPI0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 19. "LPI2C1,LPI2C1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 18. "LPI2C0,LPI2C0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 17. "FLEXIO0,FLEXIO0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 16. "AOI1,AOI1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
endif
sif (cpuis("MC?A155*"))
bitfld.long 0x0 31. "FLEXPWM1,FLEXPWM1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 30. "FLEXPWM0,FLEXPWM0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 29. "QDC1,QDC1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 28. "QDC0,QDC0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 27. "USB0,USB0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 26. "LPUART4,LPUART4" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 25. "LPUART3,LPUART3" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 24. "LPUART2,LPUART2" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 23. "LPUART1,LPUART1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 22. "LPUART0,LPUART0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 21. "LPSPI1,LPSPI1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 20. "LPSPI0,LPSPI0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 19. "LPI2C1,LPI2C1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 18. "LPI2C0,LPI2C0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 17. "FLEXIO0,FLEXIO0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 16. "AOI1,AOI1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
endif
sif (cpuis("MC?A156*"))
bitfld.long 0x0 31. "FLEXPWM1,FLEXPWM1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 30. "FLEXPWM0,FLEXPWM0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 29. "QDC1,QDC1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 28. "QDC0,QDC0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 27. "USB0,USB0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 26. "LPUART4,LPUART4" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 25. "LPUART3,LPUART3" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 24. "LPUART2,LPUART2" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 23. "LPUART1,LPUART1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 22. "LPUART0,LPUART0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 21. "LPSPI1,LPSPI1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 20. "LPSPI0,LPSPI0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 19. "LPI2C1,LPI2C1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 18. "LPI2C0,LPI2C0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 17. "FLEXIO0,FLEXIO0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 16. "AOI1,AOI1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
endif
sif (cpuis("MC?A152*"))
bitfld.long 0x0 31. "PORT2,Write to PORT2" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 30. "PORT1,Write to PORT1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 29. "PORT0,Write to PORT0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 28. "CMP1,Write to CMP1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
endif
sif (cpuis("MC?A153*"))
bitfld.long 0x0 31. "PORT2,Write to PORT2" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 30. "PORT1,Write to PORT1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 29. "PORT0,Write to PORT0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 28. "CMP1,Write to CMP1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
endif
sif (cpuis("MC?A152*"))
bitfld.long 0x0 26. "ADC0,Write to ADC0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 25. "OSTIMER0,Write to OSTIMER0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 24. "FLEXPWM0,Write to FLEXPWM0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 23. "QDC0,Write to QDC0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 22. "USB0,Write to USB0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 21. "LPUART2,Write to LPUART2" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 20. "LPUART1,Write to LPUART1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 19. "LPUART0,Write to LPUART0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 18. "LPSPI1,Write to LPSPI1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 17. "LPSPI0,Write to LPSPI0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 16. "LPI2C0,Write to LPI2C0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
endif
sif (cpuis("MC?A153*"))
bitfld.long 0x0 26. "ADC0,Write to ADC0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 25. "OSTIMER0,Write to OSTIMER0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 24. "FLEXPWM0,Write to FLEXPWM0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 23. "QDC0,Write to QDC0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 22. "USB0,Write to USB0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 21. "LPUART2,Write to LPUART2" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 20. "LPUART1,Write to LPUART1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 19. "LPUART0,Write to LPUART0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 18. "LPSPI1,Write to LPSPI1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 17. "LPSPI0,Write to LPSPI0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 16. "LPI2C0,Write to LPI2C0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
endif
sif (cpuis("MC?A144*"))
bitfld.long 0x0 14. "ERM0,ERM0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 13. "EIM0,EIM0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 12. "CRC0,CRC0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 11. "AOI0,AOI0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 10. "DMA,DMA" "0: Peripheral is held in reset,1: Peripheral is released from reset"
endif
sif (cpuis("MC?A145*"))
bitfld.long 0x0 14. "ERM0,ERM0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 13. "EIM0,EIM0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 12. "CRC0,CRC0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 11. "AOI0,AOI0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 10. "DMA,DMA" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
endif
sif (cpuis("MC?A146*"))
bitfld.long 0x0 14. "ERM0,ERM0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 13. "EIM0,EIM0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 12. "CRC0,CRC0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 11. "AOI0,AOI0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 10. "DMA,DMA" "0: Peripheral is held in reset,1: Peripheral is released from reset"
endif
sif (cpuis("MC?A154*"))
bitfld.long 0x0 14. "ERM0,ERM0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 13. "EIM0,EIM0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 12. "CRC0,CRC0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 11. "AOI0,AOI0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 10. "DMA,DMA" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
endif
sif (cpuis("MC?A155*"))
bitfld.long 0x0 14. "ERM0,ERM0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 13. "EIM0,EIM0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 12. "CRC0,CRC0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 11. "AOI0,AOI0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 10. "DMA,DMA" "0: Peripheral is held in reset,1: Peripheral is released from reset"
endif
sif (cpuis("MC?A156*"))
bitfld.long 0x0 14. "ERM0,ERM0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 13. "EIM0,EIM0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 12. "CRC0,CRC0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 11. "AOI0,AOI0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 10. "DMA,DMA" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
endif
sif (cpuis("MC?A152*"))
bitfld.long 0x0 12. "ERM,Write to ERM" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 11. "EIM,Write to EIM" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 10. "CRC,Write to CRC" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 9. "AOI0,Write to AOI0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 8. "DMA,Write to DMA" "0: Peripheral is held in reset,1: Peripheral is released from reset"
endif
sif (cpuis("MC?A153*"))
bitfld.long 0x0 12. "ERM,Write to ERM" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 11. "EIM,Write to EIM" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 10. "CRC,Write to CRC" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 9. "AOI0,Write to AOI0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 8. "DMA,Write to DMA" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
endif
sif (cpuis("MC?A144*"))
bitfld.long 0x0 8. "UTICK0,UTICK0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 7. "FREQME,FREQME" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 6. "CTIMER4,CTIMER4" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 5. "CTIMER3,CTIMER3" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
endif
sif (cpuis("MC?A145*"))
bitfld.long 0x0 8. "UTICK0,UTICK0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 7. "FREQME,FREQME" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 6. "CTIMER4,CTIMER4" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 5. "CTIMER3,CTIMER3" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
endif
sif (cpuis("MC?A146*"))
bitfld.long 0x0 8. "UTICK0,UTICK0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 7. "FREQME,FREQME" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 6. "CTIMER4,CTIMER4" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 5. "CTIMER3,CTIMER3" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
endif
sif (cpuis("MC?A154*"))
bitfld.long 0x0 8. "UTICK0,UTICK0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 7. "FREQME,FREQME" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 6. "CTIMER4,CTIMER4" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 5. "CTIMER3,CTIMER3" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
endif
sif (cpuis("MC?A155*"))
bitfld.long 0x0 8. "UTICK0,UTICK0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 7. "FREQME,FREQME" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 6. "CTIMER4,CTIMER4" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 5. "CTIMER3,CTIMER3" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
endif
sif (cpuis("MC?A156*"))
bitfld.long 0x0 8. "UTICK0,UTICK0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 7. "FREQME,FREQME" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 6. "CTIMER4,CTIMER4" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 5. "CTIMER3,CTIMER3" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
endif
sif (cpuis("MC?A152*"))
bitfld.long 0x0 6. "UTICK0,Write to UTICK0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 5. "FREQME,Write to FREQME" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
endif
sif (cpuis("MC?A153*"))
bitfld.long 0x0 6. "UTICK0,Write to UTICK0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 5. "FREQME,Write to FREQME" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
endif
bitfld.long 0x0 4. "CTIMER2,Write to CTIMER2" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 3. "CTIMER1,Write to CTIMER1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 2. "CTIMER0,Write to CTIMER0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 1. "I3C0,Write to I3C0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 0. "INPUTMUX0,Write to INPUTMUX0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
wgroup.long 0x4++0x7
line.long 0x0 "MRCC_GLB_RST0_SET,Peripheral Reset Control Set 0"
hexmask.long 0x0 0.--31. 1. "DATA,Data array value refer to corresponding position in MRCC_GLB_RSTn."
line.long 0x4 "MRCC_GLB_RST0_CLR,Peripheral Reset Control Clear 0"
hexmask.long 0x4 0.--31. 1. "DATA,Data array value refer to corresponding position in MRCC_GLB_RSTn."
group.long 0x10++0x3
line.long 0x0 "MRCC_GLB_RST1,Peripheral Reset Control 1"
sif (cpuis("MC?A144*"))
bitfld.long 0x0 24. "GPIO4,GPIO4" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 23. "GPIO3,GPIO3" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 22. "GPIO2,GPIO2" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 21. "GPIO1,GPIO1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 20. "GPIO0,GPIO0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
endif
sif (cpuis("MC?A145*"))
bitfld.long 0x0 24. "GPIO4,GPIO4" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 23. "GPIO3,GPIO3" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 22. "GPIO2,GPIO2" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 21. "GPIO1,GPIO1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 20. "GPIO0,GPIO0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
endif
sif (cpuis("MC?A146*"))
bitfld.long 0x0 24. "GPIO4,GPIO4" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 23. "GPIO3,GPIO3" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 22. "GPIO2,GPIO2" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 21. "GPIO1,GPIO1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 20. "GPIO0,GPIO0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
endif
sif (cpuis("MC?A154*"))
bitfld.long 0x0 24. "GPIO4,GPIO4" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 23. "GPIO3,GPIO3" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 22. "GPIO2,GPIO2" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 21. "GPIO1,GPIO1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 20. "GPIO0,GPIO0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
endif
sif (cpuis("MC?A155*"))
bitfld.long 0x0 24. "GPIO4,GPIO4" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 23. "GPIO3,GPIO3" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 22. "GPIO2,GPIO2" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 21. "GPIO1,GPIO1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 20. "GPIO0,GPIO0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
endif
sif (cpuis("MC?A156*"))
bitfld.long 0x0 24. "GPIO4,GPIO4" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 23. "GPIO3,GPIO3" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 22. "GPIO2,GPIO2" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 21. "GPIO1,GPIO1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 20. "GPIO0,GPIO0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
endif
sif (cpuis("MC?A144*"))
bitfld.long 0x0 14. "LPI2C3,LPI2C3" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 13. "LPI2C2,LPI2C2" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 12. "FLEXCAN0,FLEXCAN0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 11. "PORT4,PORT4" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 10. "PORT3,PORT3" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 9. "PORT2,PORT2" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 8. "PORT1,PORT1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 7. "PORT0,PORT0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 6. "OPAMP0,OPAMP0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 5. "DAC0,DAC0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 4. "CMP1,CMP1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
endif
sif (cpuis("MC?A145*"))
bitfld.long 0x0 14. "LPI2C3,LPI2C3" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 13. "LPI2C2,LPI2C2" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 12. "FLEXCAN0,FLEXCAN0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 11. "PORT4,PORT4" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 10. "PORT3,PORT3" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 9. "PORT2,PORT2" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 8. "PORT1,PORT1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 7. "PORT0,PORT0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 6. "OPAMP0,OPAMP0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 5. "DAC0,DAC0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 4. "CMP1,CMP1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
endif
sif (cpuis("MC?A146*"))
bitfld.long 0x0 14. "LPI2C3,LPI2C3" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 13. "LPI2C2,LPI2C2" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 12. "FLEXCAN0,FLEXCAN0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 11. "PORT4,PORT4" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 10. "PORT3,PORT3" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 9. "PORT2,PORT2" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 8. "PORT1,PORT1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 7. "PORT0,PORT0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 6. "OPAMP0,OPAMP0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 5. "DAC0,DAC0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 4. "CMP1,CMP1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
endif
sif (cpuis("MC?A154*"))
bitfld.long 0x0 14. "LPI2C3,LPI2C3" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 13. "LPI2C2,LPI2C2" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 12. "FLEXCAN0,FLEXCAN0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 11. "PORT4,PORT4" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 10. "PORT3,PORT3" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 9. "PORT2,PORT2" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 8. "PORT1,PORT1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 7. "PORT0,PORT0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 6. "OPAMP0,OPAMP0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 5. "DAC0,DAC0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 4. "CMP1,CMP1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
endif
sif (cpuis("MC?A155*"))
bitfld.long 0x0 14. "LPI2C3,LPI2C3" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 13. "LPI2C2,LPI2C2" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 12. "FLEXCAN0,FLEXCAN0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 11. "PORT4,PORT4" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 10. "PORT3,PORT3" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 9. "PORT2,PORT2" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 8. "PORT1,PORT1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 7. "PORT0,PORT0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 6. "OPAMP0,OPAMP0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 5. "DAC0,DAC0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 4. "CMP1,CMP1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
endif
sif (cpuis("MC?A156*"))
bitfld.long 0x0 14. "LPI2C3,LPI2C3" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 13. "LPI2C2,LPI2C2" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 12. "FLEXCAN0,FLEXCAN0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 11. "PORT4,PORT4" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 10. "PORT3,PORT3" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 9. "PORT2,PORT2" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 8. "PORT1,PORT1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 7. "PORT0,PORT0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 6. "OPAMP0,OPAMP0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 5. "DAC0,DAC0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 4. "CMP1,CMP1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
endif
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
bitfld.long 0x0 8. "GPIO3,Write to GPIO3" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 7. "GPIO2,Write to GPIO2" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 6. "GPIO1,Write to GPIO1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 5. "GPIO0,Write to GPIO0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 0. "PORT3,Write to PORT3" "0: Peripheral is held in reset,1: Peripheral is released from reset"
endif
sif (cpuis("MC?A152*"))
bitfld.long 0x0 8. "GPIO3,Write to GPIO3" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 7. "GPIO2,Write to GPIO2" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 6. "GPIO1,Write to GPIO1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 5. "GPIO0,Write to GPIO0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
endif
sif (cpuis("MC?A153*"))
bitfld.long 0x0 8. "GPIO3,Write to GPIO3" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 7. "GPIO2,Write to GPIO2" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 6. "GPIO1,Write to GPIO1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 5. "GPIO0,Write to GPIO0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
endif
sif (cpuis("MC?A144*"))
bitfld.long 0x0 2. "ADC1,ADC1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 1. "ADC0,ADC0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 0. "OSTIMER0,OSTIMER0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
endif
sif (cpuis("MC?A145*"))
bitfld.long 0x0 2. "ADC1,ADC1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 1. "ADC0,ADC0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 0. "OSTIMER0,OSTIMER0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
endif
sif (cpuis("MC?A146*"))
bitfld.long 0x0 2. "ADC1,ADC1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 1. "ADC0,ADC0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 0. "OSTIMER0,OSTIMER0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
endif
sif (cpuis("MC?A154*"))
bitfld.long 0x0 2. "ADC1,ADC1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 1. "ADC0,ADC0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 0. "OSTIMER0,OSTIMER0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
endif
sif (cpuis("MC?A155*"))
bitfld.long 0x0 2. "ADC1,ADC1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 1. "ADC0,ADC0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 0. "OSTIMER0,OSTIMER0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
endif
sif (cpuis("MC?A156*"))
bitfld.long 0x0 2. "ADC1,ADC1" "0: Peripheral is held in reset,1: Peripheral is released from reset"
bitfld.long 0x0 1. "ADC0,ADC0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
bitfld.long 0x0 0. "OSTIMER0,OSTIMER0" "0: Peripheral is held in reset,1: Peripheral is released from reset"
endif
sif (cpuis("MC?A152*"))
bitfld.long 0x0 0. "PORT3,Write to PORT3" "0: Peripheral is held in reset,1: Peripheral is released from reset"
newline
endif
sif (cpuis("MC?A153*"))
bitfld.long 0x0 0. "PORT3,Write to PORT3" "0: Peripheral is held in reset,1: Peripheral is released from reset"
endif
wgroup.long 0x14++0x7
line.long 0x0 "MRCC_GLB_RST1_SET,Peripheral Reset Control Set 1"
hexmask.long 0x0 0.--31. 1. "DATA,Data array value refer to corresponding position in MRCC_GLB_RSTn."
line.long 0x4 "MRCC_GLB_RST1_CLR,Peripheral Reset Control Clear 1"
hexmask.long 0x4 0.--31. 1. "DATA,Data array value refer to corresponding position in MRCC_GLB_RSTn."
group.long 0x40++0x3
line.long 0x0 "MRCC_GLB_CC0,AHB Clock Control 0"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
bitfld.long 0x0 31. "PORT2,Write to PORT2" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 30. "PORT1,Write to PORT1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 29. "PORT0,Write to PORT0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 28. "CMP1,Write to CMP1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 27. "CMP0,Write to CMP0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 26. "ADC0,Write to ADC0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 25. "OSTIMER0,Write to OSTIMER0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 24. "FLEXPWM0,Write to FLEXPWM0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 23. "QDC0,Write to QDC0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 22. "USB0,Write to USB0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 21. "LPUART2,Write to LPUART2" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 20. "LPUART1,Write to LPUART1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 19. "LPUART0,Write to LPUART0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 18. "LPSPI1,write to LPSPI1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 17. "LPSPI0,Write to LPSPI0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 16. "LPI2C0,Write to LPI2C0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 12. "ERM,Write to ERM" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 11. "EIM,Write to EIM" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 10. "CRC,Write to CRC" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 9. "AOI0,Write to AOI0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 8. "DMA,Write to DMA" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 7. "WWDT0,Write to WWDT0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 6. "UTICK0,Write to UTICK0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 5. "FREQME,Write to FREQME" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
endif
sif (cpuis("MC?A144*"))
bitfld.long 0x0 31. "FLEXPWM1,FLEXPWM1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 30. "FLEXPWM0,FLEXPWM0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 29. "QDC1,QDC1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 28. "QDC0,QDC0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 27. "USB0,USB0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 26. "LPUART4,LPUART4" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 25. "LPUART3,LPUART3" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 24. "LPUART2,LPUART2" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 23. "LPUART1,LPUART1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 22. "LPUART0,LPUART0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 21. "LPSPI1,LPSPI1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 20. "LPSPI0,LPSPI0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 19. "LPI2C1,LPI2C1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 18. "LPI2C0,LPI2C0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 17. "FLEXIO0,FLEXIO0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 16. "AOI1,AOI1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 15. "FMC,FMC" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 14. "ERM0,ERM0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 13. "EIM0,EIM0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 12. "CRC0,CRC0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 11. "AOI0,AOI0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 10. "DMA,DMA" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 9. "WWDT0,WWDT0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 8. "UTICK0,UTICK0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 7. "FREQME,FREQME" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 6. "CTIMER4,CTIMER4" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 5. "CTIMER3,CTIMER3" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
endif
sif (cpuis("MC?A145*"))
bitfld.long 0x0 31. "FLEXPWM1,FLEXPWM1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 30. "FLEXPWM0,FLEXPWM0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 29. "QDC1,QDC1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 28. "QDC0,QDC0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 27. "USB0,USB0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 26. "LPUART4,LPUART4" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 25. "LPUART3,LPUART3" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 24. "LPUART2,LPUART2" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 23. "LPUART1,LPUART1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 22. "LPUART0,LPUART0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 21. "LPSPI1,LPSPI1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 20. "LPSPI0,LPSPI0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 19. "LPI2C1,LPI2C1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 18. "LPI2C0,LPI2C0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 17. "FLEXIO0,FLEXIO0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 16. "AOI1,AOI1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 15. "FMC,FMC" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 14. "ERM0,ERM0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 13. "EIM0,EIM0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 12. "CRC0,CRC0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 11. "AOI0,AOI0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 10. "DMA,DMA" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 9. "WWDT0,WWDT0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 8. "UTICK0,UTICK0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 7. "FREQME,FREQME" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 6. "CTIMER4,CTIMER4" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 5. "CTIMER3,CTIMER3" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
endif
sif (cpuis("MC?A146*"))
bitfld.long 0x0 31. "FLEXPWM1,FLEXPWM1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 30. "FLEXPWM0,FLEXPWM0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 29. "QDC1,QDC1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 28. "QDC0,QDC0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 27. "USB0,USB0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 26. "LPUART4,LPUART4" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 25. "LPUART3,LPUART3" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 24. "LPUART2,LPUART2" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 23. "LPUART1,LPUART1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 22. "LPUART0,LPUART0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 21. "LPSPI1,LPSPI1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 20. "LPSPI0,LPSPI0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 19. "LPI2C1,LPI2C1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 18. "LPI2C0,LPI2C0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 17. "FLEXIO0,FLEXIO0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 16. "AOI1,AOI1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 15. "FMC,FMC" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 14. "ERM0,ERM0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 13. "EIM0,EIM0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 12. "CRC0,CRC0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 11. "AOI0,AOI0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 10. "DMA,DMA" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 9. "WWDT0,WWDT0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 8. "UTICK0,UTICK0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 7. "FREQME,FREQME" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 6. "CTIMER4,CTIMER4" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 5. "CTIMER3,CTIMER3" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
endif
sif (cpuis("MC?A154*"))
bitfld.long 0x0 31. "FLEXPWM1,FLEXPWM1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 30. "FLEXPWM0,FLEXPWM0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 29. "QDC1,QDC1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 28. "QDC0,QDC0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 27. "USB0,USB0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 26. "LPUART4,LPUART4" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 25. "LPUART3,LPUART3" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 24. "LPUART2,LPUART2" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 23. "LPUART1,LPUART1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 22. "LPUART0,LPUART0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 21. "LPSPI1,LPSPI1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 20. "LPSPI0,LPSPI0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 19. "LPI2C1,LPI2C1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 18. "LPI2C0,LPI2C0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 17. "FLEXIO0,FLEXIO0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 16. "AOI1,AOI1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 15. "FMC,FMC" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 14. "ERM0,ERM0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 13. "EIM0,EIM0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 12. "CRC0,CRC0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 11. "AOI0,AOI0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 10. "DMA,DMA" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 9. "WWDT0,WWDT0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 8. "UTICK0,UTICK0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 7. "FREQME,FREQME" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 6. "CTIMER4,CTIMER4" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 5. "CTIMER3,CTIMER3" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
endif
sif (cpuis("MC?A155*"))
bitfld.long 0x0 31. "FLEXPWM1,FLEXPWM1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 30. "FLEXPWM0,FLEXPWM0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 29. "QDC1,QDC1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 28. "QDC0,QDC0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 27. "USB0,USB0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 26. "LPUART4,LPUART4" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 25. "LPUART3,LPUART3" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 24. "LPUART2,LPUART2" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 23. "LPUART1,LPUART1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 22. "LPUART0,LPUART0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 21. "LPSPI1,LPSPI1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 20. "LPSPI0,LPSPI0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 19. "LPI2C1,LPI2C1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 18. "LPI2C0,LPI2C0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 17. "FLEXIO0,FLEXIO0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 16. "AOI1,AOI1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 15. "FMC,FMC" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 14. "ERM0,ERM0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 13. "EIM0,EIM0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 12. "CRC0,CRC0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 11. "AOI0,AOI0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 10. "DMA,DMA" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 9. "WWDT0,WWDT0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 8. "UTICK0,UTICK0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 7. "FREQME,FREQME" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 6. "CTIMER4,CTIMER4" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 5. "CTIMER3,CTIMER3" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
endif
sif (cpuis("MC?A156*"))
bitfld.long 0x0 31. "FLEXPWM1,FLEXPWM1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 30. "FLEXPWM0,FLEXPWM0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 29. "QDC1,QDC1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 28. "QDC0,QDC0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 27. "USB0,USB0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 26. "LPUART4,LPUART4" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 25. "LPUART3,LPUART3" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 24. "LPUART2,LPUART2" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 23. "LPUART1,LPUART1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 22. "LPUART0,LPUART0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 21. "LPSPI1,LPSPI1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 20. "LPSPI0,LPSPI0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 19. "LPI2C1,LPI2C1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 18. "LPI2C0,LPI2C0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 17. "FLEXIO0,FLEXIO0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 16. "AOI1,AOI1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 15. "FMC,FMC" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 14. "ERM0,ERM0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 13. "EIM0,EIM0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 12. "CRC0,CRC0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 11. "AOI0,AOI0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 10. "DMA,DMA" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 9. "WWDT0,WWDT0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 8. "UTICK0,UTICK0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 7. "FREQME,FREQME" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 6. "CTIMER4,CTIMER4" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 5. "CTIMER3,CTIMER3" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
endif
sif (cpuis("MC?A152*"))
bitfld.long 0x0 31. "PORT2,Write to PORT2" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 30. "PORT1,Write to PORT1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 29. "PORT0,Write to PORT0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 28. "CMP1,Write to CMP1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 27. "CMP0,Write to CMP0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 26. "ADC0,Write to ADC0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 25. "OSTIMER0,Write to OSTIMER0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 24. "FLEXPWM0,Write to FLEXPWM0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 23. "QDC0,Write to QDC0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 22. "USB0,Write to USB0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 21. "LPUART2,Write to LPUART2" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 20. "LPUART1,Write to LPUART1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 19. "LPUART0,Write to LPUART0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 18. "LPSPI1,write to LPSPI1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 17. "LPSPI0,Write to LPSPI0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 16. "LPI2C0,Write to LPI2C0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
endif
sif (cpuis("MC?A153*"))
bitfld.long 0x0 31. "PORT2,Write to PORT2" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 30. "PORT1,Write to PORT1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 29. "PORT0,Write to PORT0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 28. "CMP1,Write to CMP1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 27. "CMP0,Write to CMP0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 26. "ADC0,Write to ADC0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 25. "OSTIMER0,Write to OSTIMER0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 24. "FLEXPWM0,Write to FLEXPWM0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 23. "QDC0,Write to QDC0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 22. "USB0,Write to USB0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 21. "LPUART2,Write to LPUART2" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 20. "LPUART1,Write to LPUART1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 19. "LPUART0,Write to LPUART0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 18. "LPSPI1,write to LPSPI1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 17. "LPSPI0,Write to LPSPI0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 16. "LPI2C0,Write to LPI2C0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
endif
sif (cpuis("MC?A152*"))
bitfld.long 0x0 12. "ERM,Write to ERM" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 11. "EIM,Write to EIM" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 10. "CRC,Write to CRC" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 9. "AOI0,Write to AOI0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 8. "DMA,Write to DMA" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 7. "WWDT0,Write to WWDT0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 6. "UTICK0,Write to UTICK0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 5. "FREQME,Write to FREQME" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
endif
sif (cpuis("MC?A153*"))
bitfld.long 0x0 12. "ERM,Write to ERM" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 11. "EIM,Write to EIM" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 10. "CRC,Write to CRC" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 9. "AOI0,Write to AOI0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 8. "DMA,Write to DMA" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 7. "WWDT0,Write to WWDT0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 6. "UTICK0,Write to UTICK0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 5. "FREQME,Write to FREQME" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
endif
bitfld.long 0x0 4. "CTIMER2,Write to CTIMER2" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 3. "CTIMER1,Write to CTIMER1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 2. "CTIMER0,Write to CTIMER0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 1. "I3C0,Write to I3C0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 0. "INPUTMUX0,write to INPUTMUX0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
wgroup.long 0x44++0x7
line.long 0x0 "MRCC_GLB_CC0_SET,AHB Clock Control Set 0"
hexmask.long 0x0 0.--31. 1. "DATA,Data array value refer to corresponding position in MRCC_GLB_CCn."
line.long 0x4 "MRCC_GLB_CC0_CLR,AHB Clock Control Clear 0"
hexmask.long 0x4 0.--31. 1. "DATA,Data array value refer to corresponding position in MRCC_GLB_CCn."
group.long 0x50++0x3
line.long 0x0 "MRCC_GLB_CC1,AHB Clock Control 1"
sif (cpuis("MC?A144*"))
bitfld.long 0x0 25. "ROMC,ROMC" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 24. "GPIO4,GPIO4" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 23. "GPIO3,GPIO3" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 22. "GPIO2,GPIO2" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 21. "GPIO1,GPIO1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 20. "GPIO0,GPIO0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 19. "RAMB,RAMB" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 18. "RAMA,RAMA" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
endif
sif (cpuis("MC?A145*"))
bitfld.long 0x0 25. "ROMC,ROMC" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 24. "GPIO4,GPIO4" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 23. "GPIO3,GPIO3" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 22. "GPIO2,GPIO2" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 21. "GPIO1,GPIO1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 20. "GPIO0,GPIO0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 19. "RAMB,RAMB" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 18. "RAMA,RAMA" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
endif
sif (cpuis("MC?A146*"))
bitfld.long 0x0 25. "ROMC,ROMC" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 24. "GPIO4,GPIO4" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 23. "GPIO3,GPIO3" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 22. "GPIO2,GPIO2" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 21. "GPIO1,GPIO1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 20. "GPIO0,GPIO0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 19. "RAMB,RAMB" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 18. "RAMA,RAMA" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
endif
sif (cpuis("MC?A154*"))
bitfld.long 0x0 25. "ROMC,ROMC" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 24. "GPIO4,GPIO4" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 23. "GPIO3,GPIO3" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 22. "GPIO2,GPIO2" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 21. "GPIO1,GPIO1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 20. "GPIO0,GPIO0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 19. "RAMB,RAMB" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 18. "RAMA,RAMA" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
endif
sif (cpuis("MC?A155*"))
bitfld.long 0x0 25. "ROMC,ROMC" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 24. "GPIO4,GPIO4" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 23. "GPIO3,GPIO3" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 22. "GPIO2,GPIO2" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 21. "GPIO1,GPIO1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 20. "GPIO0,GPIO0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 19. "RAMB,RAMB" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 18. "RAMA,RAMA" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
endif
sif (cpuis("MC?A156*"))
bitfld.long 0x0 25. "ROMC,ROMC" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 24. "GPIO4,GPIO4" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 23. "GPIO3,GPIO3" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 22. "GPIO2,GPIO2" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 21. "GPIO1,GPIO1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 20. "GPIO0,GPIO0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 19. "RAMB,RAMB" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 18. "RAMA,RAMA" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
endif
sif (cpuis("MC?A144*"))
bitfld.long 0x0 14. "LPI2C3,LPI2C3" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 13. "LPI2C2,LPI2C2" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 12. "FLEXCAN0,FLEXCAN0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 11. "PORT4,PORT4" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 10. "PORT3,PORT3" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 9. "PORT2,PORT2" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 8. "PORT1,PORT1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 7. "PORT0,PORT0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 6. "OPAMP0,OPAMP0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 5. "DAC0,DAC0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 4. "CMP1,CMP1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 3. "CMP0,CMP0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 2. "ADC1,ADC1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 1. "ADC0,ADC0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 0. "OSTIMER0,OSTIMER0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
endif
sif (cpuis("MC?A145*"))
bitfld.long 0x0 14. "LPI2C3,LPI2C3" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 13. "LPI2C2,LPI2C2" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 12. "FLEXCAN0,FLEXCAN0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 11. "PORT4,PORT4" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 10. "PORT3,PORT3" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 9. "PORT2,PORT2" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 8. "PORT1,PORT1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 7. "PORT0,PORT0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 6. "OPAMP0,OPAMP0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 5. "DAC0,DAC0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 4. "CMP1,CMP1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 3. "CMP0,CMP0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 2. "ADC1,ADC1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 1. "ADC0,ADC0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 0. "OSTIMER0,OSTIMER0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
endif
sif (cpuis("MC?A146*"))
bitfld.long 0x0 14. "LPI2C3,LPI2C3" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 13. "LPI2C2,LPI2C2" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 12. "FLEXCAN0,FLEXCAN0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 11. "PORT4,PORT4" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 10. "PORT3,PORT3" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 9. "PORT2,PORT2" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 8. "PORT1,PORT1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 7. "PORT0,PORT0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 6. "OPAMP0,OPAMP0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 5. "DAC0,DAC0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 4. "CMP1,CMP1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 3. "CMP0,CMP0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 2. "ADC1,ADC1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 1. "ADC0,ADC0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 0. "OSTIMER0,OSTIMER0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
endif
sif (cpuis("MC?A154*"))
bitfld.long 0x0 14. "LPI2C3,LPI2C3" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 13. "LPI2C2,LPI2C2" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 12. "FLEXCAN0,FLEXCAN0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 11. "PORT4,PORT4" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 10. "PORT3,PORT3" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 9. "PORT2,PORT2" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 8. "PORT1,PORT1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 7. "PORT0,PORT0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 6. "OPAMP0,OPAMP0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 5. "DAC0,DAC0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 4. "CMP1,CMP1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 3. "CMP0,CMP0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 2. "ADC1,ADC1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 1. "ADC0,ADC0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 0. "OSTIMER0,OSTIMER0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
endif
sif (cpuis("MC?A155*"))
bitfld.long 0x0 14. "LPI2C3,LPI2C3" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 13. "LPI2C2,LPI2C2" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 12. "FLEXCAN0,FLEXCAN0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 11. "PORT4,PORT4" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 10. "PORT3,PORT3" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 9. "PORT2,PORT2" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 8. "PORT1,PORT1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 7. "PORT0,PORT0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 6. "OPAMP0,OPAMP0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 5. "DAC0,DAC0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 4. "CMP1,CMP1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 3. "CMP0,CMP0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 2. "ADC1,ADC1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 1. "ADC0,ADC0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 0. "OSTIMER0,OSTIMER0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
endif
sif (cpuis("MC?A156*"))
bitfld.long 0x0 14. "LPI2C3,LPI2C3" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 13. "LPI2C2,LPI2C2" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 12. "FLEXCAN0,FLEXCAN0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 11. "PORT4,PORT4" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 10. "PORT3,PORT3" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 9. "PORT2,PORT2" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 8. "PORT1,PORT1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 7. "PORT0,PORT0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 6. "OPAMP0,OPAMP0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 5. "DAC0,DAC0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 4. "CMP1,CMP1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 3. "CMP0,CMP0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 2. "ADC1,ADC1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 1. "ADC0,ADC0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 0. "OSTIMER0,OSTIMER0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
endif
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
bitfld.long 0x0 9. "ROMCP,Write to ROMCP" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 8. "GPIO3,Write to GPIO3" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 7. "GPIO2,Write to GPIO2" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 6. "GPIO1,Write to GPIO1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 5. "GPIO0,Write to GPIO0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 4. "EZRAMC_RAMA,Write to EZRAMC_RAMA" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 3. "TCU,Write to TCU" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 2. "MTR,Write to MTR" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 0. "PORT3,Write to PORT3" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
endif
sif (cpuis("MC?A152*"))
bitfld.long 0x0 9. "ROMCP,Write to ROMCP" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 8. "GPIO3,Write to GPIO3" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 7. "GPIO2,Write to GPIO2" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 6. "GPIO1,Write to GPIO1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 5. "GPIO0,Write to GPIO0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 4. "EZRAMC_RAMA,Write to EZRAMC_RAMA" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 3. "TCU,Write to TCU" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 2. "MTR,Write to MTR" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
endif
sif (cpuis("MC?A153*"))
bitfld.long 0x0 9. "ROMCP,Write to ROMCP" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 8. "GPIO3,Write to GPIO3" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 7. "GPIO2,Write to GPIO2" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 6. "GPIO1,Write to GPIO1" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 5. "GPIO0,Write to GPIO0" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 4. "EZRAMC_RAMA,Write to EZRAMC_RAMA" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
bitfld.long 0x0 3. "TCU,Write to TCU" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
bitfld.long 0x0 2. "MTR,Write to MTR" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
endif
sif (cpuis("MC?A152*"))
bitfld.long 0x0 0. "PORT3,Write to PORT3" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
newline
endif
sif (cpuis("MC?A153*"))
bitfld.long 0x0 0. "PORT3,Write to PORT3" "0: Peripheral clock is disabled,1: Peripheral clock is enabled"
endif
wgroup.long 0x54++0x7
line.long 0x0 "MRCC_GLB_CC1_SET,AHB Clock Control Set 1"
hexmask.long 0x0 0.--31. 1. "DATA,Data array value refer to corresponding position in MRCC_GLB_CCn."
line.long 0x4 "MRCC_GLB_CC1_CLR,AHB Clock Control Clear 1"
hexmask.long 0x4 0.--31. 1. "DATA,Data array value refer to corresponding position in MRCC_GLB_CCn."
group.long 0x80++0x7
line.long 0x0 "MRCC_GLB_ACC0,Control Automatic Clock Gating 0"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
bitfld.long 0x0 31. "PORT2,Write to PORT2" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 30. "PORT1,Write to PORT1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 29. "PORT0,Write to PORT0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 28. "CMP1,Write to CMP1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 27. "CMP0,Write to CMP0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 26. "ADC0,Write to ADC0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 25. "OSTIMER0,Write to OSTIMER0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 24. "FLEXPWM0,Write to FLEXPWM0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 23. "QDC0,Write to QDC0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 22. "USB0,Write to USB0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 21. "LPUART2,Write to LPUART2" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 20. "LPUART1,Write to LPUART1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 19. "LPUART0,Write to LPUART0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 18. "LPSPI1,Write to LPSPI1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 17. "LPSPI0,Write to LPSPI0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 16. "LPI2C0,Write to LPI2C0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 12. "ERM,Write to ERM" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 11. "EIM,Write to EIM" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 10. "CRC,Write to CRC" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 9. "AOI0,Write to AOI0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 8. "DMA,Write to DMA" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 7. "WWDT0,Write to WWDT0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 6. "UTICK0,Write to UTICK0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 5. "FREQME,Write to FREQME" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
endif
sif (cpuis("MC?A144*"))
bitfld.long 0x0 31. "FLEXPWM1,FLEXPWM1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 30. "FLEXPWM0,FLEXPWM0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 29. "QDC1,QDC1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 28. "QDC0,QDC0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 27. "USB0,USB0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 26. "LPUART4,LPUART4" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 25. "LPUART3,LPUART3" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 24. "LPUART2,LPUART2" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 23. "LPUART1,LPUART1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 22. "LPUART0,LPUART0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 21. "LPSPI1,LPSPI1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 20. "LPSPI0,LPSPI0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 19. "LPI2C1,LPI2C1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 18. "LPI2C0,LPI2C0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 17. "FLEXIO0,FLEXIO0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 16. "AOI1,AOI1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 15. "FMC,FMC" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 14. "ERM0,ERM0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 13. "EIM0,EIM0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 12. "CRC0,CRC0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 11. "AOI0,AOI0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 10. "DMA,DMA" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 9. "WWDT0,WWDT0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 8. "UTICK0,UTICK0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 7. "FREQME,FREQME" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 6. "CTIMER4,CTIMER4" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 5. "CTIMER3,CTIMER3" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
endif
sif (cpuis("MC?A145*"))
bitfld.long 0x0 31. "FLEXPWM1,FLEXPWM1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 30. "FLEXPWM0,FLEXPWM0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 29. "QDC1,QDC1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 28. "QDC0,QDC0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 27. "USB0,USB0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 26. "LPUART4,LPUART4" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 25. "LPUART3,LPUART3" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 24. "LPUART2,LPUART2" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 23. "LPUART1,LPUART1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 22. "LPUART0,LPUART0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 21. "LPSPI1,LPSPI1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 20. "LPSPI0,LPSPI0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 19. "LPI2C1,LPI2C1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 18. "LPI2C0,LPI2C0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 17. "FLEXIO0,FLEXIO0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 16. "AOI1,AOI1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 15. "FMC,FMC" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 14. "ERM0,ERM0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 13. "EIM0,EIM0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 12. "CRC0,CRC0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 11. "AOI0,AOI0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 10. "DMA,DMA" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 9. "WWDT0,WWDT0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 8. "UTICK0,UTICK0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 7. "FREQME,FREQME" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 6. "CTIMER4,CTIMER4" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 5. "CTIMER3,CTIMER3" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
endif
sif (cpuis("MC?A146*"))
bitfld.long 0x0 31. "FLEXPWM1,FLEXPWM1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 30. "FLEXPWM0,FLEXPWM0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 29. "QDC1,QDC1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 28. "QDC0,QDC0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 27. "USB0,USB0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 26. "LPUART4,LPUART4" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 25. "LPUART3,LPUART3" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 24. "LPUART2,LPUART2" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 23. "LPUART1,LPUART1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 22. "LPUART0,LPUART0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 21. "LPSPI1,LPSPI1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 20. "LPSPI0,LPSPI0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 19. "LPI2C1,LPI2C1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 18. "LPI2C0,LPI2C0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 17. "FLEXIO0,FLEXIO0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 16. "AOI1,AOI1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 15. "FMC,FMC" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 14. "ERM0,ERM0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 13. "EIM0,EIM0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 12. "CRC0,CRC0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 11. "AOI0,AOI0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 10. "DMA,DMA" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 9. "WWDT0,WWDT0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 8. "UTICK0,UTICK0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 7. "FREQME,FREQME" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 6. "CTIMER4,CTIMER4" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 5. "CTIMER3,CTIMER3" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
endif
sif (cpuis("MC?A154*"))
bitfld.long 0x0 31. "FLEXPWM1,FLEXPWM1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 30. "FLEXPWM0,FLEXPWM0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 29. "QDC1,QDC1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 28. "QDC0,QDC0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 27. "USB0,USB0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 26. "LPUART4,LPUART4" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 25. "LPUART3,LPUART3" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 24. "LPUART2,LPUART2" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 23. "LPUART1,LPUART1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 22. "LPUART0,LPUART0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 21. "LPSPI1,LPSPI1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 20. "LPSPI0,LPSPI0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 19. "LPI2C1,LPI2C1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 18. "LPI2C0,LPI2C0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 17. "FLEXIO0,FLEXIO0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 16. "AOI1,AOI1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 15. "FMC,FMC" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 14. "ERM0,ERM0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 13. "EIM0,EIM0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 12. "CRC0,CRC0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 11. "AOI0,AOI0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 10. "DMA,DMA" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 9. "WWDT0,WWDT0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 8. "UTICK0,UTICK0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 7. "FREQME,FREQME" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 6. "CTIMER4,CTIMER4" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 5. "CTIMER3,CTIMER3" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
endif
sif (cpuis("MC?A155*"))
bitfld.long 0x0 31. "FLEXPWM1,FLEXPWM1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 30. "FLEXPWM0,FLEXPWM0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 29. "QDC1,QDC1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 28. "QDC0,QDC0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 27. "USB0,USB0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 26. "LPUART4,LPUART4" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 25. "LPUART3,LPUART3" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 24. "LPUART2,LPUART2" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 23. "LPUART1,LPUART1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 22. "LPUART0,LPUART0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 21. "LPSPI1,LPSPI1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 20. "LPSPI0,LPSPI0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 19. "LPI2C1,LPI2C1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 18. "LPI2C0,LPI2C0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 17. "FLEXIO0,FLEXIO0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 16. "AOI1,AOI1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 15. "FMC,FMC" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 14. "ERM0,ERM0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 13. "EIM0,EIM0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 12. "CRC0,CRC0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 11. "AOI0,AOI0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 10. "DMA,DMA" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 9. "WWDT0,WWDT0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 8. "UTICK0,UTICK0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 7. "FREQME,FREQME" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 6. "CTIMER4,CTIMER4" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 5. "CTIMER3,CTIMER3" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
endif
sif (cpuis("MC?A156*"))
bitfld.long 0x0 31. "FLEXPWM1,FLEXPWM1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 30. "FLEXPWM0,FLEXPWM0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 29. "QDC1,QDC1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 28. "QDC0,QDC0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 27. "USB0,USB0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 26. "LPUART4,LPUART4" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 25. "LPUART3,LPUART3" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 24. "LPUART2,LPUART2" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 23. "LPUART1,LPUART1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 22. "LPUART0,LPUART0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 21. "LPSPI1,LPSPI1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 20. "LPSPI0,LPSPI0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 19. "LPI2C1,LPI2C1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 18. "LPI2C0,LPI2C0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 17. "FLEXIO0,FLEXIO0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 16. "AOI1,AOI1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 15. "FMC,FMC" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 14. "ERM0,ERM0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 13. "EIM0,EIM0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 12. "CRC0,CRC0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 11. "AOI0,AOI0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 10. "DMA,DMA" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 9. "WWDT0,WWDT0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 8. "UTICK0,UTICK0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 7. "FREQME,FREQME" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 6. "CTIMER4,CTIMER4" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 5. "CTIMER3,CTIMER3" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
endif
sif (cpuis("MC?A152*"))
bitfld.long 0x0 31. "PORT2,Write to PORT2" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 30. "PORT1,Write to PORT1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 29. "PORT0,Write to PORT0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 28. "CMP1,Write to CMP1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 27. "CMP0,Write to CMP0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 26. "ADC0,Write to ADC0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 25. "OSTIMER0,Write to OSTIMER0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 24. "FLEXPWM0,Write to FLEXPWM0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 23. "QDC0,Write to QDC0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 22. "USB0,Write to USB0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 21. "LPUART2,Write to LPUART2" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 20. "LPUART1,Write to LPUART1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 19. "LPUART0,Write to LPUART0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 18. "LPSPI1,Write to LPSPI1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 17. "LPSPI0,Write to LPSPI0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 16. "LPI2C0,Write to LPI2C0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
endif
sif (cpuis("MC?A153*"))
bitfld.long 0x0 31. "PORT2,Write to PORT2" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 30. "PORT1,Write to PORT1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 29. "PORT0,Write to PORT0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 28. "CMP1,Write to CMP1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 27. "CMP0,Write to CMP0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 26. "ADC0,Write to ADC0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 25. "OSTIMER0,Write to OSTIMER0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 24. "FLEXPWM0,Write to FLEXPWM0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 23. "QDC0,Write to QDC0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 22. "USB0,Write to USB0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 21. "LPUART2,Write to LPUART2" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 20. "LPUART1,Write to LPUART1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 19. "LPUART0,Write to LPUART0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 18. "LPSPI1,Write to LPSPI1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 17. "LPSPI0,Write to LPSPI0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 16. "LPI2C0,Write to LPI2C0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
endif
sif (cpuis("MC?A152*"))
bitfld.long 0x0 12. "ERM,Write to ERM" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 11. "EIM,Write to EIM" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 10. "CRC,Write to CRC" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 9. "AOI0,Write to AOI0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 8. "DMA,Write to DMA" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 7. "WWDT0,Write to WWDT0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 6. "UTICK0,Write to UTICK0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 5. "FREQME,Write to FREQME" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
endif
sif (cpuis("MC?A153*"))
bitfld.long 0x0 12. "ERM,Write to ERM" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 11. "EIM,Write to EIM" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 10. "CRC,Write to CRC" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 9. "AOI0,Write to AOI0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 8. "DMA,Write to DMA" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 7. "WWDT0,Write to WWDT0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 6. "UTICK0,Write to UTICK0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 5. "FREQME,Write to FREQME" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
endif
bitfld.long 0x0 4. "CTIMER2,Write to CTIMER2" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 3. "CTIMER1,Write to CTIMER1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 2. "CTIMER0,Write to CTIMER0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x0 1. "I3C0,Write to I3C0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x0 0. "INPUTMUX0,Write to INPUTMUX0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
line.long 0x4 "MRCC_GLB_ACC1,Control Automatic Clock Gating 1"
sif (cpuis("MC?A144*"))
bitfld.long 0x4 25. "ROMC,ROMC" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 24. "GPIO4,GPIO4" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 23. "GPIO3,GPIO3" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 22. "GPIO2,GPIO2" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 21. "GPIO1,GPIO1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 20. "GPIO0,GPIO0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 19. "RAMB,RAMB" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 18. "RAMA,RAMA" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
endif
sif (cpuis("MC?A145*"))
bitfld.long 0x4 25. "ROMC,ROMC" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 24. "GPIO4,GPIO4" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 23. "GPIO3,GPIO3" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 22. "GPIO2,GPIO2" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 21. "GPIO1,GPIO1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 20. "GPIO0,GPIO0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 19. "RAMB,RAMB" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 18. "RAMA,RAMA" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
endif
sif (cpuis("MC?A146*"))
bitfld.long 0x4 25. "ROMC,ROMC" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 24. "GPIO4,GPIO4" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 23. "GPIO3,GPIO3" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 22. "GPIO2,GPIO2" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 21. "GPIO1,GPIO1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 20. "GPIO0,GPIO0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 19. "RAMB,RAMB" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 18. "RAMA,RAMA" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
endif
sif (cpuis("MC?A154*"))
bitfld.long 0x4 25. "ROMC,ROMC" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 24. "GPIO4,GPIO4" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 23. "GPIO3,GPIO3" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 22. "GPIO2,GPIO2" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 21. "GPIO1,GPIO1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 20. "GPIO0,GPIO0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 19. "RAMB,RAMB" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 18. "RAMA,RAMA" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
endif
sif (cpuis("MC?A155*"))
bitfld.long 0x4 25. "ROMC,ROMC" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 24. "GPIO4,GPIO4" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 23. "GPIO3,GPIO3" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 22. "GPIO2,GPIO2" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 21. "GPIO1,GPIO1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 20. "GPIO0,GPIO0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 19. "RAMB,RAMB" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 18. "RAMA,RAMA" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
endif
sif (cpuis("MC?A156*"))
bitfld.long 0x4 25. "ROMC,ROMC" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 24. "GPIO4,GPIO4" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 23. "GPIO3,GPIO3" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 22. "GPIO2,GPIO2" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 21. "GPIO1,GPIO1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 20. "GPIO0,GPIO0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 19. "RAMB,RAMB" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 18. "RAMA,RAMA" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
endif
sif (cpuis("MC?A144*"))
bitfld.long 0x4 14. "LPI2C3,LPI2C3" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 13. "LPI2C2,LPI2C2" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 12. "FLEXCAN0,FLEXCAN0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 11. "PORT4,PORT4" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 10. "PORT3,PORT3" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 9. "PORT2,PORT2" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 8. "PORT1,PORT1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 7. "PORT0,PORT0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 6. "OPAMP0,OPAMP0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 5. "DAC0,DAC0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 4. "CMP1,CMP1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 3. "CMP0,CMP0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 2. "ADC1,ADC1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 1. "ADC0,ADC0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 0. "OSTIMER0,OSTIMER0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
endif
sif (cpuis("MC?A145*"))
bitfld.long 0x4 14. "LPI2C3,LPI2C3" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 13. "LPI2C2,LPI2C2" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 12. "FLEXCAN0,FLEXCAN0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 11. "PORT4,PORT4" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 10. "PORT3,PORT3" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 9. "PORT2,PORT2" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 8. "PORT1,PORT1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 7. "PORT0,PORT0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 6. "OPAMP0,OPAMP0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 5. "DAC0,DAC0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 4. "CMP1,CMP1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 3. "CMP0,CMP0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 2. "ADC1,ADC1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 1. "ADC0,ADC0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 0. "OSTIMER0,OSTIMER0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
endif
sif (cpuis("MC?A146*"))
bitfld.long 0x4 14. "LPI2C3,LPI2C3" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 13. "LPI2C2,LPI2C2" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 12. "FLEXCAN0,FLEXCAN0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 11. "PORT4,PORT4" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 10. "PORT3,PORT3" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 9. "PORT2,PORT2" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 8. "PORT1,PORT1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 7. "PORT0,PORT0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 6. "OPAMP0,OPAMP0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 5. "DAC0,DAC0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 4. "CMP1,CMP1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 3. "CMP0,CMP0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 2. "ADC1,ADC1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 1. "ADC0,ADC0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 0. "OSTIMER0,OSTIMER0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
endif
sif (cpuis("MC?A154*"))
bitfld.long 0x4 14. "LPI2C3,LPI2C3" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 13. "LPI2C2,LPI2C2" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 12. "FLEXCAN0,FLEXCAN0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 11. "PORT4,PORT4" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 10. "PORT3,PORT3" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 9. "PORT2,PORT2" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 8. "PORT1,PORT1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 7. "PORT0,PORT0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 6. "OPAMP0,OPAMP0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 5. "DAC0,DAC0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 4. "CMP1,CMP1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 3. "CMP0,CMP0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 2. "ADC1,ADC1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 1. "ADC0,ADC0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 0. "OSTIMER0,OSTIMER0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
endif
sif (cpuis("MC?A155*"))
bitfld.long 0x4 14. "LPI2C3,LPI2C3" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 13. "LPI2C2,LPI2C2" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 12. "FLEXCAN0,FLEXCAN0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 11. "PORT4,PORT4" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 10. "PORT3,PORT3" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 9. "PORT2,PORT2" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 8. "PORT1,PORT1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 7. "PORT0,PORT0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 6. "OPAMP0,OPAMP0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 5. "DAC0,DAC0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 4. "CMP1,CMP1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 3. "CMP0,CMP0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 2. "ADC1,ADC1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 1. "ADC0,ADC0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 0. "OSTIMER0,OSTIMER0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
endif
sif (cpuis("MC?A156*"))
bitfld.long 0x4 14. "LPI2C3,LPI2C3" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 13. "LPI2C2,LPI2C2" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 12. "FLEXCAN0,FLEXCAN0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 11. "PORT4,PORT4" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 10. "PORT3,PORT3" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 9. "PORT2,PORT2" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 8. "PORT1,PORT1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 7. "PORT0,PORT0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 6. "OPAMP0,OPAMP0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 5. "DAC0,DAC0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 4. "CMP1,CMP1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 3. "CMP0,CMP0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 2. "ADC1,ADC1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 1. "ADC0,ADC0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 0. "OSTIMER0,OSTIMER0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
endif
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
bitfld.long 0x4 9. "ROMCP,Write to ROMCP" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 8. "GPIO3,Write to GPIO3" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 7. "GPIO2,Write to GPIO2" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 6. "GPIO1,Write to GPIO1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 5. "GPIO0,Write to GPIO0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 4. "EZRAMC_RAMA,Write to EZRAMC_RAMA" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 0. "PORT3,Write to PORT3" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
endif
sif (cpuis("MC?A152*"))
bitfld.long 0x4 9. "ROMCP,Write to ROMCP" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 8. "GPIO3,Write to GPIO3" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 7. "GPIO2,Write to GPIO2" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 6. "GPIO1,Write to GPIO1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 5. "GPIO0,Write to GPIO0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 4. "EZRAMC_RAMA,Write to EZRAMC_RAMA" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
endif
sif (cpuis("MC?A153*"))
bitfld.long 0x4 9. "ROMCP,Write to ROMCP" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 8. "GPIO3,Write to GPIO3" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 7. "GPIO2,Write to GPIO2" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 6. "GPIO1,Write to GPIO1" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
bitfld.long 0x4 5. "GPIO0,Write to GPIO0" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
bitfld.long 0x4 4. "EZRAMC_RAMA,Write to EZRAMC_RAMA" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
endif
sif (cpuis("MC?A152*"))
bitfld.long 0x4 0. "PORT3,Write to PORT3" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
newline
endif
sif (cpuis("MC?A153*"))
bitfld.long 0x4 0. "PORT3,Write to PORT3" "0: Automatic clock gating is disabled,1: Automatic clock gating is enabled"
endif
group.long 0xA0++0x1F
line.long 0x0 "MRCC_I3C0_FCLK_CLKSEL,I3C0_FCLK clock selection control"
bitfld.long 0x0 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x4 "MRCC_I3C0_FCLK_CLKDIV,I3C0_FCLK clock divider control"
rbitfld.long 0x4 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x4 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x4 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x4 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x8 "MRCC_CTIMER0_CLKSEL,CTIMER0 clock selection control"
bitfld.long 0x8 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_GATED,?,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0xC "MRCC_CTIMER0_CLKDIV,CTIMER0 clock divider control"
rbitfld.long 0xC 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0xC 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0xC 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0xC 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x10 "MRCC_CTIMER1_CLKSEL,CTIMER1 clock selection control"
bitfld.long 0x10 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_GATED,?,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x14 "MRCC_CTIMER1_CLKDIV,CTIMER1 clock divider control"
rbitfld.long 0x14 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x14 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x14 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x14 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x18 "MRCC_CTIMER2_CLKSEL,CTIMER2 clock selection control"
bitfld.long 0x18 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_GATED,?,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x1C "MRCC_CTIMER2_CLKDIV,CTIMER2 clock divider control"
rbitfld.long 0x1C 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x1C 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x1C 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x1C 0.--3. 1. "DIV,Functional Clock Divider"
sif (cpuis("MC?A144*"))
group.long 0xC0++0xF
line.long 0x0 "MRCC_CTIMER3_CLKSEL,CTIMER3 clock selection control"
bitfld.long 0x0 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_GATED,?,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x4 "MRCC_CTIMER3_CLKDIV,CTIMER3 clock divider control"
rbitfld.long 0x4 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x4 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x4 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x4 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x8 "MRCC_CTIMER4_CLKSEL,CTIMER4 clock selection control"
bitfld.long 0x8 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_GATED,?,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0xC "MRCC_CTIMER4_CLKDIV,CTIMER4 clock divider control"
rbitfld.long 0xC 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0xC 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0xC 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0xC 0.--3. 1. "DIV,Functional Clock Divider"
group.long 0xD4++0x57
line.long 0x0 "MRCC_WWDT0_CLKDIV,WWDT0 clock divider control"
rbitfld.long 0x0 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x0 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x0 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x0 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x4 "MRCC_FLEXIO0_CLKSEL,FLEXIO0 clock selection control"
bitfld.long 0x4 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_GATED,?,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x8 "MRCC_FLEXIO0_CLKDIV,FLEXIO0 clock divider control"
rbitfld.long 0x8 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x8 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x8 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x8 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0xC "MRCC_LPI2C0_CLKSEL,LPI2C0 clock selection control"
bitfld.long 0xC 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x10 "MRCC_LPI2C0_CLKDIV,LPI2C0 clock divider control"
rbitfld.long 0x10 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x10 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x10 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x10 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x14 "MRCC_LPI2C1_CLKSEL,LPI2C1 clock selection control"
bitfld.long 0x14 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x18 "MRCC_LPI2C1_CLKDIV,LPI2C1 clock divider control"
rbitfld.long 0x18 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x18 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x18 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x18 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x1C "MRCC_LPSPI0_CLKSEL,LPSPI0 clock selection control"
bitfld.long 0x1C 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x20 "MRCC_LPSPI0_CLKDIV,LPSPI0 clock divider control"
rbitfld.long 0x20 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x20 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x20 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x20 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x24 "MRCC_LPSPI1_CLKSEL,LPSPI1 clock selection control"
bitfld.long 0x24 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x28 "MRCC_LPSPI1_CLKDIV,LPSPI1 clock divider control"
rbitfld.long 0x28 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x28 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x28 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x28 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x2C "MRCC_LPUART0_CLKSEL,LPUART0 clock selection control"
bitfld.long 0x2C 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x30 "MRCC_LPUART0_CLKDIV,LPUART0 clock divider control"
rbitfld.long 0x30 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x30 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x30 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x30 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x34 "MRCC_LPUART1_CLKSEL,LPUART1 clock selection control"
bitfld.long 0x34 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x38 "MRCC_LPUART1_CLKDIV,LPUART1 clock divider control"
rbitfld.long 0x38 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x38 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x38 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x38 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x3C "MRCC_LPUART2_CLKSEL,LPUART2 clock selection control"
bitfld.long 0x3C 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x40 "MRCC_LPUART2_CLKDIV,LPUART2 clock divider control"
rbitfld.long 0x40 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x40 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x40 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x40 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x44 "MRCC_LPUART3_CLKSEL,LPUART3 clock selection control"
bitfld.long 0x44 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x48 "MRCC_LPUART3_CLKDIV,LPUART3 clock divider control"
rbitfld.long 0x48 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x48 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x48 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x48 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x4C "MRCC_LPUART4_CLKSEL,LPUART4 clock selection control"
bitfld.long 0x4C 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x50 "MRCC_LPUART4_CLKDIV,LPUART4 clock divider control"
rbitfld.long 0x50 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x50 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x50 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x50 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x54 "MRCC_USB0_CLKSEL,USB0 clock selection control"
bitfld.long 0x54 0.--1. "MUX,Functional Clock Mux Select" "?,1: CLK_48M,2: CLK_IN,?"
group.long 0x130++0xB
line.long 0x0 "MRCC_LPTMR0_CLKSEL,LPTMR0 clock selection control"
bitfld.long 0x0 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x4 "MRCC_LPTMR0_CLKDIV,LPTMR0 clock divider control"
rbitfld.long 0x4 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x4 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x4 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x4 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x8 "MRCC_OSTIMER0_CLKSEL,OSTIMER0 clock selection control"
bitfld.long 0x8 0.--1. "MUX,Functional Clock Mux Select" "0: CLK_16K,?,2: CLK_1M,?"
group.long 0x140++0xF
line.long 0x0 "MRCC_ADC0_CLKSEL,ADC0 clock selection control"
bitfld.long 0x0 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_GATED,?,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x4 "MRCC_ADC0_CLKDIV,ADC0 clock divider control"
rbitfld.long 0x4 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x4 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x4 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x4 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x8 "MRCC_ADC1_CLKSEL,ADC1 clock selection control"
bitfld.long 0x8 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_GATED,?,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0xC "MRCC_ADC1_CLKDIV,ADC1 clock divider control"
rbitfld.long 0xC 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0xC 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0xC 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0xC 0.--3. 1. "DIV,Functional Clock Divider"
endif
sif (cpuis("MC?A145*"))
group.long 0xC0++0xF
line.long 0x0 "MRCC_CTIMER3_CLKSEL,CTIMER3 clock selection control"
bitfld.long 0x0 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_GATED,?,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x4 "MRCC_CTIMER3_CLKDIV,CTIMER3 clock divider control"
rbitfld.long 0x4 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x4 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x4 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x4 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x8 "MRCC_CTIMER4_CLKSEL,CTIMER4 clock selection control"
bitfld.long 0x8 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_GATED,?,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0xC "MRCC_CTIMER4_CLKDIV,CTIMER4 clock divider control"
rbitfld.long 0xC 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0xC 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0xC 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0xC 0.--3. 1. "DIV,Functional Clock Divider"
group.long 0xD4++0x57
line.long 0x0 "MRCC_WWDT0_CLKDIV,WWDT0 clock divider control"
rbitfld.long 0x0 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x0 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x0 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x0 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x4 "MRCC_FLEXIO0_CLKSEL,FLEXIO0 clock selection control"
bitfld.long 0x4 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_GATED,?,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x8 "MRCC_FLEXIO0_CLKDIV,FLEXIO0 clock divider control"
rbitfld.long 0x8 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x8 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x8 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x8 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0xC "MRCC_LPI2C0_CLKSEL,LPI2C0 clock selection control"
bitfld.long 0xC 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x10 "MRCC_LPI2C0_CLKDIV,LPI2C0 clock divider control"
rbitfld.long 0x10 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x10 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x10 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x10 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x14 "MRCC_LPI2C1_CLKSEL,LPI2C1 clock selection control"
bitfld.long 0x14 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x18 "MRCC_LPI2C1_CLKDIV,LPI2C1 clock divider control"
rbitfld.long 0x18 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x18 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x18 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x18 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x1C "MRCC_LPSPI0_CLKSEL,LPSPI0 clock selection control"
bitfld.long 0x1C 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x20 "MRCC_LPSPI0_CLKDIV,LPSPI0 clock divider control"
rbitfld.long 0x20 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x20 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x20 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x20 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x24 "MRCC_LPSPI1_CLKSEL,LPSPI1 clock selection control"
bitfld.long 0x24 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x28 "MRCC_LPSPI1_CLKDIV,LPSPI1 clock divider control"
rbitfld.long 0x28 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x28 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x28 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x28 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x2C "MRCC_LPUART0_CLKSEL,LPUART0 clock selection control"
bitfld.long 0x2C 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x30 "MRCC_LPUART0_CLKDIV,LPUART0 clock divider control"
rbitfld.long 0x30 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x30 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x30 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x30 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x34 "MRCC_LPUART1_CLKSEL,LPUART1 clock selection control"
bitfld.long 0x34 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x38 "MRCC_LPUART1_CLKDIV,LPUART1 clock divider control"
rbitfld.long 0x38 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x38 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x38 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x38 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x3C "MRCC_LPUART2_CLKSEL,LPUART2 clock selection control"
bitfld.long 0x3C 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x40 "MRCC_LPUART2_CLKDIV,LPUART2 clock divider control"
rbitfld.long 0x40 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x40 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x40 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x40 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x44 "MRCC_LPUART3_CLKSEL,LPUART3 clock selection control"
bitfld.long 0x44 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x48 "MRCC_LPUART3_CLKDIV,LPUART3 clock divider control"
rbitfld.long 0x48 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x48 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x48 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x48 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x4C "MRCC_LPUART4_CLKSEL,LPUART4 clock selection control"
bitfld.long 0x4C 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x50 "MRCC_LPUART4_CLKDIV,LPUART4 clock divider control"
rbitfld.long 0x50 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x50 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x50 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x50 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x54 "MRCC_USB0_CLKSEL,USB0 clock selection control"
bitfld.long 0x54 0.--1. "MUX,Functional Clock Mux Select" "?,1: CLK_48M,2: CLK_IN,?"
group.long 0x130++0xB
line.long 0x0 "MRCC_LPTMR0_CLKSEL,LPTMR0 clock selection control"
bitfld.long 0x0 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x4 "MRCC_LPTMR0_CLKDIV,LPTMR0 clock divider control"
rbitfld.long 0x4 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x4 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x4 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x4 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x8 "MRCC_OSTIMER0_CLKSEL,OSTIMER0 clock selection control"
bitfld.long 0x8 0.--1. "MUX,Functional Clock Mux Select" "0: CLK_16K,?,2: CLK_1M,?"
group.long 0x140++0xF
line.long 0x0 "MRCC_ADC0_CLKSEL,ADC0 clock selection control"
bitfld.long 0x0 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_GATED,?,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x4 "MRCC_ADC0_CLKDIV,ADC0 clock divider control"
rbitfld.long 0x4 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x4 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x4 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x4 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x8 "MRCC_ADC1_CLKSEL,ADC1 clock selection control"
bitfld.long 0x8 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_GATED,?,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0xC "MRCC_ADC1_CLKDIV,ADC1 clock divider control"
rbitfld.long 0xC 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0xC 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0xC 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0xC 0.--3. 1. "DIV,Functional Clock Divider"
group.long 0x154++0xB
line.long 0x0 "MRCC_CMP0_FUNC_CLKDIV,CMP0_FUNC clock divider control"
rbitfld.long 0x0 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x0 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x0 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x0 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x4 "MRCC_CMP0_RR_CLKSEL,CMP0_RR clock selection control"
bitfld.long 0x4 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x8 "MRCC_CMP0_RR_CLKDIV,CMP0_RR clock divider control"
rbitfld.long 0x8 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x8 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x8 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x8 0.--3. 1. "DIV,Functional Clock Divider"
group.long 0x164++0x43
line.long 0x0 "MRCC_CMP1_FUNC_CLKDIV,CMP1_FUNC clock divider control"
rbitfld.long 0x0 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x0 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x0 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x0 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x4 "MRCC_CMP1_RR_CLKSEL,CMP1_RR clock selection control"
bitfld.long 0x4 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x8 "MRCC_CMP1_RR_CLKDIV,CMP1_RR clock divider control"
rbitfld.long 0x8 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x8 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x8 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x8 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0xC "MRCC_DAC0_CLKSEL,DAC0 clock selection control"
bitfld.long 0xC 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x10 "MRCC_DAC0_CLKDIV,DAC0 clock divider control"
rbitfld.long 0x10 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x10 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x10 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x10 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x14 "MRCC_FLEXCAN0_CLKSEL,FLEXCAN0 clock selection control"
bitfld.long 0x14 0.--2. "MUX,Functional Clock Mux Select" "?,?,2: FRO_HF_DIV,3: CLK_IN,?,?,?,?"
line.long 0x18 "MRCC_FLEXCAN0_CLKDIV,FLEXCAN0 clock divider control"
rbitfld.long 0x18 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x18 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x18 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x18 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x1C "MRCC_LPI2C2_CLKSEL,LPI2C2 clock selection control"
bitfld.long 0x1C 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x20 "MRCC_LPI2C2_CLKDIV,LPI2C2 clock divider control"
rbitfld.long 0x20 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x20 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x20 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x20 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x24 "MRCC_LPI2C3_CLKSEL,LPI2C3 clock selection control"
bitfld.long 0x24 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x28 "MRCC_LPI2C3_CLKDIV,LPI2C3 clock divider control"
rbitfld.long 0x28 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x28 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x28 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x28 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x2C "MRCC_DBG_TRACE_CLKSEL,DBG_TRACE clock selection control"
bitfld.long 0x2C 0.--1. "MUX,Functional Clock Mux Select" "0: CPU_CLK,1: CLK_1M,2: CLK_16K,?"
line.long 0x30 "MRCC_DBG_TRACE_CLKDIV,DBG_TRACE clock divider control"
rbitfld.long 0x30 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x30 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x30 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x30 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x34 "MRCC_CLKOUT_CLKSEL,CLKOUT clock selection control"
bitfld.long 0x34 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_DIV,2: CLK_IN,3: CLK_16K,?,?,6: SLOW_CLK,?"
line.long 0x38 "MRCC_CLKOUT_CLKDIV,CLKOUT clock divider control"
rbitfld.long 0x38 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x38 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x38 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x38 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x3C "MRCC_SYSTICK_CLKSEL,SYSTICK clock selection control"
bitfld.long 0x3C 0.--1. "MUX,Functional Clock Mux Select" "0: CPU_CLK,1: CLK_1M,2: CLK_16K,?"
line.long 0x40 "MRCC_SYSTICK_CLKDIV,SYSTICK clock divider control"
rbitfld.long 0x40 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x40 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x40 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x40 0.--3. 1. "DIV,Functional Clock Divider"
endif
sif (cpuis("MC?A146*"))
group.long 0xC0++0xF
line.long 0x0 "MRCC_CTIMER3_CLKSEL,CTIMER3 clock selection control"
bitfld.long 0x0 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_GATED,?,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x4 "MRCC_CTIMER3_CLKDIV,CTIMER3 clock divider control"
rbitfld.long 0x4 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x4 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x4 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x4 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x8 "MRCC_CTIMER4_CLKSEL,CTIMER4 clock selection control"
bitfld.long 0x8 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_GATED,?,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0xC "MRCC_CTIMER4_CLKDIV,CTIMER4 clock divider control"
rbitfld.long 0xC 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0xC 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0xC 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0xC 0.--3. 1. "DIV,Functional Clock Divider"
group.long 0xD4++0x57
line.long 0x0 "MRCC_WWDT0_CLKDIV,WWDT0 clock divider control"
rbitfld.long 0x0 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x0 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x0 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x0 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x4 "MRCC_FLEXIO0_CLKSEL,FLEXIO0 clock selection control"
bitfld.long 0x4 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_GATED,?,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x8 "MRCC_FLEXIO0_CLKDIV,FLEXIO0 clock divider control"
rbitfld.long 0x8 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x8 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x8 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x8 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0xC "MRCC_LPI2C0_CLKSEL,LPI2C0 clock selection control"
bitfld.long 0xC 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x10 "MRCC_LPI2C0_CLKDIV,LPI2C0 clock divider control"
rbitfld.long 0x10 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x10 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x10 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x10 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x14 "MRCC_LPI2C1_CLKSEL,LPI2C1 clock selection control"
bitfld.long 0x14 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x18 "MRCC_LPI2C1_CLKDIV,LPI2C1 clock divider control"
rbitfld.long 0x18 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x18 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x18 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x18 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x1C "MRCC_LPSPI0_CLKSEL,LPSPI0 clock selection control"
bitfld.long 0x1C 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x20 "MRCC_LPSPI0_CLKDIV,LPSPI0 clock divider control"
rbitfld.long 0x20 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x20 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x20 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x20 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x24 "MRCC_LPSPI1_CLKSEL,LPSPI1 clock selection control"
bitfld.long 0x24 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x28 "MRCC_LPSPI1_CLKDIV,LPSPI1 clock divider control"
rbitfld.long 0x28 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x28 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x28 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x28 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x2C "MRCC_LPUART0_CLKSEL,LPUART0 clock selection control"
bitfld.long 0x2C 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x30 "MRCC_LPUART0_CLKDIV,LPUART0 clock divider control"
rbitfld.long 0x30 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x30 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x30 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x30 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x34 "MRCC_LPUART1_CLKSEL,LPUART1 clock selection control"
bitfld.long 0x34 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x38 "MRCC_LPUART1_CLKDIV,LPUART1 clock divider control"
rbitfld.long 0x38 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x38 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x38 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x38 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x3C "MRCC_LPUART2_CLKSEL,LPUART2 clock selection control"
bitfld.long 0x3C 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x40 "MRCC_LPUART2_CLKDIV,LPUART2 clock divider control"
rbitfld.long 0x40 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x40 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x40 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x40 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x44 "MRCC_LPUART3_CLKSEL,LPUART3 clock selection control"
bitfld.long 0x44 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x48 "MRCC_LPUART3_CLKDIV,LPUART3 clock divider control"
rbitfld.long 0x48 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x48 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x48 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x48 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x4C "MRCC_LPUART4_CLKSEL,LPUART4 clock selection control"
bitfld.long 0x4C 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x50 "MRCC_LPUART4_CLKDIV,LPUART4 clock divider control"
rbitfld.long 0x50 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x50 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x50 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x50 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x54 "MRCC_USB0_CLKSEL,USB0 clock selection control"
bitfld.long 0x54 0.--1. "MUX,Functional Clock Mux Select" "?,1: CLK_48M,2: CLK_IN,?"
group.long 0x130++0xB
line.long 0x0 "MRCC_LPTMR0_CLKSEL,LPTMR0 clock selection control"
bitfld.long 0x0 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x4 "MRCC_LPTMR0_CLKDIV,LPTMR0 clock divider control"
rbitfld.long 0x4 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x4 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x4 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x4 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x8 "MRCC_OSTIMER0_CLKSEL,OSTIMER0 clock selection control"
bitfld.long 0x8 0.--1. "MUX,Functional Clock Mux Select" "0: CLK_16K,?,2: CLK_1M,?"
group.long 0x140++0xF
line.long 0x0 "MRCC_ADC0_CLKSEL,ADC0 clock selection control"
bitfld.long 0x0 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_GATED,?,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x4 "MRCC_ADC0_CLKDIV,ADC0 clock divider control"
rbitfld.long 0x4 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x4 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x4 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x4 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x8 "MRCC_ADC1_CLKSEL,ADC1 clock selection control"
bitfld.long 0x8 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_GATED,?,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0xC "MRCC_ADC1_CLKDIV,ADC1 clock divider control"
rbitfld.long 0xC 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0xC 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0xC 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0xC 0.--3. 1. "DIV,Functional Clock Divider"
group.long 0x154++0xB
line.long 0x0 "MRCC_CMP0_FUNC_CLKDIV,CMP0_FUNC clock divider control"
rbitfld.long 0x0 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x0 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x0 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x0 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x4 "MRCC_CMP0_RR_CLKSEL,CMP0_RR clock selection control"
bitfld.long 0x4 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x8 "MRCC_CMP0_RR_CLKDIV,CMP0_RR clock divider control"
rbitfld.long 0x8 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x8 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x8 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x8 0.--3. 1. "DIV,Functional Clock Divider"
group.long 0x164++0x43
line.long 0x0 "MRCC_CMP1_FUNC_CLKDIV,CMP1_FUNC clock divider control"
rbitfld.long 0x0 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x0 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x0 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x0 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x4 "MRCC_CMP1_RR_CLKSEL,CMP1_RR clock selection control"
bitfld.long 0x4 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x8 "MRCC_CMP1_RR_CLKDIV,CMP1_RR clock divider control"
rbitfld.long 0x8 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x8 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x8 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x8 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0xC "MRCC_DAC0_CLKSEL,DAC0 clock selection control"
bitfld.long 0xC 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x10 "MRCC_DAC0_CLKDIV,DAC0 clock divider control"
rbitfld.long 0x10 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x10 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x10 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x10 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x14 "MRCC_FLEXCAN0_CLKSEL,FLEXCAN0 clock selection control"
bitfld.long 0x14 0.--2. "MUX,Functional Clock Mux Select" "?,?,2: FRO_HF_DIV,3: CLK_IN,?,?,?,?"
line.long 0x18 "MRCC_FLEXCAN0_CLKDIV,FLEXCAN0 clock divider control"
rbitfld.long 0x18 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x18 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x18 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x18 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x1C "MRCC_LPI2C2_CLKSEL,LPI2C2 clock selection control"
bitfld.long 0x1C 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x20 "MRCC_LPI2C2_CLKDIV,LPI2C2 clock divider control"
rbitfld.long 0x20 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x20 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x20 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x20 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x24 "MRCC_LPI2C3_CLKSEL,LPI2C3 clock selection control"
bitfld.long 0x24 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x28 "MRCC_LPI2C3_CLKDIV,LPI2C3 clock divider control"
rbitfld.long 0x28 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x28 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x28 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x28 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x2C "MRCC_DBG_TRACE_CLKSEL,DBG_TRACE clock selection control"
bitfld.long 0x2C 0.--1. "MUX,Functional Clock Mux Select" "0: CPU_CLK,1: CLK_1M,2: CLK_16K,?"
line.long 0x30 "MRCC_DBG_TRACE_CLKDIV,DBG_TRACE clock divider control"
rbitfld.long 0x30 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x30 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x30 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x30 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x34 "MRCC_CLKOUT_CLKSEL,CLKOUT clock selection control"
bitfld.long 0x34 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_DIV,2: CLK_IN,3: CLK_16K,?,?,6: SLOW_CLK,?"
line.long 0x38 "MRCC_CLKOUT_CLKDIV,CLKOUT clock divider control"
rbitfld.long 0x38 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x38 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x38 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x38 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x3C "MRCC_SYSTICK_CLKSEL,SYSTICK clock selection control"
bitfld.long 0x3C 0.--1. "MUX,Functional Clock Mux Select" "0: CPU_CLK,1: CLK_1M,2: CLK_16K,?"
line.long 0x40 "MRCC_SYSTICK_CLKDIV,SYSTICK clock divider control"
rbitfld.long 0x40 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x40 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x40 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x40 0.--3. 1. "DIV,Functional Clock Divider"
endif
sif (cpuis("MC?A154*"))
group.long 0xC0++0xF
line.long 0x0 "MRCC_CTIMER3_CLKSEL,CTIMER3 clock selection control"
bitfld.long 0x0 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_GATED,?,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x4 "MRCC_CTIMER3_CLKDIV,CTIMER3 clock divider control"
rbitfld.long 0x4 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x4 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x4 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x4 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x8 "MRCC_CTIMER4_CLKSEL,CTIMER4 clock selection control"
bitfld.long 0x8 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_GATED,?,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0xC "MRCC_CTIMER4_CLKDIV,CTIMER4 clock divider control"
rbitfld.long 0xC 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0xC 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0xC 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0xC 0.--3. 1. "DIV,Functional Clock Divider"
group.long 0xD4++0x57
line.long 0x0 "MRCC_WWDT0_CLKDIV,WWDT0 clock divider control"
rbitfld.long 0x0 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x0 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x0 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x0 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x4 "MRCC_FLEXIO0_CLKSEL,FLEXIO0 clock selection control"
bitfld.long 0x4 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_GATED,?,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x8 "MRCC_FLEXIO0_CLKDIV,FLEXIO0 clock divider control"
rbitfld.long 0x8 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x8 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x8 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x8 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0xC "MRCC_LPI2C0_CLKSEL,LPI2C0 clock selection control"
bitfld.long 0xC 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x10 "MRCC_LPI2C0_CLKDIV,LPI2C0 clock divider control"
rbitfld.long 0x10 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x10 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x10 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x10 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x14 "MRCC_LPI2C1_CLKSEL,LPI2C1 clock selection control"
bitfld.long 0x14 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x18 "MRCC_LPI2C1_CLKDIV,LPI2C1 clock divider control"
rbitfld.long 0x18 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x18 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x18 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x18 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x1C "MRCC_LPSPI0_CLKSEL,LPSPI0 clock selection control"
bitfld.long 0x1C 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x20 "MRCC_LPSPI0_CLKDIV,LPSPI0 clock divider control"
rbitfld.long 0x20 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x20 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x20 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x20 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x24 "MRCC_LPSPI1_CLKSEL,LPSPI1 clock selection control"
bitfld.long 0x24 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x28 "MRCC_LPSPI1_CLKDIV,LPSPI1 clock divider control"
rbitfld.long 0x28 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x28 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x28 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x28 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x2C "MRCC_LPUART0_CLKSEL,LPUART0 clock selection control"
bitfld.long 0x2C 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x30 "MRCC_LPUART0_CLKDIV,LPUART0 clock divider control"
rbitfld.long 0x30 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x30 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x30 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x30 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x34 "MRCC_LPUART1_CLKSEL,LPUART1 clock selection control"
bitfld.long 0x34 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x38 "MRCC_LPUART1_CLKDIV,LPUART1 clock divider control"
rbitfld.long 0x38 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x38 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x38 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x38 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x3C "MRCC_LPUART2_CLKSEL,LPUART2 clock selection control"
bitfld.long 0x3C 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x40 "MRCC_LPUART2_CLKDIV,LPUART2 clock divider control"
rbitfld.long 0x40 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x40 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x40 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x40 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x44 "MRCC_LPUART3_CLKSEL,LPUART3 clock selection control"
bitfld.long 0x44 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x48 "MRCC_LPUART3_CLKDIV,LPUART3 clock divider control"
rbitfld.long 0x48 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x48 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x48 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x48 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x4C "MRCC_LPUART4_CLKSEL,LPUART4 clock selection control"
bitfld.long 0x4C 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x50 "MRCC_LPUART4_CLKDIV,LPUART4 clock divider control"
rbitfld.long 0x50 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x50 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x50 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x50 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x54 "MRCC_USB0_CLKSEL,USB0 clock selection control"
bitfld.long 0x54 0.--1. "MUX,Functional Clock Mux Select" "?,1: CLK_48M,2: CLK_IN,?"
group.long 0x130++0xB
line.long 0x0 "MRCC_LPTMR0_CLKSEL,LPTMR0 clock selection control"
bitfld.long 0x0 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x4 "MRCC_LPTMR0_CLKDIV,LPTMR0 clock divider control"
rbitfld.long 0x4 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x4 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x4 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x4 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x8 "MRCC_OSTIMER0_CLKSEL,OSTIMER0 clock selection control"
bitfld.long 0x8 0.--1. "MUX,Functional Clock Mux Select" "0: CLK_16K,?,2: CLK_1M,?"
group.long 0x140++0xF
line.long 0x0 "MRCC_ADC0_CLKSEL,ADC0 clock selection control"
bitfld.long 0x0 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_GATED,?,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x4 "MRCC_ADC0_CLKDIV,ADC0 clock divider control"
rbitfld.long 0x4 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x4 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x4 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x4 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x8 "MRCC_ADC1_CLKSEL,ADC1 clock selection control"
bitfld.long 0x8 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_GATED,?,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0xC "MRCC_ADC1_CLKDIV,ADC1 clock divider control"
rbitfld.long 0xC 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0xC 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0xC 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0xC 0.--3. 1. "DIV,Functional Clock Divider"
group.long 0x154++0xB
line.long 0x0 "MRCC_CMP0_FUNC_CLKDIV,CMP0_FUNC clock divider control"
rbitfld.long 0x0 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x0 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x0 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x0 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x4 "MRCC_CMP0_RR_CLKSEL,CMP0_RR clock selection control"
bitfld.long 0x4 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x8 "MRCC_CMP0_RR_CLKDIV,CMP0_RR clock divider control"
rbitfld.long 0x8 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x8 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x8 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x8 0.--3. 1. "DIV,Functional Clock Divider"
group.long 0x164++0x43
line.long 0x0 "MRCC_CMP1_FUNC_CLKDIV,CMP1_FUNC clock divider control"
rbitfld.long 0x0 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x0 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x0 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x0 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x4 "MRCC_CMP1_RR_CLKSEL,CMP1_RR clock selection control"
bitfld.long 0x4 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x8 "MRCC_CMP1_RR_CLKDIV,CMP1_RR clock divider control"
rbitfld.long 0x8 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x8 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x8 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x8 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0xC "MRCC_DAC0_CLKSEL,DAC0 clock selection control"
bitfld.long 0xC 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x10 "MRCC_DAC0_CLKDIV,DAC0 clock divider control"
rbitfld.long 0x10 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x10 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x10 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x10 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x14 "MRCC_FLEXCAN0_CLKSEL,FLEXCAN0 clock selection control"
bitfld.long 0x14 0.--2. "MUX,Functional Clock Mux Select" "?,?,2: FRO_HF_DIV,3: CLK_IN,?,?,?,?"
line.long 0x18 "MRCC_FLEXCAN0_CLKDIV,FLEXCAN0 clock divider control"
rbitfld.long 0x18 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x18 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x18 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x18 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x1C "MRCC_LPI2C2_CLKSEL,LPI2C2 clock selection control"
bitfld.long 0x1C 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x20 "MRCC_LPI2C2_CLKDIV,LPI2C2 clock divider control"
rbitfld.long 0x20 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x20 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x20 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x20 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x24 "MRCC_LPI2C3_CLKSEL,LPI2C3 clock selection control"
bitfld.long 0x24 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x28 "MRCC_LPI2C3_CLKDIV,LPI2C3 clock divider control"
rbitfld.long 0x28 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x28 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x28 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x28 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x2C "MRCC_DBG_TRACE_CLKSEL,DBG_TRACE clock selection control"
bitfld.long 0x2C 0.--1. "MUX,Functional Clock Mux Select" "0: CPU_CLK,1: CLK_1M,2: CLK_16K,?"
line.long 0x30 "MRCC_DBG_TRACE_CLKDIV,DBG_TRACE clock divider control"
rbitfld.long 0x30 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x30 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x30 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x30 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x34 "MRCC_CLKOUT_CLKSEL,CLKOUT clock selection control"
bitfld.long 0x34 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_DIV,2: CLK_IN,3: CLK_16K,?,?,6: SLOW_CLK,?"
line.long 0x38 "MRCC_CLKOUT_CLKDIV,CLKOUT clock divider control"
rbitfld.long 0x38 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x38 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x38 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x38 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x3C "MRCC_SYSTICK_CLKSEL,SYSTICK clock selection control"
bitfld.long 0x3C 0.--1. "MUX,Functional Clock Mux Select" "0: CPU_CLK,1: CLK_1M,2: CLK_16K,?"
line.long 0x40 "MRCC_SYSTICK_CLKDIV,SYSTICK clock divider control"
rbitfld.long 0x40 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x40 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x40 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x40 0.--3. 1. "DIV,Functional Clock Divider"
endif
sif (cpuis("MC?A155*"))
group.long 0xC0++0xF
line.long 0x0 "MRCC_CTIMER3_CLKSEL,CTIMER3 clock selection control"
bitfld.long 0x0 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_GATED,?,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x4 "MRCC_CTIMER3_CLKDIV,CTIMER3 clock divider control"
rbitfld.long 0x4 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x4 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x4 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x4 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x8 "MRCC_CTIMER4_CLKSEL,CTIMER4 clock selection control"
bitfld.long 0x8 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_GATED,?,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0xC "MRCC_CTIMER4_CLKDIV,CTIMER4 clock divider control"
rbitfld.long 0xC 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0xC 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0xC 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0xC 0.--3. 1. "DIV,Functional Clock Divider"
group.long 0xD4++0x57
line.long 0x0 "MRCC_WWDT0_CLKDIV,WWDT0 clock divider control"
rbitfld.long 0x0 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x0 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x0 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x0 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x4 "MRCC_FLEXIO0_CLKSEL,FLEXIO0 clock selection control"
bitfld.long 0x4 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_GATED,?,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x8 "MRCC_FLEXIO0_CLKDIV,FLEXIO0 clock divider control"
rbitfld.long 0x8 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x8 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x8 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x8 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0xC "MRCC_LPI2C0_CLKSEL,LPI2C0 clock selection control"
bitfld.long 0xC 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x10 "MRCC_LPI2C0_CLKDIV,LPI2C0 clock divider control"
rbitfld.long 0x10 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x10 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x10 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x10 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x14 "MRCC_LPI2C1_CLKSEL,LPI2C1 clock selection control"
bitfld.long 0x14 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x18 "MRCC_LPI2C1_CLKDIV,LPI2C1 clock divider control"
rbitfld.long 0x18 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x18 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x18 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x18 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x1C "MRCC_LPSPI0_CLKSEL,LPSPI0 clock selection control"
bitfld.long 0x1C 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x20 "MRCC_LPSPI0_CLKDIV,LPSPI0 clock divider control"
rbitfld.long 0x20 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x20 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x20 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x20 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x24 "MRCC_LPSPI1_CLKSEL,LPSPI1 clock selection control"
bitfld.long 0x24 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x28 "MRCC_LPSPI1_CLKDIV,LPSPI1 clock divider control"
rbitfld.long 0x28 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x28 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x28 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x28 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x2C "MRCC_LPUART0_CLKSEL,LPUART0 clock selection control"
bitfld.long 0x2C 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x30 "MRCC_LPUART0_CLKDIV,LPUART0 clock divider control"
rbitfld.long 0x30 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x30 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x30 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x30 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x34 "MRCC_LPUART1_CLKSEL,LPUART1 clock selection control"
bitfld.long 0x34 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x38 "MRCC_LPUART1_CLKDIV,LPUART1 clock divider control"
rbitfld.long 0x38 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x38 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x38 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x38 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x3C "MRCC_LPUART2_CLKSEL,LPUART2 clock selection control"
bitfld.long 0x3C 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x40 "MRCC_LPUART2_CLKDIV,LPUART2 clock divider control"
rbitfld.long 0x40 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x40 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x40 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x40 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x44 "MRCC_LPUART3_CLKSEL,LPUART3 clock selection control"
bitfld.long 0x44 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x48 "MRCC_LPUART3_CLKDIV,LPUART3 clock divider control"
rbitfld.long 0x48 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x48 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x48 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x48 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x4C "MRCC_LPUART4_CLKSEL,LPUART4 clock selection control"
bitfld.long 0x4C 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x50 "MRCC_LPUART4_CLKDIV,LPUART4 clock divider control"
rbitfld.long 0x50 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x50 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x50 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x50 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x54 "MRCC_USB0_CLKSEL,USB0 clock selection control"
bitfld.long 0x54 0.--1. "MUX,Functional Clock Mux Select" "?,1: CLK_48M,2: CLK_IN,?"
group.long 0x130++0xB
line.long 0x0 "MRCC_LPTMR0_CLKSEL,LPTMR0 clock selection control"
bitfld.long 0x0 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x4 "MRCC_LPTMR0_CLKDIV,LPTMR0 clock divider control"
rbitfld.long 0x4 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x4 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x4 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x4 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x8 "MRCC_OSTIMER0_CLKSEL,OSTIMER0 clock selection control"
bitfld.long 0x8 0.--1. "MUX,Functional Clock Mux Select" "0: CLK_16K,?,2: CLK_1M,?"
group.long 0x140++0xF
line.long 0x0 "MRCC_ADC0_CLKSEL,ADC0 clock selection control"
bitfld.long 0x0 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_GATED,?,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x4 "MRCC_ADC0_CLKDIV,ADC0 clock divider control"
rbitfld.long 0x4 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x4 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x4 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x4 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x8 "MRCC_ADC1_CLKSEL,ADC1 clock selection control"
bitfld.long 0x8 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_GATED,?,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0xC "MRCC_ADC1_CLKDIV,ADC1 clock divider control"
rbitfld.long 0xC 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0xC 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0xC 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0xC 0.--3. 1. "DIV,Functional Clock Divider"
group.long 0x154++0xB
line.long 0x0 "MRCC_CMP0_FUNC_CLKDIV,CMP0_FUNC clock divider control"
rbitfld.long 0x0 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x0 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x0 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x0 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x4 "MRCC_CMP0_RR_CLKSEL,CMP0_RR clock selection control"
bitfld.long 0x4 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x8 "MRCC_CMP0_RR_CLKDIV,CMP0_RR clock divider control"
rbitfld.long 0x8 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x8 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x8 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x8 0.--3. 1. "DIV,Functional Clock Divider"
group.long 0x164++0x43
line.long 0x0 "MRCC_CMP1_FUNC_CLKDIV,CMP1_FUNC clock divider control"
rbitfld.long 0x0 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x0 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x0 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x0 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x4 "MRCC_CMP1_RR_CLKSEL,CMP1_RR clock selection control"
bitfld.long 0x4 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x8 "MRCC_CMP1_RR_CLKDIV,CMP1_RR clock divider control"
rbitfld.long 0x8 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x8 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x8 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x8 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0xC "MRCC_DAC0_CLKSEL,DAC0 clock selection control"
bitfld.long 0xC 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x10 "MRCC_DAC0_CLKDIV,DAC0 clock divider control"
rbitfld.long 0x10 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x10 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x10 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x10 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x14 "MRCC_FLEXCAN0_CLKSEL,FLEXCAN0 clock selection control"
bitfld.long 0x14 0.--2. "MUX,Functional Clock Mux Select" "?,?,2: FRO_HF_DIV,3: CLK_IN,?,?,?,?"
line.long 0x18 "MRCC_FLEXCAN0_CLKDIV,FLEXCAN0 clock divider control"
rbitfld.long 0x18 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x18 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x18 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x18 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x1C "MRCC_LPI2C2_CLKSEL,LPI2C2 clock selection control"
bitfld.long 0x1C 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x20 "MRCC_LPI2C2_CLKDIV,LPI2C2 clock divider control"
rbitfld.long 0x20 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x20 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x20 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x20 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x24 "MRCC_LPI2C3_CLKSEL,LPI2C3 clock selection control"
bitfld.long 0x24 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x28 "MRCC_LPI2C3_CLKDIV,LPI2C3 clock divider control"
rbitfld.long 0x28 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x28 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x28 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x28 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x2C "MRCC_DBG_TRACE_CLKSEL,DBG_TRACE clock selection control"
bitfld.long 0x2C 0.--1. "MUX,Functional Clock Mux Select" "0: CPU_CLK,1: CLK_1M,2: CLK_16K,?"
line.long 0x30 "MRCC_DBG_TRACE_CLKDIV,DBG_TRACE clock divider control"
rbitfld.long 0x30 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x30 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x30 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x30 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x34 "MRCC_CLKOUT_CLKSEL,CLKOUT clock selection control"
bitfld.long 0x34 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_DIV,2: CLK_IN,3: CLK_16K,?,?,6: SLOW_CLK,?"
line.long 0x38 "MRCC_CLKOUT_CLKDIV,CLKOUT clock divider control"
rbitfld.long 0x38 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x38 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x38 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x38 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x3C "MRCC_SYSTICK_CLKSEL,SYSTICK clock selection control"
bitfld.long 0x3C 0.--1. "MUX,Functional Clock Mux Select" "0: CPU_CLK,1: CLK_1M,2: CLK_16K,?"
line.long 0x40 "MRCC_SYSTICK_CLKDIV,SYSTICK clock divider control"
rbitfld.long 0x40 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x40 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x40 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x40 0.--3. 1. "DIV,Functional Clock Divider"
endif
sif (cpuis("MC?A156*"))
group.long 0xC0++0xF
line.long 0x0 "MRCC_CTIMER3_CLKSEL,CTIMER3 clock selection control"
bitfld.long 0x0 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_GATED,?,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x4 "MRCC_CTIMER3_CLKDIV,CTIMER3 clock divider control"
rbitfld.long 0x4 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x4 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x4 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x4 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x8 "MRCC_CTIMER4_CLKSEL,CTIMER4 clock selection control"
bitfld.long 0x8 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_GATED,?,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0xC "MRCC_CTIMER4_CLKDIV,CTIMER4 clock divider control"
rbitfld.long 0xC 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0xC 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0xC 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0xC 0.--3. 1. "DIV,Functional Clock Divider"
group.long 0xD4++0x57
line.long 0x0 "MRCC_WWDT0_CLKDIV,WWDT0 clock divider control"
rbitfld.long 0x0 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x0 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x0 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x0 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x4 "MRCC_FLEXIO0_CLKSEL,FLEXIO0 clock selection control"
bitfld.long 0x4 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_GATED,?,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x8 "MRCC_FLEXIO0_CLKDIV,FLEXIO0 clock divider control"
rbitfld.long 0x8 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x8 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x8 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x8 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0xC "MRCC_LPI2C0_CLKSEL,LPI2C0 clock selection control"
bitfld.long 0xC 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x10 "MRCC_LPI2C0_CLKDIV,LPI2C0 clock divider control"
rbitfld.long 0x10 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x10 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x10 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x10 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x14 "MRCC_LPI2C1_CLKSEL,LPI2C1 clock selection control"
bitfld.long 0x14 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x18 "MRCC_LPI2C1_CLKDIV,LPI2C1 clock divider control"
rbitfld.long 0x18 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x18 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x18 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x18 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x1C "MRCC_LPSPI0_CLKSEL,LPSPI0 clock selection control"
bitfld.long 0x1C 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x20 "MRCC_LPSPI0_CLKDIV,LPSPI0 clock divider control"
rbitfld.long 0x20 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x20 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x20 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x20 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x24 "MRCC_LPSPI1_CLKSEL,LPSPI1 clock selection control"
bitfld.long 0x24 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x28 "MRCC_LPSPI1_CLKDIV,LPSPI1 clock divider control"
rbitfld.long 0x28 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x28 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x28 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x28 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x2C "MRCC_LPUART0_CLKSEL,LPUART0 clock selection control"
bitfld.long 0x2C 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x30 "MRCC_LPUART0_CLKDIV,LPUART0 clock divider control"
rbitfld.long 0x30 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x30 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x30 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x30 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x34 "MRCC_LPUART1_CLKSEL,LPUART1 clock selection control"
bitfld.long 0x34 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x38 "MRCC_LPUART1_CLKDIV,LPUART1 clock divider control"
rbitfld.long 0x38 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x38 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x38 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x38 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x3C "MRCC_LPUART2_CLKSEL,LPUART2 clock selection control"
bitfld.long 0x3C 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x40 "MRCC_LPUART2_CLKDIV,LPUART2 clock divider control"
rbitfld.long 0x40 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x40 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x40 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x40 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x44 "MRCC_LPUART3_CLKSEL,LPUART3 clock selection control"
bitfld.long 0x44 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x48 "MRCC_LPUART3_CLKDIV,LPUART3 clock divider control"
rbitfld.long 0x48 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x48 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x48 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x48 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x4C "MRCC_LPUART4_CLKSEL,LPUART4 clock selection control"
bitfld.long 0x4C 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x50 "MRCC_LPUART4_CLKDIV,LPUART4 clock divider control"
rbitfld.long 0x50 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x50 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x50 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x50 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x54 "MRCC_USB0_CLKSEL,USB0 clock selection control"
bitfld.long 0x54 0.--1. "MUX,Functional Clock Mux Select" "?,1: CLK_48M,2: CLK_IN,?"
group.long 0x130++0xB
line.long 0x0 "MRCC_LPTMR0_CLKSEL,LPTMR0 clock selection control"
bitfld.long 0x0 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x4 "MRCC_LPTMR0_CLKDIV,LPTMR0 clock divider control"
rbitfld.long 0x4 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x4 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x4 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x4 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x8 "MRCC_OSTIMER0_CLKSEL,OSTIMER0 clock selection control"
bitfld.long 0x8 0.--1. "MUX,Functional Clock Mux Select" "0: CLK_16K,?,2: CLK_1M,?"
group.long 0x140++0xF
line.long 0x0 "MRCC_ADC0_CLKSEL,ADC0 clock selection control"
bitfld.long 0x0 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_GATED,?,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x4 "MRCC_ADC0_CLKDIV,ADC0 clock divider control"
rbitfld.long 0x4 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x4 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x4 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x4 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x8 "MRCC_ADC1_CLKSEL,ADC1 clock selection control"
bitfld.long 0x8 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_GATED,?,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0xC "MRCC_ADC1_CLKDIV,ADC1 clock divider control"
rbitfld.long 0xC 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0xC 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0xC 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0xC 0.--3. 1. "DIV,Functional Clock Divider"
group.long 0x154++0xB
line.long 0x0 "MRCC_CMP0_FUNC_CLKDIV,CMP0_FUNC clock divider control"
rbitfld.long 0x0 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x0 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x0 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x0 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x4 "MRCC_CMP0_RR_CLKSEL,CMP0_RR clock selection control"
bitfld.long 0x4 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x8 "MRCC_CMP0_RR_CLKDIV,CMP0_RR clock divider control"
rbitfld.long 0x8 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x8 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x8 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x8 0.--3. 1. "DIV,Functional Clock Divider"
group.long 0x164++0x43
line.long 0x0 "MRCC_CMP1_FUNC_CLKDIV,CMP1_FUNC clock divider control"
rbitfld.long 0x0 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x0 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x0 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x0 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x4 "MRCC_CMP1_RR_CLKSEL,CMP1_RR clock selection control"
bitfld.long 0x4 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x8 "MRCC_CMP1_RR_CLKDIV,CMP1_RR clock divider control"
rbitfld.long 0x8 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x8 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x8 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x8 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0xC "MRCC_DAC0_CLKSEL,DAC0 clock selection control"
bitfld.long 0xC 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x10 "MRCC_DAC0_CLKDIV,DAC0 clock divider control"
rbitfld.long 0x10 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x10 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x10 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x10 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x14 "MRCC_FLEXCAN0_CLKSEL,FLEXCAN0 clock selection control"
bitfld.long 0x14 0.--2. "MUX,Functional Clock Mux Select" "?,?,2: FRO_HF_DIV,3: CLK_IN,?,?,?,?"
line.long 0x18 "MRCC_FLEXCAN0_CLKDIV,FLEXCAN0 clock divider control"
rbitfld.long 0x18 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x18 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x18 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x18 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x1C "MRCC_LPI2C2_CLKSEL,LPI2C2 clock selection control"
bitfld.long 0x1C 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x20 "MRCC_LPI2C2_CLKDIV,LPI2C2 clock divider control"
rbitfld.long 0x20 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x20 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x20 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x20 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x24 "MRCC_LPI2C3_CLKSEL,LPI2C3 clock selection control"
bitfld.long 0x24 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x28 "MRCC_LPI2C3_CLKDIV,LPI2C3 clock divider control"
rbitfld.long 0x28 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x28 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x28 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x28 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x2C "MRCC_DBG_TRACE_CLKSEL,DBG_TRACE clock selection control"
bitfld.long 0x2C 0.--1. "MUX,Functional Clock Mux Select" "0: CPU_CLK,1: CLK_1M,2: CLK_16K,?"
line.long 0x30 "MRCC_DBG_TRACE_CLKDIV,DBG_TRACE clock divider control"
rbitfld.long 0x30 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x30 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x30 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x30 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x34 "MRCC_CLKOUT_CLKSEL,CLKOUT clock selection control"
bitfld.long 0x34 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_DIV,2: CLK_IN,3: CLK_16K,?,?,6: SLOW_CLK,?"
line.long 0x38 "MRCC_CLKOUT_CLKDIV,CLKOUT clock divider control"
rbitfld.long 0x38 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x38 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x38 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x38 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x3C "MRCC_SYSTICK_CLKSEL,SYSTICK clock selection control"
bitfld.long 0x3C 0.--1. "MUX,Functional Clock Mux Select" "0: CPU_CLK,1: CLK_1M,2: CLK_16K,?"
line.long 0x40 "MRCC_SYSTICK_CLKDIV,SYSTICK clock divider control"
rbitfld.long 0x40 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x40 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x40 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x40 0.--3. 1. "DIV,Functional Clock Divider"
endif
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
group.long 0xC4++0x37
line.long 0x0 "MRCC_WWDT0_CLKDIV,WWDT0 clock divider control"
rbitfld.long 0x0 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x0 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x0 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x0 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x4 "MRCC_LPI2C0_CLKSEL,LPI2C0 clock selection control"
bitfld.long 0x4 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x8 "MRCC_LPI2C0_CLKDIV,LPI2C0 clock divider control"
rbitfld.long 0x8 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x8 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x8 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x8 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0xC "MRCC_LPSPI0_CLKSEL,LPSPI0 clock selection control"
bitfld.long 0xC 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x10 "MRCC_LPSPI0_CLKDIV,LPSPI0 clock divider control"
rbitfld.long 0x10 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x10 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x10 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x10 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x14 "MRCC_LPSPI1_CLKSEL,LPSPI1 clock selection control"
bitfld.long 0x14 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x18 "MRCC_LPSPI1_CLKDIV,LPSPI1 clock divider control"
rbitfld.long 0x18 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x18 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x18 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x18 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x1C "MRCC_LPUART0_CLKSEL,LPUART0 clock selection control"
bitfld.long 0x1C 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x20 "MRCC_LPUART0_CLKDIV,LPUART0 clock divider control"
rbitfld.long 0x20 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x20 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x20 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x20 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x24 "MRCC_LPUART1_CLKSEL,LPUART1 clock selection control"
bitfld.long 0x24 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x28 "MRCC_LPUART1_CLKDIV,LPUART1 clock divider control"
rbitfld.long 0x28 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x28 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x28 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x28 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x2C "MRCC_LPUART2_CLKSEL,LPUART2 clock selection control"
bitfld.long 0x2C 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x30 "MRCC_LPUART2_CLKDIV,LPUART2 clock divider control"
rbitfld.long 0x30 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x30 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x30 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x30 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x34 "MRCC_USB0_CLKSEL,USB0 clock selection control"
bitfld.long 0x34 0.--1. "MUX,Functional Clock Mux Select" "?,1: scg_scg_firc_48mhz_clk,2: clkroot_sosc,?"
group.long 0x100++0xB
line.long 0x0 "MRCC_LPTMR0_CLKSEL,LPTMR0 clock selection control"
bitfld.long 0x0 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x4 "MRCC_LPTMR0_CLKDIV,LPTMR0 clock divider control"
rbitfld.long 0x4 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x4 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x4 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x4 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x8 "MRCC_OSTIMER0_CLKSEL,OSTIMER0 clock selection control"
bitfld.long 0x8 0.--1. "MUX,Functional Clock Mux Select" "0: clkroot_16k,?,2: clkroot_1m,?"
group.long 0x110++0x7
line.long 0x0 "MRCC_ADC0_CLKSEL,ADC0 clock selection control"
bitfld.long 0x0 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_GATED,?,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x4 "MRCC_ADC0_CLKDIV,ADC0 clock divider control"
rbitfld.long 0x4 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x4 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x4 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x4 0.--3. 1. "DIV,Functional Clock Divider"
group.long 0x11C++0xB
line.long 0x0 "MRCC_CMP0_FUNC_CLKDIV,CMP0_FUNC clock divider control"
rbitfld.long 0x0 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x0 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x0 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x0 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x4 "MRCC_CMP0_RR_CLKSEL,CMP0_RR clock selection control"
bitfld.long 0x4 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x8 "MRCC_CMP0_RR_CLKDIV,CMP0_RR clock divider control"
rbitfld.long 0x8 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x8 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x8 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
bitfld.long 0x8 0.--1. "DIV,Functional Clock Divider" "0,1,2,3"
group.long 0x12C++0x23
line.long 0x0 "MRCC_CMP1_FUNC_CLKDIV,CMP1_FUNC clock divider control"
rbitfld.long 0x0 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x0 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x0 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x0 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x4 "MRCC_CMP1_RR_CLKSEL,CMP1_RR clock selection control"
bitfld.long 0x4 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x8 "MRCC_CMP1_RR_CLKDIV,CMP1_RR clock divider control"
rbitfld.long 0x8 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x8 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x8 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
bitfld.long 0x8 0.--1. "DIV,Functional Clock Divider" "0,1,2,3"
line.long 0xC "MRCC_DBG_TRACE_CLKSEL,DBG_TRACE clock selection control"
bitfld.long 0xC 0.--1. "MUX,Functional Clock Mux Select" "0: clkroot_cpu,1: clkroot_1m,2: clkroot_16k,?"
line.long 0x10 "MRCC_DBG_TRACE_CLKDIV,DBG_TRACE clock divider control"
rbitfld.long 0x10 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x10 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x10 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x10 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x14 "MRCC_CLKOUT_CLKSEL,CLKOUT clock selection control"
bitfld.long 0x14 0.--2. "MUX,Functional Clock Mux Select" "0: clkroot_12m,1: clkroot_firc_div,2: clkroot_sosc,3: clkroot_16k,?,?,6: clkroot_slow,?"
line.long 0x18 "MRCC_CLKOUT_CLKDIV,CLKOUT clock divider control"
rbitfld.long 0x18 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency is not stable"
bitfld.long 0x18 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x18 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x18 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x1C "MRCC_SYSTICK_CLKSEL,SYSTICK clock selection control"
bitfld.long 0x1C 0.--1. "MUX,Functional Clock Mux Select" "0: clkroot_cpu,1: clkroot_1m,2: clkroot_16k,?"
line.long 0x20 "MRCC_SYSTICK_CLKDIV,SYSTICK clock divider control"
rbitfld.long 0x20 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x20 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x20 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x20 0.--3. 1. "DIV,Functional Clock Divider"
group.long 0x154++0x3
line.long 0x0 "MRCC_FRO_HF_DIV_CLKDIV,FRO_HF_DIV clock divider control"
rbitfld.long 0x0 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
hexmask.long.byte 0x0 0.--3. 1. "DIV,Functional Clock Divider"
endif
sif (cpuis("MC?A152*"))
group.long 0xC4++0x37
line.long 0x0 "MRCC_WWDT0_CLKDIV,WWDT0 clock divider control"
rbitfld.long 0x0 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x0 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x0 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x0 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x4 "MRCC_LPI2C0_CLKSEL,LPI2C0 clock selection control"
bitfld.long 0x4 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x8 "MRCC_LPI2C0_CLKDIV,LPI2C0 clock divider control"
rbitfld.long 0x8 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x8 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x8 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x8 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0xC "MRCC_LPSPI0_CLKSEL,LPSPI0 clock selection control"
bitfld.long 0xC 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x10 "MRCC_LPSPI0_CLKDIV,LPSPI0 clock divider control"
rbitfld.long 0x10 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x10 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x10 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x10 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x14 "MRCC_LPSPI1_CLKSEL,LPSPI1 clock selection control"
bitfld.long 0x14 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x18 "MRCC_LPSPI1_CLKDIV,LPSPI1 clock divider control"
rbitfld.long 0x18 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x18 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x18 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x18 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x1C "MRCC_LPUART0_CLKSEL,LPUART0 clock selection control"
bitfld.long 0x1C 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x20 "MRCC_LPUART0_CLKDIV,LPUART0 clock divider control"
rbitfld.long 0x20 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x20 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x20 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x20 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x24 "MRCC_LPUART1_CLKSEL,LPUART1 clock selection control"
bitfld.long 0x24 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x28 "MRCC_LPUART1_CLKDIV,LPUART1 clock divider control"
rbitfld.long 0x28 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x28 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x28 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x28 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x2C "MRCC_LPUART2_CLKSEL,LPUART2 clock selection control"
bitfld.long 0x2C 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x30 "MRCC_LPUART2_CLKDIV,LPUART2 clock divider control"
rbitfld.long 0x30 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x30 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x30 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x30 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x34 "MRCC_USB0_CLKSEL,USB0 clock selection control"
bitfld.long 0x34 0.--1. "MUX,Functional Clock Mux Select" "?,1: scg_scg_firc_48mhz_clk,2: clkroot_sosc,?"
group.long 0x100++0xB
line.long 0x0 "MRCC_LPTMR0_CLKSEL,LPTMR0 clock selection control"
bitfld.long 0x0 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x4 "MRCC_LPTMR0_CLKDIV,LPTMR0 clock divider control"
rbitfld.long 0x4 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x4 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x4 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x4 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x8 "MRCC_OSTIMER0_CLKSEL,OSTIMER0 clock selection control"
bitfld.long 0x8 0.--1. "MUX,Functional Clock Mux Select" "0: clkroot_16k,?,2: clkroot_1m,?"
group.long 0x110++0x7
line.long 0x0 "MRCC_ADC0_CLKSEL,ADC0 clock selection control"
bitfld.long 0x0 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_GATED,?,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x4 "MRCC_ADC0_CLKDIV,ADC0 clock divider control"
rbitfld.long 0x4 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x4 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x4 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x4 0.--3. 1. "DIV,Functional Clock Divider"
group.long 0x11C++0xB
line.long 0x0 "MRCC_CMP0_FUNC_CLKDIV,CMP0_FUNC clock divider control"
rbitfld.long 0x0 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x0 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x0 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x0 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x4 "MRCC_CMP0_RR_CLKSEL,CMP0_RR clock selection control"
bitfld.long 0x4 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x8 "MRCC_CMP0_RR_CLKDIV,CMP0_RR clock divider control"
rbitfld.long 0x8 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x8 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x8 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
bitfld.long 0x8 0.--1. "DIV,Functional Clock Divider" "0,1,2,3"
group.long 0x12C++0x23
line.long 0x0 "MRCC_CMP1_FUNC_CLKDIV,CMP1_FUNC clock divider control"
rbitfld.long 0x0 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x0 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x0 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x0 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x4 "MRCC_CMP1_RR_CLKSEL,CMP1_RR clock selection control"
bitfld.long 0x4 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x8 "MRCC_CMP1_RR_CLKDIV,CMP1_RR clock divider control"
rbitfld.long 0x8 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x8 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x8 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
bitfld.long 0x8 0.--1. "DIV,Functional Clock Divider" "0,1,2,3"
line.long 0xC "MRCC_DBG_TRACE_CLKSEL,DBG_TRACE clock selection control"
bitfld.long 0xC 0.--1. "MUX,Functional Clock Mux Select" "0: clkroot_cpu,1: clkroot_1m,2: clkroot_16k,?"
line.long 0x10 "MRCC_DBG_TRACE_CLKDIV,DBG_TRACE clock divider control"
rbitfld.long 0x10 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x10 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x10 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x10 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x14 "MRCC_CLKOUT_CLKSEL,CLKOUT clock selection control"
bitfld.long 0x14 0.--2. "MUX,Functional Clock Mux Select" "0: clkroot_12m,1: clkroot_firc_div,2: clkroot_sosc,3: clkroot_16k,?,?,6: clkroot_slow,?"
line.long 0x18 "MRCC_CLKOUT_CLKDIV,CLKOUT clock divider control"
rbitfld.long 0x18 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency is not stable"
bitfld.long 0x18 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x18 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x18 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x1C "MRCC_SYSTICK_CLKSEL,SYSTICK clock selection control"
bitfld.long 0x1C 0.--1. "MUX,Functional Clock Mux Select" "0: clkroot_cpu,1: clkroot_1m,2: clkroot_16k,?"
line.long 0x20 "MRCC_SYSTICK_CLKDIV,SYSTICK clock divider control"
rbitfld.long 0x20 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x20 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x20 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x20 0.--3. 1. "DIV,Functional Clock Divider"
group.long 0x154++0x3
line.long 0x0 "MRCC_FRO_HF_DIV_CLKDIV,FRO_HF_DIV clock divider control"
rbitfld.long 0x0 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
hexmask.long.byte 0x0 0.--3. 1. "DIV,Functional Clock Divider"
endif
sif (cpuis("MC?A153*"))
group.long 0xC4++0x37
line.long 0x0 "MRCC_WWDT0_CLKDIV,WWDT0 clock divider control"
rbitfld.long 0x0 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x0 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x0 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x0 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x4 "MRCC_LPI2C0_CLKSEL,LPI2C0 clock selection control"
bitfld.long 0x4 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x8 "MRCC_LPI2C0_CLKDIV,LPI2C0 clock divider control"
rbitfld.long 0x8 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x8 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x8 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x8 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0xC "MRCC_LPSPI0_CLKSEL,LPSPI0 clock selection control"
bitfld.long 0xC 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x10 "MRCC_LPSPI0_CLKDIV,LPSPI0 clock divider control"
rbitfld.long 0x10 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x10 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x10 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x10 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x14 "MRCC_LPSPI1_CLKSEL,LPSPI1 clock selection control"
bitfld.long 0x14 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x18 "MRCC_LPSPI1_CLKDIV,LPSPI1 clock divider control"
rbitfld.long 0x18 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x18 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x18 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x18 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x1C "MRCC_LPUART0_CLKSEL,LPUART0 clock selection control"
bitfld.long 0x1C 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x20 "MRCC_LPUART0_CLKDIV,LPUART0 clock divider control"
rbitfld.long 0x20 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x20 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x20 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x20 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x24 "MRCC_LPUART1_CLKSEL,LPUART1 clock selection control"
bitfld.long 0x24 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x28 "MRCC_LPUART1_CLKDIV,LPUART1 clock divider control"
rbitfld.long 0x28 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x28 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x28 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x28 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x2C "MRCC_LPUART2_CLKSEL,LPUART2 clock selection control"
bitfld.long 0x2C 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,4: CLK_16K,5: CLK_1M,?,?"
line.long 0x30 "MRCC_LPUART2_CLKDIV,LPUART2 clock divider control"
rbitfld.long 0x30 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x30 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x30 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x30 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x34 "MRCC_USB0_CLKSEL,USB0 clock selection control"
bitfld.long 0x34 0.--1. "MUX,Functional Clock Mux Select" "?,1: scg_scg_firc_48mhz_clk,2: clkroot_sosc,?"
group.long 0x100++0xB
line.long 0x0 "MRCC_LPTMR0_CLKSEL,LPTMR0 clock selection control"
bitfld.long 0x0 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x4 "MRCC_LPTMR0_CLKDIV,LPTMR0 clock divider control"
rbitfld.long 0x4 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x4 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x4 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x4 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x8 "MRCC_OSTIMER0_CLKSEL,OSTIMER0 clock selection control"
bitfld.long 0x8 0.--1. "MUX,Functional Clock Mux Select" "0: clkroot_16k,?,2: clkroot_1m,?"
group.long 0x110++0x7
line.long 0x0 "MRCC_ADC0_CLKSEL,ADC0 clock selection control"
bitfld.long 0x0 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_GATED,?,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x4 "MRCC_ADC0_CLKDIV,ADC0 clock divider control"
rbitfld.long 0x4 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x4 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x4 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x4 0.--3. 1. "DIV,Functional Clock Divider"
group.long 0x11C++0xB
line.long 0x0 "MRCC_CMP0_FUNC_CLKDIV,CMP0_FUNC clock divider control"
rbitfld.long 0x0 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x0 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x0 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x0 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x4 "MRCC_CMP0_RR_CLKSEL,CMP0_RR clock selection control"
bitfld.long 0x4 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x8 "MRCC_CMP0_RR_CLKDIV,CMP0_RR clock divider control"
rbitfld.long 0x8 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x8 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x8 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
bitfld.long 0x8 0.--1. "DIV,Functional Clock Divider" "0,1,2,3"
group.long 0x12C++0x23
line.long 0x0 "MRCC_CMP1_FUNC_CLKDIV,CMP1_FUNC clock divider control"
rbitfld.long 0x0 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x0 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x0 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x0 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x4 "MRCC_CMP1_RR_CLKSEL,CMP1_RR clock selection control"
bitfld.long 0x4 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x8 "MRCC_CMP1_RR_CLKDIV,CMP1_RR clock divider control"
rbitfld.long 0x8 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x8 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x8 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
bitfld.long 0x8 0.--1. "DIV,Functional Clock Divider" "0,1,2,3"
line.long 0xC "MRCC_DBG_TRACE_CLKSEL,DBG_TRACE clock selection control"
bitfld.long 0xC 0.--1. "MUX,Functional Clock Mux Select" "0: clkroot_cpu,1: clkroot_1m,2: clkroot_16k,?"
line.long 0x10 "MRCC_DBG_TRACE_CLKDIV,DBG_TRACE clock divider control"
rbitfld.long 0x10 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x10 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x10 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x10 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x14 "MRCC_CLKOUT_CLKSEL,CLKOUT clock selection control"
bitfld.long 0x14 0.--2. "MUX,Functional Clock Mux Select" "0: clkroot_12m,1: clkroot_firc_div,2: clkroot_sosc,3: clkroot_16k,?,?,6: clkroot_slow,?"
line.long 0x18 "MRCC_CLKOUT_CLKDIV,CLKOUT clock divider control"
rbitfld.long 0x18 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency is not stable"
bitfld.long 0x18 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x18 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x18 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x1C "MRCC_SYSTICK_CLKSEL,SYSTICK clock selection control"
bitfld.long 0x1C 0.--1. "MUX,Functional Clock Mux Select" "0: clkroot_cpu,1: clkroot_1m,2: clkroot_16k,?"
line.long 0x20 "MRCC_SYSTICK_CLKDIV,SYSTICK clock divider control"
rbitfld.long 0x20 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x20 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x20 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x20 0.--3. 1. "DIV,Functional Clock Divider"
group.long 0x154++0x3
line.long 0x0 "MRCC_FRO_HF_DIV_CLKDIV,FRO_HF_DIV clock divider control"
rbitfld.long 0x0 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
hexmask.long.byte 0x0 0.--3. 1. "DIV,Functional Clock Divider"
endif
sif (cpuis("MC?A144*"))
group.long 0x154++0xB
line.long 0x0 "MRCC_CMP0_FUNC_CLKDIV,CMP0_FUNC clock divider control"
rbitfld.long 0x0 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x0 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x0 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x0 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x4 "MRCC_CMP0_RR_CLKSEL,CMP0_RR clock selection control"
bitfld.long 0x4 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x8 "MRCC_CMP0_RR_CLKDIV,CMP0_RR clock divider control"
rbitfld.long 0x8 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x8 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x8 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x8 0.--3. 1. "DIV,Functional Clock Divider"
group.long 0x164++0x43
line.long 0x0 "MRCC_CMP1_FUNC_CLKDIV,CMP1_FUNC clock divider control"
rbitfld.long 0x0 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x0 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x0 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x0 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x4 "MRCC_CMP1_RR_CLKSEL,CMP1_RR clock selection control"
bitfld.long 0x4 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x8 "MRCC_CMP1_RR_CLKDIV,CMP1_RR clock divider control"
rbitfld.long 0x8 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x8 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x8 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x8 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0xC "MRCC_DAC0_CLKSEL,DAC0 clock selection control"
bitfld.long 0xC 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x10 "MRCC_DAC0_CLKDIV,DAC0 clock divider control"
rbitfld.long 0x10 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x10 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x10 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x10 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x14 "MRCC_FLEXCAN0_CLKSEL,FLEXCAN0 clock selection control"
bitfld.long 0x14 0.--2. "MUX,Functional Clock Mux Select" "?,?,2: FRO_HF_DIV,3: CLK_IN,?,?,?,?"
line.long 0x18 "MRCC_FLEXCAN0_CLKDIV,FLEXCAN0 clock divider control"
rbitfld.long 0x18 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x18 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x18 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x18 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x1C "MRCC_LPI2C2_CLKSEL,LPI2C2 clock selection control"
bitfld.long 0x1C 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x20 "MRCC_LPI2C2_CLKDIV,LPI2C2 clock divider control"
rbitfld.long 0x20 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x20 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x20 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x20 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x24 "MRCC_LPI2C3_CLKSEL,LPI2C3 clock selection control"
bitfld.long 0x24 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,?,2: FRO_HF_DIV,3: CLK_IN,?,5: CLK_1M,?,?"
line.long 0x28 "MRCC_LPI2C3_CLKDIV,LPI2C3 clock divider control"
rbitfld.long 0x28 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x28 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x28 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x28 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x2C "MRCC_DBG_TRACE_CLKSEL,DBG_TRACE clock selection control"
bitfld.long 0x2C 0.--1. "MUX,Functional Clock Mux Select" "0: CPU_CLK,1: CLK_1M,2: CLK_16K,?"
line.long 0x30 "MRCC_DBG_TRACE_CLKDIV,DBG_TRACE clock divider control"
rbitfld.long 0x30 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x30 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x30 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x30 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x34 "MRCC_CLKOUT_CLKSEL,CLKOUT clock selection control"
bitfld.long 0x34 0.--2. "MUX,Functional Clock Mux Select" "0: FRO_12M,1: FRO_HF_DIV,2: CLK_IN,3: CLK_16K,?,?,6: SLOW_CLK,?"
line.long 0x38 "MRCC_CLKOUT_CLKDIV,CLKOUT clock divider control"
rbitfld.long 0x38 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x38 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x38 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x38 0.--3. 1. "DIV,Functional Clock Divider"
line.long 0x3C "MRCC_SYSTICK_CLKSEL,SYSTICK clock selection control"
bitfld.long 0x3C 0.--1. "MUX,Functional Clock Mux Select" "0: CPU_CLK,1: CLK_1M,2: CLK_16K,?"
line.long 0x40 "MRCC_SYSTICK_CLKDIV,SYSTICK clock divider control"
rbitfld.long 0x40 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
bitfld.long 0x40 30. "HALT,Halt divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x40 29. "RESET,Reset divider counter" "0: Divider isn't reset,1: Divider is reset"
hexmask.long.byte 0x40 0.--3. 1. "DIV,Functional Clock Divider"
group.long 0x1AC++0x3
line.long 0x0 "MRCC_FRO_HF_DIV_CLKDIV,FRO_HF_DIV clock divider control"
rbitfld.long 0x0 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
hexmask.long.byte 0x0 0.--3. 1. "DIV,Functional Clock Divider"
endif
sif (cpuis("MC?A145*"))
group.long 0x1AC++0x3
line.long 0x0 "MRCC_FRO_HF_DIV_CLKDIV,FRO_HF_DIV clock divider control"
rbitfld.long 0x0 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
hexmask.long.byte 0x0 0.--3. 1. "DIV,Functional Clock Divider"
endif
sif (cpuis("MC?A146*"))
group.long 0x1AC++0x3
line.long 0x0 "MRCC_FRO_HF_DIV_CLKDIV,FRO_HF_DIV clock divider control"
rbitfld.long 0x0 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
hexmask.long.byte 0x0 0.--3. 1. "DIV,Functional Clock Divider"
endif
sif (cpuis("MC?A154*"))
group.long 0x1AC++0x3
line.long 0x0 "MRCC_FRO_HF_DIV_CLKDIV,FRO_HF_DIV clock divider control"
rbitfld.long 0x0 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
hexmask.long.byte 0x0 0.--3. 1. "DIV,Functional Clock Divider"
endif
sif (cpuis("MC?A155*"))
group.long 0x1AC++0x3
line.long 0x0 "MRCC_FRO_HF_DIV_CLKDIV,FRO_HF_DIV clock divider control"
rbitfld.long 0x0 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
hexmask.long.byte 0x0 0.--3. 1. "DIV,Functional Clock Divider"
endif
sif (cpuis("MC?A156*"))
group.long 0x1AC++0x3
line.long 0x0 "MRCC_FRO_HF_DIV_CLKDIV,FRO_HF_DIV clock divider control"
rbitfld.long 0x0 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency isn't stable"
hexmask.long.byte 0x0 0.--3. 1. "DIV,Functional Clock Divider"
endif
tree.end
sif (cpuis("MC?A154*")||cpuis("MC?A155*")||cpuis("MC?A156*"))
tree "OPAMP (Operational Amplifier)"
base ad:0x400B7000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
bitfld.long 0x4 0. "PGA_FUNCTION,PGA Function Option" "0: Core amplifier enabled,1: PGA function enabled"
group.long 0x8++0x3
line.long 0x0 "OPAMP_CTR,OPAMP Control"
bitfld.long 0x0 28.--30. "NGAIN,Negative PGA Selection" "0: Buffer,1: Ngain=1,2: Ngain=2,3: Ngain=4,4: Ngain=8,5: Ngain=16,6: Ngain=33,7: Ngain=64"
bitfld.long 0x0 24.--26. "PGAIN,Positive PGA Selection" "0: Positive input 1 (INP1),1: Pgain=1,2: Pgain=2,3: Pgain=4,4: Pgain=8,5: Pgain=16,6: Pgain=33,7: Pgain=64"
newline
bitfld.long 0x0 22. "OUTSW,Output Switch" "0: OPAMP out to negative gain resistor ladder..,1: OPAMP out to negative gain resistor ladder.."
bitfld.long 0x0 21. "ADCSW2,Measure Switch 2" "0: Measure positive gain resistor ladder reference..,1: Measure positive gain resistor ladder reference.."
newline
bitfld.long 0x0 20. "ADCSW1,Measure Switch 1" "0: Measure negative gain resistor ladder voltage..,1: Measure negative gain resistor ladder voltage.."
bitfld.long 0x0 17.--18. "PREF,Positive Reference Voltage Selection" "0: Input 0,1: Input 1,2: Input 2,3: Input 3"
newline
bitfld.long 0x0 16. "BUFEN,Reference Buffer" "0: Disables,1: Enables"
rbitfld.long 0x0 12. "INPF,Positive Input Connection Status" "0: Positive input 0 (INP0),1: Positive input 1 (INP1)"
newline
bitfld.long 0x0 9. "INPSEL,Positive Input Channel Selection" "0: When OPAMP is not in trigger mode select..,1: When OPAMP is not in trigger mode select.."
bitfld.long 0x0 8. "TRIGMD,Trigger Mode" "0: Disable,1: Enable"
newline
bitfld.long 0x0 4.--5. "INTREF,Provide OPAMP rail to rail voltage selection" "0: Select OPAMP input rail to rail voltage from 0..,1: Select OPAMP input rail to rail voltage from 0..,2: Select OPAMP input rail to rail voltage from..,3: Not allowed"
bitfld.long 0x0 2.--3. "BIASC,Bias Current Trim Selection" "0: Default,1: Increase current,2: Decrease current,3: Further decrease current"
newline
bitfld.long 0x0 1. "MODE,Mode Selection" "0: High performance mode,1: Low power mode"
bitfld.long 0x0 0. "EN,OPAMP Enable" "0: Disable,1: Enable"
tree.end
endif
tree "OSTIMER (OS Event Timer)"
base ad:0x400AD000
rgroup.long 0x0++0xF
line.long 0x0 "EVTIMERL,EVTIMER Low"
hexmask.long 0x0 0.--31. 1. "EVTIMER_COUNT_VALUE,EVTimer Count Value"
line.long 0x4 "EVTIMERH,EVTIMER High"
hexmask.long.word 0x4 0.--9. 1. "EVTIMER_COUNT_VALUE,EVTimer Count Value"
line.long 0x8 "CAPTURE_L,Local Capture Low for CPU"
hexmask.long 0x8 0.--31. 1. "CAPTURE_VALUE,EVTimer Capture Value"
line.long 0xC "CAPTURE_H,Local Capture High for CPU"
hexmask.long.word 0xC 0.--9. 1. "CAPTURE_VALUE,EVTimer Capture Value"
group.long 0x10++0x7
line.long 0x0 "MATCH_L,Local Match Low for CPU"
hexmask.long 0x0 0.--31. 1. "MATCH_VALUE,EVTimer Match Value"
line.long 0x4 "MATCH_H,Local Match High for CPU"
hexmask.long.word 0x4 0.--9. 1. "MATCH_VALUE,EVTimer Match Value"
group.long 0x1C++0x3
line.long 0x0 "OSEVENT_CTRL,OSTIMER Control for CPU"
bitfld.long 0x0 3. "DEBUG_EN,Debug Enable" "0: Disables,1: Enables"
rbitfld.long 0x0 2. "MATCH_WR_RDY,EVTimer Match Write Ready" "0,1"
bitfld.long 0x0 1. "OSTIMER_INTENA,Interrupt or Wake-Up Request" "0: Interrupts blocked,1: Interrupts enabled"
eventfld.long 0x0 0. "OSTIMER_INTRFLAG,Interrupt Flag" "0,1"
tree.end
tree "PORT (Port Control)"
base ad:0x0
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*")||cpuis("MC?A144*"))
tree "PORT0"
base ad:0x400BC000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x7
line.long 0x0 "GPCLR,Global Pin Control Low"
bitfld.long 0x0 31. "GPWE15,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 30. "GPWE14,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 29. "GPWE13,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 28. "GPWE12,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 27. "GPWE11,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 26. "GPWE10,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 25. "GPWE9,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 24. "GPWE8,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 23. "GPWE7,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 22. "GPWE6,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 21. "GPWE5,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 20. "GPWE4,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 19. "GPWE3,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 18. "GPWE2,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 17. "GPWE1,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 16. "GPWE0,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data"
line.long 0x4 "GPCHR,Global Pin Control High"
bitfld.long 0x4 31. "GPWE31,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 30. "GPWE30,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 29. "GPWE29,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 28. "GPWE28,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 27. "GPWE27,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 26. "GPWE26,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 25. "GPWE25,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 24. "GPWE24,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 23. "GPWE23,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 22. "GPWE22,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 21. "GPWE21,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 20. "GPWE20,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 19. "GPWE19,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 18. "GPWE18,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 17. "GPWE17,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 16. "GPWE16,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data"
group.long 0x20++0x3
line.long 0x0 "CONFIG,Configuration"
bitfld.long 0x0 0. "RANGE,Port Voltage Range" "0: 1.71 V-3.6 V,1: 2.70 V-3.6 V"
sif (cpuis("MC?A144*"))
group.long 0x60++0x7
line.long 0x0 "CALIB0,Calibration 0"
hexmask.long.byte 0x0 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x0 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
line.long 0x4 "CALIB1,Calibration 1"
hexmask.long.byte 0x4 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x4 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
group.long 0x90++0x7
line.long 0x0 "PCR4,Pin Control 4"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR5,Pin Control 5"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
group.long 0x9C++0x23
line.long 0x0 "PCR7,Pin Control 7"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR8,Pin Control 8"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR9,Pin Control 9"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR10,Pin Control 10"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR11,Pin Control 11"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR12,Pin Control 12"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR13,Pin Control 13"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR14,Pin Control 14"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x20 "PCR15,Pin Control 15"
bitfld.long 0x20 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x20 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x20 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x20 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x20 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x20 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
endif
group.long 0x80++0xF
line.long 0x0 "PCR0,Pin Control 0"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR1,Pin Control 1"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR2,Pin Control 2"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x8 8.--11. 1. "MUX,Pin Multiplex Control"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x8 8.--11. 1. "MUX,Pin Multiplex Control"
endif
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR3,Pin Control 3"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0xC 8.--11. 1. "MUX,Pin Multiplex Control"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0xC 8.--11. 1. "MUX,Pin Multiplex Control"
endif
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
group.long 0x98++0x3
line.long 0x0 "PCR6,Pin Control 6"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x0 8.--11. 1. "MUX,Pin Multiplex Control"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x0 8.--11. 1. "MUX,Pin Multiplex Control"
endif
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
group.long 0xC0++0x7
line.long 0x0 "PCR16,Pin Control 16"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x0 8.--11. 1. "MUX,Pin Multiplex Control"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x0 8.--11. 1. "MUX,Pin Multiplex Control"
endif
bitfld.long 0x0 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
newline
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x0 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 2. "PV,Pull Value" "0: Low,1: High"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR17,Pin Control 17"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x4 8.--11. 1. "MUX,Pin Multiplex Control"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x4 8.--11. 1. "MUX,Pin Multiplex Control"
endif
bitfld.long 0x4 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
newline
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
sif (cpuis("MC?A144*"))
group.long 0xC8++0x37
line.long 0x0 "PCR18,Pin Control 18"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
hexmask.long.byte 0x0 8.--11. 1. "MUX,Pin Multiplex Control"
newline
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR19,Pin Control 19"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
hexmask.long.byte 0x4 8.--11. 1. "MUX,Pin Multiplex Control"
newline
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR20,Pin Control 20"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x8 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR21,Pin Control 21"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0xC 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR22,Pin Control 22"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x10 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR23,Pin Control 23"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x14 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR24,Pin Control 24"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR25,Pin Control 25"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x20 "PCR26,Pin Control 26"
bitfld.long 0x20 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x20 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x20 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x20 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x20 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x20 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x24 "PCR27,Pin Control 27"
bitfld.long 0x24 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x24 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x24 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x24 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x24 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x24 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x28 "PCR28,Pin Control 28"
bitfld.long 0x28 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x28 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x28 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x28 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x28 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x28 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x28 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x28 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x2C "PCR29,Pin Control 29"
bitfld.long 0x2C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x2C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x2C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x2C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x2C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x30 "PCR30,Pin Control 30"
bitfld.long 0x30 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x30 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x30 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x30 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x30 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x30 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x30 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x30 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x34 "PCR31,Pin Control 31"
bitfld.long 0x34 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x34 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x34 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x34 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x34 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x34 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x34 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x34 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
endif
tree.end
endif
sif (cpuis("MC?A145*"))
tree "PORT0"
base ad:0x400BC000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x7
line.long 0x0 "GPCLR,Global Pin Control Low"
bitfld.long 0x0 31. "GPWE15,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 30. "GPWE14,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 29. "GPWE13,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 28. "GPWE12,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 27. "GPWE11,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 26. "GPWE10,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 25. "GPWE9,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 24. "GPWE8,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 23. "GPWE7,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 22. "GPWE6,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 21. "GPWE5,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 20. "GPWE4,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 19. "GPWE3,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 18. "GPWE2,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 17. "GPWE1,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 16. "GPWE0,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data"
line.long 0x4 "GPCHR,Global Pin Control High"
bitfld.long 0x4 31. "GPWE31,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 30. "GPWE30,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 29. "GPWE29,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 28. "GPWE28,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 27. "GPWE27,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 26. "GPWE26,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 25. "GPWE25,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 24. "GPWE24,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 23. "GPWE23,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 22. "GPWE22,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 21. "GPWE21,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 20. "GPWE20,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 19. "GPWE19,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 18. "GPWE18,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 17. "GPWE17,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 16. "GPWE16,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data"
group.long 0x20++0x3
line.long 0x0 "CONFIG,Configuration"
bitfld.long 0x0 0. "RANGE,Port Voltage Range" "0: 1.71 V-3.6 V,1: 2.70 V-3.6 V"
group.long 0x60++0x7
line.long 0x0 "CALIB0,Calibration 0"
hexmask.long.byte 0x0 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x0 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
line.long 0x4 "CALIB1,Calibration 1"
hexmask.long.byte 0x4 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x4 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
group.long 0x80++0x7F
line.long 0x0 "PCR0,Pin Control 0"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR1,Pin Control 1"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR2,Pin Control 2"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x8 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR3,Pin Control 3"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0xC 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR4,Pin Control 4"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR5,Pin Control 5"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR6,Pin Control 6"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x18 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR7,Pin Control 7"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x20 "PCR8,Pin Control 8"
bitfld.long 0x20 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x20 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x20 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x20 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x20 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x20 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x24 "PCR9,Pin Control 9"
bitfld.long 0x24 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x24 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x24 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x24 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x24 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x24 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x28 "PCR10,Pin Control 10"
bitfld.long 0x28 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x28 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x28 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x28 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x28 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x28 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x28 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x28 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x2C "PCR11,Pin Control 11"
bitfld.long 0x2C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x2C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x2C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x2C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x2C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x2C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x30 "PCR12,Pin Control 12"
bitfld.long 0x30 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x30 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x30 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x30 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x30 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x30 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x30 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x30 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x34 "PCR13,Pin Control 13"
bitfld.long 0x34 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x34 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x34 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x34 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x34 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x34 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x34 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x34 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x38 "PCR14,Pin Control 14"
bitfld.long 0x38 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x38 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x38 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x38 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x38 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x38 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x38 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x38 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x3C "PCR15,Pin Control 15"
bitfld.long 0x3C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x3C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x3C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x3C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x3C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x3C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x3C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x3C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x40 "PCR16,Pin Control 16"
bitfld.long 0x40 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x40 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x40 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x40 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x40 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x40 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x40 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x40 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x40 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x40 2. "PV,Pull Value" "0: Low,1: High"
bitfld.long 0x40 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x40 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x44 "PCR17,Pin Control 17"
bitfld.long 0x44 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x44 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x44 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x44 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x44 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x44 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x44 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x44 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x44 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x44 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x44 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x48 "PCR18,Pin Control 18"
bitfld.long 0x48 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x48 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x48 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x48 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x48 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x48 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x48 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x48 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x48 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4C "PCR19,Pin Control 19"
bitfld.long 0x4C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x4C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x4C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x50 "PCR20,Pin Control 20"
bitfld.long 0x50 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x50 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x50 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x50 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x50 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x50 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x50 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x54 "PCR21,Pin Control 21"
bitfld.long 0x54 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x54 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x54 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x54 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x54 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x54 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x54 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x58 "PCR22,Pin Control 22"
bitfld.long 0x58 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x58 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x58 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x58 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x58 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x58 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x58 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x58 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x58 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x5C "PCR23,Pin Control 23"
bitfld.long 0x5C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x5C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x5C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x5C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x5C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x5C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x5C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x5C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x60 "PCR24,Pin Control 24"
bitfld.long 0x60 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x60 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x60 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x60 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x60 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x60 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x60 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x60 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x64 "PCR25,Pin Control 25"
bitfld.long 0x64 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x64 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x64 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x64 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x64 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x64 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x64 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x64 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x68 "PCR26,Pin Control 26"
bitfld.long 0x68 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x68 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x68 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x68 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x68 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x68 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x68 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x68 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x6C "PCR27,Pin Control 27"
bitfld.long 0x6C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x6C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x6C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x6C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x6C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x6C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x70 "PCR28,Pin Control 28"
bitfld.long 0x70 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x70 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x70 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x70 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x70 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x70 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x70 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x70 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x74 "PCR29,Pin Control 29"
bitfld.long 0x74 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x74 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x74 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x74 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x74 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x74 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x74 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x74 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x78 "PCR30,Pin Control 30"
bitfld.long 0x78 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x78 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x78 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x78 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x78 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x78 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x78 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x78 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x7C "PCR31,Pin Control 31"
bitfld.long 0x7C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x7C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x7C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x7C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x7C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x7C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
tree.end
tree "PORT1"
base ad:0x400BD000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x7
line.long 0x0 "GPCLR,Global Pin Control Low"
bitfld.long 0x0 31. "GPWE15,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 30. "GPWE14,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 29. "GPWE13,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 28. "GPWE12,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 27. "GPWE11,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 26. "GPWE10,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 25. "GPWE9,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 24. "GPWE8,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 23. "GPWE7,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 22. "GPWE6,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 21. "GPWE5,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 20. "GPWE4,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 19. "GPWE3,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 18. "GPWE2,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 17. "GPWE1,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 16. "GPWE0,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data"
line.long 0x4 "GPCHR,Global Pin Control High"
bitfld.long 0x4 31. "GPWE31,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 30. "GPWE30,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 29. "GPWE29,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 28. "GPWE28,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 27. "GPWE27,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 26. "GPWE26,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 25. "GPWE25,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 24. "GPWE24,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 23. "GPWE23,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 22. "GPWE22,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 21. "GPWE21,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 20. "GPWE20,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 19. "GPWE19,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 18. "GPWE18,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 17. "GPWE17,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 16. "GPWE16,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data"
group.long 0x20++0x3
line.long 0x0 "CONFIG,Configuration"
bitfld.long 0x0 0. "RANGE,Port Voltage Range" "0: 1.71 V-3.6 V,1: 2.70 V-3.6 V"
group.long 0x60++0x7
line.long 0x0 "CALIB0,Calibration 0"
hexmask.long.byte 0x0 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x0 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
line.long 0x4 "CALIB1,Calibration 1"
hexmask.long.byte 0x4 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x4 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
group.long 0x80++0x7F
line.long 0x0 "PCR0,Pin Control 0"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x0 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR1,Pin Control 1"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x4 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR2,Pin Control 2"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x8 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR3,Pin Control 3"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0xC 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR4,Pin Control 4"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x10 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR5,Pin Control 5"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x14 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR6,Pin Control 6"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x18 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR7,Pin Control 7"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x1C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x20 "PCR8,Pin Control 8"
bitfld.long 0x20 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x20 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x20 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x20 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x20 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x20 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x20 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x20 2. "PV,Pull Value" "0: Low,1: High"
bitfld.long 0x20 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x20 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x24 "PCR9,Pin Control 9"
bitfld.long 0x24 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x24 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x24 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x24 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x24 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x24 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x24 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x24 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x24 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x28 "PCR10,Pin Control 10"
bitfld.long 0x28 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x28 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x28 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x28 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x28 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x28 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x28 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x28 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x28 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x2C "PCR11,Pin Control 11"
bitfld.long 0x2C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x2C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x2C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x2C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x2C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x2C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x2C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x2C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x30 "PCR12,Pin Control 12"
bitfld.long 0x30 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x30 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x30 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x30 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x30 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x30 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x30 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x30 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x30 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x34 "PCR13,Pin Control 13"
bitfld.long 0x34 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x34 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x34 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x34 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x34 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x34 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x34 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x34 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x34 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x38 "PCR14,Pin Control 14"
bitfld.long 0x38 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x38 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x38 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x38 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x38 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x38 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x38 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x38 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x38 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x3C "PCR15,Pin Control 15"
bitfld.long 0x3C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x3C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x3C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x3C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x3C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x3C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x3C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x3C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x3C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x40 "PCR16,Pin Control 16"
bitfld.long 0x40 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x40 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x40 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x40 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x40 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x40 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x40 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x40 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x44 "PCR17,Pin Control 17"
bitfld.long 0x44 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x44 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x44 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x44 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x44 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x44 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x44 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x44 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x48 "PCR18,Pin Control 18"
bitfld.long 0x48 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x48 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x48 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x48 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x48 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x48 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x48 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x48 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4C "PCR19,Pin Control 19"
bitfld.long 0x4C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x4C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x50 "PCR20,Pin Control 20"
bitfld.long 0x50 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x50 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x50 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x50 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x50 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x50 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x50 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x54 "PCR21,Pin Control 21"
bitfld.long 0x54 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x54 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x54 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x54 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x54 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x54 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x54 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x58 "PCR22,Pin Control 22"
bitfld.long 0x58 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x58 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x58 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x58 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x58 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x58 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x58 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x58 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x5C "PCR23,Pin Control 23"
bitfld.long 0x5C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x5C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x5C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x5C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x5C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x5C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x60 "PCR24,Pin Control 24"
bitfld.long 0x60 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x60 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x60 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x60 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x60 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x60 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x60 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x60 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x64 "PCR25,Pin Control 25"
bitfld.long 0x64 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x64 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x64 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x64 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x64 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x64 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x64 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x64 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x68 "PCR26,Pin Control 26"
bitfld.long 0x68 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x68 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x68 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x68 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x68 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x68 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x68 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x68 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x6C "PCR27,Pin Control 27"
bitfld.long 0x6C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x6C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x6C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x6C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x6C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x6C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x70 "PCR28,Pin Control 28"
bitfld.long 0x70 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x70 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x70 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x70 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x70 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x70 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x70 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x70 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x74 "PCR29,Pin Control 29"
bitfld.long 0x74 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x74 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x74 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x74 8.--9. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific)"
bitfld.long 0x74 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x74 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x74 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x74 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x74 2. "PV,Pull Value" "0: Low,1: High"
newline
bitfld.long 0x74 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x74 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x78 "PCR30,Pin Control 30"
bitfld.long 0x78 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x78 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x78 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x78 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x78 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x78 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x78 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x78 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x78 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x78 2. "PV,Pull Value" "0: Low,1: High"
bitfld.long 0x78 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x78 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x7C "PCR31,Pin Control 31"
bitfld.long 0x7C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x7C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x7C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x7C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x7C 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x7C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x7C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x7C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
tree.end
tree "PORT2"
base ad:0x400BE000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x7
line.long 0x0 "GPCLR,Global Pin Control Low"
bitfld.long 0x0 31. "GPWE15,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 30. "GPWE14,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 29. "GPWE13,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 28. "GPWE12,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 27. "GPWE11,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 26. "GPWE10,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 25. "GPWE9,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 24. "GPWE8,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 23. "GPWE7,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 22. "GPWE6,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 21. "GPWE5,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 20. "GPWE4,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 19. "GPWE3,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 18. "GPWE2,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 17. "GPWE1,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 16. "GPWE0,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data"
line.long 0x4 "GPCHR,Global Pin Control High"
bitfld.long 0x4 31. "GPWE31,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 30. "GPWE30,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 29. "GPWE29,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 28. "GPWE28,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 27. "GPWE27,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 26. "GPWE26,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 25. "GPWE25,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 24. "GPWE24,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 23. "GPWE23,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 22. "GPWE22,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 21. "GPWE21,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 20. "GPWE20,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 19. "GPWE19,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 18. "GPWE18,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 17. "GPWE17,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 16. "GPWE16,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data"
group.long 0x20++0x3
line.long 0x0 "CONFIG,Configuration"
bitfld.long 0x0 0. "RANGE,Port Voltage Range" "0: 1.71 V-3.6 V,1: 2.70 V-3.6 V"
group.long 0x80++0x7F
line.long 0x0 "PCR0,Pin Control 0"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR1,Pin Control 1"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR2,Pin Control 2"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR3,Pin Control 3"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0xC 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR4,Pin Control 4"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR5,Pin Control 5"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR6,Pin Control 6"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR7,Pin Control 7"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x1C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x20 "PCR8,Pin Control 8"
bitfld.long 0x20 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x20 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x20 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x20 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x20 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x20 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x24 "PCR9,Pin Control 9"
bitfld.long 0x24 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x24 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x24 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x24 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x24 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x24 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x28 "PCR10,Pin Control 10"
bitfld.long 0x28 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x28 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x28 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x28 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x28 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x28 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x28 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x28 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x28 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x2C "PCR11,Pin Control 11"
bitfld.long 0x2C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x2C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x2C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x2C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x2C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x2C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x2C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x2C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x30 "PCR12,Pin Control 12"
bitfld.long 0x30 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x30 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x30 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x30 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x30 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x30 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x30 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x30 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x30 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x34 "PCR13,Pin Control 13"
bitfld.long 0x34 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x34 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x34 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x34 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x34 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x34 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x34 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x34 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x34 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x38 "PCR14,Pin Control 14"
bitfld.long 0x38 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x38 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x38 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x38 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x38 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x38 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x38 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x38 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x3C "PCR15,Pin Control 15"
bitfld.long 0x3C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x3C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x3C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x3C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x3C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x3C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x3C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x3C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x3C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x40 "PCR16,Pin Control 16"
bitfld.long 0x40 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x40 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x40 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x40 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x40 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x40 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x40 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x40 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x40 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x44 "PCR17,Pin Control 17"
bitfld.long 0x44 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x44 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x44 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x44 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x44 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x44 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x44 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x44 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x44 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x48 "PCR18,Pin Control 18"
bitfld.long 0x48 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x48 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x48 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x48 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x48 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x48 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x48 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x48 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4C "PCR19,Pin Control 19"
bitfld.long 0x4C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x4C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x50 "PCR20,Pin Control 20"
bitfld.long 0x50 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x50 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x50 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x50 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x50 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x50 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x50 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x54 "PCR21,Pin Control 21"
bitfld.long 0x54 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x54 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x54 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x54 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x54 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x54 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x54 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x58 "PCR22,Pin Control 22"
bitfld.long 0x58 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x58 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x58 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x58 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x58 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x58 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x58 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x58 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x5C "PCR23,Pin Control 23"
bitfld.long 0x5C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x5C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x5C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x5C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x5C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x5C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x5C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x5C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x60 "PCR24,Pin Control 24"
bitfld.long 0x60 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x60 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x60 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x60 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x60 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x60 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x60 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x60 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x64 "PCR25,Pin Control 25"
bitfld.long 0x64 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x64 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x64 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x64 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x64 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x64 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x64 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x64 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x68 "PCR26,Pin Control 26"
bitfld.long 0x68 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x68 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x68 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x68 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x68 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x68 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x68 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x68 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x6C "PCR27,Pin Control 27"
bitfld.long 0x6C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x6C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x6C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x6C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x6C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x6C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x70 "PCR28,Pin Control 28"
bitfld.long 0x70 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x70 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x70 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x70 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x70 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x70 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x70 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x70 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x74 "PCR29,Pin Control 29"
bitfld.long 0x74 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x74 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x74 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x74 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x74 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x74 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x74 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x74 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x78 "PCR30,Pin Control 30"
bitfld.long 0x78 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x78 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x78 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x78 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x78 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x78 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x78 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x78 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x7C "PCR31,Pin Control 31"
bitfld.long 0x7C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x7C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x7C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x7C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x7C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x7C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
tree.end
tree "PORT3"
base ad:0x400BF000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x7
line.long 0x0 "GPCLR,Global Pin Control Low"
bitfld.long 0x0 31. "GPWE15,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 30. "GPWE14,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 29. "GPWE13,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 28. "GPWE12,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 27. "GPWE11,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 26. "GPWE10,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 25. "GPWE9,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 24. "GPWE8,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 23. "GPWE7,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 22. "GPWE6,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 21. "GPWE5,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 20. "GPWE4,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 19. "GPWE3,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 18. "GPWE2,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 17. "GPWE1,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 16. "GPWE0,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data"
line.long 0x4 "GPCHR,Global Pin Control High"
bitfld.long 0x4 31. "GPWE31,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 30. "GPWE30,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 29. "GPWE29,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 28. "GPWE28,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 27. "GPWE27,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 26. "GPWE26,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 25. "GPWE25,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 24. "GPWE24,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 23. "GPWE23,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 22. "GPWE22,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 21. "GPWE21,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 20. "GPWE20,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 19. "GPWE19,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 18. "GPWE18,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 17. "GPWE17,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 16. "GPWE16,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data"
group.long 0x20++0x3
line.long 0x0 "CONFIG,Configuration"
bitfld.long 0x0 0. "RANGE,Port Voltage Range" "0: 1.71 V-3.6 V,1: 2.70 V-3.6 V"
group.long 0x60++0x7
line.long 0x0 "CALIB0,Calibration 0"
hexmask.long.byte 0x0 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x0 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
line.long 0x4 "CALIB1,Calibration 1"
hexmask.long.byte 0x4 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x4 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
group.long 0x80++0x7F
line.long 0x0 "PCR0,Pin Control 0"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x0 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x0 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x0 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR1,Pin Control 1"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x4 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x4 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR2,Pin Control 2"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR3,Pin Control 3"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR4,Pin Control 4"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR5,Pin Control 5"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR6,Pin Control 6"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x18 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR7,Pin Control 7"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x1C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x20 "PCR8,Pin Control 8"
bitfld.long 0x20 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x20 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x20 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x20 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x20 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x20 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x20 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x24 "PCR9,Pin Control 9"
bitfld.long 0x24 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x24 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x24 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x24 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x24 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x24 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x24 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x28 "PCR10,Pin Control 10"
bitfld.long 0x28 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x28 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x28 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x28 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x28 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x28 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x28 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x28 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x28 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x2C "PCR11,Pin Control 11"
bitfld.long 0x2C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x2C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x2C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x2C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x2C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x2C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x2C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x2C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x30 "PCR12,Pin Control 12"
bitfld.long 0x30 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x30 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x30 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x30 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x30 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x30 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x30 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x30 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x30 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x34 "PCR13,Pin Control 13"
bitfld.long 0x34 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x34 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x34 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x34 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x34 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x34 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x34 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x34 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x34 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x38 "PCR14,Pin Control 14"
bitfld.long 0x38 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x38 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x38 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x38 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x38 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x38 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x38 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x38 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x38 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x3C "PCR15,Pin Control 15"
bitfld.long 0x3C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x3C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x3C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x3C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x3C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x3C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x3C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x3C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x3C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x40 "PCR16,Pin Control 16"
bitfld.long 0x40 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x40 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x40 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x40 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x40 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x40 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x40 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x40 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x40 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x44 "PCR17,Pin Control 17"
bitfld.long 0x44 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x44 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x44 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x44 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x44 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x44 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x44 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x44 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x44 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x48 "PCR18,Pin Control 18"
bitfld.long 0x48 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x48 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x48 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x48 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x48 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x48 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x48 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x48 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x48 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4C "PCR19,Pin Control 19"
bitfld.long 0x4C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x4C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x50 "PCR20,Pin Control 20"
bitfld.long 0x50 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x50 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x50 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x50 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x50 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x50 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x50 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x54 "PCR21,Pin Control 21"
bitfld.long 0x54 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x54 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x54 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x54 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x54 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x54 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x54 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x58 "PCR22,Pin Control 22"
bitfld.long 0x58 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x58 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x58 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x58 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x58 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x58 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x58 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x58 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x58 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x5C "PCR23,Pin Control 23"
bitfld.long 0x5C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x5C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x5C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x5C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x5C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x5C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x60 "PCR24,Pin Control 24"
bitfld.long 0x60 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x60 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x60 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x60 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x60 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x60 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x60 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x60 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x64 "PCR25,Pin Control 25"
bitfld.long 0x64 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x64 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x64 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x64 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x64 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x64 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x64 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x64 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x68 "PCR26,Pin Control 26"
bitfld.long 0x68 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x68 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x68 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x68 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x68 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x68 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x68 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x68 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x6C "PCR27,Pin Control 27"
bitfld.long 0x6C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x6C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x6C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x6C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x6C 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x6C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x6C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x6C 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x6C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x70 "PCR28,Pin Control 28"
bitfld.long 0x70 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x70 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x70 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x70 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x70 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x70 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x70 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x70 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x70 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x70 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x74 "PCR29,Pin Control 29"
bitfld.long 0x74 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x74 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x74 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x74 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x74 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x74 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x74 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x74 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x74 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x78 "PCR30,Pin Control 30"
bitfld.long 0x78 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x78 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x78 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x78 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x78 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x78 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x78 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x78 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x78 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x7C "PCR31,Pin Control 31"
bitfld.long 0x7C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x7C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x7C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x7C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x7C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x7C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x7C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x7C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
tree.end
endif
sif (cpuis("MC?A146*"))
tree "PORT0"
base ad:0x400BC000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x7
line.long 0x0 "GPCLR,Global Pin Control Low"
bitfld.long 0x0 31. "GPWE15,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 30. "GPWE14,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 29. "GPWE13,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 28. "GPWE12,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 27. "GPWE11,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 26. "GPWE10,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 25. "GPWE9,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 24. "GPWE8,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 23. "GPWE7,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 22. "GPWE6,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 21. "GPWE5,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 20. "GPWE4,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 19. "GPWE3,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 18. "GPWE2,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 17. "GPWE1,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 16. "GPWE0,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data"
line.long 0x4 "GPCHR,Global Pin Control High"
bitfld.long 0x4 31. "GPWE31,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 30. "GPWE30,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 29. "GPWE29,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 28. "GPWE28,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 27. "GPWE27,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 26. "GPWE26,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 25. "GPWE25,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 24. "GPWE24,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 23. "GPWE23,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 22. "GPWE22,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 21. "GPWE21,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 20. "GPWE20,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 19. "GPWE19,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 18. "GPWE18,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 17. "GPWE17,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 16. "GPWE16,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data"
group.long 0x20++0x3
line.long 0x0 "CONFIG,Configuration"
bitfld.long 0x0 0. "RANGE,Port Voltage Range" "0: 1.71 V-3.6 V,1: 2.70 V-3.6 V"
group.long 0x60++0x7
line.long 0x0 "CALIB0,Calibration 0"
hexmask.long.byte 0x0 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x0 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
line.long 0x4 "CALIB1,Calibration 1"
hexmask.long.byte 0x4 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x4 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
group.long 0x80++0x7F
line.long 0x0 "PCR0,Pin Control 0"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR1,Pin Control 1"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR2,Pin Control 2"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x8 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR3,Pin Control 3"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0xC 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR4,Pin Control 4"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR5,Pin Control 5"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR6,Pin Control 6"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x18 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR7,Pin Control 7"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x20 "PCR8,Pin Control 8"
bitfld.long 0x20 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x20 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x20 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x20 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x20 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x20 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x24 "PCR9,Pin Control 9"
bitfld.long 0x24 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x24 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x24 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x24 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x24 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x24 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x28 "PCR10,Pin Control 10"
bitfld.long 0x28 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x28 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x28 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x28 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x28 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x28 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x28 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x28 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x2C "PCR11,Pin Control 11"
bitfld.long 0x2C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x2C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x2C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x2C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x2C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x2C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x30 "PCR12,Pin Control 12"
bitfld.long 0x30 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x30 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x30 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x30 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x30 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x30 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x30 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x30 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x34 "PCR13,Pin Control 13"
bitfld.long 0x34 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x34 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x34 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x34 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x34 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x34 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x34 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x34 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x38 "PCR14,Pin Control 14"
bitfld.long 0x38 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x38 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x38 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x38 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x38 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x38 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x38 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x38 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x3C "PCR15,Pin Control 15"
bitfld.long 0x3C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x3C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x3C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x3C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x3C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x3C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x3C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x3C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x40 "PCR16,Pin Control 16"
bitfld.long 0x40 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x40 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x40 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x40 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x40 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x40 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x40 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x40 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x40 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x40 2. "PV,Pull Value" "0: Low,1: High"
bitfld.long 0x40 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x40 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x44 "PCR17,Pin Control 17"
bitfld.long 0x44 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x44 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x44 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x44 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x44 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x44 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x44 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x44 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x44 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x44 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x44 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x48 "PCR18,Pin Control 18"
bitfld.long 0x48 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x48 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x48 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x48 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x48 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x48 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x48 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x48 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x48 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4C "PCR19,Pin Control 19"
bitfld.long 0x4C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x4C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x4C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x50 "PCR20,Pin Control 20"
bitfld.long 0x50 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x50 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x50 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x50 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x50 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x50 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x50 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x54 "PCR21,Pin Control 21"
bitfld.long 0x54 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x54 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x54 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x54 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x54 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x54 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x54 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x58 "PCR22,Pin Control 22"
bitfld.long 0x58 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x58 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x58 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x58 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x58 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x58 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x58 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x58 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x58 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x5C "PCR23,Pin Control 23"
bitfld.long 0x5C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x5C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x5C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x5C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x5C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x5C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x5C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x5C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x60 "PCR24,Pin Control 24"
bitfld.long 0x60 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x60 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x60 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x60 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x60 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x60 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x60 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x60 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x64 "PCR25,Pin Control 25"
bitfld.long 0x64 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x64 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x64 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x64 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x64 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x64 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x64 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x64 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x68 "PCR26,Pin Control 26"
bitfld.long 0x68 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x68 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x68 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x68 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x68 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x68 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x68 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x68 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x6C "PCR27,Pin Control 27"
bitfld.long 0x6C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x6C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x6C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x6C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x6C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x6C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x70 "PCR28,Pin Control 28"
bitfld.long 0x70 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x70 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x70 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x70 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x70 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x70 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x70 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x70 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x74 "PCR29,Pin Control 29"
bitfld.long 0x74 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x74 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x74 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x74 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x74 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x74 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x74 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x74 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x78 "PCR30,Pin Control 30"
bitfld.long 0x78 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x78 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x78 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x78 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x78 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x78 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x78 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x78 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x7C "PCR31,Pin Control 31"
bitfld.long 0x7C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x7C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x7C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x7C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x7C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x7C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
tree.end
tree "PORT1"
base ad:0x400BD000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x7
line.long 0x0 "GPCLR,Global Pin Control Low"
bitfld.long 0x0 31. "GPWE15,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 30. "GPWE14,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 29. "GPWE13,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 28. "GPWE12,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 27. "GPWE11,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 26. "GPWE10,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 25. "GPWE9,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 24. "GPWE8,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 23. "GPWE7,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 22. "GPWE6,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 21. "GPWE5,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 20. "GPWE4,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 19. "GPWE3,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 18. "GPWE2,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 17. "GPWE1,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 16. "GPWE0,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data"
line.long 0x4 "GPCHR,Global Pin Control High"
bitfld.long 0x4 31. "GPWE31,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 30. "GPWE30,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 29. "GPWE29,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 28. "GPWE28,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 27. "GPWE27,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 26. "GPWE26,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 25. "GPWE25,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 24. "GPWE24,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 23. "GPWE23,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 22. "GPWE22,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 21. "GPWE21,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 20. "GPWE20,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 19. "GPWE19,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 18. "GPWE18,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 17. "GPWE17,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 16. "GPWE16,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data"
group.long 0x20++0x3
line.long 0x0 "CONFIG,Configuration"
bitfld.long 0x0 0. "RANGE,Port Voltage Range" "0: 1.71 V-3.6 V,1: 2.70 V-3.6 V"
group.long 0x60++0x7
line.long 0x0 "CALIB0,Calibration 0"
hexmask.long.byte 0x0 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x0 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
line.long 0x4 "CALIB1,Calibration 1"
hexmask.long.byte 0x4 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x4 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
group.long 0x80++0x7F
line.long 0x0 "PCR0,Pin Control 0"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x0 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR1,Pin Control 1"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x4 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR2,Pin Control 2"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x8 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR3,Pin Control 3"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0xC 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR4,Pin Control 4"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x10 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR5,Pin Control 5"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x14 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR6,Pin Control 6"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x18 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR7,Pin Control 7"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x1C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x20 "PCR8,Pin Control 8"
bitfld.long 0x20 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x20 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x20 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x20 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x20 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x20 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x20 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x20 2. "PV,Pull Value" "0: Low,1: High"
bitfld.long 0x20 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x20 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x24 "PCR9,Pin Control 9"
bitfld.long 0x24 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x24 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x24 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x24 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x24 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x24 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x24 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x24 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x24 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x28 "PCR10,Pin Control 10"
bitfld.long 0x28 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x28 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x28 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x28 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x28 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x28 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x28 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x28 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x28 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x2C "PCR11,Pin Control 11"
bitfld.long 0x2C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x2C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x2C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x2C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x2C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x2C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x2C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x2C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x30 "PCR12,Pin Control 12"
bitfld.long 0x30 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x30 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x30 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x30 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x30 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x30 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x30 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x30 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x30 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x34 "PCR13,Pin Control 13"
bitfld.long 0x34 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x34 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x34 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x34 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x34 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x34 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x34 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x34 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x34 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x38 "PCR14,Pin Control 14"
bitfld.long 0x38 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x38 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x38 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x38 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x38 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x38 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x38 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x38 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x38 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x3C "PCR15,Pin Control 15"
bitfld.long 0x3C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x3C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x3C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x3C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x3C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x3C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x3C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x3C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x3C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x40 "PCR16,Pin Control 16"
bitfld.long 0x40 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x40 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x40 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x40 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x40 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x40 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x40 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x40 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x44 "PCR17,Pin Control 17"
bitfld.long 0x44 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x44 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x44 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x44 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x44 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x44 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x44 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x44 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x48 "PCR18,Pin Control 18"
bitfld.long 0x48 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x48 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x48 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x48 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x48 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x48 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x48 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x48 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4C "PCR19,Pin Control 19"
bitfld.long 0x4C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x4C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x50 "PCR20,Pin Control 20"
bitfld.long 0x50 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x50 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x50 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x50 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x50 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x50 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x50 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x54 "PCR21,Pin Control 21"
bitfld.long 0x54 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x54 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x54 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x54 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x54 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x54 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x54 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x58 "PCR22,Pin Control 22"
bitfld.long 0x58 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x58 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x58 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x58 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x58 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x58 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x58 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x58 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x5C "PCR23,Pin Control 23"
bitfld.long 0x5C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x5C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x5C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x5C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x5C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x5C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x60 "PCR24,Pin Control 24"
bitfld.long 0x60 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x60 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x60 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x60 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x60 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x60 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x60 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x60 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x64 "PCR25,Pin Control 25"
bitfld.long 0x64 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x64 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x64 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x64 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x64 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x64 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x64 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x64 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x68 "PCR26,Pin Control 26"
bitfld.long 0x68 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x68 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x68 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x68 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x68 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x68 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x68 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x68 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x6C "PCR27,Pin Control 27"
bitfld.long 0x6C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x6C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x6C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x6C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x6C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x6C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x70 "PCR28,Pin Control 28"
bitfld.long 0x70 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x70 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x70 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x70 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x70 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x70 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x70 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x70 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x74 "PCR29,Pin Control 29"
bitfld.long 0x74 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x74 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x74 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x74 8.--9. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific)"
bitfld.long 0x74 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x74 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x74 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x74 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x74 2. "PV,Pull Value" "0: Low,1: High"
newline
bitfld.long 0x74 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x74 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x78 "PCR30,Pin Control 30"
bitfld.long 0x78 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x78 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x78 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x78 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x78 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x78 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x78 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x78 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x78 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x78 2. "PV,Pull Value" "0: Low,1: High"
bitfld.long 0x78 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x78 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x7C "PCR31,Pin Control 31"
bitfld.long 0x7C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x7C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x7C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x7C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x7C 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x7C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x7C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x7C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
tree.end
tree "PORT2"
base ad:0x400BE000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x7
line.long 0x0 "GPCLR,Global Pin Control Low"
bitfld.long 0x0 31. "GPWE15,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 30. "GPWE14,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 29. "GPWE13,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 28. "GPWE12,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 27. "GPWE11,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 26. "GPWE10,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 25. "GPWE9,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 24. "GPWE8,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 23. "GPWE7,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 22. "GPWE6,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 21. "GPWE5,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 20. "GPWE4,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 19. "GPWE3,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 18. "GPWE2,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 17. "GPWE1,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 16. "GPWE0,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data"
line.long 0x4 "GPCHR,Global Pin Control High"
bitfld.long 0x4 31. "GPWE31,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 30. "GPWE30,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 29. "GPWE29,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 28. "GPWE28,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 27. "GPWE27,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 26. "GPWE26,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 25. "GPWE25,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 24. "GPWE24,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 23. "GPWE23,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 22. "GPWE22,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 21. "GPWE21,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 20. "GPWE20,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 19. "GPWE19,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 18. "GPWE18,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 17. "GPWE17,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 16. "GPWE16,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data"
group.long 0x20++0x3
line.long 0x0 "CONFIG,Configuration"
bitfld.long 0x0 0. "RANGE,Port Voltage Range" "0: 1.71 V-3.6 V,1: 2.70 V-3.6 V"
group.long 0x80++0x7F
line.long 0x0 "PCR0,Pin Control 0"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR1,Pin Control 1"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR2,Pin Control 2"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR3,Pin Control 3"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0xC 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR4,Pin Control 4"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR5,Pin Control 5"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR6,Pin Control 6"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR7,Pin Control 7"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x1C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x20 "PCR8,Pin Control 8"
bitfld.long 0x20 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x20 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x20 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x20 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x20 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x20 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x24 "PCR9,Pin Control 9"
bitfld.long 0x24 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x24 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x24 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x24 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x24 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x24 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x28 "PCR10,Pin Control 10"
bitfld.long 0x28 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x28 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x28 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x28 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x28 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x28 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x28 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x28 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x28 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x2C "PCR11,Pin Control 11"
bitfld.long 0x2C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x2C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x2C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x2C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x2C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x2C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x2C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x2C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x30 "PCR12,Pin Control 12"
bitfld.long 0x30 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x30 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x30 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x30 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x30 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x30 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x30 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x30 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x30 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x34 "PCR13,Pin Control 13"
bitfld.long 0x34 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x34 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x34 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x34 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x34 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x34 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x34 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x34 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x34 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x38 "PCR14,Pin Control 14"
bitfld.long 0x38 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x38 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x38 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x38 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x38 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x38 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x38 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x38 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x3C "PCR15,Pin Control 15"
bitfld.long 0x3C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x3C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x3C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x3C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x3C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x3C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x3C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x3C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x3C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x40 "PCR16,Pin Control 16"
bitfld.long 0x40 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x40 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x40 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x40 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x40 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x40 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x40 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x40 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x40 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x44 "PCR17,Pin Control 17"
bitfld.long 0x44 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x44 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x44 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x44 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x44 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x44 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x44 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x44 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x44 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x48 "PCR18,Pin Control 18"
bitfld.long 0x48 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x48 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x48 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x48 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x48 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x48 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x48 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x48 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4C "PCR19,Pin Control 19"
bitfld.long 0x4C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x4C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x50 "PCR20,Pin Control 20"
bitfld.long 0x50 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x50 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x50 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x50 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x50 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x50 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x50 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x54 "PCR21,Pin Control 21"
bitfld.long 0x54 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x54 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x54 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x54 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x54 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x54 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x54 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x58 "PCR22,Pin Control 22"
bitfld.long 0x58 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x58 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x58 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x58 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x58 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x58 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x58 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x58 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x5C "PCR23,Pin Control 23"
bitfld.long 0x5C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x5C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x5C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x5C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x5C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x5C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x5C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x5C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x60 "PCR24,Pin Control 24"
bitfld.long 0x60 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x60 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x60 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x60 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x60 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x60 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x60 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x60 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x64 "PCR25,Pin Control 25"
bitfld.long 0x64 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x64 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x64 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x64 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x64 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x64 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x64 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x64 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x68 "PCR26,Pin Control 26"
bitfld.long 0x68 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x68 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x68 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x68 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x68 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x68 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x68 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x68 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x6C "PCR27,Pin Control 27"
bitfld.long 0x6C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x6C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x6C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x6C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x6C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x6C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x70 "PCR28,Pin Control 28"
bitfld.long 0x70 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x70 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x70 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x70 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x70 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x70 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x70 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x70 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x74 "PCR29,Pin Control 29"
bitfld.long 0x74 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x74 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x74 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x74 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x74 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x74 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x74 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x74 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x78 "PCR30,Pin Control 30"
bitfld.long 0x78 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x78 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x78 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x78 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x78 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x78 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x78 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x78 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x7C "PCR31,Pin Control 31"
bitfld.long 0x7C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x7C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x7C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x7C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x7C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x7C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
tree.end
tree "PORT3"
base ad:0x400BF000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x7
line.long 0x0 "GPCLR,Global Pin Control Low"
bitfld.long 0x0 31. "GPWE15,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 30. "GPWE14,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 29. "GPWE13,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 28. "GPWE12,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 27. "GPWE11,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 26. "GPWE10,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 25. "GPWE9,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 24. "GPWE8,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 23. "GPWE7,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 22. "GPWE6,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 21. "GPWE5,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 20. "GPWE4,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 19. "GPWE3,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 18. "GPWE2,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 17. "GPWE1,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 16. "GPWE0,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data"
line.long 0x4 "GPCHR,Global Pin Control High"
bitfld.long 0x4 31. "GPWE31,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 30. "GPWE30,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 29. "GPWE29,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 28. "GPWE28,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 27. "GPWE27,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 26. "GPWE26,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 25. "GPWE25,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 24. "GPWE24,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 23. "GPWE23,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 22. "GPWE22,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 21. "GPWE21,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 20. "GPWE20,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 19. "GPWE19,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 18. "GPWE18,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 17. "GPWE17,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 16. "GPWE16,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data"
group.long 0x20++0x3
line.long 0x0 "CONFIG,Configuration"
bitfld.long 0x0 0. "RANGE,Port Voltage Range" "0: 1.71 V-3.6 V,1: 2.70 V-3.6 V"
group.long 0x60++0x7
line.long 0x0 "CALIB0,Calibration 0"
hexmask.long.byte 0x0 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x0 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
line.long 0x4 "CALIB1,Calibration 1"
hexmask.long.byte 0x4 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x4 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
group.long 0x80++0x7F
line.long 0x0 "PCR0,Pin Control 0"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x0 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x0 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x0 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR1,Pin Control 1"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x4 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x4 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR2,Pin Control 2"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR3,Pin Control 3"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR4,Pin Control 4"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR5,Pin Control 5"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR6,Pin Control 6"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x18 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR7,Pin Control 7"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x1C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x20 "PCR8,Pin Control 8"
bitfld.long 0x20 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x20 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x20 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x20 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x20 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x20 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x20 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x24 "PCR9,Pin Control 9"
bitfld.long 0x24 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x24 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x24 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x24 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x24 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x24 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x24 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x28 "PCR10,Pin Control 10"
bitfld.long 0x28 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x28 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x28 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x28 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x28 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x28 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x28 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x28 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x28 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x2C "PCR11,Pin Control 11"
bitfld.long 0x2C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x2C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x2C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x2C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x2C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x2C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x2C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x2C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x30 "PCR12,Pin Control 12"
bitfld.long 0x30 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x30 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x30 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x30 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x30 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x30 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x30 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x30 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x30 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x34 "PCR13,Pin Control 13"
bitfld.long 0x34 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x34 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x34 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x34 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x34 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x34 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x34 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x34 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x34 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x38 "PCR14,Pin Control 14"
bitfld.long 0x38 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x38 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x38 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x38 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x38 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x38 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x38 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x38 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x38 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x3C "PCR15,Pin Control 15"
bitfld.long 0x3C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x3C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x3C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x3C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x3C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x3C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x3C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x3C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x3C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x40 "PCR16,Pin Control 16"
bitfld.long 0x40 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x40 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x40 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x40 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x40 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x40 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x40 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x40 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x40 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x44 "PCR17,Pin Control 17"
bitfld.long 0x44 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x44 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x44 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x44 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x44 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x44 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x44 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x44 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x44 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x48 "PCR18,Pin Control 18"
bitfld.long 0x48 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x48 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x48 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x48 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x48 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x48 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x48 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x48 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x48 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4C "PCR19,Pin Control 19"
bitfld.long 0x4C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x4C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x50 "PCR20,Pin Control 20"
bitfld.long 0x50 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x50 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x50 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x50 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x50 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x50 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x50 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x54 "PCR21,Pin Control 21"
bitfld.long 0x54 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x54 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x54 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x54 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x54 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x54 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x54 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x58 "PCR22,Pin Control 22"
bitfld.long 0x58 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x58 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x58 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x58 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x58 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x58 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x58 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x58 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x58 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x5C "PCR23,Pin Control 23"
bitfld.long 0x5C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x5C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x5C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x5C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x5C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x5C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x60 "PCR24,Pin Control 24"
bitfld.long 0x60 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x60 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x60 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x60 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x60 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x60 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x60 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x60 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x64 "PCR25,Pin Control 25"
bitfld.long 0x64 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x64 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x64 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x64 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x64 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x64 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x64 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x64 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x68 "PCR26,Pin Control 26"
bitfld.long 0x68 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x68 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x68 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x68 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x68 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x68 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x68 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x68 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x6C "PCR27,Pin Control 27"
bitfld.long 0x6C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x6C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x6C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x6C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x6C 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x6C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x6C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x6C 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x6C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x70 "PCR28,Pin Control 28"
bitfld.long 0x70 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x70 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x70 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x70 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x70 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x70 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x70 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x70 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x70 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x70 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x74 "PCR29,Pin Control 29"
bitfld.long 0x74 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x74 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x74 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x74 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x74 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x74 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x74 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x74 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x74 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x78 "PCR30,Pin Control 30"
bitfld.long 0x78 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x78 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x78 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x78 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x78 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x78 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x78 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x78 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x78 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x7C "PCR31,Pin Control 31"
bitfld.long 0x7C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x7C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x7C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x7C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x7C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x7C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x7C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x7C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
tree.end
endif
sif (cpuis("MC?A152*"))
tree "PORT0"
base ad:0x400BC000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x7
line.long 0x0 "GPCLR,Global Pin Control Low"
bitfld.long 0x0 31. "GPWE15,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 30. "GPWE14,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 29. "GPWE13,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 28. "GPWE12,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 27. "GPWE11,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 26. "GPWE10,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 25. "GPWE9,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 24. "GPWE8,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 23. "GPWE7,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 22. "GPWE6,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 21. "GPWE5,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 20. "GPWE4,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 19. "GPWE3,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 18. "GPWE2,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 17. "GPWE1,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 16. "GPWE0,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data"
line.long 0x4 "GPCHR,Global Pin Control High"
bitfld.long 0x4 31. "GPWE31,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 30. "GPWE30,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 29. "GPWE29,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 28. "GPWE28,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 27. "GPWE27,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 26. "GPWE26,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 25. "GPWE25,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 24. "GPWE24,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 23. "GPWE23,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 22. "GPWE22,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 21. "GPWE21,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 20. "GPWE20,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 19. "GPWE19,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 18. "GPWE18,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 17. "GPWE17,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 16. "GPWE16,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data"
group.long 0x20++0x3
line.long 0x0 "CONFIG,Configuration"
bitfld.long 0x0 0. "RANGE,Port Voltage Range" "0: 1.71 V-3.6 V,1: 2.70 V-3.6 V"
group.long 0x80++0xF
line.long 0x0 "PCR0,Pin Control 0"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR1,Pin Control 1"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR2,Pin Control 2"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x8 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR3,Pin Control 3"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0xC 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
group.long 0x98++0x3
line.long 0x0 "PCR6,Pin Control 6"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x0 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
group.long 0xC0++0x7
line.long 0x0 "PCR16,Pin Control 16"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x0 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x0 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x0 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x0 2. "PV,Pull Value" "0: Low,1: High"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR17,Pin Control 17"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x4 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x4 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
tree.end
tree "PORT1"
base ad:0x400BD000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x7
line.long 0x0 "GPCLR,Global Pin Control Low"
bitfld.long 0x0 31. "GPWE15,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 30. "GPWE14,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 29. "GPWE13,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 28. "GPWE12,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 27. "GPWE11,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 26. "GPWE10,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 25. "GPWE9,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 24. "GPWE8,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 23. "GPWE7,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 22. "GPWE6,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 21. "GPWE5,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 20. "GPWE4,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 19. "GPWE3,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 18. "GPWE2,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 17. "GPWE1,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 16. "GPWE0,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data"
line.long 0x4 "GPCHR,Global Pin Control High"
bitfld.long 0x4 31. "GPWE31,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 30. "GPWE30,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 29. "GPWE29,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 28. "GPWE28,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 27. "GPWE27,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 26. "GPWE26,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 25. "GPWE25,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 24. "GPWE24,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 23. "GPWE23,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 22. "GPWE22,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 21. "GPWE21,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 20. "GPWE20,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 19. "GPWE19,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 18. "GPWE18,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 17. "GPWE17,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 16. "GPWE16,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data"
group.long 0x20++0x3
line.long 0x0 "CONFIG,Configuration"
bitfld.long 0x0 0. "RANGE,Port Voltage Range" "0: 1.71 V-3.6 V,1: 2.70 V-3.6 V"
group.long 0x60++0x7
line.long 0x0 "CALIB0,Calibration 0"
hexmask.long.byte 0x0 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x0 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
line.long 0x4 "CALIB1,Calibration 1"
hexmask.long.byte 0x4 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x4 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
group.long 0x80++0x37
line.long 0x0 "PCR0,Pin Control 0"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR1,Pin Control 1"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR2,Pin Control 2"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x8 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR3,Pin Control 3"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR4,Pin Control 4"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x10 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR5,Pin Control 5"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x14 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR6,Pin Control 6"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x18 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR7,Pin Control 7"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x1C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x20 "PCR8,Pin Control 8"
bitfld.long 0x20 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x20 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x20 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x20 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x20 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x20 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x20 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x20 2. "PV,Pull Value" "0: Low,1: High"
bitfld.long 0x20 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x20 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x24 "PCR9,Pin Control 9"
bitfld.long 0x24 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x24 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x24 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x24 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x24 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x24 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x24 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x24 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x24 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x28 "PCR10,Pin Control 10"
bitfld.long 0x28 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x28 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x28 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x28 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x28 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x28 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x28 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x28 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x28 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x2C "PCR11,Pin Control 11"
bitfld.long 0x2C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x2C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x2C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x2C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x2C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x2C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x2C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x2C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x30 "PCR12,Pin Control 12"
bitfld.long 0x30 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x30 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x30 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x30 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x30 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x30 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x30 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x30 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x30 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x34 "PCR13,Pin Control 13"
bitfld.long 0x34 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x34 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x34 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x34 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x34 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x34 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x34 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x34 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x34 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
group.long 0xF4++0xB
line.long 0x0 "PCR29,Pin Control 29"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 8.--9. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific)"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 2. "PV,Pull Value" "0: Low,1: High"
newline
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR30,Pin Control 30"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x4 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x4 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x4 2. "PV,Pull Value" "0: Low,1: High"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR31,Pin Control 31"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x8 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x8 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x8 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
tree.end
tree "PORT2"
base ad:0x400BE000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x7
line.long 0x0 "GPCLR,Global Pin Control Low"
bitfld.long 0x0 31. "GPWE15,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 30. "GPWE14,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 29. "GPWE13,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 28. "GPWE12,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 27. "GPWE11,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 26. "GPWE10,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 25. "GPWE9,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 24. "GPWE8,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 23. "GPWE7,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 22. "GPWE6,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 21. "GPWE5,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 20. "GPWE4,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 19. "GPWE3,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 18. "GPWE2,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 17. "GPWE1,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 16. "GPWE0,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data"
line.long 0x4 "GPCHR,Global Pin Control High"
bitfld.long 0x4 31. "GPWE31,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 30. "GPWE30,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 29. "GPWE29,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 28. "GPWE28,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 27. "GPWE27,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 26. "GPWE26,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 25. "GPWE25,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 24. "GPWE24,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 23. "GPWE23,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 22. "GPWE22,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 21. "GPWE21,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 20. "GPWE20,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 19. "GPWE19,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 18. "GPWE18,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 17. "GPWE17,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 16. "GPWE16,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data"
group.long 0x20++0x3
line.long 0x0 "CONFIG,Configuration"
bitfld.long 0x0 0. "RANGE,Port Voltage Range" "0: 1.71 V-3.6 V,1: 2.70 V-3.6 V"
group.long 0x80++0x1F
line.long 0x0 "PCR0,Pin Control 0"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x0 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR1,Pin Control 1"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR2,Pin Control 2"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x8 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR3,Pin Control 3"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
hexmask.long.byte 0xC 8.--11. 1. "MUX,Pin Multiplex Control"
newline
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR4,Pin Control 4"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x10 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR5,Pin Control 5"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x14 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR6,Pin Control 6"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x18 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR7,Pin Control 7"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
group.long 0xB0++0x7
line.long 0x0 "PCR12,Pin Control 12"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x0 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR13,Pin Control 13"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
group.long 0xC0++0x7
line.long 0x0 "PCR16,Pin Control 16"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x0 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR17,Pin Control 17"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
group.long 0xD0++0x7
line.long 0x0 "PCR20,Pin Control 20"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x0 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR21,Pin Control 21"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
tree.end
tree "PORT3"
base ad:0x400BF000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x7
line.long 0x0 "GPCLR,Global Pin Control Low"
bitfld.long 0x0 31. "GPWE15,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 30. "GPWE14,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 29. "GPWE13,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 28. "GPWE12,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 27. "GPWE11,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 26. "GPWE10,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 25. "GPWE9,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 24. "GPWE8,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 23. "GPWE7,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 22. "GPWE6,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 21. "GPWE5,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 20. "GPWE4,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 19. "GPWE3,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 18. "GPWE2,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 17. "GPWE1,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 16. "GPWE0,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data"
line.long 0x4 "GPCHR,Global Pin Control High"
bitfld.long 0x4 31. "GPWE31,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 30. "GPWE30,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 29. "GPWE29,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 28. "GPWE28,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 27. "GPWE27,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 26. "GPWE26,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 25. "GPWE25,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 24. "GPWE24,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 23. "GPWE23,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 22. "GPWE22,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 21. "GPWE21,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 20. "GPWE20,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 19. "GPWE19,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 18. "GPWE18,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 17. "GPWE17,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 16. "GPWE16,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data"
group.long 0x20++0x3
line.long 0x0 "CONFIG,Configuration"
bitfld.long 0x0 0. "RANGE,Port Voltage Range" "0: 1.71 V-3.6 V,1: 2.70 V-3.6 V"
group.long 0x60++0x7
line.long 0x0 "CALIB0,Calibration 0"
hexmask.long.byte 0x0 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x0 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
line.long 0x4 "CALIB1,Calibration 1"
hexmask.long.byte 0x4 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x4 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
group.long 0x80++0xB
line.long 0x0 "PCR0,Pin Control 0"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x0 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x0 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x0 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR1,Pin Control 1"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x4 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x4 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR2,Pin Control 2"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 8.--9. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific)"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
group.long 0x98++0x27
line.long 0x0 "PCR6,Pin Control 6"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x0 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR7,Pin Control 7"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR8,Pin Control 8"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x8 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR9,Pin Control 9"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0xC 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR10,Pin Control 10"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x10 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR11,Pin Control 11"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x14 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR12,Pin Control 12"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x18 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR13,Pin Control 13"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x1C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x20 "PCR14,Pin Control 14"
bitfld.long 0x20 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x20 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x20 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x20 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x20 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x20 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x20 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x24 "PCR15,Pin Control 15"
bitfld.long 0x24 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x24 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x24 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x24 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x24 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x24 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x24 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
group.long 0xEC++0x13
line.long 0x0 "PCR27,Pin Control 27"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x0 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR28,Pin Control 28"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x4 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR29,Pin Control 29"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR30,Pin Control 30"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR31,Pin Control 31"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
tree.end
endif
sif (cpuis("MC?A153*"))
tree "PORT0"
base ad:0x400BC000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x7
line.long 0x0 "GPCLR,Global Pin Control Low"
bitfld.long 0x0 31. "GPWE15,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 30. "GPWE14,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 29. "GPWE13,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 28. "GPWE12,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 27. "GPWE11,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 26. "GPWE10,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 25. "GPWE9,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 24. "GPWE8,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 23. "GPWE7,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 22. "GPWE6,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 21. "GPWE5,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 20. "GPWE4,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 19. "GPWE3,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 18. "GPWE2,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 17. "GPWE1,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 16. "GPWE0,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data"
line.long 0x4 "GPCHR,Global Pin Control High"
bitfld.long 0x4 31. "GPWE31,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 30. "GPWE30,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 29. "GPWE29,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 28. "GPWE28,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 27. "GPWE27,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 26. "GPWE26,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 25. "GPWE25,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 24. "GPWE24,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 23. "GPWE23,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 22. "GPWE22,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 21. "GPWE21,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 20. "GPWE20,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 19. "GPWE19,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 18. "GPWE18,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 17. "GPWE17,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 16. "GPWE16,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data"
group.long 0x20++0x3
line.long 0x0 "CONFIG,Configuration"
bitfld.long 0x0 0. "RANGE,Port Voltage Range" "0: 1.71 V-3.6 V,1: 2.70 V-3.6 V"
group.long 0x80++0xF
line.long 0x0 "PCR0,Pin Control 0"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR1,Pin Control 1"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR2,Pin Control 2"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x8 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR3,Pin Control 3"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0xC 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
group.long 0x98++0x3
line.long 0x0 "PCR6,Pin Control 6"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x0 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
group.long 0xC0++0x7
line.long 0x0 "PCR16,Pin Control 16"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x0 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x0 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x0 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x0 2. "PV,Pull Value" "0: Low,1: High"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR17,Pin Control 17"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x4 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x4 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
tree.end
tree "PORT1"
base ad:0x400BD000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x7
line.long 0x0 "GPCLR,Global Pin Control Low"
bitfld.long 0x0 31. "GPWE15,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 30. "GPWE14,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 29. "GPWE13,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 28. "GPWE12,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 27. "GPWE11,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 26. "GPWE10,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 25. "GPWE9,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 24. "GPWE8,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 23. "GPWE7,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 22. "GPWE6,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 21. "GPWE5,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 20. "GPWE4,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 19. "GPWE3,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 18. "GPWE2,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 17. "GPWE1,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 16. "GPWE0,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data"
line.long 0x4 "GPCHR,Global Pin Control High"
bitfld.long 0x4 31. "GPWE31,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 30. "GPWE30,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 29. "GPWE29,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 28. "GPWE28,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 27. "GPWE27,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 26. "GPWE26,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 25. "GPWE25,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 24. "GPWE24,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 23. "GPWE23,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 22. "GPWE22,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 21. "GPWE21,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 20. "GPWE20,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 19. "GPWE19,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 18. "GPWE18,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 17. "GPWE17,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 16. "GPWE16,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data"
group.long 0x20++0x3
line.long 0x0 "CONFIG,Configuration"
bitfld.long 0x0 0. "RANGE,Port Voltage Range" "0: 1.71 V-3.6 V,1: 2.70 V-3.6 V"
group.long 0x60++0x7
line.long 0x0 "CALIB0,Calibration 0"
hexmask.long.byte 0x0 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x0 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
line.long 0x4 "CALIB1,Calibration 1"
hexmask.long.byte 0x4 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x4 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
group.long 0x80++0x37
line.long 0x0 "PCR0,Pin Control 0"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR1,Pin Control 1"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR2,Pin Control 2"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x8 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR3,Pin Control 3"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR4,Pin Control 4"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x10 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR5,Pin Control 5"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x14 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR6,Pin Control 6"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x18 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR7,Pin Control 7"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x1C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x20 "PCR8,Pin Control 8"
bitfld.long 0x20 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x20 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x20 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x20 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x20 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x20 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x20 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x20 2. "PV,Pull Value" "0: Low,1: High"
bitfld.long 0x20 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x20 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x24 "PCR9,Pin Control 9"
bitfld.long 0x24 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x24 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x24 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x24 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x24 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x24 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x24 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x24 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x24 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x28 "PCR10,Pin Control 10"
bitfld.long 0x28 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x28 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x28 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x28 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x28 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x28 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x28 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x28 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x28 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x2C "PCR11,Pin Control 11"
bitfld.long 0x2C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x2C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x2C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x2C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x2C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x2C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x2C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x2C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x30 "PCR12,Pin Control 12"
bitfld.long 0x30 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x30 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x30 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x30 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x30 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x30 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x30 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x30 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x30 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x34 "PCR13,Pin Control 13"
bitfld.long 0x34 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x34 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x34 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x34 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x34 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x34 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x34 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x34 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x34 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
group.long 0xF4++0xB
line.long 0x0 "PCR29,Pin Control 29"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 8.--9. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific)"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 2. "PV,Pull Value" "0: Low,1: High"
newline
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR30,Pin Control 30"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x4 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x4 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x4 2. "PV,Pull Value" "0: Low,1: High"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR31,Pin Control 31"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x8 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x8 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x8 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
tree.end
tree "PORT2"
base ad:0x400BE000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x7
line.long 0x0 "GPCLR,Global Pin Control Low"
bitfld.long 0x0 31. "GPWE15,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 30. "GPWE14,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 29. "GPWE13,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 28. "GPWE12,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 27. "GPWE11,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 26. "GPWE10,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 25. "GPWE9,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 24. "GPWE8,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 23. "GPWE7,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 22. "GPWE6,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 21. "GPWE5,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 20. "GPWE4,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 19. "GPWE3,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 18. "GPWE2,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 17. "GPWE1,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 16. "GPWE0,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data"
line.long 0x4 "GPCHR,Global Pin Control High"
bitfld.long 0x4 31. "GPWE31,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 30. "GPWE30,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 29. "GPWE29,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 28. "GPWE28,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 27. "GPWE27,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 26. "GPWE26,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 25. "GPWE25,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 24. "GPWE24,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 23. "GPWE23,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 22. "GPWE22,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 21. "GPWE21,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 20. "GPWE20,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 19. "GPWE19,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 18. "GPWE18,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 17. "GPWE17,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 16. "GPWE16,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data"
group.long 0x20++0x3
line.long 0x0 "CONFIG,Configuration"
bitfld.long 0x0 0. "RANGE,Port Voltage Range" "0: 1.71 V-3.6 V,1: 2.70 V-3.6 V"
group.long 0x80++0x1F
line.long 0x0 "PCR0,Pin Control 0"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x0 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR1,Pin Control 1"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR2,Pin Control 2"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x8 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR3,Pin Control 3"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
hexmask.long.byte 0xC 8.--11. 1. "MUX,Pin Multiplex Control"
newline
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR4,Pin Control 4"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x10 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR5,Pin Control 5"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x14 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR6,Pin Control 6"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x18 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR7,Pin Control 7"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
group.long 0xB0++0x7
line.long 0x0 "PCR12,Pin Control 12"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x0 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR13,Pin Control 13"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
group.long 0xC0++0x7
line.long 0x0 "PCR16,Pin Control 16"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x0 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR17,Pin Control 17"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
group.long 0xD0++0x7
line.long 0x0 "PCR20,Pin Control 20"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x0 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR21,Pin Control 21"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
tree.end
tree "PORT3"
base ad:0x400BF000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x7
line.long 0x0 "GPCLR,Global Pin Control Low"
bitfld.long 0x0 31. "GPWE15,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 30. "GPWE14,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 29. "GPWE13,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 28. "GPWE12,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 27. "GPWE11,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 26. "GPWE10,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 25. "GPWE9,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 24. "GPWE8,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 23. "GPWE7,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 22. "GPWE6,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 21. "GPWE5,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 20. "GPWE4,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 19. "GPWE3,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 18. "GPWE2,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 17. "GPWE1,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 16. "GPWE0,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data"
line.long 0x4 "GPCHR,Global Pin Control High"
bitfld.long 0x4 31. "GPWE31,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 30. "GPWE30,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 29. "GPWE29,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 28. "GPWE28,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 27. "GPWE27,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 26. "GPWE26,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 25. "GPWE25,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 24. "GPWE24,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 23. "GPWE23,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 22. "GPWE22,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 21. "GPWE21,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 20. "GPWE20,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 19. "GPWE19,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 18. "GPWE18,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 17. "GPWE17,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 16. "GPWE16,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data"
group.long 0x20++0x3
line.long 0x0 "CONFIG,Configuration"
bitfld.long 0x0 0. "RANGE,Port Voltage Range" "0: 1.71 V-3.6 V,1: 2.70 V-3.6 V"
group.long 0x60++0x7
line.long 0x0 "CALIB0,Calibration 0"
hexmask.long.byte 0x0 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x0 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
line.long 0x4 "CALIB1,Calibration 1"
hexmask.long.byte 0x4 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x4 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
group.long 0x80++0xB
line.long 0x0 "PCR0,Pin Control 0"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x0 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x0 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x0 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR1,Pin Control 1"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x4 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x4 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR2,Pin Control 2"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 8.--9. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific)"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
group.long 0x98++0x27
line.long 0x0 "PCR6,Pin Control 6"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x0 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR7,Pin Control 7"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR8,Pin Control 8"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x8 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR9,Pin Control 9"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0xC 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR10,Pin Control 10"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x10 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR11,Pin Control 11"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x14 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR12,Pin Control 12"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x18 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR13,Pin Control 13"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x1C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x20 "PCR14,Pin Control 14"
bitfld.long 0x20 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x20 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x20 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x20 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x20 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x20 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x20 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x24 "PCR15,Pin Control 15"
bitfld.long 0x24 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x24 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x24 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x24 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x24 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x24 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x24 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
group.long 0xEC++0x13
line.long 0x0 "PCR27,Pin Control 27"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x0 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR28,Pin Control 28"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x4 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR29,Pin Control 29"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR30,Pin Control 30"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR31,Pin Control 31"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
tree.end
endif
sif (cpuis("MC?A154*"))
tree "PORT0"
base ad:0x400BC000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x7
line.long 0x0 "GPCLR,Global Pin Control Low"
bitfld.long 0x0 31. "GPWE15,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 30. "GPWE14,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 29. "GPWE13,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 28. "GPWE12,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 27. "GPWE11,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 26. "GPWE10,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 25. "GPWE9,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 24. "GPWE8,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 23. "GPWE7,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 22. "GPWE6,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 21. "GPWE5,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 20. "GPWE4,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 19. "GPWE3,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 18. "GPWE2,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 17. "GPWE1,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 16. "GPWE0,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data"
line.long 0x4 "GPCHR,Global Pin Control High"
bitfld.long 0x4 31. "GPWE31,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 30. "GPWE30,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 29. "GPWE29,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 28. "GPWE28,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 27. "GPWE27,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 26. "GPWE26,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 25. "GPWE25,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 24. "GPWE24,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 23. "GPWE23,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 22. "GPWE22,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 21. "GPWE21,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 20. "GPWE20,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 19. "GPWE19,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 18. "GPWE18,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 17. "GPWE17,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 16. "GPWE16,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data"
group.long 0x20++0x3
line.long 0x0 "CONFIG,Configuration"
bitfld.long 0x0 0. "RANGE,Port Voltage Range" "0: 1.71 V-3.6 V,1: 2.70 V-3.6 V"
group.long 0x60++0x7
line.long 0x0 "CALIB0,Calibration 0"
hexmask.long.byte 0x0 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x0 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
line.long 0x4 "CALIB1,Calibration 1"
hexmask.long.byte 0x4 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x4 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
group.long 0x80++0x7F
line.long 0x0 "PCR0,Pin Control 0"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR1,Pin Control 1"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR2,Pin Control 2"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x8 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR3,Pin Control 3"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0xC 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR4,Pin Control 4"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR5,Pin Control 5"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR6,Pin Control 6"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x18 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR7,Pin Control 7"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x20 "PCR8,Pin Control 8"
bitfld.long 0x20 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x20 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x20 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x20 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x20 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x20 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x24 "PCR9,Pin Control 9"
bitfld.long 0x24 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x24 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x24 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x24 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x24 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x24 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x28 "PCR10,Pin Control 10"
bitfld.long 0x28 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x28 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x28 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x28 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x28 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x28 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x28 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x28 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x2C "PCR11,Pin Control 11"
bitfld.long 0x2C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x2C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x2C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x2C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x2C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x2C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x30 "PCR12,Pin Control 12"
bitfld.long 0x30 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x30 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x30 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x30 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x30 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x30 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x30 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x30 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x34 "PCR13,Pin Control 13"
bitfld.long 0x34 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x34 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x34 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x34 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x34 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x34 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x34 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x34 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x38 "PCR14,Pin Control 14"
bitfld.long 0x38 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x38 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x38 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x38 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x38 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x38 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x38 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x38 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x3C "PCR15,Pin Control 15"
bitfld.long 0x3C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x3C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x3C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x3C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x3C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x3C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x3C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x3C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x40 "PCR16,Pin Control 16"
bitfld.long 0x40 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x40 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x40 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x40 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x40 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x40 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x40 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x40 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x40 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x40 2. "PV,Pull Value" "0: Low,1: High"
bitfld.long 0x40 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x40 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x44 "PCR17,Pin Control 17"
bitfld.long 0x44 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x44 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x44 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x44 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x44 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x44 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x44 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x44 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x44 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x44 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x44 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x48 "PCR18,Pin Control 18"
bitfld.long 0x48 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x48 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x48 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x48 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x48 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x48 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x48 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x48 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x48 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4C "PCR19,Pin Control 19"
bitfld.long 0x4C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x4C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x4C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x50 "PCR20,Pin Control 20"
bitfld.long 0x50 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x50 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x50 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x50 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x50 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x50 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x50 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x54 "PCR21,Pin Control 21"
bitfld.long 0x54 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x54 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x54 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x54 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x54 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x54 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x54 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x58 "PCR22,Pin Control 22"
bitfld.long 0x58 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x58 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x58 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x58 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x58 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x58 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x58 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x58 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x58 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x5C "PCR23,Pin Control 23"
bitfld.long 0x5C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x5C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x5C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x5C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x5C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x5C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x5C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x5C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x60 "PCR24,Pin Control 24"
bitfld.long 0x60 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x60 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x60 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x60 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x60 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x60 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x60 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x60 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x64 "PCR25,Pin Control 25"
bitfld.long 0x64 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x64 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x64 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x64 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x64 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x64 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x64 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x64 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x68 "PCR26,Pin Control 26"
bitfld.long 0x68 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x68 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x68 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x68 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x68 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x68 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x68 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x68 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x6C "PCR27,Pin Control 27"
bitfld.long 0x6C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x6C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x6C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x6C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x6C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x6C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x70 "PCR28,Pin Control 28"
bitfld.long 0x70 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x70 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x70 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x70 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x70 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x70 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x70 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x70 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x74 "PCR29,Pin Control 29"
bitfld.long 0x74 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x74 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x74 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x74 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x74 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x74 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x74 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x74 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x78 "PCR30,Pin Control 30"
bitfld.long 0x78 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x78 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x78 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x78 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x78 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x78 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x78 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x78 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x7C "PCR31,Pin Control 31"
bitfld.long 0x7C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x7C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x7C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x7C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x7C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x7C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
tree.end
tree "PORT1"
base ad:0x400BD000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x7
line.long 0x0 "GPCLR,Global Pin Control Low"
bitfld.long 0x0 31. "GPWE15,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 30. "GPWE14,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 29. "GPWE13,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 28. "GPWE12,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 27. "GPWE11,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 26. "GPWE10,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 25. "GPWE9,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 24. "GPWE8,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 23. "GPWE7,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 22. "GPWE6,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 21. "GPWE5,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 20. "GPWE4,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 19. "GPWE3,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 18. "GPWE2,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 17. "GPWE1,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 16. "GPWE0,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data"
line.long 0x4 "GPCHR,Global Pin Control High"
bitfld.long 0x4 31. "GPWE31,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 30. "GPWE30,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 29. "GPWE29,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 28. "GPWE28,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 27. "GPWE27,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 26. "GPWE26,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 25. "GPWE25,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 24. "GPWE24,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 23. "GPWE23,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 22. "GPWE22,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 21. "GPWE21,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 20. "GPWE20,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 19. "GPWE19,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 18. "GPWE18,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 17. "GPWE17,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 16. "GPWE16,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data"
group.long 0x20++0x3
line.long 0x0 "CONFIG,Configuration"
bitfld.long 0x0 0. "RANGE,Port Voltage Range" "0: 1.71 V-3.6 V,1: 2.70 V-3.6 V"
group.long 0x60++0x7
line.long 0x0 "CALIB0,Calibration 0"
hexmask.long.byte 0x0 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x0 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
line.long 0x4 "CALIB1,Calibration 1"
hexmask.long.byte 0x4 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x4 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
group.long 0x80++0x7F
line.long 0x0 "PCR0,Pin Control 0"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x0 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR1,Pin Control 1"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x4 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR2,Pin Control 2"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x8 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR3,Pin Control 3"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0xC 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR4,Pin Control 4"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x10 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR5,Pin Control 5"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x14 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR6,Pin Control 6"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x18 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR7,Pin Control 7"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x1C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x20 "PCR8,Pin Control 8"
bitfld.long 0x20 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x20 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x20 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x20 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x20 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x20 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x20 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x20 2. "PV,Pull Value" "0: Low,1: High"
bitfld.long 0x20 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x20 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x24 "PCR9,Pin Control 9"
bitfld.long 0x24 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x24 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x24 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x24 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x24 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x24 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x24 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x24 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x24 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x28 "PCR10,Pin Control 10"
bitfld.long 0x28 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x28 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x28 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x28 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x28 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x28 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x28 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x28 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x28 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x2C "PCR11,Pin Control 11"
bitfld.long 0x2C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x2C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x2C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x2C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x2C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x2C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x2C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x2C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x30 "PCR12,Pin Control 12"
bitfld.long 0x30 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x30 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x30 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x30 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x30 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x30 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x30 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x30 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x30 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x34 "PCR13,Pin Control 13"
bitfld.long 0x34 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x34 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x34 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x34 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x34 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x34 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x34 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x34 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x34 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x38 "PCR14,Pin Control 14"
bitfld.long 0x38 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x38 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x38 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x38 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x38 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x38 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x38 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x38 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x38 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x3C "PCR15,Pin Control 15"
bitfld.long 0x3C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x3C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x3C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x3C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x3C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x3C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x3C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x3C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x3C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x40 "PCR16,Pin Control 16"
bitfld.long 0x40 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x40 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x40 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x40 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x40 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x40 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x40 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x40 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x44 "PCR17,Pin Control 17"
bitfld.long 0x44 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x44 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x44 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x44 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x44 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x44 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x44 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x44 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x48 "PCR18,Pin Control 18"
bitfld.long 0x48 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x48 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x48 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x48 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x48 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x48 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x48 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x48 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4C "PCR19,Pin Control 19"
bitfld.long 0x4C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x4C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x50 "PCR20,Pin Control 20"
bitfld.long 0x50 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x50 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x50 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x50 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x50 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x50 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x50 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x54 "PCR21,Pin Control 21"
bitfld.long 0x54 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x54 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x54 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x54 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x54 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x54 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x54 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x58 "PCR22,Pin Control 22"
bitfld.long 0x58 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x58 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x58 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x58 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x58 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x58 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x58 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x58 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x5C "PCR23,Pin Control 23"
bitfld.long 0x5C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x5C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x5C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x5C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x5C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x5C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x60 "PCR24,Pin Control 24"
bitfld.long 0x60 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x60 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x60 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x60 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x60 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x60 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x60 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x60 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x64 "PCR25,Pin Control 25"
bitfld.long 0x64 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x64 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x64 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x64 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x64 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x64 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x64 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x64 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x68 "PCR26,Pin Control 26"
bitfld.long 0x68 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x68 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x68 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x68 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x68 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x68 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x68 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x68 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x6C "PCR27,Pin Control 27"
bitfld.long 0x6C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x6C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x6C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x6C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x6C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x6C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x70 "PCR28,Pin Control 28"
bitfld.long 0x70 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x70 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x70 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x70 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x70 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x70 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x70 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x70 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x74 "PCR29,Pin Control 29"
bitfld.long 0x74 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x74 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x74 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x74 8.--9. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific)"
bitfld.long 0x74 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x74 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x74 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x74 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x74 2. "PV,Pull Value" "0: Low,1: High"
newline
bitfld.long 0x74 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x74 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x78 "PCR30,Pin Control 30"
bitfld.long 0x78 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x78 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x78 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x78 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x78 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x78 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x78 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x78 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x78 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x78 2. "PV,Pull Value" "0: Low,1: High"
bitfld.long 0x78 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x78 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x7C "PCR31,Pin Control 31"
bitfld.long 0x7C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x7C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x7C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x7C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x7C 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x7C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x7C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x7C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
tree.end
tree "PORT2"
base ad:0x400BE000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x7
line.long 0x0 "GPCLR,Global Pin Control Low"
bitfld.long 0x0 31. "GPWE15,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 30. "GPWE14,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 29. "GPWE13,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 28. "GPWE12,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 27. "GPWE11,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 26. "GPWE10,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 25. "GPWE9,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 24. "GPWE8,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 23. "GPWE7,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 22. "GPWE6,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 21. "GPWE5,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 20. "GPWE4,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 19. "GPWE3,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 18. "GPWE2,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 17. "GPWE1,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 16. "GPWE0,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data"
line.long 0x4 "GPCHR,Global Pin Control High"
bitfld.long 0x4 31. "GPWE31,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 30. "GPWE30,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 29. "GPWE29,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 28. "GPWE28,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 27. "GPWE27,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 26. "GPWE26,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 25. "GPWE25,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 24. "GPWE24,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 23. "GPWE23,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 22. "GPWE22,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 21. "GPWE21,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 20. "GPWE20,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 19. "GPWE19,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 18. "GPWE18,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 17. "GPWE17,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 16. "GPWE16,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data"
group.long 0x20++0x3
line.long 0x0 "CONFIG,Configuration"
bitfld.long 0x0 0. "RANGE,Port Voltage Range" "0: 1.71 V-3.6 V,1: 2.70 V-3.6 V"
group.long 0x80++0x7F
line.long 0x0 "PCR0,Pin Control 0"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR1,Pin Control 1"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR2,Pin Control 2"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR3,Pin Control 3"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0xC 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR4,Pin Control 4"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR5,Pin Control 5"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR6,Pin Control 6"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR7,Pin Control 7"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x1C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x20 "PCR8,Pin Control 8"
bitfld.long 0x20 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x20 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x20 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x20 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x20 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x20 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x24 "PCR9,Pin Control 9"
bitfld.long 0x24 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x24 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x24 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x24 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x24 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x24 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x28 "PCR10,Pin Control 10"
bitfld.long 0x28 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x28 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x28 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x28 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x28 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x28 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x28 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x28 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x28 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x2C "PCR11,Pin Control 11"
bitfld.long 0x2C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x2C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x2C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x2C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x2C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x2C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x2C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x2C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x30 "PCR12,Pin Control 12"
bitfld.long 0x30 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x30 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x30 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x30 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x30 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x30 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x30 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x30 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x30 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x34 "PCR13,Pin Control 13"
bitfld.long 0x34 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x34 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x34 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x34 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x34 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x34 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x34 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x34 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x34 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x38 "PCR14,Pin Control 14"
bitfld.long 0x38 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x38 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x38 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x38 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x38 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x38 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x38 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x38 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x3C "PCR15,Pin Control 15"
bitfld.long 0x3C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x3C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x3C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x3C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x3C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x3C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x3C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x3C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x3C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x40 "PCR16,Pin Control 16"
bitfld.long 0x40 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x40 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x40 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x40 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x40 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x40 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x40 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x40 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x40 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x44 "PCR17,Pin Control 17"
bitfld.long 0x44 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x44 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x44 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x44 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x44 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x44 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x44 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x44 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x44 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x48 "PCR18,Pin Control 18"
bitfld.long 0x48 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x48 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x48 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x48 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x48 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x48 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x48 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x48 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4C "PCR19,Pin Control 19"
bitfld.long 0x4C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x4C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x50 "PCR20,Pin Control 20"
bitfld.long 0x50 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x50 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x50 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x50 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x50 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x50 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x50 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x54 "PCR21,Pin Control 21"
bitfld.long 0x54 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x54 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x54 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x54 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x54 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x54 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x54 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x58 "PCR22,Pin Control 22"
bitfld.long 0x58 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x58 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x58 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x58 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x58 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x58 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x58 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x58 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x5C "PCR23,Pin Control 23"
bitfld.long 0x5C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x5C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x5C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x5C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x5C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x5C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x5C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x5C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x60 "PCR24,Pin Control 24"
bitfld.long 0x60 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x60 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x60 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x60 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x60 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x60 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x60 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x60 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x64 "PCR25,Pin Control 25"
bitfld.long 0x64 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x64 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x64 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x64 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x64 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x64 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x64 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x64 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x68 "PCR26,Pin Control 26"
bitfld.long 0x68 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x68 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x68 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x68 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x68 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x68 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x68 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x68 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x6C "PCR27,Pin Control 27"
bitfld.long 0x6C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x6C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x6C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x6C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x6C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x6C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x70 "PCR28,Pin Control 28"
bitfld.long 0x70 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x70 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x70 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x70 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x70 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x70 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x70 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x70 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x74 "PCR29,Pin Control 29"
bitfld.long 0x74 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x74 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x74 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x74 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x74 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x74 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x74 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x74 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x78 "PCR30,Pin Control 30"
bitfld.long 0x78 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x78 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x78 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x78 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x78 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x78 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x78 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x78 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x7C "PCR31,Pin Control 31"
bitfld.long 0x7C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x7C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x7C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x7C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x7C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x7C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
tree.end
tree "PORT3"
base ad:0x400BF000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x7
line.long 0x0 "GPCLR,Global Pin Control Low"
bitfld.long 0x0 31. "GPWE15,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 30. "GPWE14,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 29. "GPWE13,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 28. "GPWE12,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 27. "GPWE11,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 26. "GPWE10,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 25. "GPWE9,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 24. "GPWE8,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 23. "GPWE7,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 22. "GPWE6,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 21. "GPWE5,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 20. "GPWE4,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 19. "GPWE3,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 18. "GPWE2,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 17. "GPWE1,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 16. "GPWE0,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data"
line.long 0x4 "GPCHR,Global Pin Control High"
bitfld.long 0x4 31. "GPWE31,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 30. "GPWE30,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 29. "GPWE29,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 28. "GPWE28,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 27. "GPWE27,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 26. "GPWE26,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 25. "GPWE25,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 24. "GPWE24,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 23. "GPWE23,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 22. "GPWE22,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 21. "GPWE21,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 20. "GPWE20,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 19. "GPWE19,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 18. "GPWE18,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 17. "GPWE17,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 16. "GPWE16,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data"
group.long 0x20++0x3
line.long 0x0 "CONFIG,Configuration"
bitfld.long 0x0 0. "RANGE,Port Voltage Range" "0: 1.71 V-3.6 V,1: 2.70 V-3.6 V"
group.long 0x60++0x7
line.long 0x0 "CALIB0,Calibration 0"
hexmask.long.byte 0x0 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x0 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
line.long 0x4 "CALIB1,Calibration 1"
hexmask.long.byte 0x4 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x4 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
group.long 0x80++0x7F
line.long 0x0 "PCR0,Pin Control 0"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x0 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x0 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x0 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR1,Pin Control 1"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x4 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x4 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR2,Pin Control 2"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR3,Pin Control 3"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR4,Pin Control 4"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR5,Pin Control 5"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR6,Pin Control 6"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x18 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR7,Pin Control 7"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x1C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x20 "PCR8,Pin Control 8"
bitfld.long 0x20 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x20 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x20 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x20 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x20 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x20 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x20 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x24 "PCR9,Pin Control 9"
bitfld.long 0x24 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x24 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x24 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x24 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x24 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x24 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x24 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x28 "PCR10,Pin Control 10"
bitfld.long 0x28 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x28 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x28 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x28 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x28 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x28 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x28 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x28 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x28 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x2C "PCR11,Pin Control 11"
bitfld.long 0x2C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x2C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x2C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x2C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x2C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x2C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x2C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x2C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x30 "PCR12,Pin Control 12"
bitfld.long 0x30 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x30 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x30 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x30 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x30 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x30 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x30 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x30 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x30 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x34 "PCR13,Pin Control 13"
bitfld.long 0x34 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x34 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x34 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x34 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x34 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x34 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x34 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x34 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x34 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x38 "PCR14,Pin Control 14"
bitfld.long 0x38 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x38 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x38 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x38 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x38 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x38 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x38 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x38 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x38 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x3C "PCR15,Pin Control 15"
bitfld.long 0x3C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x3C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x3C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x3C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x3C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x3C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x3C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x3C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x3C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x40 "PCR16,Pin Control 16"
bitfld.long 0x40 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x40 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x40 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x40 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x40 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x40 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x40 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x40 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x40 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x44 "PCR17,Pin Control 17"
bitfld.long 0x44 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x44 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x44 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x44 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x44 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x44 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x44 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x44 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x44 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x48 "PCR18,Pin Control 18"
bitfld.long 0x48 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x48 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x48 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x48 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x48 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x48 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x48 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x48 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x48 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4C "PCR19,Pin Control 19"
bitfld.long 0x4C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x4C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x50 "PCR20,Pin Control 20"
bitfld.long 0x50 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x50 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x50 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x50 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x50 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x50 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x50 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x54 "PCR21,Pin Control 21"
bitfld.long 0x54 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x54 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x54 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x54 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x54 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x54 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x54 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x58 "PCR22,Pin Control 22"
bitfld.long 0x58 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x58 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x58 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x58 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x58 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x58 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x58 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x58 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x58 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x5C "PCR23,Pin Control 23"
bitfld.long 0x5C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x5C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x5C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x5C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x5C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x5C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x60 "PCR24,Pin Control 24"
bitfld.long 0x60 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x60 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x60 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x60 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x60 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x60 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x60 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x60 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x64 "PCR25,Pin Control 25"
bitfld.long 0x64 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x64 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x64 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x64 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x64 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x64 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x64 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x64 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x68 "PCR26,Pin Control 26"
bitfld.long 0x68 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x68 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x68 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x68 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x68 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x68 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x68 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x68 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x6C "PCR27,Pin Control 27"
bitfld.long 0x6C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x6C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x6C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x6C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x6C 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x6C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x6C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x6C 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x6C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x70 "PCR28,Pin Control 28"
bitfld.long 0x70 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x70 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x70 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x70 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x70 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x70 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x70 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x70 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x70 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x70 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x74 "PCR29,Pin Control 29"
bitfld.long 0x74 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x74 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x74 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x74 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x74 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x74 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x74 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x74 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x74 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x78 "PCR30,Pin Control 30"
bitfld.long 0x78 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x78 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x78 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x78 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x78 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x78 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x78 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x78 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x78 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x7C "PCR31,Pin Control 31"
bitfld.long 0x7C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x7C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x7C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x7C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x7C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x7C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x7C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x7C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
tree.end
endif
sif (cpuis("MC?A155*"))
tree "PORT0"
base ad:0x400BC000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x7
line.long 0x0 "GPCLR,Global Pin Control Low"
bitfld.long 0x0 31. "GPWE15,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 30. "GPWE14,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 29. "GPWE13,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 28. "GPWE12,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 27. "GPWE11,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 26. "GPWE10,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 25. "GPWE9,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 24. "GPWE8,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 23. "GPWE7,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 22. "GPWE6,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 21. "GPWE5,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 20. "GPWE4,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 19. "GPWE3,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 18. "GPWE2,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 17. "GPWE1,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 16. "GPWE0,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data"
line.long 0x4 "GPCHR,Global Pin Control High"
bitfld.long 0x4 31. "GPWE31,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 30. "GPWE30,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 29. "GPWE29,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 28. "GPWE28,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 27. "GPWE27,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 26. "GPWE26,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 25. "GPWE25,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 24. "GPWE24,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 23. "GPWE23,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 22. "GPWE22,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 21. "GPWE21,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 20. "GPWE20,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 19. "GPWE19,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 18. "GPWE18,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 17. "GPWE17,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 16. "GPWE16,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data"
group.long 0x20++0x3
line.long 0x0 "CONFIG,Configuration"
bitfld.long 0x0 0. "RANGE,Port Voltage Range" "0: 1.71 V-3.6 V,1: 2.70 V-3.6 V"
group.long 0x60++0x7
line.long 0x0 "CALIB0,Calibration 0"
hexmask.long.byte 0x0 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x0 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
line.long 0x4 "CALIB1,Calibration 1"
hexmask.long.byte 0x4 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x4 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
group.long 0x80++0x7F
line.long 0x0 "PCR0,Pin Control 0"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR1,Pin Control 1"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR2,Pin Control 2"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x8 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR3,Pin Control 3"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0xC 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR4,Pin Control 4"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR5,Pin Control 5"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR6,Pin Control 6"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x18 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR7,Pin Control 7"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x20 "PCR8,Pin Control 8"
bitfld.long 0x20 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x20 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x20 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x20 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x20 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x20 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x24 "PCR9,Pin Control 9"
bitfld.long 0x24 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x24 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x24 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x24 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x24 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x24 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x28 "PCR10,Pin Control 10"
bitfld.long 0x28 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x28 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x28 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x28 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x28 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x28 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x28 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x28 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x2C "PCR11,Pin Control 11"
bitfld.long 0x2C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x2C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x2C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x2C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x2C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x2C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x30 "PCR12,Pin Control 12"
bitfld.long 0x30 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x30 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x30 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x30 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x30 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x30 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x30 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x30 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x34 "PCR13,Pin Control 13"
bitfld.long 0x34 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x34 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x34 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x34 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x34 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x34 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x34 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x34 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x38 "PCR14,Pin Control 14"
bitfld.long 0x38 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x38 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x38 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x38 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x38 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x38 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x38 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x38 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x3C "PCR15,Pin Control 15"
bitfld.long 0x3C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x3C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x3C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x3C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x3C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x3C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x3C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x3C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x40 "PCR16,Pin Control 16"
bitfld.long 0x40 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x40 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x40 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x40 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x40 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x40 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x40 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x40 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x40 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x40 2. "PV,Pull Value" "0: Low,1: High"
bitfld.long 0x40 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x40 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x44 "PCR17,Pin Control 17"
bitfld.long 0x44 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x44 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x44 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x44 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x44 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x44 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x44 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x44 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x44 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x44 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x44 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x48 "PCR18,Pin Control 18"
bitfld.long 0x48 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x48 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x48 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x48 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x48 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x48 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x48 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x48 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x48 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4C "PCR19,Pin Control 19"
bitfld.long 0x4C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x4C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x4C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x50 "PCR20,Pin Control 20"
bitfld.long 0x50 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x50 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x50 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x50 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x50 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x50 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x50 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x54 "PCR21,Pin Control 21"
bitfld.long 0x54 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x54 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x54 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x54 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x54 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x54 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x54 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x58 "PCR22,Pin Control 22"
bitfld.long 0x58 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x58 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x58 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x58 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x58 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x58 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x58 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x58 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x58 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x5C "PCR23,Pin Control 23"
bitfld.long 0x5C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x5C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x5C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x5C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x5C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x5C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x5C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x5C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x60 "PCR24,Pin Control 24"
bitfld.long 0x60 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x60 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x60 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x60 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x60 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x60 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x60 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x60 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x64 "PCR25,Pin Control 25"
bitfld.long 0x64 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x64 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x64 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x64 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x64 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x64 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x64 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x64 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x68 "PCR26,Pin Control 26"
bitfld.long 0x68 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x68 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x68 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x68 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x68 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x68 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x68 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x68 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x6C "PCR27,Pin Control 27"
bitfld.long 0x6C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x6C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x6C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x6C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x6C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x6C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x70 "PCR28,Pin Control 28"
bitfld.long 0x70 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x70 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x70 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x70 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x70 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x70 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x70 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x70 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x74 "PCR29,Pin Control 29"
bitfld.long 0x74 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x74 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x74 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x74 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x74 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x74 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x74 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x74 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x78 "PCR30,Pin Control 30"
bitfld.long 0x78 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x78 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x78 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x78 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x78 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x78 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x78 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x78 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x7C "PCR31,Pin Control 31"
bitfld.long 0x7C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x7C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x7C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x7C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x7C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x7C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
tree.end
tree "PORT1"
base ad:0x400BD000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x7
line.long 0x0 "GPCLR,Global Pin Control Low"
bitfld.long 0x0 31. "GPWE15,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 30. "GPWE14,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 29. "GPWE13,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 28. "GPWE12,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 27. "GPWE11,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 26. "GPWE10,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 25. "GPWE9,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 24. "GPWE8,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 23. "GPWE7,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 22. "GPWE6,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 21. "GPWE5,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 20. "GPWE4,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 19. "GPWE3,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 18. "GPWE2,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 17. "GPWE1,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 16. "GPWE0,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data"
line.long 0x4 "GPCHR,Global Pin Control High"
bitfld.long 0x4 31. "GPWE31,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 30. "GPWE30,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 29. "GPWE29,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 28. "GPWE28,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 27. "GPWE27,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 26. "GPWE26,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 25. "GPWE25,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 24. "GPWE24,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 23. "GPWE23,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 22. "GPWE22,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 21. "GPWE21,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 20. "GPWE20,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 19. "GPWE19,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 18. "GPWE18,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 17. "GPWE17,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 16. "GPWE16,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data"
group.long 0x20++0x3
line.long 0x0 "CONFIG,Configuration"
bitfld.long 0x0 0. "RANGE,Port Voltage Range" "0: 1.71 V-3.6 V,1: 2.70 V-3.6 V"
group.long 0x60++0x7
line.long 0x0 "CALIB0,Calibration 0"
hexmask.long.byte 0x0 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x0 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
line.long 0x4 "CALIB1,Calibration 1"
hexmask.long.byte 0x4 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x4 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
group.long 0x80++0x7F
line.long 0x0 "PCR0,Pin Control 0"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x0 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR1,Pin Control 1"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x4 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR2,Pin Control 2"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x8 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR3,Pin Control 3"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0xC 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR4,Pin Control 4"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x10 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR5,Pin Control 5"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x14 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR6,Pin Control 6"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x18 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR7,Pin Control 7"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x1C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x20 "PCR8,Pin Control 8"
bitfld.long 0x20 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x20 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x20 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x20 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x20 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x20 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x20 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x20 2. "PV,Pull Value" "0: Low,1: High"
bitfld.long 0x20 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x20 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x24 "PCR9,Pin Control 9"
bitfld.long 0x24 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x24 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x24 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x24 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x24 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x24 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x24 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x24 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x24 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x28 "PCR10,Pin Control 10"
bitfld.long 0x28 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x28 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x28 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x28 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x28 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x28 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x28 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x28 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x28 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x2C "PCR11,Pin Control 11"
bitfld.long 0x2C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x2C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x2C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x2C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x2C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x2C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x2C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x2C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x30 "PCR12,Pin Control 12"
bitfld.long 0x30 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x30 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x30 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x30 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x30 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x30 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x30 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x30 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x30 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x34 "PCR13,Pin Control 13"
bitfld.long 0x34 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x34 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x34 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x34 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x34 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x34 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x34 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x34 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x34 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x38 "PCR14,Pin Control 14"
bitfld.long 0x38 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x38 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x38 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x38 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x38 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x38 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x38 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x38 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x38 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x3C "PCR15,Pin Control 15"
bitfld.long 0x3C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x3C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x3C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x3C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x3C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x3C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x3C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x3C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x3C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x40 "PCR16,Pin Control 16"
bitfld.long 0x40 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x40 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x40 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x40 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x40 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x40 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x40 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x40 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x44 "PCR17,Pin Control 17"
bitfld.long 0x44 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x44 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x44 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x44 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x44 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x44 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x44 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x44 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x48 "PCR18,Pin Control 18"
bitfld.long 0x48 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x48 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x48 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x48 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x48 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x48 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x48 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x48 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4C "PCR19,Pin Control 19"
bitfld.long 0x4C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x4C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x50 "PCR20,Pin Control 20"
bitfld.long 0x50 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x50 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x50 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x50 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x50 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x50 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x50 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x54 "PCR21,Pin Control 21"
bitfld.long 0x54 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x54 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x54 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x54 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x54 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x54 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x54 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x58 "PCR22,Pin Control 22"
bitfld.long 0x58 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x58 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x58 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x58 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x58 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x58 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x58 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x58 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x5C "PCR23,Pin Control 23"
bitfld.long 0x5C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x5C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x5C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x5C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x5C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x5C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x60 "PCR24,Pin Control 24"
bitfld.long 0x60 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x60 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x60 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x60 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x60 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x60 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x60 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x60 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x64 "PCR25,Pin Control 25"
bitfld.long 0x64 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x64 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x64 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x64 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x64 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x64 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x64 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x64 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x68 "PCR26,Pin Control 26"
bitfld.long 0x68 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x68 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x68 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x68 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x68 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x68 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x68 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x68 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x6C "PCR27,Pin Control 27"
bitfld.long 0x6C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x6C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x6C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x6C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x6C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x6C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x70 "PCR28,Pin Control 28"
bitfld.long 0x70 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x70 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x70 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x70 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x70 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x70 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x70 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x70 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x74 "PCR29,Pin Control 29"
bitfld.long 0x74 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x74 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x74 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x74 8.--9. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific)"
bitfld.long 0x74 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x74 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x74 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x74 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x74 2. "PV,Pull Value" "0: Low,1: High"
newline
bitfld.long 0x74 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x74 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x78 "PCR30,Pin Control 30"
bitfld.long 0x78 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x78 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x78 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x78 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x78 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x78 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x78 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x78 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x78 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x78 2. "PV,Pull Value" "0: Low,1: High"
bitfld.long 0x78 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x78 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x7C "PCR31,Pin Control 31"
bitfld.long 0x7C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x7C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x7C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x7C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x7C 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x7C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x7C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x7C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
tree.end
tree "PORT2"
base ad:0x400BE000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x7
line.long 0x0 "GPCLR,Global Pin Control Low"
bitfld.long 0x0 31. "GPWE15,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 30. "GPWE14,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 29. "GPWE13,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 28. "GPWE12,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 27. "GPWE11,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 26. "GPWE10,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 25. "GPWE9,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 24. "GPWE8,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 23. "GPWE7,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 22. "GPWE6,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 21. "GPWE5,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 20. "GPWE4,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 19. "GPWE3,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 18. "GPWE2,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 17. "GPWE1,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 16. "GPWE0,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data"
line.long 0x4 "GPCHR,Global Pin Control High"
bitfld.long 0x4 31. "GPWE31,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 30. "GPWE30,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 29. "GPWE29,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 28. "GPWE28,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 27. "GPWE27,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 26. "GPWE26,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 25. "GPWE25,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 24. "GPWE24,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 23. "GPWE23,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 22. "GPWE22,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 21. "GPWE21,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 20. "GPWE20,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 19. "GPWE19,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 18. "GPWE18,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 17. "GPWE17,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 16. "GPWE16,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data"
group.long 0x20++0x3
line.long 0x0 "CONFIG,Configuration"
bitfld.long 0x0 0. "RANGE,Port Voltage Range" "0: 1.71 V-3.6 V,1: 2.70 V-3.6 V"
group.long 0x80++0x7F
line.long 0x0 "PCR0,Pin Control 0"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR1,Pin Control 1"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR2,Pin Control 2"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR3,Pin Control 3"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0xC 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR4,Pin Control 4"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR5,Pin Control 5"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR6,Pin Control 6"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR7,Pin Control 7"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x1C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x20 "PCR8,Pin Control 8"
bitfld.long 0x20 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x20 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x20 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x20 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x20 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x20 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x24 "PCR9,Pin Control 9"
bitfld.long 0x24 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x24 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x24 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x24 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x24 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x24 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x28 "PCR10,Pin Control 10"
bitfld.long 0x28 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x28 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x28 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x28 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x28 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x28 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x28 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x28 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x28 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x2C "PCR11,Pin Control 11"
bitfld.long 0x2C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x2C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x2C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x2C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x2C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x2C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x2C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x2C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x30 "PCR12,Pin Control 12"
bitfld.long 0x30 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x30 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x30 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x30 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x30 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x30 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x30 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x30 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x30 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x34 "PCR13,Pin Control 13"
bitfld.long 0x34 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x34 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x34 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x34 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x34 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x34 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x34 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x34 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x34 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x38 "PCR14,Pin Control 14"
bitfld.long 0x38 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x38 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x38 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x38 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x38 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x38 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x38 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x38 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x3C "PCR15,Pin Control 15"
bitfld.long 0x3C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x3C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x3C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x3C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x3C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x3C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x3C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x3C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x3C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x40 "PCR16,Pin Control 16"
bitfld.long 0x40 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x40 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x40 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x40 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x40 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x40 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x40 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x40 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x40 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x44 "PCR17,Pin Control 17"
bitfld.long 0x44 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x44 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x44 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x44 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x44 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x44 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x44 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x44 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x44 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x48 "PCR18,Pin Control 18"
bitfld.long 0x48 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x48 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x48 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x48 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x48 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x48 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x48 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x48 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4C "PCR19,Pin Control 19"
bitfld.long 0x4C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x4C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x50 "PCR20,Pin Control 20"
bitfld.long 0x50 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x50 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x50 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x50 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x50 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x50 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x50 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x54 "PCR21,Pin Control 21"
bitfld.long 0x54 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x54 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x54 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x54 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x54 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x54 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x54 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x58 "PCR22,Pin Control 22"
bitfld.long 0x58 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x58 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x58 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x58 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x58 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x58 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x58 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x58 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x5C "PCR23,Pin Control 23"
bitfld.long 0x5C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x5C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x5C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x5C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x5C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x5C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x5C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x5C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x60 "PCR24,Pin Control 24"
bitfld.long 0x60 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x60 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x60 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x60 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x60 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x60 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x60 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x60 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x64 "PCR25,Pin Control 25"
bitfld.long 0x64 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x64 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x64 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x64 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x64 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x64 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x64 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x64 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x68 "PCR26,Pin Control 26"
bitfld.long 0x68 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x68 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x68 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x68 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x68 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x68 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x68 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x68 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x6C "PCR27,Pin Control 27"
bitfld.long 0x6C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x6C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x6C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x6C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x6C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x6C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x70 "PCR28,Pin Control 28"
bitfld.long 0x70 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x70 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x70 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x70 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x70 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x70 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x70 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x70 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x74 "PCR29,Pin Control 29"
bitfld.long 0x74 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x74 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x74 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x74 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x74 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x74 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x74 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x74 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x78 "PCR30,Pin Control 30"
bitfld.long 0x78 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x78 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x78 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x78 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x78 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x78 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x78 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x78 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x7C "PCR31,Pin Control 31"
bitfld.long 0x7C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x7C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x7C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x7C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x7C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x7C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
tree.end
tree "PORT3"
base ad:0x400BF000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x7
line.long 0x0 "GPCLR,Global Pin Control Low"
bitfld.long 0x0 31. "GPWE15,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 30. "GPWE14,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 29. "GPWE13,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 28. "GPWE12,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 27. "GPWE11,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 26. "GPWE10,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 25. "GPWE9,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 24. "GPWE8,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 23. "GPWE7,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 22. "GPWE6,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 21. "GPWE5,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 20. "GPWE4,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 19. "GPWE3,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 18. "GPWE2,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 17. "GPWE1,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 16. "GPWE0,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data"
line.long 0x4 "GPCHR,Global Pin Control High"
bitfld.long 0x4 31. "GPWE31,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 30. "GPWE30,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 29. "GPWE29,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 28. "GPWE28,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 27. "GPWE27,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 26. "GPWE26,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 25. "GPWE25,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 24. "GPWE24,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 23. "GPWE23,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 22. "GPWE22,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 21. "GPWE21,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 20. "GPWE20,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 19. "GPWE19,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 18. "GPWE18,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 17. "GPWE17,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 16. "GPWE16,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data"
group.long 0x20++0x3
line.long 0x0 "CONFIG,Configuration"
bitfld.long 0x0 0. "RANGE,Port Voltage Range" "0: 1.71 V-3.6 V,1: 2.70 V-3.6 V"
group.long 0x60++0x7
line.long 0x0 "CALIB0,Calibration 0"
hexmask.long.byte 0x0 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x0 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
line.long 0x4 "CALIB1,Calibration 1"
hexmask.long.byte 0x4 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x4 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
group.long 0x80++0x7F
line.long 0x0 "PCR0,Pin Control 0"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x0 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x0 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x0 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR1,Pin Control 1"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x4 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x4 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR2,Pin Control 2"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR3,Pin Control 3"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR4,Pin Control 4"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR5,Pin Control 5"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR6,Pin Control 6"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x18 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR7,Pin Control 7"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x1C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x20 "PCR8,Pin Control 8"
bitfld.long 0x20 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x20 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x20 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x20 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x20 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x20 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x20 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x24 "PCR9,Pin Control 9"
bitfld.long 0x24 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x24 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x24 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x24 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x24 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x24 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x24 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x28 "PCR10,Pin Control 10"
bitfld.long 0x28 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x28 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x28 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x28 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x28 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x28 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x28 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x28 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x28 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x2C "PCR11,Pin Control 11"
bitfld.long 0x2C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x2C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x2C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x2C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x2C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x2C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x2C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x2C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x30 "PCR12,Pin Control 12"
bitfld.long 0x30 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x30 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x30 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x30 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x30 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x30 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x30 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x30 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x30 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x34 "PCR13,Pin Control 13"
bitfld.long 0x34 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x34 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x34 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x34 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x34 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x34 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x34 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x34 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x34 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x38 "PCR14,Pin Control 14"
bitfld.long 0x38 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x38 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x38 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x38 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x38 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x38 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x38 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x38 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x38 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x3C "PCR15,Pin Control 15"
bitfld.long 0x3C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x3C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x3C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x3C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x3C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x3C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x3C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x3C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x3C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x40 "PCR16,Pin Control 16"
bitfld.long 0x40 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x40 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x40 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x40 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x40 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x40 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x40 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x40 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x40 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x44 "PCR17,Pin Control 17"
bitfld.long 0x44 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x44 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x44 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x44 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x44 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x44 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x44 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x44 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x44 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x48 "PCR18,Pin Control 18"
bitfld.long 0x48 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x48 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x48 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x48 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x48 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x48 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x48 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x48 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x48 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4C "PCR19,Pin Control 19"
bitfld.long 0x4C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x4C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x50 "PCR20,Pin Control 20"
bitfld.long 0x50 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x50 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x50 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x50 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x50 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x50 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x50 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x54 "PCR21,Pin Control 21"
bitfld.long 0x54 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x54 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x54 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x54 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x54 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x54 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x54 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x58 "PCR22,Pin Control 22"
bitfld.long 0x58 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x58 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x58 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x58 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x58 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x58 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x58 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x58 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x58 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x5C "PCR23,Pin Control 23"
bitfld.long 0x5C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x5C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x5C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x5C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x5C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x5C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x60 "PCR24,Pin Control 24"
bitfld.long 0x60 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x60 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x60 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x60 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x60 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x60 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x60 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x60 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x64 "PCR25,Pin Control 25"
bitfld.long 0x64 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x64 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x64 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x64 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x64 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x64 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x64 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x64 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x68 "PCR26,Pin Control 26"
bitfld.long 0x68 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x68 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x68 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x68 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x68 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x68 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x68 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x68 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x6C "PCR27,Pin Control 27"
bitfld.long 0x6C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x6C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x6C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x6C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x6C 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x6C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x6C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x6C 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x6C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x70 "PCR28,Pin Control 28"
bitfld.long 0x70 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x70 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x70 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x70 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x70 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x70 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x70 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x70 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x70 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x70 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x74 "PCR29,Pin Control 29"
bitfld.long 0x74 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x74 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x74 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x74 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x74 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x74 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x74 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x74 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x74 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x78 "PCR30,Pin Control 30"
bitfld.long 0x78 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x78 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x78 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x78 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x78 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x78 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x78 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x78 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x78 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x7C "PCR31,Pin Control 31"
bitfld.long 0x7C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x7C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x7C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x7C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x7C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x7C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x7C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x7C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
tree.end
endif
sif (cpuis("MC?A156*"))
tree "PORT0"
base ad:0x400BC000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x7
line.long 0x0 "GPCLR,Global Pin Control Low"
bitfld.long 0x0 31. "GPWE15,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 30. "GPWE14,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 29. "GPWE13,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 28. "GPWE12,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 27. "GPWE11,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 26. "GPWE10,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 25. "GPWE9,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 24. "GPWE8,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 23. "GPWE7,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 22. "GPWE6,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 21. "GPWE5,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 20. "GPWE4,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 19. "GPWE3,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 18. "GPWE2,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 17. "GPWE1,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 16. "GPWE0,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data"
line.long 0x4 "GPCHR,Global Pin Control High"
bitfld.long 0x4 31. "GPWE31,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 30. "GPWE30,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 29. "GPWE29,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 28. "GPWE28,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 27. "GPWE27,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 26. "GPWE26,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 25. "GPWE25,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 24. "GPWE24,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 23. "GPWE23,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 22. "GPWE22,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 21. "GPWE21,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 20. "GPWE20,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 19. "GPWE19,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 18. "GPWE18,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 17. "GPWE17,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 16. "GPWE16,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data"
group.long 0x20++0x3
line.long 0x0 "CONFIG,Configuration"
bitfld.long 0x0 0. "RANGE,Port Voltage Range" "0: 1.71 V-3.6 V,1: 2.70 V-3.6 V"
group.long 0x60++0x7
line.long 0x0 "CALIB0,Calibration 0"
hexmask.long.byte 0x0 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x0 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
line.long 0x4 "CALIB1,Calibration 1"
hexmask.long.byte 0x4 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x4 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
group.long 0x80++0x7F
line.long 0x0 "PCR0,Pin Control 0"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR1,Pin Control 1"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR2,Pin Control 2"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x8 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR3,Pin Control 3"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0xC 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR4,Pin Control 4"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR5,Pin Control 5"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR6,Pin Control 6"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x18 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR7,Pin Control 7"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x20 "PCR8,Pin Control 8"
bitfld.long 0x20 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x20 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x20 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x20 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x20 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x20 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x24 "PCR9,Pin Control 9"
bitfld.long 0x24 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x24 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x24 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x24 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x24 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x24 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x28 "PCR10,Pin Control 10"
bitfld.long 0x28 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x28 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x28 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x28 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x28 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x28 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x28 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x28 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x2C "PCR11,Pin Control 11"
bitfld.long 0x2C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x2C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x2C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x2C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x2C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x2C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x30 "PCR12,Pin Control 12"
bitfld.long 0x30 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x30 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x30 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x30 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x30 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x30 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x30 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x30 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x34 "PCR13,Pin Control 13"
bitfld.long 0x34 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x34 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x34 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x34 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x34 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x34 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x34 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x34 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x38 "PCR14,Pin Control 14"
bitfld.long 0x38 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x38 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x38 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x38 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x38 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x38 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x38 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x38 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x3C "PCR15,Pin Control 15"
bitfld.long 0x3C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x3C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x3C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x3C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x3C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x3C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x3C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x3C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x40 "PCR16,Pin Control 16"
bitfld.long 0x40 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x40 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x40 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x40 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x40 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x40 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x40 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x40 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x40 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x40 2. "PV,Pull Value" "0: Low,1: High"
bitfld.long 0x40 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x40 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x44 "PCR17,Pin Control 17"
bitfld.long 0x44 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x44 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x44 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x44 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x44 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x44 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x44 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x44 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x44 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x44 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x44 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x48 "PCR18,Pin Control 18"
bitfld.long 0x48 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x48 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x48 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x48 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x48 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x48 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x48 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x48 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x48 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4C "PCR19,Pin Control 19"
bitfld.long 0x4C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x4C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x4C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x50 "PCR20,Pin Control 20"
bitfld.long 0x50 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x50 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x50 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x50 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x50 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x50 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x50 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x54 "PCR21,Pin Control 21"
bitfld.long 0x54 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x54 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x54 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x54 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x54 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x54 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x54 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x58 "PCR22,Pin Control 22"
bitfld.long 0x58 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x58 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x58 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x58 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x58 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x58 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x58 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x58 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x58 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x5C "PCR23,Pin Control 23"
bitfld.long 0x5C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x5C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x5C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x5C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x5C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x5C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x5C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x5C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x60 "PCR24,Pin Control 24"
bitfld.long 0x60 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x60 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x60 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x60 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x60 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x60 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x60 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x60 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x64 "PCR25,Pin Control 25"
bitfld.long 0x64 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x64 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x64 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x64 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x64 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x64 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x64 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x64 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x68 "PCR26,Pin Control 26"
bitfld.long 0x68 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x68 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x68 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x68 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x68 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x68 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x68 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x68 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x6C "PCR27,Pin Control 27"
bitfld.long 0x6C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x6C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x6C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x6C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x6C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x6C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x70 "PCR28,Pin Control 28"
bitfld.long 0x70 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x70 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x70 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x70 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x70 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x70 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x70 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x70 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x74 "PCR29,Pin Control 29"
bitfld.long 0x74 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x74 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x74 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x74 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x74 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x74 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x74 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x74 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x78 "PCR30,Pin Control 30"
bitfld.long 0x78 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x78 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x78 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x78 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x78 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x78 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x78 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x78 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x7C "PCR31,Pin Control 31"
bitfld.long 0x7C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x7C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x7C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x7C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x7C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x7C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
tree.end
tree "PORT1"
base ad:0x400BD000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x7
line.long 0x0 "GPCLR,Global Pin Control Low"
bitfld.long 0x0 31. "GPWE15,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 30. "GPWE14,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 29. "GPWE13,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 28. "GPWE12,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 27. "GPWE11,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 26. "GPWE10,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 25. "GPWE9,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 24. "GPWE8,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 23. "GPWE7,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 22. "GPWE6,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 21. "GPWE5,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 20. "GPWE4,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 19. "GPWE3,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 18. "GPWE2,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 17. "GPWE1,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 16. "GPWE0,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data"
line.long 0x4 "GPCHR,Global Pin Control High"
bitfld.long 0x4 31. "GPWE31,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 30. "GPWE30,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 29. "GPWE29,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 28. "GPWE28,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 27. "GPWE27,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 26. "GPWE26,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 25. "GPWE25,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 24. "GPWE24,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 23. "GPWE23,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 22. "GPWE22,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 21. "GPWE21,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 20. "GPWE20,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 19. "GPWE19,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 18. "GPWE18,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 17. "GPWE17,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 16. "GPWE16,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data"
group.long 0x20++0x3
line.long 0x0 "CONFIG,Configuration"
bitfld.long 0x0 0. "RANGE,Port Voltage Range" "0: 1.71 V-3.6 V,1: 2.70 V-3.6 V"
group.long 0x60++0x7
line.long 0x0 "CALIB0,Calibration 0"
hexmask.long.byte 0x0 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x0 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
line.long 0x4 "CALIB1,Calibration 1"
hexmask.long.byte 0x4 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x4 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
group.long 0x80++0x7F
line.long 0x0 "PCR0,Pin Control 0"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x0 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR1,Pin Control 1"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x4 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR2,Pin Control 2"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x8 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR3,Pin Control 3"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0xC 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR4,Pin Control 4"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x10 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR5,Pin Control 5"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x14 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR6,Pin Control 6"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x18 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR7,Pin Control 7"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x1C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x20 "PCR8,Pin Control 8"
bitfld.long 0x20 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x20 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x20 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x20 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x20 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x20 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x20 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x20 2. "PV,Pull Value" "0: Low,1: High"
bitfld.long 0x20 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x20 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x24 "PCR9,Pin Control 9"
bitfld.long 0x24 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x24 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x24 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x24 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x24 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x24 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x24 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x24 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x24 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x28 "PCR10,Pin Control 10"
bitfld.long 0x28 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x28 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x28 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x28 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x28 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x28 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x28 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x28 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x28 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x2C "PCR11,Pin Control 11"
bitfld.long 0x2C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x2C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x2C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x2C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x2C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x2C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x2C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x2C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x30 "PCR12,Pin Control 12"
bitfld.long 0x30 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x30 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x30 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x30 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x30 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x30 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x30 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x30 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x30 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x34 "PCR13,Pin Control 13"
bitfld.long 0x34 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x34 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x34 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x34 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x34 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x34 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x34 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x34 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x34 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x38 "PCR14,Pin Control 14"
bitfld.long 0x38 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x38 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x38 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x38 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x38 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x38 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x38 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x38 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x38 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x3C "PCR15,Pin Control 15"
bitfld.long 0x3C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x3C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x3C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x3C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x3C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x3C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x3C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x3C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x3C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x40 "PCR16,Pin Control 16"
bitfld.long 0x40 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x40 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x40 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x40 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x40 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x40 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x40 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x40 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x44 "PCR17,Pin Control 17"
bitfld.long 0x44 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x44 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x44 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x44 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x44 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x44 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x44 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x44 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x48 "PCR18,Pin Control 18"
bitfld.long 0x48 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x48 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x48 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x48 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x48 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x48 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x48 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x48 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4C "PCR19,Pin Control 19"
bitfld.long 0x4C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x4C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x50 "PCR20,Pin Control 20"
bitfld.long 0x50 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x50 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x50 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x50 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x50 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x50 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x50 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x54 "PCR21,Pin Control 21"
bitfld.long 0x54 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x54 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x54 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x54 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x54 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x54 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x54 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x58 "PCR22,Pin Control 22"
bitfld.long 0x58 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x58 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x58 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x58 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x58 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x58 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x58 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x58 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x5C "PCR23,Pin Control 23"
bitfld.long 0x5C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x5C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x5C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x5C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x5C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x5C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x60 "PCR24,Pin Control 24"
bitfld.long 0x60 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x60 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x60 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x60 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x60 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x60 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x60 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x60 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x64 "PCR25,Pin Control 25"
bitfld.long 0x64 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x64 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x64 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x64 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x64 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x64 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x64 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x64 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x68 "PCR26,Pin Control 26"
bitfld.long 0x68 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x68 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x68 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x68 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x68 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x68 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x68 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x68 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x6C "PCR27,Pin Control 27"
bitfld.long 0x6C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x6C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x6C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x6C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x6C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x6C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x70 "PCR28,Pin Control 28"
bitfld.long 0x70 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x70 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x70 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x70 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x70 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x70 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x70 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x70 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x74 "PCR29,Pin Control 29"
bitfld.long 0x74 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x74 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x74 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x74 8.--9. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific)"
bitfld.long 0x74 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x74 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x74 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x74 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x74 2. "PV,Pull Value" "0: Low,1: High"
newline
bitfld.long 0x74 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x74 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x78 "PCR30,Pin Control 30"
bitfld.long 0x78 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x78 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x78 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x78 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x78 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x78 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x78 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x78 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x78 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x78 2. "PV,Pull Value" "0: Low,1: High"
bitfld.long 0x78 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x78 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x7C "PCR31,Pin Control 31"
bitfld.long 0x7C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x7C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x7C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x7C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x7C 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x7C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x7C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x7C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
tree.end
tree "PORT2"
base ad:0x400BE000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x7
line.long 0x0 "GPCLR,Global Pin Control Low"
bitfld.long 0x0 31. "GPWE15,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 30. "GPWE14,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 29. "GPWE13,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 28. "GPWE12,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 27. "GPWE11,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 26. "GPWE10,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 25. "GPWE9,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 24. "GPWE8,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 23. "GPWE7,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 22. "GPWE6,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 21. "GPWE5,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 20. "GPWE4,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 19. "GPWE3,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 18. "GPWE2,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 17. "GPWE1,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 16. "GPWE0,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data"
line.long 0x4 "GPCHR,Global Pin Control High"
bitfld.long 0x4 31. "GPWE31,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 30. "GPWE30,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 29. "GPWE29,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 28. "GPWE28,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 27. "GPWE27,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 26. "GPWE26,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 25. "GPWE25,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 24. "GPWE24,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 23. "GPWE23,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 22. "GPWE22,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 21. "GPWE21,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 20. "GPWE20,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 19. "GPWE19,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 18. "GPWE18,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 17. "GPWE17,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 16. "GPWE16,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data"
group.long 0x20++0x3
line.long 0x0 "CONFIG,Configuration"
bitfld.long 0x0 0. "RANGE,Port Voltage Range" "0: 1.71 V-3.6 V,1: 2.70 V-3.6 V"
group.long 0x80++0x7F
line.long 0x0 "PCR0,Pin Control 0"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR1,Pin Control 1"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR2,Pin Control 2"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR3,Pin Control 3"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0xC 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR4,Pin Control 4"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR5,Pin Control 5"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR6,Pin Control 6"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR7,Pin Control 7"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x1C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x20 "PCR8,Pin Control 8"
bitfld.long 0x20 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x20 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x20 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x20 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x20 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x20 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x24 "PCR9,Pin Control 9"
bitfld.long 0x24 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x24 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x24 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x24 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x24 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x24 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x28 "PCR10,Pin Control 10"
bitfld.long 0x28 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x28 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x28 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x28 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x28 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x28 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x28 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x28 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x28 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x2C "PCR11,Pin Control 11"
bitfld.long 0x2C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x2C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x2C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x2C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x2C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x2C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x2C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x2C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x30 "PCR12,Pin Control 12"
bitfld.long 0x30 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x30 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x30 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x30 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x30 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x30 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x30 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x30 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x30 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x34 "PCR13,Pin Control 13"
bitfld.long 0x34 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x34 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x34 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x34 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x34 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x34 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x34 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x34 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x34 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x38 "PCR14,Pin Control 14"
bitfld.long 0x38 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x38 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x38 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x38 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x38 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x38 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x38 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x38 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x3C "PCR15,Pin Control 15"
bitfld.long 0x3C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x3C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x3C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x3C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x3C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x3C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x3C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x3C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x3C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x40 "PCR16,Pin Control 16"
bitfld.long 0x40 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x40 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x40 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x40 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x40 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x40 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x40 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x40 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x40 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x44 "PCR17,Pin Control 17"
bitfld.long 0x44 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x44 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x44 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x44 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x44 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x44 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x44 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x44 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x44 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x48 "PCR18,Pin Control 18"
bitfld.long 0x48 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x48 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x48 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x48 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x48 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x48 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x48 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x48 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4C "PCR19,Pin Control 19"
bitfld.long 0x4C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x4C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x50 "PCR20,Pin Control 20"
bitfld.long 0x50 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x50 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x50 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x50 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x50 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x50 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x50 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x54 "PCR21,Pin Control 21"
bitfld.long 0x54 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x54 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x54 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x54 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x54 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x54 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x54 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x58 "PCR22,Pin Control 22"
bitfld.long 0x58 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x58 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x58 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x58 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x58 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x58 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x58 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x58 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x5C "PCR23,Pin Control 23"
bitfld.long 0x5C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x5C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x5C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x5C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x5C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x5C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x5C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x5C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x60 "PCR24,Pin Control 24"
bitfld.long 0x60 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x60 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x60 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x60 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x60 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x60 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x60 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x60 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x64 "PCR25,Pin Control 25"
bitfld.long 0x64 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x64 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x64 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x64 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x64 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x64 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x64 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x64 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x68 "PCR26,Pin Control 26"
bitfld.long 0x68 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x68 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x68 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x68 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x68 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x68 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x68 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x68 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x6C "PCR27,Pin Control 27"
bitfld.long 0x6C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x6C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x6C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x6C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x6C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x6C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x70 "PCR28,Pin Control 28"
bitfld.long 0x70 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x70 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x70 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x70 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x70 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x70 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x70 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x70 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x74 "PCR29,Pin Control 29"
bitfld.long 0x74 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x74 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x74 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x74 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x74 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x74 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x74 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x74 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x78 "PCR30,Pin Control 30"
bitfld.long 0x78 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x78 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x78 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x78 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x78 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x78 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x78 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x78 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x7C "PCR31,Pin Control 31"
bitfld.long 0x7C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x7C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x7C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x7C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x7C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x7C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
tree.end
tree "PORT3"
base ad:0x400BF000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x7
line.long 0x0 "GPCLR,Global Pin Control Low"
bitfld.long 0x0 31. "GPWE15,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 30. "GPWE14,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 29. "GPWE13,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 28. "GPWE12,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 27. "GPWE11,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 26. "GPWE10,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 25. "GPWE9,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 24. "GPWE8,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 23. "GPWE7,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 22. "GPWE6,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 21. "GPWE5,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 20. "GPWE4,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 19. "GPWE3,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 18. "GPWE2,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 17. "GPWE1,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 16. "GPWE0,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data"
line.long 0x4 "GPCHR,Global Pin Control High"
bitfld.long 0x4 31. "GPWE31,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 30. "GPWE30,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 29. "GPWE29,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 28. "GPWE28,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 27. "GPWE27,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 26. "GPWE26,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 25. "GPWE25,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 24. "GPWE24,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 23. "GPWE23,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 22. "GPWE22,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 21. "GPWE21,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 20. "GPWE20,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 19. "GPWE19,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 18. "GPWE18,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 17. "GPWE17,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 16. "GPWE16,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data"
group.long 0x20++0x3
line.long 0x0 "CONFIG,Configuration"
bitfld.long 0x0 0. "RANGE,Port Voltage Range" "0: 1.71 V-3.6 V,1: 2.70 V-3.6 V"
group.long 0x60++0x7
line.long 0x0 "CALIB0,Calibration 0"
hexmask.long.byte 0x0 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x0 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
line.long 0x4 "CALIB1,Calibration 1"
hexmask.long.byte 0x4 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x4 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
group.long 0x80++0x7F
line.long 0x0 "PCR0,Pin Control 0"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x0 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x0 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x0 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR1,Pin Control 1"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x4 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x4 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR2,Pin Control 2"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR3,Pin Control 3"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR4,Pin Control 4"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR5,Pin Control 5"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR6,Pin Control 6"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x18 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR7,Pin Control 7"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x1C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x20 "PCR8,Pin Control 8"
bitfld.long 0x20 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x20 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x20 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x20 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x20 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x20 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x20 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x24 "PCR9,Pin Control 9"
bitfld.long 0x24 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x24 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x24 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x24 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x24 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x24 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x24 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x28 "PCR10,Pin Control 10"
bitfld.long 0x28 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x28 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x28 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x28 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x28 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x28 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x28 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x28 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x28 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x2C "PCR11,Pin Control 11"
bitfld.long 0x2C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x2C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x2C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x2C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x2C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x2C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x2C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x2C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x30 "PCR12,Pin Control 12"
bitfld.long 0x30 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x30 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x30 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x30 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x30 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x30 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x30 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x30 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x30 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x34 "PCR13,Pin Control 13"
bitfld.long 0x34 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x34 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x34 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x34 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x34 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x34 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x34 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x34 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x34 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x38 "PCR14,Pin Control 14"
bitfld.long 0x38 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x38 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x38 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x38 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x38 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x38 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x38 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x38 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x38 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x3C "PCR15,Pin Control 15"
bitfld.long 0x3C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x3C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x3C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x3C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x3C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x3C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x3C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x3C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x3C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x40 "PCR16,Pin Control 16"
bitfld.long 0x40 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x40 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x40 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x40 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x40 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x40 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x40 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x40 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x40 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x44 "PCR17,Pin Control 17"
bitfld.long 0x44 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x44 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x44 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x44 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x44 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x44 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x44 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x44 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x44 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x48 "PCR18,Pin Control 18"
bitfld.long 0x48 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x48 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x48 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x48 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x48 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x48 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x48 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x48 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x48 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4C "PCR19,Pin Control 19"
bitfld.long 0x4C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x4C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x50 "PCR20,Pin Control 20"
bitfld.long 0x50 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x50 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x50 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x50 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x50 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x50 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x50 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x54 "PCR21,Pin Control 21"
bitfld.long 0x54 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x54 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x54 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x54 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x54 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x54 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x54 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x58 "PCR22,Pin Control 22"
bitfld.long 0x58 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x58 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x58 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x58 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x58 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x58 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x58 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x58 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x58 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x5C "PCR23,Pin Control 23"
bitfld.long 0x5C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x5C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x5C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x5C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x5C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x5C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x60 "PCR24,Pin Control 24"
bitfld.long 0x60 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x60 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x60 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x60 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x60 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x60 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x60 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x60 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x64 "PCR25,Pin Control 25"
bitfld.long 0x64 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x64 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x64 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x64 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x64 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x64 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x64 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x64 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x68 "PCR26,Pin Control 26"
bitfld.long 0x68 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x68 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x68 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x68 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x68 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x68 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x68 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x68 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x6C "PCR27,Pin Control 27"
bitfld.long 0x6C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x6C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x6C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x6C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x6C 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x6C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x6C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x6C 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x6C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x70 "PCR28,Pin Control 28"
bitfld.long 0x70 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x70 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x70 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x70 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x70 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x70 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x70 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x70 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x70 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x70 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x74 "PCR29,Pin Control 29"
bitfld.long 0x74 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x74 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x74 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x74 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x74 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x74 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x74 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x74 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x74 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x78 "PCR30,Pin Control 30"
bitfld.long 0x78 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x78 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x78 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x78 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x78 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x78 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x78 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x78 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x78 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x7C "PCR31,Pin Control 31"
bitfld.long 0x7C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x7C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x7C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x7C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x7C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x7C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x7C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x7C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
tree.end
endif
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*")||cpuis("MC?A144*"))
tree "PORT1"
base ad:0x400BD000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x7
line.long 0x0 "GPCLR,Global Pin Control Low"
bitfld.long 0x0 31. "GPWE15,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 30. "GPWE14,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 29. "GPWE13,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 28. "GPWE12,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 27. "GPWE11,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 26. "GPWE10,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 25. "GPWE9,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 24. "GPWE8,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 23. "GPWE7,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 22. "GPWE6,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 21. "GPWE5,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 20. "GPWE4,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 19. "GPWE3,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 18. "GPWE2,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 17. "GPWE1,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 16. "GPWE0,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data"
line.long 0x4 "GPCHR,Global Pin Control High"
bitfld.long 0x4 31. "GPWE31,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 30. "GPWE30,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 29. "GPWE29,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 28. "GPWE28,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 27. "GPWE27,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 26. "GPWE26,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 25. "GPWE25,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 24. "GPWE24,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 23. "GPWE23,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 22. "GPWE22,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 21. "GPWE21,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 20. "GPWE20,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 19. "GPWE19,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 18. "GPWE18,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 17. "GPWE17,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 16. "GPWE16,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data"
group.long 0x20++0x3
line.long 0x0 "CONFIG,Configuration"
bitfld.long 0x0 0. "RANGE,Port Voltage Range" "0: 1.71 V-3.6 V,1: 2.70 V-3.6 V"
group.long 0x60++0x7
line.long 0x0 "CALIB0,Calibration 0"
hexmask.long.byte 0x0 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x0 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
line.long 0x4 "CALIB1,Calibration 1"
hexmask.long.byte 0x4 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x4 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
group.long 0x80++0x37
line.long 0x0 "PCR0,Pin Control 0"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
bitfld.long 0x0 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x0 8.--11. 1. "MUX,Pin Multiplex Control"
endif
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x0 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR1,Pin Control 1"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x4 8.--11. 1. "MUX,Pin Multiplex Control"
endif
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR2,Pin Control 2"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x8 8.--11. 1. "MUX,Pin Multiplex Control"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x8 8.--11. 1. "MUX,Pin Multiplex Control"
endif
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR3,Pin Control 3"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
bitfld.long 0xC 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0xC 8.--11. 1. "MUX,Pin Multiplex Control"
endif
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR4,Pin Control 4"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x10 8.--11. 1. "MUX,Pin Multiplex Control"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x10 8.--11. 1. "MUX,Pin Multiplex Control"
endif
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR5,Pin Control 5"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x14 8.--11. 1. "MUX,Pin Multiplex Control"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x14 8.--11. 1. "MUX,Pin Multiplex Control"
endif
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR6,Pin Control 6"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x18 8.--11. 1. "MUX,Pin Multiplex Control"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x18 8.--11. 1. "MUX,Pin Multiplex Control"
endif
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR7,Pin Control 7"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x1C 8.--11. 1. "MUX,Pin Multiplex Control"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x1C 8.--11. 1. "MUX,Pin Multiplex Control"
endif
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x20 "PCR8,Pin Control 8"
bitfld.long 0x20 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x20 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x20 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x20 8.--11. 1. "MUX,Pin Multiplex Control"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x20 8.--11. 1. "MUX,Pin Multiplex Control"
endif
bitfld.long 0x20 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
newline
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x20 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x20 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x20 2. "PV,Pull Value" "0: Low,1: High"
bitfld.long 0x20 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x20 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x24 "PCR9,Pin Control 9"
bitfld.long 0x24 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x24 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x24 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x24 8.--11. 1. "MUX,Pin Multiplex Control"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x24 8.--11. 1. "MUX,Pin Multiplex Control"
endif
bitfld.long 0x24 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
newline
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x24 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x24 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x24 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x24 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x28 "PCR10,Pin Control 10"
bitfld.long 0x28 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x28 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x28 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x28 8.--11. 1. "MUX,Pin Multiplex Control"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x28 8.--11. 1. "MUX,Pin Multiplex Control"
endif
bitfld.long 0x28 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x28 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x28 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x28 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x28 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x2C "PCR11,Pin Control 11"
bitfld.long 0x2C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x2C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x2C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x2C 8.--11. 1. "MUX,Pin Multiplex Control"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x2C 8.--11. 1. "MUX,Pin Multiplex Control"
endif
bitfld.long 0x2C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x2C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x2C 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x2C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x30 "PCR12,Pin Control 12"
bitfld.long 0x30 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x30 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x30 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x30 8.--11. 1. "MUX,Pin Multiplex Control"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x30 8.--11. 1. "MUX,Pin Multiplex Control"
endif
bitfld.long 0x30 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x30 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x30 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x30 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x30 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x34 "PCR13,Pin Control 13"
bitfld.long 0x34 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x34 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x34 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x34 8.--11. 1. "MUX,Pin Multiplex Control"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x34 8.--11. 1. "MUX,Pin Multiplex Control"
endif
bitfld.long 0x34 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x34 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x34 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x34 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x34 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
sif (cpuis("MC?A144*"))
group.long 0xB8++0x3B
line.long 0x0 "PCR14,Pin Control 14"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x0 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR15,Pin Control 15"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR16,Pin Control 16"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR17,Pin Control 17"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR18,Pin Control 18"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR19,Pin Control 19"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR20,Pin Control 20"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR21,Pin Control 21"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x20 "PCR22,Pin Control 22"
bitfld.long 0x20 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x20 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x20 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x20 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x20 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x20 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x24 "PCR23,Pin Control 23"
bitfld.long 0x24 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x24 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x24 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x24 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x24 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x24 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x28 "PCR24,Pin Control 24"
bitfld.long 0x28 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x28 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x28 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x28 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x28 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x28 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x28 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x28 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x2C "PCR25,Pin Control 25"
bitfld.long 0x2C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x2C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x2C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x2C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x2C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x30 "PCR26,Pin Control 26"
bitfld.long 0x30 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x30 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x30 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x30 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x30 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x30 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x30 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x30 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x34 "PCR27,Pin Control 27"
bitfld.long 0x34 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x34 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x34 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x34 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x34 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x34 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x34 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x34 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x38 "PCR28,Pin Control 28"
bitfld.long 0x38 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x38 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x38 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x38 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x38 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x38 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x38 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x38 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
endif
group.long 0xF4++0xB
line.long 0x0 "PCR29,Pin Control 29"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 8.--9. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific)"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 2. "PV,Pull Value" "0: Low,1: High"
newline
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR30,Pin Control 30"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x4 8.--11. 1. "MUX,Pin Multiplex Control"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x4 8.--11. 1. "MUX,Pin Multiplex Control"
endif
bitfld.long 0x4 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
newline
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 2. "PV,Pull Value" "0: Low,1: High"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR31,Pin Control 31"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x8 8.--11. 1. "MUX,Pin Multiplex Control"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x8 8.--11. 1. "MUX,Pin Multiplex Control"
endif
bitfld.long 0x8 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
newline
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x8 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
tree.end
endif
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*")||cpuis("MC?A144*"))
tree "PORT2"
base ad:0x400BE000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x7
line.long 0x0 "GPCLR,Global Pin Control Low"
bitfld.long 0x0 31. "GPWE15,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 30. "GPWE14,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 29. "GPWE13,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 28. "GPWE12,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 27. "GPWE11,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 26. "GPWE10,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 25. "GPWE9,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 24. "GPWE8,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 23. "GPWE7,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 22. "GPWE6,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 21. "GPWE5,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 20. "GPWE4,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 19. "GPWE3,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 18. "GPWE2,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 17. "GPWE1,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 16. "GPWE0,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data"
line.long 0x4 "GPCHR,Global Pin Control High"
bitfld.long 0x4 31. "GPWE31,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 30. "GPWE30,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 29. "GPWE29,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 28. "GPWE28,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 27. "GPWE27,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 26. "GPWE26,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 25. "GPWE25,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 24. "GPWE24,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 23. "GPWE23,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 22. "GPWE22,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 21. "GPWE21,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 20. "GPWE20,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 19. "GPWE19,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 18. "GPWE18,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 17. "GPWE17,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 16. "GPWE16,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data"
group.long 0x20++0x3
line.long 0x0 "CONFIG,Configuration"
bitfld.long 0x0 0. "RANGE,Port Voltage Range" "0: 1.71 V-3.6 V,1: 2.70 V-3.6 V"
group.long 0x80++0x1F
line.long 0x0 "PCR0,Pin Control 0"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR1,Pin Control 1"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR2,Pin Control 2"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR3,Pin Control 3"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0xC 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR4,Pin Control 4"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR5,Pin Control 5"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR6,Pin Control 6"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR7,Pin Control 7"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
bitfld.long 0x1C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x1C 8.--11. 1. "MUX,Pin Multiplex Control"
endif
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
sif (cpuis("MC?A144*"))
group.long 0xA0++0xF
line.long 0x0 "PCR8,Pin Control 8"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR9,Pin Control 9"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR10,Pin Control 10"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x8 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR11,Pin Control 11"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0xC 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
group.long 0xB8++0x7
line.long 0x0 "PCR14,Pin Control 14"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR15,Pin Control 15"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
group.long 0xC8++0x7
line.long 0x0 "PCR18,Pin Control 18"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR19,Pin Control 19"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
endif
group.long 0xB0++0x7
line.long 0x0 "PCR12,Pin Control 12"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
bitfld.long 0x0 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x0 8.--11. 1. "MUX,Pin Multiplex Control"
endif
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR13,Pin Control 13"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x4 8.--11. 1. "MUX,Pin Multiplex Control"
endif
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
group.long 0xC0++0x7
line.long 0x0 "PCR16,Pin Control 16"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR17,Pin Control 17"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
group.long 0xD0++0x7
line.long 0x0 "PCR20,Pin Control 20"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR21,Pin Control 21"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
sif (cpuis("MC?A144*"))
group.long 0xD8++0x27
line.long 0x0 "PCR22,Pin Control 22"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR23,Pin Control 23"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR24,Pin Control 24"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR25,Pin Control 25"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR26,Pin Control 26"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR27,Pin Control 27"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR28,Pin Control 28"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR29,Pin Control 29"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x20 "PCR30,Pin Control 30"
bitfld.long 0x20 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x20 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x20 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x20 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x20 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x20 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x24 "PCR31,Pin Control 31"
bitfld.long 0x24 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x24 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x24 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x24 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x24 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x24 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
endif
tree.end
endif
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*")||cpuis("MC?A144*"))
tree "PORT3"
base ad:0x400BF000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x7
line.long 0x0 "GPCLR,Global Pin Control Low"
bitfld.long 0x0 31. "GPWE15,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 30. "GPWE14,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 29. "GPWE13,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 28. "GPWE12,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 27. "GPWE11,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 26. "GPWE10,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 25. "GPWE9,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 24. "GPWE8,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 23. "GPWE7,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 22. "GPWE6,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 21. "GPWE5,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 20. "GPWE4,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 19. "GPWE3,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 18. "GPWE2,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 17. "GPWE1,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 16. "GPWE0,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data"
line.long 0x4 "GPCHR,Global Pin Control High"
bitfld.long 0x4 31. "GPWE31,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 30. "GPWE30,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 29. "GPWE29,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 28. "GPWE28,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 27. "GPWE27,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 26. "GPWE26,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 25. "GPWE25,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 24. "GPWE24,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 23. "GPWE23,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 22. "GPWE22,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 21. "GPWE21,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 20. "GPWE20,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 19. "GPWE19,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 18. "GPWE18,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 17. "GPWE17,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 16. "GPWE16,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data"
group.long 0x20++0x3
line.long 0x0 "CONFIG,Configuration"
bitfld.long 0x0 0. "RANGE,Port Voltage Range" "0: 1.71 V-3.6 V,1: 2.70 V-3.6 V"
group.long 0x60++0x7
line.long 0x0 "CALIB0,Calibration 0"
hexmask.long.byte 0x0 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x0 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
line.long 0x4 "CALIB1,Calibration 1"
hexmask.long.byte 0x4 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x4 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
group.long 0x80++0xB
line.long 0x0 "PCR0,Pin Control 0"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x0 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x0 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x0 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR1,Pin Control 1"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x4 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x4 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4 4. "PFE,Passive Filter Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR2,Pin Control 2"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
bitfld.long 0x8 8.--9. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific)"
endif
sif (cpuis("MC?A144*"))
bitfld.long 0x8 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
endif
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
sif (cpuis("MC?A144*"))
group.long 0x8C++0xB
line.long 0x0 "PCR3,Pin Control 3"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR4,Pin Control 4"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR5,Pin Control 5"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
group.long 0xC0++0x2B
line.long 0x0 "PCR16,Pin Control 16"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x0 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR17,Pin Control 17"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR18,Pin Control 18"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x8 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR19,Pin Control 19"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0xC 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR20,Pin Control 20"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x10 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR21,Pin Control 21"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x14 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR22,Pin Control 22"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x18 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
newline
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR23,Pin Control 23"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x20 "PCR24,Pin Control 24"
bitfld.long 0x20 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x20 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x20 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x20 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x20 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x20 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x24 "PCR25,Pin Control 25"
bitfld.long 0x24 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x24 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x24 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x24 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x24 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x24 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x28 "PCR26,Pin Control 26"
bitfld.long 0x28 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x28 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
newline
bitfld.long 0x28 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
bitfld.long 0x28 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x28 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x28 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x28 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x28 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
endif
group.long 0x98++0x27
line.long 0x0 "PCR6,Pin Control 6"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x0 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR7,Pin Control 7"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x4 8.--11. 1. "MUX,Pin Multiplex Control"
endif
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR8,Pin Control 8"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x8 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR9,Pin Control 9"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0xC 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR10,Pin Control 10"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x10 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR11,Pin Control 11"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x14 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR12,Pin Control 12"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x18 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR13,Pin Control 13"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x1C 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x20 "PCR14,Pin Control 14"
bitfld.long 0x20 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x20 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x20 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x20 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x20 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x20 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x20 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x24 "PCR15,Pin Control 15"
bitfld.long 0x24 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x24 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x24 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
hexmask.long.byte 0x24 8.--11. 1. "MUX,Pin Multiplex Control"
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x24 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x24 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x24 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
group.long 0xEC++0x13
line.long 0x0 "PCR27,Pin Control 27"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x0 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR28,Pin Control 28"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
bitfld.long 0x4 7. "DSE1,Drive Strength Enable" "0: Normal,1: Double"
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR29,Pin Control 29"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
bitfld.long 0x8 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x8 8.--11. 1. "MUX,Pin Multiplex Control"
endif
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR30,Pin Control 30"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
bitfld.long 0xC 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0xC 8.--11. 1. "MUX,Pin Multiplex Control"
endif
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR31,Pin Control 31"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
bitfld.long 0x10 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),7: Alternative 7 (chip-specific)"
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x10 8.--11. 1. "MUX,Pin Multiplex Control"
endif
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
newline
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
tree.end
endif
sif (cpuis("MC?A144*"))
tree "PORT4"
base ad:0x400C0000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x7
line.long 0x0 "GPCLR,Global Pin Control Low"
bitfld.long 0x0 31. "GPWE15,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 30. "GPWE14,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 29. "GPWE13,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 28. "GPWE12,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 27. "GPWE11,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 26. "GPWE10,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 25. "GPWE9,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 24. "GPWE8,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 23. "GPWE7,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 22. "GPWE6,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 21. "GPWE5,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 20. "GPWE4,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 19. "GPWE3,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 18. "GPWE2,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 17. "GPWE1,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 16. "GPWE0,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data"
line.long 0x4 "GPCHR,Global Pin Control High"
bitfld.long 0x4 31. "GPWE31,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 30. "GPWE30,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 29. "GPWE29,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 28. "GPWE28,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 27. "GPWE27,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 26. "GPWE26,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 25. "GPWE25,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 24. "GPWE24,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 23. "GPWE23,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 22. "GPWE22,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 21. "GPWE21,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 20. "GPWE20,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 19. "GPWE19,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 18. "GPWE18,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 17. "GPWE17,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 16. "GPWE16,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data"
group.long 0x20++0x3
line.long 0x0 "CONFIG,Configuration"
bitfld.long 0x0 0. "RANGE,Port Voltage Range" "0: 1.71 V-3.6 V,1: 2.70 V-3.6 V"
group.long 0x60++0x7
line.long 0x0 "CALIB0,Calibration 0"
hexmask.long.byte 0x0 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x0 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
line.long 0x4 "CALIB1,Calibration 1"
hexmask.long.byte 0x4 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x4 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
group.long 0x80++0x7F
line.long 0x0 "PCR0,Pin Control 0"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR1,Pin Control 1"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR2,Pin Control 2"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),?"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR3,Pin Control 3"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),?"
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR4,Pin Control 4"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),?"
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR5,Pin Control 5"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),?"
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR6,Pin Control 6"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),?"
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR7,Pin Control 7"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),?"
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x20 "PCR8,Pin Control 8"
bitfld.long 0x20 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x20 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x20 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x20 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x20 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x20 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x24 "PCR9,Pin Control 9"
bitfld.long 0x24 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x24 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x24 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x24 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x24 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x24 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x28 "PCR10,Pin Control 10"
bitfld.long 0x28 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x28 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x28 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x28 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x28 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x28 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x28 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x28 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x2C "PCR11,Pin Control 11"
bitfld.long 0x2C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x2C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x2C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x2C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x2C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x2C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x30 "PCR12,Pin Control 12"
bitfld.long 0x30 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x30 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x30 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x30 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x30 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x30 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x30 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x30 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x34 "PCR13,Pin Control 13"
bitfld.long 0x34 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x34 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x34 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x34 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x34 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x34 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x34 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x34 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x38 "PCR14,Pin Control 14"
bitfld.long 0x38 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x38 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x38 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x38 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x38 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x38 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x38 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x38 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x3C "PCR15,Pin Control 15"
bitfld.long 0x3C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x3C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x3C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x3C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x3C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x3C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x3C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x3C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x40 "PCR16,Pin Control 16"
bitfld.long 0x40 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x40 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x40 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x40 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x40 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x40 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x40 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x40 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x44 "PCR17,Pin Control 17"
bitfld.long 0x44 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x44 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x44 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x44 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x44 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x44 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x44 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x44 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x48 "PCR18,Pin Control 18"
bitfld.long 0x48 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x48 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x48 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x48 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x48 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x48 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x48 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x48 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4C "PCR19,Pin Control 19"
bitfld.long 0x4C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x4C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x50 "PCR20,Pin Control 20"
bitfld.long 0x50 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x50 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x50 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x50 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x50 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x50 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x50 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x54 "PCR21,Pin Control 21"
bitfld.long 0x54 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x54 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x54 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x54 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x54 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x54 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x54 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x58 "PCR22,Pin Control 22"
bitfld.long 0x58 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x58 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x58 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x58 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x58 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x58 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x58 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x58 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x5C "PCR23,Pin Control 23"
bitfld.long 0x5C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x5C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x5C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x5C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x5C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x5C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x60 "PCR24,Pin Control 24"
bitfld.long 0x60 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x60 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x60 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x60 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x60 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x60 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x60 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x60 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x64 "PCR25,Pin Control 25"
bitfld.long 0x64 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x64 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x64 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x64 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x64 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x64 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x64 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x64 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x68 "PCR26,Pin Control 26"
bitfld.long 0x68 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x68 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x68 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x68 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x68 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x68 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x68 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x68 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x6C "PCR27,Pin Control 27"
bitfld.long 0x6C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x6C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x6C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x6C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x6C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x6C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x70 "PCR28,Pin Control 28"
bitfld.long 0x70 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x70 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x70 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x70 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x70 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x70 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x70 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x70 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x74 "PCR29,Pin Control 29"
bitfld.long 0x74 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x74 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x74 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x74 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x74 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x74 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x74 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x74 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x78 "PCR30,Pin Control 30"
bitfld.long 0x78 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x78 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x78 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x78 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x78 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x78 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x78 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x78 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x7C "PCR31,Pin Control 31"
bitfld.long 0x7C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x7C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x7C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x7C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x7C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x7C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
tree.end
endif
sif (cpuis("MC?A145*"))
tree "PORT4"
base ad:0x400C0000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x7
line.long 0x0 "GPCLR,Global Pin Control Low"
bitfld.long 0x0 31. "GPWE15,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 30. "GPWE14,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 29. "GPWE13,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 28. "GPWE12,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 27. "GPWE11,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 26. "GPWE10,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 25. "GPWE9,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 24. "GPWE8,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 23. "GPWE7,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 22. "GPWE6,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 21. "GPWE5,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 20. "GPWE4,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 19. "GPWE3,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 18. "GPWE2,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 17. "GPWE1,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 16. "GPWE0,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data"
line.long 0x4 "GPCHR,Global Pin Control High"
bitfld.long 0x4 31. "GPWE31,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 30. "GPWE30,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 29. "GPWE29,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 28. "GPWE28,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 27. "GPWE27,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 26. "GPWE26,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 25. "GPWE25,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 24. "GPWE24,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 23. "GPWE23,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 22. "GPWE22,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 21. "GPWE21,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 20. "GPWE20,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 19. "GPWE19,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 18. "GPWE18,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 17. "GPWE17,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 16. "GPWE16,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data"
group.long 0x20++0x3
line.long 0x0 "CONFIG,Configuration"
bitfld.long 0x0 0. "RANGE,Port Voltage Range" "0: 1.71 V-3.6 V,1: 2.70 V-3.6 V"
group.long 0x60++0x7
line.long 0x0 "CALIB0,Calibration 0"
hexmask.long.byte 0x0 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x0 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
line.long 0x4 "CALIB1,Calibration 1"
hexmask.long.byte 0x4 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x4 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
group.long 0x80++0x7F
line.long 0x0 "PCR0,Pin Control 0"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR1,Pin Control 1"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR2,Pin Control 2"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),?"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR3,Pin Control 3"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),?"
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR4,Pin Control 4"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),?"
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR5,Pin Control 5"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),?"
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR6,Pin Control 6"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),?"
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR7,Pin Control 7"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),?"
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x20 "PCR8,Pin Control 8"
bitfld.long 0x20 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x20 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x20 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x20 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x20 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x20 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x24 "PCR9,Pin Control 9"
bitfld.long 0x24 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x24 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x24 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x24 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x24 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x24 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x28 "PCR10,Pin Control 10"
bitfld.long 0x28 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x28 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x28 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x28 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x28 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x28 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x28 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x28 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x2C "PCR11,Pin Control 11"
bitfld.long 0x2C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x2C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x2C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x2C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x2C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x2C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x30 "PCR12,Pin Control 12"
bitfld.long 0x30 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x30 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x30 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x30 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x30 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x30 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x30 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x30 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x34 "PCR13,Pin Control 13"
bitfld.long 0x34 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x34 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x34 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x34 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x34 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x34 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x34 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x34 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x38 "PCR14,Pin Control 14"
bitfld.long 0x38 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x38 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x38 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x38 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x38 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x38 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x38 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x38 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x3C "PCR15,Pin Control 15"
bitfld.long 0x3C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x3C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x3C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x3C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x3C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x3C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x3C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x3C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x40 "PCR16,Pin Control 16"
bitfld.long 0x40 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x40 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x40 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x40 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x40 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x40 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x40 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x40 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x44 "PCR17,Pin Control 17"
bitfld.long 0x44 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x44 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x44 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x44 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x44 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x44 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x44 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x44 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x48 "PCR18,Pin Control 18"
bitfld.long 0x48 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x48 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x48 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x48 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x48 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x48 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x48 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x48 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4C "PCR19,Pin Control 19"
bitfld.long 0x4C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x4C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x50 "PCR20,Pin Control 20"
bitfld.long 0x50 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x50 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x50 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x50 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x50 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x50 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x50 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x54 "PCR21,Pin Control 21"
bitfld.long 0x54 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x54 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x54 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x54 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x54 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x54 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x54 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x58 "PCR22,Pin Control 22"
bitfld.long 0x58 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x58 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x58 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x58 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x58 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x58 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x58 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x58 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x5C "PCR23,Pin Control 23"
bitfld.long 0x5C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x5C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x5C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x5C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x5C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x5C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x60 "PCR24,Pin Control 24"
bitfld.long 0x60 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x60 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x60 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x60 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x60 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x60 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x60 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x60 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x64 "PCR25,Pin Control 25"
bitfld.long 0x64 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x64 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x64 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x64 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x64 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x64 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x64 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x64 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x68 "PCR26,Pin Control 26"
bitfld.long 0x68 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x68 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x68 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x68 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x68 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x68 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x68 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x68 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x6C "PCR27,Pin Control 27"
bitfld.long 0x6C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x6C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x6C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x6C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x6C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x6C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x70 "PCR28,Pin Control 28"
bitfld.long 0x70 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x70 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x70 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x70 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x70 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x70 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x70 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x70 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x74 "PCR29,Pin Control 29"
bitfld.long 0x74 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x74 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x74 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x74 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x74 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x74 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x74 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x74 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x78 "PCR30,Pin Control 30"
bitfld.long 0x78 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x78 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x78 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x78 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x78 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x78 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x78 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x78 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x7C "PCR31,Pin Control 31"
bitfld.long 0x7C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x7C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x7C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x7C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x7C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x7C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
tree.end
endif
sif (cpuis("MC?A146*"))
tree "PORT4"
base ad:0x400C0000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x7
line.long 0x0 "GPCLR,Global Pin Control Low"
bitfld.long 0x0 31. "GPWE15,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 30. "GPWE14,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 29. "GPWE13,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 28. "GPWE12,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 27. "GPWE11,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 26. "GPWE10,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 25. "GPWE9,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 24. "GPWE8,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 23. "GPWE7,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 22. "GPWE6,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 21. "GPWE5,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 20. "GPWE4,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 19. "GPWE3,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 18. "GPWE2,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 17. "GPWE1,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 16. "GPWE0,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data"
line.long 0x4 "GPCHR,Global Pin Control High"
bitfld.long 0x4 31. "GPWE31,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 30. "GPWE30,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 29. "GPWE29,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 28. "GPWE28,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 27. "GPWE27,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 26. "GPWE26,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 25. "GPWE25,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 24. "GPWE24,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 23. "GPWE23,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 22. "GPWE22,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 21. "GPWE21,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 20. "GPWE20,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 19. "GPWE19,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 18. "GPWE18,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 17. "GPWE17,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 16. "GPWE16,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data"
group.long 0x20++0x3
line.long 0x0 "CONFIG,Configuration"
bitfld.long 0x0 0. "RANGE,Port Voltage Range" "0: 1.71 V-3.6 V,1: 2.70 V-3.6 V"
group.long 0x60++0x7
line.long 0x0 "CALIB0,Calibration 0"
hexmask.long.byte 0x0 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x0 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
line.long 0x4 "CALIB1,Calibration 1"
hexmask.long.byte 0x4 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x4 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
group.long 0x80++0x7F
line.long 0x0 "PCR0,Pin Control 0"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR1,Pin Control 1"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR2,Pin Control 2"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),?"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR3,Pin Control 3"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),?"
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR4,Pin Control 4"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),?"
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR5,Pin Control 5"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),?"
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR6,Pin Control 6"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),?"
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR7,Pin Control 7"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),?"
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x20 "PCR8,Pin Control 8"
bitfld.long 0x20 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x20 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x20 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x20 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x20 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x20 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x24 "PCR9,Pin Control 9"
bitfld.long 0x24 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x24 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x24 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x24 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x24 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x24 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x28 "PCR10,Pin Control 10"
bitfld.long 0x28 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x28 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x28 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x28 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x28 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x28 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x28 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x28 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x2C "PCR11,Pin Control 11"
bitfld.long 0x2C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x2C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x2C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x2C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x2C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x2C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x30 "PCR12,Pin Control 12"
bitfld.long 0x30 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x30 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x30 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x30 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x30 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x30 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x30 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x30 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x34 "PCR13,Pin Control 13"
bitfld.long 0x34 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x34 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x34 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x34 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x34 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x34 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x34 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x34 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x38 "PCR14,Pin Control 14"
bitfld.long 0x38 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x38 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x38 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x38 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x38 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x38 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x38 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x38 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x3C "PCR15,Pin Control 15"
bitfld.long 0x3C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x3C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x3C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x3C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x3C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x3C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x3C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x3C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x40 "PCR16,Pin Control 16"
bitfld.long 0x40 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x40 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x40 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x40 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x40 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x40 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x40 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x40 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x44 "PCR17,Pin Control 17"
bitfld.long 0x44 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x44 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x44 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x44 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x44 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x44 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x44 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x44 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x48 "PCR18,Pin Control 18"
bitfld.long 0x48 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x48 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x48 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x48 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x48 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x48 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x48 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x48 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4C "PCR19,Pin Control 19"
bitfld.long 0x4C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x4C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x50 "PCR20,Pin Control 20"
bitfld.long 0x50 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x50 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x50 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x50 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x50 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x50 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x50 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x54 "PCR21,Pin Control 21"
bitfld.long 0x54 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x54 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x54 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x54 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x54 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x54 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x54 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x58 "PCR22,Pin Control 22"
bitfld.long 0x58 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x58 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x58 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x58 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x58 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x58 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x58 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x58 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x5C "PCR23,Pin Control 23"
bitfld.long 0x5C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x5C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x5C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x5C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x5C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x5C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x60 "PCR24,Pin Control 24"
bitfld.long 0x60 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x60 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x60 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x60 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x60 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x60 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x60 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x60 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x64 "PCR25,Pin Control 25"
bitfld.long 0x64 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x64 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x64 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x64 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x64 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x64 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x64 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x64 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x68 "PCR26,Pin Control 26"
bitfld.long 0x68 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x68 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x68 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x68 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x68 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x68 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x68 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x68 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x6C "PCR27,Pin Control 27"
bitfld.long 0x6C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x6C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x6C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x6C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x6C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x6C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x70 "PCR28,Pin Control 28"
bitfld.long 0x70 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x70 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x70 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x70 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x70 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x70 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x70 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x70 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x74 "PCR29,Pin Control 29"
bitfld.long 0x74 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x74 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x74 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x74 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x74 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x74 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x74 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x74 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x78 "PCR30,Pin Control 30"
bitfld.long 0x78 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x78 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x78 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x78 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x78 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x78 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x78 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x78 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x7C "PCR31,Pin Control 31"
bitfld.long 0x7C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x7C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x7C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x7C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x7C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x7C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
tree.end
endif
sif (cpuis("MC?A154*"))
tree "PORT4"
base ad:0x400C0000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x7
line.long 0x0 "GPCLR,Global Pin Control Low"
bitfld.long 0x0 31. "GPWE15,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 30. "GPWE14,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 29. "GPWE13,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 28. "GPWE12,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 27. "GPWE11,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 26. "GPWE10,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 25. "GPWE9,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 24. "GPWE8,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 23. "GPWE7,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 22. "GPWE6,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 21. "GPWE5,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 20. "GPWE4,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 19. "GPWE3,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 18. "GPWE2,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 17. "GPWE1,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 16. "GPWE0,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data"
line.long 0x4 "GPCHR,Global Pin Control High"
bitfld.long 0x4 31. "GPWE31,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 30. "GPWE30,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 29. "GPWE29,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 28. "GPWE28,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 27. "GPWE27,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 26. "GPWE26,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 25. "GPWE25,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 24. "GPWE24,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 23. "GPWE23,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 22. "GPWE22,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 21. "GPWE21,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 20. "GPWE20,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 19. "GPWE19,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 18. "GPWE18,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 17. "GPWE17,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 16. "GPWE16,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data"
group.long 0x20++0x3
line.long 0x0 "CONFIG,Configuration"
bitfld.long 0x0 0. "RANGE,Port Voltage Range" "0: 1.71 V-3.6 V,1: 2.70 V-3.6 V"
group.long 0x60++0x7
line.long 0x0 "CALIB0,Calibration 0"
hexmask.long.byte 0x0 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x0 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
line.long 0x4 "CALIB1,Calibration 1"
hexmask.long.byte 0x4 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x4 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
group.long 0x80++0x7F
line.long 0x0 "PCR0,Pin Control 0"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR1,Pin Control 1"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR2,Pin Control 2"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),?"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR3,Pin Control 3"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),?"
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR4,Pin Control 4"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),?"
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR5,Pin Control 5"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),?"
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR6,Pin Control 6"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),?"
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR7,Pin Control 7"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),?"
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x20 "PCR8,Pin Control 8"
bitfld.long 0x20 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x20 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x20 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x20 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x20 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x20 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x24 "PCR9,Pin Control 9"
bitfld.long 0x24 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x24 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x24 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x24 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x24 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x24 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x28 "PCR10,Pin Control 10"
bitfld.long 0x28 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x28 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x28 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x28 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x28 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x28 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x28 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x28 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x2C "PCR11,Pin Control 11"
bitfld.long 0x2C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x2C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x2C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x2C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x2C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x2C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x30 "PCR12,Pin Control 12"
bitfld.long 0x30 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x30 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x30 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x30 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x30 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x30 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x30 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x30 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x34 "PCR13,Pin Control 13"
bitfld.long 0x34 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x34 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x34 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x34 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x34 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x34 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x34 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x34 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x38 "PCR14,Pin Control 14"
bitfld.long 0x38 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x38 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x38 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x38 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x38 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x38 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x38 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x38 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x3C "PCR15,Pin Control 15"
bitfld.long 0x3C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x3C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x3C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x3C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x3C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x3C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x3C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x3C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x40 "PCR16,Pin Control 16"
bitfld.long 0x40 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x40 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x40 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x40 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x40 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x40 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x40 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x40 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x44 "PCR17,Pin Control 17"
bitfld.long 0x44 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x44 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x44 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x44 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x44 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x44 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x44 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x44 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x48 "PCR18,Pin Control 18"
bitfld.long 0x48 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x48 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x48 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x48 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x48 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x48 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x48 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x48 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4C "PCR19,Pin Control 19"
bitfld.long 0x4C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x4C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x50 "PCR20,Pin Control 20"
bitfld.long 0x50 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x50 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x50 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x50 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x50 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x50 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x50 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x54 "PCR21,Pin Control 21"
bitfld.long 0x54 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x54 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x54 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x54 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x54 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x54 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x54 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x58 "PCR22,Pin Control 22"
bitfld.long 0x58 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x58 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x58 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x58 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x58 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x58 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x58 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x58 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x5C "PCR23,Pin Control 23"
bitfld.long 0x5C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x5C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x5C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x5C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x5C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x5C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x60 "PCR24,Pin Control 24"
bitfld.long 0x60 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x60 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x60 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x60 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x60 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x60 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x60 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x60 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x64 "PCR25,Pin Control 25"
bitfld.long 0x64 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x64 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x64 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x64 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x64 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x64 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x64 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x64 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x68 "PCR26,Pin Control 26"
bitfld.long 0x68 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x68 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x68 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x68 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x68 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x68 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x68 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x68 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x6C "PCR27,Pin Control 27"
bitfld.long 0x6C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x6C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x6C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x6C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x6C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x6C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x70 "PCR28,Pin Control 28"
bitfld.long 0x70 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x70 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x70 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x70 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x70 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x70 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x70 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x70 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x74 "PCR29,Pin Control 29"
bitfld.long 0x74 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x74 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x74 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x74 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x74 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x74 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x74 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x74 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x78 "PCR30,Pin Control 30"
bitfld.long 0x78 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x78 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x78 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x78 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x78 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x78 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x78 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x78 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x7C "PCR31,Pin Control 31"
bitfld.long 0x7C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x7C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x7C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x7C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x7C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x7C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
tree.end
endif
sif (cpuis("MC?A155*"))
tree "PORT4"
base ad:0x400C0000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x7
line.long 0x0 "GPCLR,Global Pin Control Low"
bitfld.long 0x0 31. "GPWE15,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 30. "GPWE14,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 29. "GPWE13,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 28. "GPWE12,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 27. "GPWE11,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 26. "GPWE10,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 25. "GPWE9,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 24. "GPWE8,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 23. "GPWE7,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 22. "GPWE6,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 21. "GPWE5,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 20. "GPWE4,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 19. "GPWE3,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 18. "GPWE2,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 17. "GPWE1,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 16. "GPWE0,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data"
line.long 0x4 "GPCHR,Global Pin Control High"
bitfld.long 0x4 31. "GPWE31,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 30. "GPWE30,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 29. "GPWE29,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 28. "GPWE28,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 27. "GPWE27,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 26. "GPWE26,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 25. "GPWE25,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 24. "GPWE24,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 23. "GPWE23,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 22. "GPWE22,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 21. "GPWE21,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 20. "GPWE20,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 19. "GPWE19,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 18. "GPWE18,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 17. "GPWE17,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 16. "GPWE16,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data"
group.long 0x20++0x3
line.long 0x0 "CONFIG,Configuration"
bitfld.long 0x0 0. "RANGE,Port Voltage Range" "0: 1.71 V-3.6 V,1: 2.70 V-3.6 V"
group.long 0x60++0x7
line.long 0x0 "CALIB0,Calibration 0"
hexmask.long.byte 0x0 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x0 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
line.long 0x4 "CALIB1,Calibration 1"
hexmask.long.byte 0x4 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x4 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
group.long 0x80++0x7F
line.long 0x0 "PCR0,Pin Control 0"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR1,Pin Control 1"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR2,Pin Control 2"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),?"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR3,Pin Control 3"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),?"
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR4,Pin Control 4"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),?"
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR5,Pin Control 5"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),?"
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR6,Pin Control 6"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),?"
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR7,Pin Control 7"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),?"
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x20 "PCR8,Pin Control 8"
bitfld.long 0x20 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x20 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x20 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x20 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x20 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x20 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x24 "PCR9,Pin Control 9"
bitfld.long 0x24 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x24 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x24 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x24 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x24 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x24 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x28 "PCR10,Pin Control 10"
bitfld.long 0x28 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x28 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x28 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x28 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x28 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x28 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x28 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x28 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x2C "PCR11,Pin Control 11"
bitfld.long 0x2C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x2C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x2C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x2C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x2C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x2C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x30 "PCR12,Pin Control 12"
bitfld.long 0x30 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x30 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x30 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x30 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x30 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x30 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x30 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x30 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x34 "PCR13,Pin Control 13"
bitfld.long 0x34 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x34 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x34 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x34 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x34 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x34 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x34 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x34 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x38 "PCR14,Pin Control 14"
bitfld.long 0x38 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x38 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x38 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x38 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x38 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x38 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x38 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x38 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x3C "PCR15,Pin Control 15"
bitfld.long 0x3C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x3C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x3C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x3C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x3C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x3C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x3C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x3C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x40 "PCR16,Pin Control 16"
bitfld.long 0x40 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x40 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x40 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x40 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x40 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x40 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x40 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x40 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x44 "PCR17,Pin Control 17"
bitfld.long 0x44 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x44 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x44 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x44 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x44 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x44 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x44 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x44 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x48 "PCR18,Pin Control 18"
bitfld.long 0x48 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x48 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x48 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x48 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x48 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x48 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x48 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x48 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4C "PCR19,Pin Control 19"
bitfld.long 0x4C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x4C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x50 "PCR20,Pin Control 20"
bitfld.long 0x50 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x50 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x50 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x50 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x50 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x50 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x50 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x54 "PCR21,Pin Control 21"
bitfld.long 0x54 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x54 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x54 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x54 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x54 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x54 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x54 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x58 "PCR22,Pin Control 22"
bitfld.long 0x58 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x58 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x58 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x58 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x58 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x58 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x58 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x58 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x5C "PCR23,Pin Control 23"
bitfld.long 0x5C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x5C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x5C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x5C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x5C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x5C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x60 "PCR24,Pin Control 24"
bitfld.long 0x60 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x60 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x60 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x60 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x60 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x60 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x60 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x60 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x64 "PCR25,Pin Control 25"
bitfld.long 0x64 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x64 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x64 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x64 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x64 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x64 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x64 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x64 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x68 "PCR26,Pin Control 26"
bitfld.long 0x68 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x68 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x68 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x68 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x68 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x68 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x68 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x68 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x6C "PCR27,Pin Control 27"
bitfld.long 0x6C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x6C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x6C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x6C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x6C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x6C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x70 "PCR28,Pin Control 28"
bitfld.long 0x70 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x70 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x70 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x70 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x70 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x70 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x70 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x70 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x74 "PCR29,Pin Control 29"
bitfld.long 0x74 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x74 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x74 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x74 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x74 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x74 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x74 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x74 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x78 "PCR30,Pin Control 30"
bitfld.long 0x78 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x78 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x78 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x78 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x78 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x78 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x78 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x78 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x7C "PCR31,Pin Control 31"
bitfld.long 0x7C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x7C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x7C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x7C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x7C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x7C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
tree.end
endif
sif (cpuis("MC?A156*"))
tree "PORT4"
base ad:0x400C0000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x7
line.long 0x0 "GPCLR,Global Pin Control Low"
bitfld.long 0x0 31. "GPWE15,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 30. "GPWE14,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 29. "GPWE13,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 28. "GPWE12,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 27. "GPWE11,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 26. "GPWE10,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 25. "GPWE9,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 24. "GPWE8,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 23. "GPWE7,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 22. "GPWE6,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 21. "GPWE5,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 20. "GPWE4,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 19. "GPWE3,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 18. "GPWE2,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 17. "GPWE1,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 16. "GPWE0,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data"
line.long 0x4 "GPCHR,Global Pin Control High"
bitfld.long 0x4 31. "GPWE31,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 30. "GPWE30,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 29. "GPWE29,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 28. "GPWE28,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 27. "GPWE27,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 26. "GPWE26,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 25. "GPWE25,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 24. "GPWE24,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 23. "GPWE23,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 22. "GPWE22,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 21. "GPWE21,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 20. "GPWE20,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 19. "GPWE19,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 18. "GPWE18,Global Pin Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x4 17. "GPWE17,Global Pin Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x4 16. "GPWE16,Global Pin Write Enable" "0: Not updated,1: Updated"
hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data"
group.long 0x20++0x3
line.long 0x0 "CONFIG,Configuration"
bitfld.long 0x0 0. "RANGE,Port Voltage Range" "0: 1.71 V-3.6 V,1: 2.70 V-3.6 V"
group.long 0x60++0x7
line.long 0x0 "CALIB0,Calibration 0"
hexmask.long.byte 0x0 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x0 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
line.long 0x4 "CALIB1,Calibration 1"
hexmask.long.byte 0x4 16.--21. 1. "PCAL,Calibration of PMOS Output Driver"
hexmask.long.byte 0x4 0.--5. 1. "NCAL,Calibration of NMOS Output Driver"
group.long 0x80++0x7F
line.long 0x0 "PCR0,Pin Control 0"
bitfld.long 0x0 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x0 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x0 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x0 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x0 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x0 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4 "PCR1,Pin Control 1"
bitfld.long 0x4 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x4 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x8 "PCR2,Pin Control 2"
bitfld.long 0x8 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x8 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x8 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),?"
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x8 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x8 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x8 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0xC "PCR3,Pin Control 3"
bitfld.long 0xC 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0xC 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0xC 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),?"
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0xC 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0xC 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0xC 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x10 "PCR4,Pin Control 4"
bitfld.long 0x10 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x10 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x10 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),?"
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x10 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x10 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x10 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x14 "PCR5,Pin Control 5"
bitfld.long 0x14 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x14 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x14 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),?"
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x14 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x14 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x14 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x18 "PCR6,Pin Control 6"
bitfld.long 0x18 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x18 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x18 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),?"
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x18 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x18 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x18 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x1C "PCR7,Pin Control 7"
bitfld.long 0x1C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x1C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x1C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 8.--10. "MUX,Pin Multiplex Control" "0: Alternative 0 (GPIO),1: Alternative 1 (chip-specific),2: Alternative 2 (chip-specific),3: Alternative 3 (chip-specific),4: Alternative 4 (chip-specific),5: Alternative 5 (chip-specific),6: Alternative 6 (chip-specific),?"
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x1C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x1C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x20 "PCR8,Pin Control 8"
bitfld.long 0x20 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x20 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x20 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x20 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x20 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x20 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x24 "PCR9,Pin Control 9"
bitfld.long 0x24 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x24 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x24 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x24 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x24 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x24 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x28 "PCR10,Pin Control 10"
bitfld.long 0x28 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x28 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x28 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x28 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x28 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x28 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x28 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x28 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x2C "PCR11,Pin Control 11"
bitfld.long 0x2C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x2C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x2C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x2C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x2C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x2C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x2C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x30 "PCR12,Pin Control 12"
bitfld.long 0x30 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x30 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x30 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x30 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x30 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x30 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x30 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x30 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x34 "PCR13,Pin Control 13"
bitfld.long 0x34 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x34 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x34 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x34 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x34 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x34 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x34 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x34 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x38 "PCR14,Pin Control 14"
bitfld.long 0x38 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x38 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x38 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x38 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x38 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x38 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x38 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x38 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x3C "PCR15,Pin Control 15"
bitfld.long 0x3C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x3C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x3C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x3C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x3C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x3C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x3C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x3C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x40 "PCR16,Pin Control 16"
bitfld.long 0x40 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x40 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x40 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x40 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x40 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x40 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x40 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x40 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x44 "PCR17,Pin Control 17"
bitfld.long 0x44 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x44 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x44 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x44 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x44 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x44 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x44 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x44 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x48 "PCR18,Pin Control 18"
bitfld.long 0x48 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x48 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x48 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x48 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x48 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x48 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x48 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x48 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x4C "PCR19,Pin Control 19"
bitfld.long 0x4C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x4C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x4C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x4C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x4C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x4C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x4C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x4C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x50 "PCR20,Pin Control 20"
bitfld.long 0x50 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x50 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x50 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x50 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x50 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x50 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x50 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x50 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x54 "PCR21,Pin Control 21"
bitfld.long 0x54 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x54 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x54 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x54 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x54 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x54 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x54 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x54 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x58 "PCR22,Pin Control 22"
bitfld.long 0x58 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x58 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x58 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x58 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x58 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x58 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x58 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x58 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x5C "PCR23,Pin Control 23"
bitfld.long 0x5C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x5C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x5C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x5C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x5C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x5C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x5C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x60 "PCR24,Pin Control 24"
bitfld.long 0x60 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x60 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x60 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x60 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x60 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x60 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x60 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x60 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x64 "PCR25,Pin Control 25"
bitfld.long 0x64 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x64 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x64 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x64 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x64 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x64 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x64 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x64 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x68 "PCR26,Pin Control 26"
bitfld.long 0x68 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x68 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x68 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x68 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x68 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x68 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x68 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x68 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x6C "PCR27,Pin Control 27"
bitfld.long 0x6C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x6C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x6C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x6C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x6C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x6C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x6C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x70 "PCR28,Pin Control 28"
bitfld.long 0x70 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x70 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x70 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x70 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x70 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x70 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x70 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x70 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x74 "PCR29,Pin Control 29"
bitfld.long 0x74 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x74 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x74 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x74 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x74 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x74 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x74 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x74 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x78 "PCR30,Pin Control 30"
bitfld.long 0x78 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x78 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x78 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x78 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x78 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x78 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x78 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x78 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
line.long 0x7C "PCR31,Pin Control 31"
bitfld.long 0x7C 15. "LK,Lock Register" "0: Does not lock,1: Locks"
bitfld.long 0x7C 13. "INV,Invert Input" "0: Does not invert,1: Inverts"
bitfld.long 0x7C 12. "IBE,Input Buffer Enable" "0: Disables,1: Enables"
newline
bitfld.long 0x7C 6. "DSE,Drive Strength Enable" "0: Low,1: High"
bitfld.long 0x7C 5. "ODE,Open Drain Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 3. "SRE,Slew Rate Enable" "0: Fast,1: Slow"
newline
bitfld.long 0x7C 1. "PE,Pull Enable" "0: Disables,1: Enables"
bitfld.long 0x7C 0. "PS,Pull Select" "0: Enables internal pulldown resistor,1: Enables internal pullup resistor"
tree.end
endif
tree.end
tree "QDC (Quadrature Decoder)"
base ad:0x0
tree "QDC0"
base ad:0x400A7000
group.word 0x0++0x5
line.word 0x0 "CTRL,Control Register"
eventfld.word 0x0 15. "HIRQ,HOME/ENABLE Signal Transition Interrupt Request" "0: No transition on the HOME/ENABLE signal has..,1: A transition on the HOME/ENABLE signal has.."
bitfld.word 0x0 14. "HIE,HOME/ENABLE Interrupt Enable" "0: Disabled,1: Enabled"
newline
bitfld.word 0x0 13. "HIP,Enable HOME to Initialize Position Counter UPOS/LPOS" "0: No action,1: HOME signal initializes the position counter"
bitfld.word 0x0 12. "HNE,Use Negative Edge of HOME/ENABLE Input" "0: When CTRL[OPMODE] = 0 use HOME positive edge to..,1: When CTRL[OPMODE] = 0 use HOME negative edge to.."
newline
bitfld.word 0x0 11. "SWIP,Software-Triggered Initialization of Position Counters UPOS and LPOS" "0: No action,1: Initialize position counter"
bitfld.word 0x0 10. "REV,Enable Reverse Direction Counting" "0: Count normally and the position counter..,1: Count in the reverse direction and the position.."
newline
bitfld.word 0x0 9. "PH1,Enable Single Phase Mode" "0: Standard quadrature decoder where PHASEA and..,1: Single phase mode bypass the quadrature decoder.."
eventfld.word 0x0 8. "XIRQ,INDEX/PRESET Pulse Interrupt Request" "0: INDEX/PRESET pulse has not occurred,1: INDEX/PRESET pulse has occurred"
newline
bitfld.word 0x0 7. "XIE,INDEX/PRESET Pulse Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.word 0x0 6. "XIP,INDEX Triggered Initialization of Position Counters UPOS and LPOS" "0: INDEX pulse does not initialize the position..,1: INDEX pulse initializes the position counter"
newline
bitfld.word 0x0 5. "XNE,Select Positive/Negative Edge of INDEX/PRESET Pulse" "0: Use positive edge of INDEX/PRESET pulse,1: Use negative edge of INDEX/PRESET pulse"
eventfld.word 0x0 4. "WDIRQ,Watchdog Timeout Interrupt Request" "0: No Watchdog timeout interrupt has occurred,1: Watchdog timeout interrupt has occurred"
newline
bitfld.word 0x0 3. "WDIE,Watchdog Timeout Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.word 0x0 2. "WDE,Watchdog Enable" "0: Disabled,1: Enabled"
newline
bitfld.word 0x0 1. "DMAEN,DMA Enable" "0: DMA is disabled,1: DMA is enabled. DMA request asserts.."
bitfld.word 0x0 0. "LDOK,Load Okay" "0: No loading action taken. Users can write new..,1: Outer-set values are ready to be loaded into.."
line.word 0x2 "CTRL2,Control 2 Register"
bitfld.word 0x2 14.--15. "CMODE,Counting Mode" "0,1,2,3"
bitfld.word 0x2 13. "ONCE,Count Once" "0: Position counter counts repeatedly,1: Position counter counts until roll-over or.."
newline
bitfld.word 0x2 12. "INITPOS,Initial Position Register" "0: Don't initialize position counter on rising edge..,1: Initialize position counter on rising edge of.."
bitfld.word 0x2 11. "EMIP,Enables/disables the position counter to be initialized by Index Event Edge Mark" "0: disables the position counter to be initialized..,1: enables the position counter to be initialized.."
newline
bitfld.word 0x2 10. "PMEN,Period measurement function enable" "0: Period measurement functions are not used. POSD..,1: Period measurement functions are used. POSD is.."
bitfld.word 0x2 9. "OUTCTL,Output Control" "0: POS_MATCH[x](x range is 0-3) is asserted when..,1: All POS_MATCH[x](x range is 0-3) are asserted a.."
newline
bitfld.word 0x2 8. "REVMOD,Revolution Counter Modulus Enable" "0: Use INDEX pulse to increment/decrement..,1: Use modulus counting roll-over/under to.."
bitfld.word 0x2 3. "LDMOD,Buffered Register Load (Update) Mode Select" "0: Buffered registers are loaded and take effect..,1: Buffered registers are loaded and take effect at.."
newline
bitfld.word 0x2 2. "OPMODE,Operation Mode Select" "0: Decode Mode: Input nodes INDEX/PRESET and..,1: Count Mode: Input nodes INDEX/PRESET and.."
bitfld.word 0x2 1. "UPDPOS,Update Position Registers" "0,1"
newline
bitfld.word 0x2 0. "UPDHLD,Update Hold Registers" "0,1"
line.word 0x4 "FILT,Input Filter Register"
hexmask.word.byte 0x4 12.--15. 1. "PRSC,Prescaler"
bitfld.word 0x4 11. "FILT_CS,Filter Clock Source selection" "0: Peripheral Clock,1: Prescaled peripheral clock by PRSC"
newline
bitfld.word 0x4 8.--10. "FILT_CNT,Input Filter Sample Count" "0,1,2,3,4,5,6,7"
hexmask.word.byte 0x4 0.--7. 1. "FILT_PER,Input Filter Sample Period"
rgroup.word 0x6++0x5
line.word 0x0 "LASTEDGE,Last Edge Time Register"
hexmask.word 0x0 0.--15. 1. "LASTEDGE,Last Edge Time Counter"
line.word 0x2 "POSDPER,Position Difference Period Counter Register"
hexmask.word 0x2 0.--15. 1. "POSDPER,Position difference period"
line.word 0x4 "POSDPERBFR,Position Difference Period Buffer Register"
hexmask.word 0x4 0.--15. 1. "POSDPERBFR,Position difference period buffer"
group.word 0xC++0x5
line.word 0x0 "UPOS,Upper Position Counter Register"
hexmask.word 0x0 0.--15. 1. "POS,POS"
line.word 0x2 "LPOS,Lower Position Counter Register"
hexmask.word 0x2 0.--15. 1. "POS,POS"
line.word 0x4 "POSD,Position Difference Counter Register"
hexmask.word 0x4 0.--15. 1. "POSD,POSD"
rgroup.word 0x12++0xB
line.word 0x0 "POSDH,Position Difference Hold Register"
hexmask.word 0x0 0.--15. 1. "POSDH,POSDH"
line.word 0x2 "UPOSH,Upper Position Hold Register"
hexmask.word 0x2 0.--15. 1. "POSH,POSH"
line.word 0x4 "LPOSH,Lower Position Hold Register"
hexmask.word 0x4 0.--15. 1. "LPOSH,POSH"
line.word 0x6 "LASTEDGEH,Last Edge Time Hold Register"
hexmask.word 0x6 0.--15. 1. "LASTEDGEH,Last Edge Time Hold"
line.word 0x8 "POSDPERH,Position Difference Period Hold Register"
hexmask.word 0x8 0.--15. 1. "POSDPERH,Position difference period hold"
line.word 0xA "REVH,Revolution Hold Register"
hexmask.word 0xA 0.--15. 1. "REVH,REVH"
group.word 0x1E++0xD
line.word 0x0 "REV,Revolution Counter Register"
hexmask.word 0x0 0.--15. 1. "REV,REV"
line.word 0x2 "UINIT,Upper Initialization Register"
hexmask.word 0x2 0.--15. 1. "INIT,INIT"
line.word 0x4 "LINIT,Lower Initialization Register"
hexmask.word 0x4 0.--15. 1. "INIT,INIT"
line.word 0x6 "UMOD,Upper Modulus Register"
hexmask.word 0x6 0.--15. 1. "MOD,MOD"
line.word 0x8 "LMOD,Lower Modulus Register"
hexmask.word 0x8 0.--15. 1. "MOD,MOD"
line.word 0xA "UCOMP0,Upper Position Compare Register 0"
hexmask.word 0xA 0.--15. 1. "UCOMP0,UCOMP0"
line.word 0xC "LCOMP0,Lower Position Compare Register 0"
hexmask.word 0xC 0.--15. 1. "LCOMP0,LCOMP0"
wgroup.word 0x2C++0x1
line.word 0x0 "UCOMP1,Upper Position Compare 1"
hexmask.word 0x0 0.--15. 1. "UCOMP1,UCOMP1"
rgroup.word 0x2C++0x1
line.word 0x0 "UPOSH1,Upper Position Holder Register 1"
hexmask.word 0x0 0.--15. 1. "UPOSH1,UPOSH1"
wgroup.word 0x2E++0x1
line.word 0x0 "LCOMP1,Lower Position Compare 1"
hexmask.word 0x0 0.--15. 1. "LCOMP1,LCOMP1"
rgroup.word 0x2E++0x1
line.word 0x0 "LPOSH1,Lower Position Holder Register 1"
hexmask.word 0x0 0.--15. 1. "LPOSH1,LPOSH1"
wgroup.word 0x30++0x1
line.word 0x0 "UCOMP2,Upper Position Compare 2"
hexmask.word 0x0 0.--15. 1. "UCOMP2,UCOMP2"
rgroup.word 0x30++0x1
line.word 0x0 "UPOSH2,Upper Position Holder Register 3"
hexmask.word 0x0 0.--15. 1. "UPOSH2,UPOSH2"
wgroup.word 0x32++0x1
line.word 0x0 "LCOMP2,Lower Position Compare 2"
hexmask.word 0x0 0.--15. 1. "LCOMP2,LCOMP2"
rgroup.word 0x32++0x1
line.word 0x0 "LPOSH2,Lower Position Holder Register 2"
hexmask.word 0x0 0.--15. 1. "LPOSH2,LPOSH2"
wgroup.word 0x34++0x1
line.word 0x0 "UCOMP3,Upper Position Compare 3"
hexmask.word 0x0 0.--15. 1. "UCOMP3,UCOMP3"
rgroup.word 0x34++0x1
line.word 0x0 "UPOSH3,Upper Position Holder Register 3"
hexmask.word 0x0 0.--15. 1. "UPOSH3,UPOSH3"
wgroup.word 0x36++0x1
line.word 0x0 "LCOMP3,Lower Position Compare 3"
hexmask.word 0x0 0.--15. 1. "LCOMP3,LCOMP3"
rgroup.word 0x36++0x1
line.word 0x0 "LPOSH3,Lower Position Holder Register 3"
hexmask.word 0x0 0.--15. 1. "LPOSH3,LPOSH3"
group.word 0x38++0x7
line.word 0x0 "INTCTRL,Interrupt Control Register"
eventfld.word 0x0 15. "CMP3IRQ,Compare3 Interrupt Request" "0: No match has occurred (the position counter does..,1: COMP3 match has occurred (the position counter.."
bitfld.word 0x0 14. "CMP3IE,Compare3 Interrupt Enable" "0: Disabled,1: Enabled"
newline
eventfld.word 0x0 13. "CMP2IRQ,Compare2 Interrupt Request" "0: No match has occurred (the position counter does..,1: COMP2 match has occurred (the position counter.."
bitfld.word 0x0 12. "CMP2IE,Compare2 Interrupt Enable" "0: Disabled,1: Enabled"
newline
eventfld.word 0x0 11. "CMP1IRQ,Compare1 Interrupt Request" "0: No match has occurred (the position counter does..,1: COMP1 match has occurred (the position counter.."
bitfld.word 0x0 10. "CMP1IE,Compare1 Interrupt Enable" "0: Disabled,1: Enabled"
newline
eventfld.word 0x0 9. "CMP0IRQ,Compare 0 Interrupt Request" "0: No match has occurred (the position counter does..,1: COMP match has occurred (the position counter.."
bitfld.word 0x0 8. "CMP0IE,Compare 0 Interrupt Enable" "0: Disabled,1: Enabled"
newline
eventfld.word 0x0 7. "ROIRQ,Roll-over Interrupt Request" "0: No roll-over has occurred,1: Roll-over has occurred"
bitfld.word 0x0 6. "ROIE,Roll-over Interrupt Enable" "0: Disabled,1: Enabled"
newline
eventfld.word 0x0 5. "RUIRQ,Roll-under Interrupt Request" "0: No roll-under has occurred,1: Roll-under has occurred"
bitfld.word 0x0 4. "RUIE,Roll-under Interrupt Enable" "0: Disabled,1: Enabled"
newline
eventfld.word 0x0 3. "DIRIRQ,Count direction change interrupt" "0: Count direction unchanged,1: Count direction changed"
bitfld.word 0x0 2. "DIRIE,Count direction change interrupt enable" "0: Disabled,1: Enabled"
newline
eventfld.word 0x0 1. "SABIRQ,Simultaneous PHASEA and PHASEB Change Interrupt Request" "0: No simultaneous change of PHASEA and PHASEB has..,1: A simultaneous change of PHASEA and PHASEB has.."
bitfld.word 0x0 0. "SABIE,Simultaneous PHASEA and PHASEB Change Interrupt Enable" "0: Disabled,1: Enabled"
line.word 0x2 "WTR,Watchdog Timeout Register"
hexmask.word 0x2 0.--15. 1. "WDOG,WDOG"
line.word 0x4 "IMR,Input Monitor Register"
rbitfld.word 0x4 15. "DIR,Count Direction Flag Output" "0: Current count was in the down direction,1: Current count was in the up direction"
rbitfld.word 0x4 14. "DIRH,Count Direction Flag Hold" "0,1"
newline
rbitfld.word 0x4 11. "CMP3F,Position Compare3 Flag Output" "0: When the position counter value is less than..,1: When the position counter is greater or equal.."
rbitfld.word 0x4 10. "CMP2F,Position Compare2 Flag Output" "0: When the position counter is less than value of..,1: When the position counter is greater or equal.."
newline
rbitfld.word 0x4 9. "CMP1F,Position Compare1 Flag Output" "0: When the position counter is less than value of..,1: When the position counter is greater or equal.."
rbitfld.word 0x4 8. "CMPF0,Position Compare 0 Flag Output" "0: When the position counter is less than value of..,1: When the position counter is greater or equal.."
newline
bitfld.word 0x4 7. "FPHA,filter operation on PHASEA input" "0,1"
bitfld.word 0x4 6. "FPHB,filter operation on PHASEB input" "0,1"
newline
bitfld.word 0x4 5. "FIND_PRE,filter operation on INDEX/PRESET input" "0,1"
bitfld.word 0x4 4. "FHOM_ENA,filter operation on HOME/ENABLE input" "0,1"
newline
rbitfld.word 0x4 3. "PHA,PHA" "0,1"
rbitfld.word 0x4 2. "PHB,PHB" "0,1"
newline
rbitfld.word 0x4 1. "INDEX_PRESET,INDEX_PRESET" "0,1"
rbitfld.word 0x4 0. "HOME_ENABLE,HOME_ENABLE" "0,1"
line.word 0x6 "TST,Test Register"
bitfld.word 0x6 15. "TEN,Test Mode Enable" "0: Disabled,1: Enabled"
bitfld.word 0x6 14. "TCE,Test Counter Enable" "0: Disabled,1: Enabled"
newline
bitfld.word 0x6 13. "QDN,Quadrature Decoder Negative Signal" "0: Generates a positive quadrature decoder signal,1: Generates a negative quadrature decoder signal"
hexmask.word.byte 0x6 8.--12. 1. "TEST_PERIOD,TEST_PERIOD"
newline
hexmask.word.byte 0x6 0.--7. 1. "TEST_COUNT,TEST_COUNT"
rgroup.word 0x50++0x3
line.word 0x0 "UVERID,Upper VERID"
hexmask.word 0x0 0.--15. 1. "UVERID,UVERID"
line.word 0x2 "LVERID,Lower VERID"
hexmask.word 0x2 0.--15. 1. "LVERID,LVERID"
tree.end
sif (cpuis("MC?A154*"))
tree "QDC1"
base ad:0x400A8000
group.word 0x0++0x5
line.word 0x0 "CTRL,Control Register"
eventfld.word 0x0 15. "HIRQ,HOME/ENABLE Signal Transition Interrupt Request" "0: No transition on the HOME/ENABLE signal has..,1: A transition on the HOME/ENABLE signal has.."
bitfld.word 0x0 14. "HIE,HOME/ENABLE Interrupt Enable" "0: Disabled,1: Enabled"
newline
bitfld.word 0x0 13. "HIP,Enable HOME to Initialize Position Counter UPOS/LPOS" "0: No action,1: HOME signal initializes the position counter"
bitfld.word 0x0 12. "HNE,Use Negative Edge of HOME/ENABLE Input" "0: When CTRL[OPMODE] = 0 use HOME positive edge to..,1: When CTRL[OPMODE] = 0 use HOME negative edge to.."
newline
bitfld.word 0x0 11. "SWIP,Software-Triggered Initialization of Position Counters UPOS and LPOS" "0: No action,1: Initialize position counter"
bitfld.word 0x0 10. "REV,Enable Reverse Direction Counting" "0: Count normally and the position counter..,1: Count in the reverse direction and the position.."
newline
bitfld.word 0x0 9. "PH1,Enable Single Phase Mode" "0: Standard quadrature decoder where PHASEA and..,1: Single phase mode bypass the quadrature decoder.."
eventfld.word 0x0 8. "XIRQ,INDEX/PRESET Pulse Interrupt Request" "0: INDEX/PRESET pulse has not occurred,1: INDEX/PRESET pulse has occurred"
newline
bitfld.word 0x0 7. "XIE,INDEX/PRESET Pulse Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.word 0x0 6. "XIP,INDEX Triggered Initialization of Position Counters UPOS and LPOS" "0: INDEX pulse does not initialize the position..,1: INDEX pulse initializes the position counter"
newline
bitfld.word 0x0 5. "XNE,Select Positive/Negative Edge of INDEX/PRESET Pulse" "0: Use positive edge of INDEX/PRESET pulse,1: Use negative edge of INDEX/PRESET pulse"
eventfld.word 0x0 4. "WDIRQ,Watchdog Timeout Interrupt Request" "0: No Watchdog timeout interrupt has occurred,1: Watchdog timeout interrupt has occurred"
newline
bitfld.word 0x0 3. "WDIE,Watchdog Timeout Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.word 0x0 2. "WDE,Watchdog Enable" "0: Disabled,1: Enabled"
newline
bitfld.word 0x0 1. "DMAEN,DMA Enable" "0: DMA is disabled,1: DMA is enabled. DMA request asserts.."
bitfld.word 0x0 0. "LDOK,Load Okay" "0: No loading action taken. Users can write new..,1: Outer-set values are ready to be loaded into.."
line.word 0x2 "CTRL2,Control 2 Register"
bitfld.word 0x2 14.--15. "CMODE,Counting Mode" "0,1,2,3"
bitfld.word 0x2 13. "ONCE,Count Once" "0: Position counter counts repeatedly,1: Position counter counts until roll-over or.."
newline
bitfld.word 0x2 12. "INITPOS,Initial Position Register" "0: Don't initialize position counter on rising edge..,1: Initialize position counter on rising edge of.."
bitfld.word 0x2 11. "EMIP,Enables/disables the position counter to be initialized by Index Event Edge Mark" "0: disables the position counter to be initialized..,1: enables the position counter to be initialized.."
newline
bitfld.word 0x2 10. "PMEN,Period measurement function enable" "0: Period measurement functions are not used. POSD..,1: Period measurement functions are used. POSD is.."
bitfld.word 0x2 9. "OUTCTL,Output Control" "0: POS_MATCH[x](x range is 0-3) is asserted when..,1: All POS_MATCH[x](x range is 0-3) are asserted a.."
newline
bitfld.word 0x2 8. "REVMOD,Revolution Counter Modulus Enable" "0: Use INDEX pulse to increment/decrement..,1: Use modulus counting roll-over/under to.."
bitfld.word 0x2 3. "LDMOD,Buffered Register Load (Update) Mode Select" "0: Buffered registers are loaded and take effect..,1: Buffered registers are loaded and take effect at.."
newline
bitfld.word 0x2 2. "OPMODE,Operation Mode Select" "0: Decode Mode: Input nodes INDEX/PRESET and..,1: Count Mode: Input nodes INDEX/PRESET and.."
bitfld.word 0x2 1. "UPDPOS,Update Position Registers" "0,1"
newline
bitfld.word 0x2 0. "UPDHLD,Update Hold Registers" "0,1"
line.word 0x4 "FILT,Input Filter Register"
hexmask.word.byte 0x4 12.--15. 1. "PRSC,Prescaler"
bitfld.word 0x4 11. "FILT_CS,Filter Clock Source selection" "0: Peripheral Clock,1: Prescaled peripheral clock by PRSC"
newline
bitfld.word 0x4 8.--10. "FILT_CNT,Input Filter Sample Count" "0,1,2,3,4,5,6,7"
hexmask.word.byte 0x4 0.--7. 1. "FILT_PER,Input Filter Sample Period"
rgroup.word 0x6++0x5
line.word 0x0 "LASTEDGE,Last Edge Time Register"
hexmask.word 0x0 0.--15. 1. "LASTEDGE,Last Edge Time Counter"
line.word 0x2 "POSDPER,Position Difference Period Counter Register"
hexmask.word 0x2 0.--15. 1. "POSDPER,Position difference period"
line.word 0x4 "POSDPERBFR,Position Difference Period Buffer Register"
hexmask.word 0x4 0.--15. 1. "POSDPERBFR,Position difference period buffer"
group.word 0xC++0x5
line.word 0x0 "UPOS,Upper Position Counter Register"
hexmask.word 0x0 0.--15. 1. "POS,POS"
line.word 0x2 "LPOS,Lower Position Counter Register"
hexmask.word 0x2 0.--15. 1. "POS,POS"
line.word 0x4 "POSD,Position Difference Counter Register"
hexmask.word 0x4 0.--15. 1. "POSD,POSD"
rgroup.word 0x12++0xB
line.word 0x0 "POSDH,Position Difference Hold Register"
hexmask.word 0x0 0.--15. 1. "POSDH,POSDH"
line.word 0x2 "UPOSH,Upper Position Hold Register"
hexmask.word 0x2 0.--15. 1. "POSH,POSH"
line.word 0x4 "LPOSH,Lower Position Hold Register"
hexmask.word 0x4 0.--15. 1. "LPOSH,POSH"
line.word 0x6 "LASTEDGEH,Last Edge Time Hold Register"
hexmask.word 0x6 0.--15. 1. "LASTEDGEH,Last Edge Time Hold"
line.word 0x8 "POSDPERH,Position Difference Period Hold Register"
hexmask.word 0x8 0.--15. 1. "POSDPERH,Position difference period hold"
line.word 0xA "REVH,Revolution Hold Register"
hexmask.word 0xA 0.--15. 1. "REVH,REVH"
group.word 0x1E++0xD
line.word 0x0 "REV,Revolution Counter Register"
hexmask.word 0x0 0.--15. 1. "REV,REV"
line.word 0x2 "UINIT,Upper Initialization Register"
hexmask.word 0x2 0.--15. 1. "INIT,INIT"
line.word 0x4 "LINIT,Lower Initialization Register"
hexmask.word 0x4 0.--15. 1. "INIT,INIT"
line.word 0x6 "UMOD,Upper Modulus Register"
hexmask.word 0x6 0.--15. 1. "MOD,MOD"
line.word 0x8 "LMOD,Lower Modulus Register"
hexmask.word 0x8 0.--15. 1. "MOD,MOD"
line.word 0xA "UCOMP0,Upper Position Compare Register 0"
hexmask.word 0xA 0.--15. 1. "UCOMP0,UCOMP0"
line.word 0xC "LCOMP0,Lower Position Compare Register 0"
hexmask.word 0xC 0.--15. 1. "LCOMP0,LCOMP0"
wgroup.word 0x2C++0x1
line.word 0x0 "UCOMP1,Upper Position Compare 1"
hexmask.word 0x0 0.--15. 1. "UCOMP1,UCOMP1"
rgroup.word 0x2C++0x1
line.word 0x0 "UPOSH1,Upper Position Holder Register 1"
hexmask.word 0x0 0.--15. 1. "UPOSH1,UPOSH1"
wgroup.word 0x2E++0x1
line.word 0x0 "LCOMP1,Lower Position Compare 1"
hexmask.word 0x0 0.--15. 1. "LCOMP1,LCOMP1"
rgroup.word 0x2E++0x1
line.word 0x0 "LPOSH1,Lower Position Holder Register 1"
hexmask.word 0x0 0.--15. 1. "LPOSH1,LPOSH1"
wgroup.word 0x30++0x1
line.word 0x0 "UCOMP2,Upper Position Compare 2"
hexmask.word 0x0 0.--15. 1. "UCOMP2,UCOMP2"
rgroup.word 0x30++0x1
line.word 0x0 "UPOSH2,Upper Position Holder Register 3"
hexmask.word 0x0 0.--15. 1. "UPOSH2,UPOSH2"
wgroup.word 0x32++0x1
line.word 0x0 "LCOMP2,Lower Position Compare 2"
hexmask.word 0x0 0.--15. 1. "LCOMP2,LCOMP2"
rgroup.word 0x32++0x1
line.word 0x0 "LPOSH2,Lower Position Holder Register 2"
hexmask.word 0x0 0.--15. 1. "LPOSH2,LPOSH2"
wgroup.word 0x34++0x1
line.word 0x0 "UCOMP3,Upper Position Compare 3"
hexmask.word 0x0 0.--15. 1. "UCOMP3,UCOMP3"
rgroup.word 0x34++0x1
line.word 0x0 "UPOSH3,Upper Position Holder Register 3"
hexmask.word 0x0 0.--15. 1. "UPOSH3,UPOSH3"
wgroup.word 0x36++0x1
line.word 0x0 "LCOMP3,Lower Position Compare 3"
hexmask.word 0x0 0.--15. 1. "LCOMP3,LCOMP3"
rgroup.word 0x36++0x1
line.word 0x0 "LPOSH3,Lower Position Holder Register 3"
hexmask.word 0x0 0.--15. 1. "LPOSH3,LPOSH3"
group.word 0x38++0x7
line.word 0x0 "INTCTRL,Interrupt Control Register"
eventfld.word 0x0 15. "CMP3IRQ,Compare3 Interrupt Request" "0: No match has occurred (the position counter does..,1: COMP3 match has occurred (the position counter.."
bitfld.word 0x0 14. "CMP3IE,Compare3 Interrupt Enable" "0: Disabled,1: Enabled"
newline
eventfld.word 0x0 13. "CMP2IRQ,Compare2 Interrupt Request" "0: No match has occurred (the position counter does..,1: COMP2 match has occurred (the position counter.."
bitfld.word 0x0 12. "CMP2IE,Compare2 Interrupt Enable" "0: Disabled,1: Enabled"
newline
eventfld.word 0x0 11. "CMP1IRQ,Compare1 Interrupt Request" "0: No match has occurred (the position counter does..,1: COMP1 match has occurred (the position counter.."
bitfld.word 0x0 10. "CMP1IE,Compare1 Interrupt Enable" "0: Disabled,1: Enabled"
newline
eventfld.word 0x0 9. "CMP0IRQ,Compare 0 Interrupt Request" "0: No match has occurred (the position counter does..,1: COMP match has occurred (the position counter.."
bitfld.word 0x0 8. "CMP0IE,Compare 0 Interrupt Enable" "0: Disabled,1: Enabled"
newline
eventfld.word 0x0 7. "ROIRQ,Roll-over Interrupt Request" "0: No roll-over has occurred,1: Roll-over has occurred"
bitfld.word 0x0 6. "ROIE,Roll-over Interrupt Enable" "0: Disabled,1: Enabled"
newline
eventfld.word 0x0 5. "RUIRQ,Roll-under Interrupt Request" "0: No roll-under has occurred,1: Roll-under has occurred"
bitfld.word 0x0 4. "RUIE,Roll-under Interrupt Enable" "0: Disabled,1: Enabled"
newline
eventfld.word 0x0 3. "DIRIRQ,Count direction change interrupt" "0: Count direction unchanged,1: Count direction changed"
bitfld.word 0x0 2. "DIRIE,Count direction change interrupt enable" "0: Disabled,1: Enabled"
newline
eventfld.word 0x0 1. "SABIRQ,Simultaneous PHASEA and PHASEB Change Interrupt Request" "0: No simultaneous change of PHASEA and PHASEB has..,1: A simultaneous change of PHASEA and PHASEB has.."
bitfld.word 0x0 0. "SABIE,Simultaneous PHASEA and PHASEB Change Interrupt Enable" "0: Disabled,1: Enabled"
line.word 0x2 "WTR,Watchdog Timeout Register"
hexmask.word 0x2 0.--15. 1. "WDOG,WDOG"
line.word 0x4 "IMR,Input Monitor Register"
rbitfld.word 0x4 15. "DIR,Count Direction Flag Output" "0: Current count was in the down direction,1: Current count was in the up direction"
rbitfld.word 0x4 14. "DIRH,Count Direction Flag Hold" "0,1"
newline
rbitfld.word 0x4 11. "CMP3F,Position Compare3 Flag Output" "0: When the position counter value is less than..,1: When the position counter is greater or equal.."
rbitfld.word 0x4 10. "CMP2F,Position Compare2 Flag Output" "0: When the position counter is less than value of..,1: When the position counter is greater or equal.."
newline
rbitfld.word 0x4 9. "CMP1F,Position Compare1 Flag Output" "0: When the position counter is less than value of..,1: When the position counter is greater or equal.."
rbitfld.word 0x4 8. "CMPF0,Position Compare 0 Flag Output" "0: When the position counter is less than value of..,1: When the position counter is greater or equal.."
newline
bitfld.word 0x4 7. "FPHA,filter operation on PHASEA input" "0,1"
bitfld.word 0x4 6. "FPHB,filter operation on PHASEB input" "0,1"
newline
bitfld.word 0x4 5. "FIND_PRE,filter operation on INDEX/PRESET input" "0,1"
bitfld.word 0x4 4. "FHOM_ENA,filter operation on HOME/ENABLE input" "0,1"
newline
rbitfld.word 0x4 3. "PHA,PHA" "0,1"
rbitfld.word 0x4 2. "PHB,PHB" "0,1"
newline
rbitfld.word 0x4 1. "INDEX_PRESET,INDEX_PRESET" "0,1"
rbitfld.word 0x4 0. "HOME_ENABLE,HOME_ENABLE" "0,1"
line.word 0x6 "TST,Test Register"
bitfld.word 0x6 15. "TEN,Test Mode Enable" "0: Disabled,1: Enabled"
bitfld.word 0x6 14. "TCE,Test Counter Enable" "0: Disabled,1: Enabled"
newline
bitfld.word 0x6 13. "QDN,Quadrature Decoder Negative Signal" "0: Generates a positive quadrature decoder signal,1: Generates a negative quadrature decoder signal"
hexmask.word.byte 0x6 8.--12. 1. "TEST_PERIOD,TEST_PERIOD"
newline
hexmask.word.byte 0x6 0.--7. 1. "TEST_COUNT,TEST_COUNT"
rgroup.word 0x50++0x3
line.word 0x0 "UVERID,Upper VERID"
hexmask.word 0x0 0.--15. 1. "UVERID,UVERID"
line.word 0x2 "LVERID,Lower VERID"
hexmask.word 0x2 0.--15. 1. "LVERID,LVERID"
tree.end
endif
sif (cpuis("MC?A155*"))
tree "QDC1"
base ad:0x400A8000
group.word 0x0++0x5
line.word 0x0 "CTRL,Control Register"
eventfld.word 0x0 15. "HIRQ,HOME/ENABLE Signal Transition Interrupt Request" "0: No transition on the HOME/ENABLE signal has..,1: A transition on the HOME/ENABLE signal has.."
bitfld.word 0x0 14. "HIE,HOME/ENABLE Interrupt Enable" "0: Disabled,1: Enabled"
newline
bitfld.word 0x0 13. "HIP,Enable HOME to Initialize Position Counter UPOS/LPOS" "0: No action,1: HOME signal initializes the position counter"
bitfld.word 0x0 12. "HNE,Use Negative Edge of HOME/ENABLE Input" "0: When CTRL[OPMODE] = 0 use HOME positive edge to..,1: When CTRL[OPMODE] = 0 use HOME negative edge to.."
newline
bitfld.word 0x0 11. "SWIP,Software-Triggered Initialization of Position Counters UPOS and LPOS" "0: No action,1: Initialize position counter"
bitfld.word 0x0 10. "REV,Enable Reverse Direction Counting" "0: Count normally and the position counter..,1: Count in the reverse direction and the position.."
newline
bitfld.word 0x0 9. "PH1,Enable Single Phase Mode" "0: Standard quadrature decoder where PHASEA and..,1: Single phase mode bypass the quadrature decoder.."
eventfld.word 0x0 8. "XIRQ,INDEX/PRESET Pulse Interrupt Request" "0: INDEX/PRESET pulse has not occurred,1: INDEX/PRESET pulse has occurred"
newline
bitfld.word 0x0 7. "XIE,INDEX/PRESET Pulse Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.word 0x0 6. "XIP,INDEX Triggered Initialization of Position Counters UPOS and LPOS" "0: INDEX pulse does not initialize the position..,1: INDEX pulse initializes the position counter"
newline
bitfld.word 0x0 5. "XNE,Select Positive/Negative Edge of INDEX/PRESET Pulse" "0: Use positive edge of INDEX/PRESET pulse,1: Use negative edge of INDEX/PRESET pulse"
eventfld.word 0x0 4. "WDIRQ,Watchdog Timeout Interrupt Request" "0: No Watchdog timeout interrupt has occurred,1: Watchdog timeout interrupt has occurred"
newline
bitfld.word 0x0 3. "WDIE,Watchdog Timeout Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.word 0x0 2. "WDE,Watchdog Enable" "0: Disabled,1: Enabled"
newline
bitfld.word 0x0 1. "DMAEN,DMA Enable" "0: DMA is disabled,1: DMA is enabled. DMA request asserts.."
bitfld.word 0x0 0. "LDOK,Load Okay" "0: No loading action taken. Users can write new..,1: Outer-set values are ready to be loaded into.."
line.word 0x2 "CTRL2,Control 2 Register"
bitfld.word 0x2 14.--15. "CMODE,Counting Mode" "0,1,2,3"
bitfld.word 0x2 13. "ONCE,Count Once" "0: Position counter counts repeatedly,1: Position counter counts until roll-over or.."
newline
bitfld.word 0x2 12. "INITPOS,Initial Position Register" "0: Don't initialize position counter on rising edge..,1: Initialize position counter on rising edge of.."
bitfld.word 0x2 11. "EMIP,Enables/disables the position counter to be initialized by Index Event Edge Mark" "0: disables the position counter to be initialized..,1: enables the position counter to be initialized.."
newline
bitfld.word 0x2 10. "PMEN,Period measurement function enable" "0: Period measurement functions are not used. POSD..,1: Period measurement functions are used. POSD is.."
bitfld.word 0x2 9. "OUTCTL,Output Control" "0: POS_MATCH[x](x range is 0-3) is asserted when..,1: All POS_MATCH[x](x range is 0-3) are asserted a.."
newline
bitfld.word 0x2 8. "REVMOD,Revolution Counter Modulus Enable" "0: Use INDEX pulse to increment/decrement..,1: Use modulus counting roll-over/under to.."
bitfld.word 0x2 3. "LDMOD,Buffered Register Load (Update) Mode Select" "0: Buffered registers are loaded and take effect..,1: Buffered registers are loaded and take effect at.."
newline
bitfld.word 0x2 2. "OPMODE,Operation Mode Select" "0: Decode Mode: Input nodes INDEX/PRESET and..,1: Count Mode: Input nodes INDEX/PRESET and.."
bitfld.word 0x2 1. "UPDPOS,Update Position Registers" "0,1"
newline
bitfld.word 0x2 0. "UPDHLD,Update Hold Registers" "0,1"
line.word 0x4 "FILT,Input Filter Register"
hexmask.word.byte 0x4 12.--15. 1. "PRSC,Prescaler"
bitfld.word 0x4 11. "FILT_CS,Filter Clock Source selection" "0: Peripheral Clock,1: Prescaled peripheral clock by PRSC"
newline
bitfld.word 0x4 8.--10. "FILT_CNT,Input Filter Sample Count" "0,1,2,3,4,5,6,7"
hexmask.word.byte 0x4 0.--7. 1. "FILT_PER,Input Filter Sample Period"
rgroup.word 0x6++0x5
line.word 0x0 "LASTEDGE,Last Edge Time Register"
hexmask.word 0x0 0.--15. 1. "LASTEDGE,Last Edge Time Counter"
line.word 0x2 "POSDPER,Position Difference Period Counter Register"
hexmask.word 0x2 0.--15. 1. "POSDPER,Position difference period"
line.word 0x4 "POSDPERBFR,Position Difference Period Buffer Register"
hexmask.word 0x4 0.--15. 1. "POSDPERBFR,Position difference period buffer"
group.word 0xC++0x5
line.word 0x0 "UPOS,Upper Position Counter Register"
hexmask.word 0x0 0.--15. 1. "POS,POS"
line.word 0x2 "LPOS,Lower Position Counter Register"
hexmask.word 0x2 0.--15. 1. "POS,POS"
line.word 0x4 "POSD,Position Difference Counter Register"
hexmask.word 0x4 0.--15. 1. "POSD,POSD"
rgroup.word 0x12++0xB
line.word 0x0 "POSDH,Position Difference Hold Register"
hexmask.word 0x0 0.--15. 1. "POSDH,POSDH"
line.word 0x2 "UPOSH,Upper Position Hold Register"
hexmask.word 0x2 0.--15. 1. "POSH,POSH"
line.word 0x4 "LPOSH,Lower Position Hold Register"
hexmask.word 0x4 0.--15. 1. "LPOSH,POSH"
line.word 0x6 "LASTEDGEH,Last Edge Time Hold Register"
hexmask.word 0x6 0.--15. 1. "LASTEDGEH,Last Edge Time Hold"
line.word 0x8 "POSDPERH,Position Difference Period Hold Register"
hexmask.word 0x8 0.--15. 1. "POSDPERH,Position difference period hold"
line.word 0xA "REVH,Revolution Hold Register"
hexmask.word 0xA 0.--15. 1. "REVH,REVH"
group.word 0x1E++0xD
line.word 0x0 "REV,Revolution Counter Register"
hexmask.word 0x0 0.--15. 1. "REV,REV"
line.word 0x2 "UINIT,Upper Initialization Register"
hexmask.word 0x2 0.--15. 1. "INIT,INIT"
line.word 0x4 "LINIT,Lower Initialization Register"
hexmask.word 0x4 0.--15. 1. "INIT,INIT"
line.word 0x6 "UMOD,Upper Modulus Register"
hexmask.word 0x6 0.--15. 1. "MOD,MOD"
line.word 0x8 "LMOD,Lower Modulus Register"
hexmask.word 0x8 0.--15. 1. "MOD,MOD"
line.word 0xA "UCOMP0,Upper Position Compare Register 0"
hexmask.word 0xA 0.--15. 1. "UCOMP0,UCOMP0"
line.word 0xC "LCOMP0,Lower Position Compare Register 0"
hexmask.word 0xC 0.--15. 1. "LCOMP0,LCOMP0"
wgroup.word 0x2C++0x1
line.word 0x0 "UCOMP1,Upper Position Compare 1"
hexmask.word 0x0 0.--15. 1. "UCOMP1,UCOMP1"
rgroup.word 0x2C++0x1
line.word 0x0 "UPOSH1,Upper Position Holder Register 1"
hexmask.word 0x0 0.--15. 1. "UPOSH1,UPOSH1"
wgroup.word 0x2E++0x1
line.word 0x0 "LCOMP1,Lower Position Compare 1"
hexmask.word 0x0 0.--15. 1. "LCOMP1,LCOMP1"
rgroup.word 0x2E++0x1
line.word 0x0 "LPOSH1,Lower Position Holder Register 1"
hexmask.word 0x0 0.--15. 1. "LPOSH1,LPOSH1"
wgroup.word 0x30++0x1
line.word 0x0 "UCOMP2,Upper Position Compare 2"
hexmask.word 0x0 0.--15. 1. "UCOMP2,UCOMP2"
rgroup.word 0x30++0x1
line.word 0x0 "UPOSH2,Upper Position Holder Register 3"
hexmask.word 0x0 0.--15. 1. "UPOSH2,UPOSH2"
wgroup.word 0x32++0x1
line.word 0x0 "LCOMP2,Lower Position Compare 2"
hexmask.word 0x0 0.--15. 1. "LCOMP2,LCOMP2"
rgroup.word 0x32++0x1
line.word 0x0 "LPOSH2,Lower Position Holder Register 2"
hexmask.word 0x0 0.--15. 1. "LPOSH2,LPOSH2"
wgroup.word 0x34++0x1
line.word 0x0 "UCOMP3,Upper Position Compare 3"
hexmask.word 0x0 0.--15. 1. "UCOMP3,UCOMP3"
rgroup.word 0x34++0x1
line.word 0x0 "UPOSH3,Upper Position Holder Register 3"
hexmask.word 0x0 0.--15. 1. "UPOSH3,UPOSH3"
wgroup.word 0x36++0x1
line.word 0x0 "LCOMP3,Lower Position Compare 3"
hexmask.word 0x0 0.--15. 1. "LCOMP3,LCOMP3"
rgroup.word 0x36++0x1
line.word 0x0 "LPOSH3,Lower Position Holder Register 3"
hexmask.word 0x0 0.--15. 1. "LPOSH3,LPOSH3"
group.word 0x38++0x7
line.word 0x0 "INTCTRL,Interrupt Control Register"
eventfld.word 0x0 15. "CMP3IRQ,Compare3 Interrupt Request" "0: No match has occurred (the position counter does..,1: COMP3 match has occurred (the position counter.."
bitfld.word 0x0 14. "CMP3IE,Compare3 Interrupt Enable" "0: Disabled,1: Enabled"
newline
eventfld.word 0x0 13. "CMP2IRQ,Compare2 Interrupt Request" "0: No match has occurred (the position counter does..,1: COMP2 match has occurred (the position counter.."
bitfld.word 0x0 12. "CMP2IE,Compare2 Interrupt Enable" "0: Disabled,1: Enabled"
newline
eventfld.word 0x0 11. "CMP1IRQ,Compare1 Interrupt Request" "0: No match has occurred (the position counter does..,1: COMP1 match has occurred (the position counter.."
bitfld.word 0x0 10. "CMP1IE,Compare1 Interrupt Enable" "0: Disabled,1: Enabled"
newline
eventfld.word 0x0 9. "CMP0IRQ,Compare 0 Interrupt Request" "0: No match has occurred (the position counter does..,1: COMP match has occurred (the position counter.."
bitfld.word 0x0 8. "CMP0IE,Compare 0 Interrupt Enable" "0: Disabled,1: Enabled"
newline
eventfld.word 0x0 7. "ROIRQ,Roll-over Interrupt Request" "0: No roll-over has occurred,1: Roll-over has occurred"
bitfld.word 0x0 6. "ROIE,Roll-over Interrupt Enable" "0: Disabled,1: Enabled"
newline
eventfld.word 0x0 5. "RUIRQ,Roll-under Interrupt Request" "0: No roll-under has occurred,1: Roll-under has occurred"
bitfld.word 0x0 4. "RUIE,Roll-under Interrupt Enable" "0: Disabled,1: Enabled"
newline
eventfld.word 0x0 3. "DIRIRQ,Count direction change interrupt" "0: Count direction unchanged,1: Count direction changed"
bitfld.word 0x0 2. "DIRIE,Count direction change interrupt enable" "0: Disabled,1: Enabled"
newline
eventfld.word 0x0 1. "SABIRQ,Simultaneous PHASEA and PHASEB Change Interrupt Request" "0: No simultaneous change of PHASEA and PHASEB has..,1: A simultaneous change of PHASEA and PHASEB has.."
bitfld.word 0x0 0. "SABIE,Simultaneous PHASEA and PHASEB Change Interrupt Enable" "0: Disabled,1: Enabled"
line.word 0x2 "WTR,Watchdog Timeout Register"
hexmask.word 0x2 0.--15. 1. "WDOG,WDOG"
line.word 0x4 "IMR,Input Monitor Register"
rbitfld.word 0x4 15. "DIR,Count Direction Flag Output" "0: Current count was in the down direction,1: Current count was in the up direction"
rbitfld.word 0x4 14. "DIRH,Count Direction Flag Hold" "0,1"
newline
rbitfld.word 0x4 11. "CMP3F,Position Compare3 Flag Output" "0: When the position counter value is less than..,1: When the position counter is greater or equal.."
rbitfld.word 0x4 10. "CMP2F,Position Compare2 Flag Output" "0: When the position counter is less than value of..,1: When the position counter is greater or equal.."
newline
rbitfld.word 0x4 9. "CMP1F,Position Compare1 Flag Output" "0: When the position counter is less than value of..,1: When the position counter is greater or equal.."
rbitfld.word 0x4 8. "CMPF0,Position Compare 0 Flag Output" "0: When the position counter is less than value of..,1: When the position counter is greater or equal.."
newline
bitfld.word 0x4 7. "FPHA,filter operation on PHASEA input" "0,1"
bitfld.word 0x4 6. "FPHB,filter operation on PHASEB input" "0,1"
newline
bitfld.word 0x4 5. "FIND_PRE,filter operation on INDEX/PRESET input" "0,1"
bitfld.word 0x4 4. "FHOM_ENA,filter operation on HOME/ENABLE input" "0,1"
newline
rbitfld.word 0x4 3. "PHA,PHA" "0,1"
rbitfld.word 0x4 2. "PHB,PHB" "0,1"
newline
rbitfld.word 0x4 1. "INDEX_PRESET,INDEX_PRESET" "0,1"
rbitfld.word 0x4 0. "HOME_ENABLE,HOME_ENABLE" "0,1"
line.word 0x6 "TST,Test Register"
bitfld.word 0x6 15. "TEN,Test Mode Enable" "0: Disabled,1: Enabled"
bitfld.word 0x6 14. "TCE,Test Counter Enable" "0: Disabled,1: Enabled"
newline
bitfld.word 0x6 13. "QDN,Quadrature Decoder Negative Signal" "0: Generates a positive quadrature decoder signal,1: Generates a negative quadrature decoder signal"
hexmask.word.byte 0x6 8.--12. 1. "TEST_PERIOD,TEST_PERIOD"
newline
hexmask.word.byte 0x6 0.--7. 1. "TEST_COUNT,TEST_COUNT"
rgroup.word 0x50++0x3
line.word 0x0 "UVERID,Upper VERID"
hexmask.word 0x0 0.--15. 1. "UVERID,UVERID"
line.word 0x2 "LVERID,Lower VERID"
hexmask.word 0x2 0.--15. 1. "LVERID,LVERID"
tree.end
endif
sif (cpuis("MC?A156*"))
tree "QDC1"
base ad:0x400A8000
group.word 0x0++0x5
line.word 0x0 "CTRL,Control Register"
eventfld.word 0x0 15. "HIRQ,HOME/ENABLE Signal Transition Interrupt Request" "0: No transition on the HOME/ENABLE signal has..,1: A transition on the HOME/ENABLE signal has.."
bitfld.word 0x0 14. "HIE,HOME/ENABLE Interrupt Enable" "0: Disabled,1: Enabled"
newline
bitfld.word 0x0 13. "HIP,Enable HOME to Initialize Position Counter UPOS/LPOS" "0: No action,1: HOME signal initializes the position counter"
bitfld.word 0x0 12. "HNE,Use Negative Edge of HOME/ENABLE Input" "0: When CTRL[OPMODE] = 0 use HOME positive edge to..,1: When CTRL[OPMODE] = 0 use HOME negative edge to.."
newline
bitfld.word 0x0 11. "SWIP,Software-Triggered Initialization of Position Counters UPOS and LPOS" "0: No action,1: Initialize position counter"
bitfld.word 0x0 10. "REV,Enable Reverse Direction Counting" "0: Count normally and the position counter..,1: Count in the reverse direction and the position.."
newline
bitfld.word 0x0 9. "PH1,Enable Single Phase Mode" "0: Standard quadrature decoder where PHASEA and..,1: Single phase mode bypass the quadrature decoder.."
eventfld.word 0x0 8. "XIRQ,INDEX/PRESET Pulse Interrupt Request" "0: INDEX/PRESET pulse has not occurred,1: INDEX/PRESET pulse has occurred"
newline
bitfld.word 0x0 7. "XIE,INDEX/PRESET Pulse Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.word 0x0 6. "XIP,INDEX Triggered Initialization of Position Counters UPOS and LPOS" "0: INDEX pulse does not initialize the position..,1: INDEX pulse initializes the position counter"
newline
bitfld.word 0x0 5. "XNE,Select Positive/Negative Edge of INDEX/PRESET Pulse" "0: Use positive edge of INDEX/PRESET pulse,1: Use negative edge of INDEX/PRESET pulse"
eventfld.word 0x0 4. "WDIRQ,Watchdog Timeout Interrupt Request" "0: No Watchdog timeout interrupt has occurred,1: Watchdog timeout interrupt has occurred"
newline
bitfld.word 0x0 3. "WDIE,Watchdog Timeout Interrupt Enable" "0: Disabled,1: Enabled"
bitfld.word 0x0 2. "WDE,Watchdog Enable" "0: Disabled,1: Enabled"
newline
bitfld.word 0x0 1. "DMAEN,DMA Enable" "0: DMA is disabled,1: DMA is enabled. DMA request asserts.."
bitfld.word 0x0 0. "LDOK,Load Okay" "0: No loading action taken. Users can write new..,1: Outer-set values are ready to be loaded into.."
line.word 0x2 "CTRL2,Control 2 Register"
bitfld.word 0x2 14.--15. "CMODE,Counting Mode" "0,1,2,3"
bitfld.word 0x2 13. "ONCE,Count Once" "0: Position counter counts repeatedly,1: Position counter counts until roll-over or.."
newline
bitfld.word 0x2 12. "INITPOS,Initial Position Register" "0: Don't initialize position counter on rising edge..,1: Initialize position counter on rising edge of.."
bitfld.word 0x2 11. "EMIP,Enables/disables the position counter to be initialized by Index Event Edge Mark" "0: disables the position counter to be initialized..,1: enables the position counter to be initialized.."
newline
bitfld.word 0x2 10. "PMEN,Period measurement function enable" "0: Period measurement functions are not used. POSD..,1: Period measurement functions are used. POSD is.."
bitfld.word 0x2 9. "OUTCTL,Output Control" "0: POS_MATCH[x](x range is 0-3) is asserted when..,1: All POS_MATCH[x](x range is 0-3) are asserted a.."
newline
bitfld.word 0x2 8. "REVMOD,Revolution Counter Modulus Enable" "0: Use INDEX pulse to increment/decrement..,1: Use modulus counting roll-over/under to.."
bitfld.word 0x2 3. "LDMOD,Buffered Register Load (Update) Mode Select" "0: Buffered registers are loaded and take effect..,1: Buffered registers are loaded and take effect at.."
newline
bitfld.word 0x2 2. "OPMODE,Operation Mode Select" "0: Decode Mode: Input nodes INDEX/PRESET and..,1: Count Mode: Input nodes INDEX/PRESET and.."
bitfld.word 0x2 1. "UPDPOS,Update Position Registers" "0,1"
newline
bitfld.word 0x2 0. "UPDHLD,Update Hold Registers" "0,1"
line.word 0x4 "FILT,Input Filter Register"
hexmask.word.byte 0x4 12.--15. 1. "PRSC,Prescaler"
bitfld.word 0x4 11. "FILT_CS,Filter Clock Source selection" "0: Peripheral Clock,1: Prescaled peripheral clock by PRSC"
newline
bitfld.word 0x4 8.--10. "FILT_CNT,Input Filter Sample Count" "0,1,2,3,4,5,6,7"
hexmask.word.byte 0x4 0.--7. 1. "FILT_PER,Input Filter Sample Period"
rgroup.word 0x6++0x5
line.word 0x0 "LASTEDGE,Last Edge Time Register"
hexmask.word 0x0 0.--15. 1. "LASTEDGE,Last Edge Time Counter"
line.word 0x2 "POSDPER,Position Difference Period Counter Register"
hexmask.word 0x2 0.--15. 1. "POSDPER,Position difference period"
line.word 0x4 "POSDPERBFR,Position Difference Period Buffer Register"
hexmask.word 0x4 0.--15. 1. "POSDPERBFR,Position difference period buffer"
group.word 0xC++0x5
line.word 0x0 "UPOS,Upper Position Counter Register"
hexmask.word 0x0 0.--15. 1. "POS,POS"
line.word 0x2 "LPOS,Lower Position Counter Register"
hexmask.word 0x2 0.--15. 1. "POS,POS"
line.word 0x4 "POSD,Position Difference Counter Register"
hexmask.word 0x4 0.--15. 1. "POSD,POSD"
rgroup.word 0x12++0xB
line.word 0x0 "POSDH,Position Difference Hold Register"
hexmask.word 0x0 0.--15. 1. "POSDH,POSDH"
line.word 0x2 "UPOSH,Upper Position Hold Register"
hexmask.word 0x2 0.--15. 1. "POSH,POSH"
line.word 0x4 "LPOSH,Lower Position Hold Register"
hexmask.word 0x4 0.--15. 1. "LPOSH,POSH"
line.word 0x6 "LASTEDGEH,Last Edge Time Hold Register"
hexmask.word 0x6 0.--15. 1. "LASTEDGEH,Last Edge Time Hold"
line.word 0x8 "POSDPERH,Position Difference Period Hold Register"
hexmask.word 0x8 0.--15. 1. "POSDPERH,Position difference period hold"
line.word 0xA "REVH,Revolution Hold Register"
hexmask.word 0xA 0.--15. 1. "REVH,REVH"
group.word 0x1E++0xD
line.word 0x0 "REV,Revolution Counter Register"
hexmask.word 0x0 0.--15. 1. "REV,REV"
line.word 0x2 "UINIT,Upper Initialization Register"
hexmask.word 0x2 0.--15. 1. "INIT,INIT"
line.word 0x4 "LINIT,Lower Initialization Register"
hexmask.word 0x4 0.--15. 1. "INIT,INIT"
line.word 0x6 "UMOD,Upper Modulus Register"
hexmask.word 0x6 0.--15. 1. "MOD,MOD"
line.word 0x8 "LMOD,Lower Modulus Register"
hexmask.word 0x8 0.--15. 1. "MOD,MOD"
line.word 0xA "UCOMP0,Upper Position Compare Register 0"
hexmask.word 0xA 0.--15. 1. "UCOMP0,UCOMP0"
line.word 0xC "LCOMP0,Lower Position Compare Register 0"
hexmask.word 0xC 0.--15. 1. "LCOMP0,LCOMP0"
wgroup.word 0x2C++0x1
line.word 0x0 "UCOMP1,Upper Position Compare 1"
hexmask.word 0x0 0.--15. 1. "UCOMP1,UCOMP1"
rgroup.word 0x2C++0x1
line.word 0x0 "UPOSH1,Upper Position Holder Register 1"
hexmask.word 0x0 0.--15. 1. "UPOSH1,UPOSH1"
wgroup.word 0x2E++0x1
line.word 0x0 "LCOMP1,Lower Position Compare 1"
hexmask.word 0x0 0.--15. 1. "LCOMP1,LCOMP1"
rgroup.word 0x2E++0x1
line.word 0x0 "LPOSH1,Lower Position Holder Register 1"
hexmask.word 0x0 0.--15. 1. "LPOSH1,LPOSH1"
wgroup.word 0x30++0x1
line.word 0x0 "UCOMP2,Upper Position Compare 2"
hexmask.word 0x0 0.--15. 1. "UCOMP2,UCOMP2"
rgroup.word 0x30++0x1
line.word 0x0 "UPOSH2,Upper Position Holder Register 3"
hexmask.word 0x0 0.--15. 1. "UPOSH2,UPOSH2"
wgroup.word 0x32++0x1
line.word 0x0 "LCOMP2,Lower Position Compare 2"
hexmask.word 0x0 0.--15. 1. "LCOMP2,LCOMP2"
rgroup.word 0x32++0x1
line.word 0x0 "LPOSH2,Lower Position Holder Register 2"
hexmask.word 0x0 0.--15. 1. "LPOSH2,LPOSH2"
wgroup.word 0x34++0x1
line.word 0x0 "UCOMP3,Upper Position Compare 3"
hexmask.word 0x0 0.--15. 1. "UCOMP3,UCOMP3"
rgroup.word 0x34++0x1
line.word 0x0 "UPOSH3,Upper Position Holder Register 3"
hexmask.word 0x0 0.--15. 1. "UPOSH3,UPOSH3"
wgroup.word 0x36++0x1
line.word 0x0 "LCOMP3,Lower Position Compare 3"
hexmask.word 0x0 0.--15. 1. "LCOMP3,LCOMP3"
rgroup.word 0x36++0x1
line.word 0x0 "LPOSH3,Lower Position Holder Register 3"
hexmask.word 0x0 0.--15. 1. "LPOSH3,LPOSH3"
group.word 0x38++0x7
line.word 0x0 "INTCTRL,Interrupt Control Register"
eventfld.word 0x0 15. "CMP3IRQ,Compare3 Interrupt Request" "0: No match has occurred (the position counter does..,1: COMP3 match has occurred (the position counter.."
bitfld.word 0x0 14. "CMP3IE,Compare3 Interrupt Enable" "0: Disabled,1: Enabled"
newline
eventfld.word 0x0 13. "CMP2IRQ,Compare2 Interrupt Request" "0: No match has occurred (the position counter does..,1: COMP2 match has occurred (the position counter.."
bitfld.word 0x0 12. "CMP2IE,Compare2 Interrupt Enable" "0: Disabled,1: Enabled"
newline
eventfld.word 0x0 11. "CMP1IRQ,Compare1 Interrupt Request" "0: No match has occurred (the position counter does..,1: COMP1 match has occurred (the position counter.."
bitfld.word 0x0 10. "CMP1IE,Compare1 Interrupt Enable" "0: Disabled,1: Enabled"
newline
eventfld.word 0x0 9. "CMP0IRQ,Compare 0 Interrupt Request" "0: No match has occurred (the position counter does..,1: COMP match has occurred (the position counter.."
bitfld.word 0x0 8. "CMP0IE,Compare 0 Interrupt Enable" "0: Disabled,1: Enabled"
newline
eventfld.word 0x0 7. "ROIRQ,Roll-over Interrupt Request" "0: No roll-over has occurred,1: Roll-over has occurred"
bitfld.word 0x0 6. "ROIE,Roll-over Interrupt Enable" "0: Disabled,1: Enabled"
newline
eventfld.word 0x0 5. "RUIRQ,Roll-under Interrupt Request" "0: No roll-under has occurred,1: Roll-under has occurred"
bitfld.word 0x0 4. "RUIE,Roll-under Interrupt Enable" "0: Disabled,1: Enabled"
newline
eventfld.word 0x0 3. "DIRIRQ,Count direction change interrupt" "0: Count direction unchanged,1: Count direction changed"
bitfld.word 0x0 2. "DIRIE,Count direction change interrupt enable" "0: Disabled,1: Enabled"
newline
eventfld.word 0x0 1. "SABIRQ,Simultaneous PHASEA and PHASEB Change Interrupt Request" "0: No simultaneous change of PHASEA and PHASEB has..,1: A simultaneous change of PHASEA and PHASEB has.."
bitfld.word 0x0 0. "SABIE,Simultaneous PHASEA and PHASEB Change Interrupt Enable" "0: Disabled,1: Enabled"
line.word 0x2 "WTR,Watchdog Timeout Register"
hexmask.word 0x2 0.--15. 1. "WDOG,WDOG"
line.word 0x4 "IMR,Input Monitor Register"
rbitfld.word 0x4 15. "DIR,Count Direction Flag Output" "0: Current count was in the down direction,1: Current count was in the up direction"
rbitfld.word 0x4 14. "DIRH,Count Direction Flag Hold" "0,1"
newline
rbitfld.word 0x4 11. "CMP3F,Position Compare3 Flag Output" "0: When the position counter value is less than..,1: When the position counter is greater or equal.."
rbitfld.word 0x4 10. "CMP2F,Position Compare2 Flag Output" "0: When the position counter is less than value of..,1: When the position counter is greater or equal.."
newline
rbitfld.word 0x4 9. "CMP1F,Position Compare1 Flag Output" "0: When the position counter is less than value of..,1: When the position counter is greater or equal.."
rbitfld.word 0x4 8. "CMPF0,Position Compare 0 Flag Output" "0: When the position counter is less than value of..,1: When the position counter is greater or equal.."
newline
bitfld.word 0x4 7. "FPHA,filter operation on PHASEA input" "0,1"
bitfld.word 0x4 6. "FPHB,filter operation on PHASEB input" "0,1"
newline
bitfld.word 0x4 5. "FIND_PRE,filter operation on INDEX/PRESET input" "0,1"
bitfld.word 0x4 4. "FHOM_ENA,filter operation on HOME/ENABLE input" "0,1"
newline
rbitfld.word 0x4 3. "PHA,PHA" "0,1"
rbitfld.word 0x4 2. "PHB,PHB" "0,1"
newline
rbitfld.word 0x4 1. "INDEX_PRESET,INDEX_PRESET" "0,1"
rbitfld.word 0x4 0. "HOME_ENABLE,HOME_ENABLE" "0,1"
line.word 0x6 "TST,Test Register"
bitfld.word 0x6 15. "TEN,Test Mode Enable" "0: Disabled,1: Enabled"
bitfld.word 0x6 14. "TCE,Test Counter Enable" "0: Disabled,1: Enabled"
newline
bitfld.word 0x6 13. "QDN,Quadrature Decoder Negative Signal" "0: Generates a positive quadrature decoder signal,1: Generates a negative quadrature decoder signal"
hexmask.word.byte 0x6 8.--12. 1. "TEST_PERIOD,TEST_PERIOD"
newline
hexmask.word.byte 0x6 0.--7. 1. "TEST_COUNT,TEST_COUNT"
rgroup.word 0x50++0x3
line.word 0x0 "UVERID,Upper VERID"
hexmask.word 0x0 0.--15. 1. "UVERID,UVERID"
line.word 0x2 "LVERID,Lower VERID"
hexmask.word 0x2 0.--15. 1. "LVERID,LVERID"
tree.end
endif
tree.end
tree "RGPIO (General Purpose Input/Output)"
base ad:0x0
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*")||cpuis("MC?A144*"))
tree "GPIO0"
base ad:0x40102000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "IRQNUM,Interrupt Number"
group.long 0x40++0xF
line.long 0x0 "PDOR,Port Data Output"
bitfld.long 0x0 31. "PDO31,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 30. "PDO30,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 29. "PDO29,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 28. "PDO28,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 27. "PDO27,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 26. "PDO26,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 25. "PDO25,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 24. "PDO24,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 23. "PDO23,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 22. "PDO22,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 21. "PDO21,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 20. "PDO20,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 19. "PDO19,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 18. "PDO18,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 17. "PDO17,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 16. "PDO16,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 15. "PDO15,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 14. "PDO14,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 13. "PDO13,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 12. "PDO12,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 11. "PDO11,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 10. "PDO10,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 9. "PDO9,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 8. "PDO8,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 7. "PDO7,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 6. "PDO6,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 5. "PDO5,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 4. "PDO4,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 3. "PDO3,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 2. "PDO2,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 1. "PDO1,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 0. "PDO0,Port Data Output" "0: Logic level 0,1: Logic level 1"
line.long 0x4 "PSOR,Port Set Output"
bitfld.long 0x4 31. "PTSO31,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 30. "PTSO30,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 29. "PTSO29,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 28. "PTSO28,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 27. "PTSO27,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 26. "PTSO26,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 25. "PTSO25,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 24. "PTSO24,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 23. "PTSO23,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 22. "PTSO22,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 21. "PTSO21,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 20. "PTSO20,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 19. "PTSO19,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 18. "PTSO18,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 17. "PTSO17,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 16. "PTSO16,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 15. "PTSO15,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 14. "PTSO14,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 13. "PTSO13,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 12. "PTSO12,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 11. "PTSO11,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 10. "PTSO10,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 9. "PTSO9,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 8. "PTSO8,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 7. "PTSO7,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 6. "PTSO6,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 5. "PTSO5,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 4. "PTSO4,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 3. "PTSO3,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 2. "PTSO2,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 1. "PTSO1,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 0. "PTSO0,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
line.long 0x8 "PCOR,Port Clear Output"
bitfld.long 0x8 31. "PTCO31,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 30. "PTCO30,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 29. "PTCO29,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 28. "PTCO28,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 27. "PTCO27,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 26. "PTCO26,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 25. "PTCO25,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 24. "PTCO24,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 23. "PTCO23,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 22. "PTCO22,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 21. "PTCO21,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 20. "PTCO20,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 19. "PTCO19,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 18. "PTCO18,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 17. "PTCO17,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 16. "PTCO16,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 15. "PTCO15,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 14. "PTCO14,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 13. "PTCO13,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 12. "PTCO12,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 11. "PTCO11,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 10. "PTCO10,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 9. "PTCO9,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 8. "PTCO8,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 7. "PTCO7,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 6. "PTCO6,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 5. "PTCO5,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 4. "PTCO4,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 3. "PTCO3,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 2. "PTCO2,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 1. "PTCO1,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 0. "PTCO0,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
line.long 0xC "PTOR,Port Toggle Output"
bitfld.long 0xC 31. "PTTO31,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 30. "PTTO30,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 29. "PTTO29,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 28. "PTTO28,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 27. "PTTO27,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 26. "PTTO26,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 25. "PTTO25,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 24. "PTTO24,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 23. "PTTO23,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 22. "PTTO22,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 21. "PTTO21,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 20. "PTTO20,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 19. "PTTO19,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 18. "PTTO18,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 17. "PTTO17,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 16. "PTTO16,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 15. "PTTO15,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 14. "PTTO14,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 13. "PTTO13,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 12. "PTTO12,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 11. "PTTO11,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 10. "PTTO10,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 9. "PTTO9,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 8. "PTTO8,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 7. "PTTO7,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 6. "PTTO6,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 5. "PTTO5,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 4. "PTTO4,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 3. "PTTO3,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 2. "PTTO2,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 1. "PTTO1,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 0. "PTTO0,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
rgroup.long 0x50++0x3
line.long 0x0 "PDIR,Port Data Input"
bitfld.long 0x0 31. "PDI31,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 30. "PDI30,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 29. "PDI29,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 28. "PDI28,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 27. "PDI27,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 26. "PDI26,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 25. "PDI25,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 24. "PDI24,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 23. "PDI23,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 22. "PDI22,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 21. "PDI21,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 20. "PDI20,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 19. "PDI19,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 18. "PDI18,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 17. "PDI17,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 16. "PDI16,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 15. "PDI15,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 14. "PDI14,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 13. "PDI13,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 12. "PDI12,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 11. "PDI11,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 10. "PDI10,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 9. "PDI9,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 8. "PDI8,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 7. "PDI7,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 6. "PDI6,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 5. "PDI5,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 4. "PDI4,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 3. "PDI3,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 2. "PDI2,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 1. "PDI1,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 0. "PDI0,Port Data Input" "0: Logic 0,1: Logic 1"
group.long 0x54++0x7
line.long 0x0 "PDDR,Port Data Direction"
bitfld.long 0x0 31. "PDD31,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 30. "PDD30,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 29. "PDD29,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 28. "PDD28,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 27. "PDD27,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 26. "PDD26,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 25. "PDD25,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 24. "PDD24,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 23. "PDD23,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 22. "PDD22,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 21. "PDD21,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 20. "PDD20,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 19. "PDD19,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 18. "PDD18,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 17. "PDD17,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 16. "PDD16,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 15. "PDD15,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 14. "PDD14,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 13. "PDD13,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 12. "PDD12,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 11. "PDD11,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 10. "PDD10,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 9. "PDD9,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 8. "PDD8,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 7. "PDD7,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 6. "PDD6,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 5. "PDD5,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 4. "PDD4,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 3. "PDD3,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 2. "PDD2,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 1. "PDD1,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 0. "PDD0,Port Data Direction" "0: Input,1: Output"
line.long 0x4 "PIDR,Port Input Disable"
bitfld.long 0x4 31. "PID31,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 30. "PID30,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 29. "PID29,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 28. "PID28,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 27. "PID27,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 26. "PID26,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 25. "PID25,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 24. "PID24,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 23. "PID23,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 22. "PID22,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 21. "PID21,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 20. "PID20,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 19. "PID19,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 18. "PID18,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 17. "PID17,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 16. "PID16,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 15. "PID15,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 14. "PID14,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 13. "PID13,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 12. "PID12,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 11. "PID11,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 10. "PID10,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 9. "PID9,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 8. "PID8,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 7. "PID7,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 6. "PID6,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 5. "PID5,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 4. "PID4,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 3. "PID3,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 2. "PID2,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 1. "PID1,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 0. "PID0,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x60)++0x0
line.byte 0x0 "PDR[$1],Pin Data"
bitfld.byte 0x0 0. "PD,Pin Data (I/O)" "0: Logic zero,1: Logic one"
repeat.end
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
repeat 32. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x80)++0x3
line.long 0x0 "ICR[$1],Interrupt Control index"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
repeat.end
endif
sif (cpuis("MC?A144*"))
group.long 0x80++0x7F
line.long 0x0 "ICR0,Interrupt Control 0"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4 "ICR1,Interrupt Control 1"
eventfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x8 "ICR2,Interrupt Control 2"
eventfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0xC "ICR3,Interrupt Control 3"
eventfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x10 "ICR4,Interrupt Control 4"
eventfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x14 "ICR5,Interrupt Control 5"
eventfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x18 "ICR6,Interrupt Control 6"
eventfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x1C "ICR7,Interrupt Control 7"
eventfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x20 "ICR8,Interrupt Control 8"
eventfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x24 "ICR9,Interrupt Control 9"
eventfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x28 "ICR10,Interrupt Control 10"
eventfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x2C "ICR11,Interrupt Control 11"
eventfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x30 "ICR12,Interrupt Control 12"
eventfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x34 "ICR13,Interrupt Control 13"
eventfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x38 "ICR14,Interrupt Control 14"
eventfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x3C "ICR15,Interrupt Control 15"
eventfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x40 "ICR16,Interrupt Control 16"
eventfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x44 "ICR17,Interrupt Control 17"
eventfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x48 "ICR18,Interrupt Control 18"
eventfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4C "ICR19,Interrupt Control 19"
eventfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x50 "ICR20,Interrupt Control 20"
eventfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x54 "ICR21,Interrupt Control 21"
eventfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x58 "ICR22,Interrupt Control 22"
eventfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x5C "ICR23,Interrupt Control 23"
eventfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x60 "ICR24,Interrupt Control 24"
eventfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x64 "ICR25,Interrupt Control 25"
eventfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x68 "ICR26,Interrupt Control 26"
eventfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x6C "ICR27,Interrupt Control 27"
eventfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x70 "ICR28,Interrupt Control 28"
eventfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x74 "ICR29,Interrupt Control 29"
eventfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x78 "ICR30,Interrupt Control 30"
eventfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x7C "ICR31,Interrupt Control 31"
eventfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration"
endif
group.long 0x100++0x7
line.long 0x0 "GICLR,Global Interrupt Control Low"
hexmask.long.word 0x0 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x0 15. "GIWE15,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 14. "GIWE14,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 13. "GIWE13,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 12. "GIWE12,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 11. "GIWE11,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 10. "GIWE10,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 9. "GIWE9,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 8. "GIWE8,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 7. "GIWE7,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 6. "GIWE6,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 5. "GIWE5,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 4. "GIWE4,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 3. "GIWE3,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 2. "GIWE2,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 1. "GIWE1,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 0. "GIWE0,Global Interrupt Write Enable" "0: Not updated,1: Updated"
line.long 0x4 "GICHR,Global Interrupt Control High"
hexmask.long.word 0x4 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x4 15. "GIWE31,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 14. "GIWE30,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 13. "GIWE29,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 12. "GIWE28,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 11. "GIWE27,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 10. "GIWE26,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 9. "GIWE25,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 8. "GIWE24,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 7. "GIWE23,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 6. "GIWE22,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 5. "GIWE21,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 4. "GIWE20,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 3. "GIWE19,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 2. "GIWE18,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 1. "GIWE17,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 0. "GIWE16,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
group.long 0x120++0x3
line.long 0x0 "ISFR0,Interrupt Status Flag"
eventfld.long 0x0 31. "ISF31,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 30. "ISF30,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 29. "ISF29,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 28. "ISF28,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 27. "ISF27,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 26. "ISF26,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 25. "ISF25,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 24. "ISF24,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 23. "ISF23,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 22. "ISF22,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 21. "ISF21,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 20. "ISF20,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 19. "ISF19,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 18. "ISF18,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 17. "ISF17,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 16. "ISF16,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 15. "ISF15,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 14. "ISF14,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 13. "ISF13,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 12. "ISF12,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 11. "ISF11,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 10. "ISF10,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 9. "ISF9,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 8. "ISF8,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 7. "ISF7,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 6. "ISF6,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 5. "ISF5,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 4. "ISF4,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 3. "ISF3,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 2. "ISF2,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 1. "ISF1,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 0. "ISF0,Interrupt Status Flag" "0: Not detected,1: Detected"
tree.end
endif
sif (cpuis("MC?A145*"))
tree "GPIO0"
base ad:0x40102000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "IRQNUM,Interrupt Number"
group.long 0x40++0xF
line.long 0x0 "PDOR,Port Data Output"
bitfld.long 0x0 31. "PDO31,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 30. "PDO30,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 29. "PDO29,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 28. "PDO28,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 27. "PDO27,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 26. "PDO26,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 25. "PDO25,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 24. "PDO24,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 23. "PDO23,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 22. "PDO22,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 21. "PDO21,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 20. "PDO20,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 19. "PDO19,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 18. "PDO18,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 17. "PDO17,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 16. "PDO16,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 15. "PDO15,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 14. "PDO14,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 13. "PDO13,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 12. "PDO12,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 11. "PDO11,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 10. "PDO10,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 9. "PDO9,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 8. "PDO8,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 7. "PDO7,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 6. "PDO6,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 5. "PDO5,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 4. "PDO4,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 3. "PDO3,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 2. "PDO2,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 1. "PDO1,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 0. "PDO0,Port Data Output" "0: Logic level 0,1: Logic level 1"
line.long 0x4 "PSOR,Port Set Output"
bitfld.long 0x4 31. "PTSO31,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 30. "PTSO30,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 29. "PTSO29,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 28. "PTSO28,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 27. "PTSO27,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 26. "PTSO26,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 25. "PTSO25,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 24. "PTSO24,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 23. "PTSO23,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 22. "PTSO22,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 21. "PTSO21,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 20. "PTSO20,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 19. "PTSO19,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 18. "PTSO18,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 17. "PTSO17,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 16. "PTSO16,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 15. "PTSO15,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 14. "PTSO14,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 13. "PTSO13,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 12. "PTSO12,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 11. "PTSO11,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 10. "PTSO10,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 9. "PTSO9,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 8. "PTSO8,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 7. "PTSO7,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 6. "PTSO6,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 5. "PTSO5,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 4. "PTSO4,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 3. "PTSO3,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 2. "PTSO2,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 1. "PTSO1,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 0. "PTSO0,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
line.long 0x8 "PCOR,Port Clear Output"
bitfld.long 0x8 31. "PTCO31,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 30. "PTCO30,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 29. "PTCO29,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 28. "PTCO28,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 27. "PTCO27,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 26. "PTCO26,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 25. "PTCO25,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 24. "PTCO24,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 23. "PTCO23,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 22. "PTCO22,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 21. "PTCO21,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 20. "PTCO20,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 19. "PTCO19,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 18. "PTCO18,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 17. "PTCO17,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 16. "PTCO16,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 15. "PTCO15,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 14. "PTCO14,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 13. "PTCO13,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 12. "PTCO12,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 11. "PTCO11,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 10. "PTCO10,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 9. "PTCO9,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 8. "PTCO8,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 7. "PTCO7,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 6. "PTCO6,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 5. "PTCO5,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 4. "PTCO4,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 3. "PTCO3,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 2. "PTCO2,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 1. "PTCO1,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 0. "PTCO0,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
line.long 0xC "PTOR,Port Toggle Output"
bitfld.long 0xC 31. "PTTO31,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 30. "PTTO30,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 29. "PTTO29,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 28. "PTTO28,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 27. "PTTO27,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 26. "PTTO26,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 25. "PTTO25,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 24. "PTTO24,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 23. "PTTO23,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 22. "PTTO22,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 21. "PTTO21,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 20. "PTTO20,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 19. "PTTO19,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 18. "PTTO18,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 17. "PTTO17,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 16. "PTTO16,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 15. "PTTO15,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 14. "PTTO14,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 13. "PTTO13,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 12. "PTTO12,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 11. "PTTO11,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 10. "PTTO10,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 9. "PTTO9,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 8. "PTTO8,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 7. "PTTO7,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 6. "PTTO6,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 5. "PTTO5,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 4. "PTTO4,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 3. "PTTO3,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 2. "PTTO2,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 1. "PTTO1,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 0. "PTTO0,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
rgroup.long 0x50++0x3
line.long 0x0 "PDIR,Port Data Input"
bitfld.long 0x0 31. "PDI31,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 30. "PDI30,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 29. "PDI29,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 28. "PDI28,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 27. "PDI27,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 26. "PDI26,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 25. "PDI25,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 24. "PDI24,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 23. "PDI23,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 22. "PDI22,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 21. "PDI21,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 20. "PDI20,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 19. "PDI19,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 18. "PDI18,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 17. "PDI17,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 16. "PDI16,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 15. "PDI15,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 14. "PDI14,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 13. "PDI13,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 12. "PDI12,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 11. "PDI11,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 10. "PDI10,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 9. "PDI9,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 8. "PDI8,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 7. "PDI7,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 6. "PDI6,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 5. "PDI5,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 4. "PDI4,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 3. "PDI3,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 2. "PDI2,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 1. "PDI1,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 0. "PDI0,Port Data Input" "0: Logic 0,1: Logic 1"
group.long 0x54++0x7
line.long 0x0 "PDDR,Port Data Direction"
bitfld.long 0x0 31. "PDD31,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 30. "PDD30,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 29. "PDD29,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 28. "PDD28,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 27. "PDD27,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 26. "PDD26,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 25. "PDD25,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 24. "PDD24,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 23. "PDD23,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 22. "PDD22,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 21. "PDD21,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 20. "PDD20,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 19. "PDD19,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 18. "PDD18,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 17. "PDD17,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 16. "PDD16,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 15. "PDD15,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 14. "PDD14,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 13. "PDD13,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 12. "PDD12,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 11. "PDD11,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 10. "PDD10,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 9. "PDD9,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 8. "PDD8,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 7. "PDD7,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 6. "PDD6,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 5. "PDD5,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 4. "PDD4,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 3. "PDD3,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 2. "PDD2,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 1. "PDD1,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 0. "PDD0,Port Data Direction" "0: Input,1: Output"
line.long 0x4 "PIDR,Port Input Disable"
bitfld.long 0x4 31. "PID31,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 30. "PID30,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 29. "PID29,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 28. "PID28,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 27. "PID27,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 26. "PID26,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 25. "PID25,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 24. "PID24,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 23. "PID23,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 22. "PID22,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 21. "PID21,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 20. "PID20,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 19. "PID19,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 18. "PID18,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 17. "PID17,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 16. "PID16,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 15. "PID15,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 14. "PID14,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 13. "PID13,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 12. "PID12,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 11. "PID11,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 10. "PID10,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 9. "PID9,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 8. "PID8,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 7. "PID7,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 6. "PID6,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 5. "PID5,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 4. "PID4,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 3. "PID3,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 2. "PID2,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 1. "PID1,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 0. "PID0,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x60)++0x0
line.byte 0x0 "PDR[$1],Pin Data"
bitfld.byte 0x0 0. "PD,Pin Data (I/O)" "0: Logic zero,1: Logic one"
repeat.end
group.long 0x80++0x87
line.long 0x0 "ICR0,Interrupt Control 0"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4 "ICR1,Interrupt Control 1"
eventfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x8 "ICR2,Interrupt Control 2"
eventfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0xC "ICR3,Interrupt Control 3"
eventfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x10 "ICR4,Interrupt Control 4"
eventfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x14 "ICR5,Interrupt Control 5"
eventfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x18 "ICR6,Interrupt Control 6"
eventfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x1C "ICR7,Interrupt Control 7"
eventfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x20 "ICR8,Interrupt Control 8"
eventfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x24 "ICR9,Interrupt Control 9"
eventfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x28 "ICR10,Interrupt Control 10"
eventfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x2C "ICR11,Interrupt Control 11"
eventfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x30 "ICR12,Interrupt Control 12"
eventfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x34 "ICR13,Interrupt Control 13"
eventfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x38 "ICR14,Interrupt Control 14"
eventfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x3C "ICR15,Interrupt Control 15"
eventfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x40 "ICR16,Interrupt Control 16"
eventfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x44 "ICR17,Interrupt Control 17"
eventfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x48 "ICR18,Interrupt Control 18"
eventfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4C "ICR19,Interrupt Control 19"
eventfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x50 "ICR20,Interrupt Control 20"
eventfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x54 "ICR21,Interrupt Control 21"
eventfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x58 "ICR22,Interrupt Control 22"
eventfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x5C "ICR23,Interrupt Control 23"
eventfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x60 "ICR24,Interrupt Control 24"
eventfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x64 "ICR25,Interrupt Control 25"
eventfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x68 "ICR26,Interrupt Control 26"
eventfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x6C "ICR27,Interrupt Control 27"
eventfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x70 "ICR28,Interrupt Control 28"
eventfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x74 "ICR29,Interrupt Control 29"
eventfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x78 "ICR30,Interrupt Control 30"
eventfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x7C "ICR31,Interrupt Control 31"
eventfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x80 "GICLR,Global Interrupt Control Low"
hexmask.long.word 0x80 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x80 15. "GIWE15,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 14. "GIWE14,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 13. "GIWE13,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 12. "GIWE12,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 11. "GIWE11,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 10. "GIWE10,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 9. "GIWE9,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 8. "GIWE8,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 7. "GIWE7,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 6. "GIWE6,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 5. "GIWE5,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 4. "GIWE4,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 3. "GIWE3,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 2. "GIWE2,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 1. "GIWE1,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 0. "GIWE0,Global Interrupt Write Enable" "0: Not updated,1: Updated"
line.long 0x84 "GICHR,Global Interrupt Control High"
hexmask.long.word 0x84 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x84 15. "GIWE31,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 14. "GIWE30,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 13. "GIWE29,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 12. "GIWE28,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 11. "GIWE27,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 10. "GIWE26,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 9. "GIWE25,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 8. "GIWE24,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 7. "GIWE23,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 6. "GIWE22,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 5. "GIWE21,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 4. "GIWE20,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 3. "GIWE19,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 2. "GIWE18,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 1. "GIWE17,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 0. "GIWE16,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
group.long 0x120++0x3
line.long 0x0 "ISFR0,Interrupt Status Flag"
eventfld.long 0x0 31. "ISF31,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 30. "ISF30,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 29. "ISF29,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 28. "ISF28,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 27. "ISF27,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 26. "ISF26,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 25. "ISF25,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 24. "ISF24,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 23. "ISF23,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 22. "ISF22,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 21. "ISF21,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 20. "ISF20,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 19. "ISF19,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 18. "ISF18,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 17. "ISF17,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 16. "ISF16,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 15. "ISF15,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 14. "ISF14,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 13. "ISF13,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 12. "ISF12,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 11. "ISF11,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 10. "ISF10,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 9. "ISF9,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 8. "ISF8,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 7. "ISF7,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 6. "ISF6,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 5. "ISF5,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 4. "ISF4,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 3. "ISF3,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 2. "ISF2,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 1. "ISF1,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 0. "ISF0,Interrupt Status Flag" "0: Not detected,1: Detected"
tree.end
tree "GPIO1"
base ad:0x40103000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "IRQNUM,Interrupt Number"
group.long 0x40++0xF
line.long 0x0 "PDOR,Port Data Output"
bitfld.long 0x0 31. "PDO31,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 30. "PDO30,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 29. "PDO29,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 28. "PDO28,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 27. "PDO27,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 26. "PDO26,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 25. "PDO25,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 24. "PDO24,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 23. "PDO23,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 22. "PDO22,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 21. "PDO21,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 20. "PDO20,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 19. "PDO19,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 18. "PDO18,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 17. "PDO17,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 16. "PDO16,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 15. "PDO15,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 14. "PDO14,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 13. "PDO13,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 12. "PDO12,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 11. "PDO11,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 10. "PDO10,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 9. "PDO9,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 8. "PDO8,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 7. "PDO7,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 6. "PDO6,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 5. "PDO5,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 4. "PDO4,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 3. "PDO3,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 2. "PDO2,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 1. "PDO1,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 0. "PDO0,Port Data Output" "0: Logic level 0,1: Logic level 1"
line.long 0x4 "PSOR,Port Set Output"
bitfld.long 0x4 31. "PTSO31,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 30. "PTSO30,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 29. "PTSO29,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 28. "PTSO28,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 27. "PTSO27,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 26. "PTSO26,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 25. "PTSO25,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 24. "PTSO24,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 23. "PTSO23,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 22. "PTSO22,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 21. "PTSO21,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 20. "PTSO20,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 19. "PTSO19,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 18. "PTSO18,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 17. "PTSO17,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 16. "PTSO16,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 15. "PTSO15,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 14. "PTSO14,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 13. "PTSO13,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 12. "PTSO12,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 11. "PTSO11,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 10. "PTSO10,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 9. "PTSO9,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 8. "PTSO8,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 7. "PTSO7,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 6. "PTSO6,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 5. "PTSO5,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 4. "PTSO4,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 3. "PTSO3,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 2. "PTSO2,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 1. "PTSO1,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 0. "PTSO0,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
line.long 0x8 "PCOR,Port Clear Output"
bitfld.long 0x8 31. "PTCO31,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 30. "PTCO30,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 29. "PTCO29,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 28. "PTCO28,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 27. "PTCO27,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 26. "PTCO26,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 25. "PTCO25,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 24. "PTCO24,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 23. "PTCO23,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 22. "PTCO22,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 21. "PTCO21,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 20. "PTCO20,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 19. "PTCO19,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 18. "PTCO18,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 17. "PTCO17,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 16. "PTCO16,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 15. "PTCO15,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 14. "PTCO14,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 13. "PTCO13,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 12. "PTCO12,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 11. "PTCO11,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 10. "PTCO10,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 9. "PTCO9,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 8. "PTCO8,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 7. "PTCO7,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 6. "PTCO6,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 5. "PTCO5,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 4. "PTCO4,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 3. "PTCO3,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 2. "PTCO2,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 1. "PTCO1,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 0. "PTCO0,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
line.long 0xC "PTOR,Port Toggle Output"
bitfld.long 0xC 31. "PTTO31,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 30. "PTTO30,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 29. "PTTO29,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 28. "PTTO28,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 27. "PTTO27,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 26. "PTTO26,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 25. "PTTO25,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 24. "PTTO24,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 23. "PTTO23,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 22. "PTTO22,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 21. "PTTO21,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 20. "PTTO20,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 19. "PTTO19,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 18. "PTTO18,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 17. "PTTO17,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 16. "PTTO16,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 15. "PTTO15,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 14. "PTTO14,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 13. "PTTO13,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 12. "PTTO12,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 11. "PTTO11,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 10. "PTTO10,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 9. "PTTO9,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 8. "PTTO8,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 7. "PTTO7,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 6. "PTTO6,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 5. "PTTO5,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 4. "PTTO4,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 3. "PTTO3,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 2. "PTTO2,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 1. "PTTO1,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 0. "PTTO0,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
rgroup.long 0x50++0x3
line.long 0x0 "PDIR,Port Data Input"
bitfld.long 0x0 31. "PDI31,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 30. "PDI30,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 29. "PDI29,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 28. "PDI28,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 27. "PDI27,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 26. "PDI26,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 25. "PDI25,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 24. "PDI24,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 23. "PDI23,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 22. "PDI22,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 21. "PDI21,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 20. "PDI20,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 19. "PDI19,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 18. "PDI18,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 17. "PDI17,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 16. "PDI16,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 15. "PDI15,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 14. "PDI14,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 13. "PDI13,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 12. "PDI12,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 11. "PDI11,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 10. "PDI10,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 9. "PDI9,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 8. "PDI8,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 7. "PDI7,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 6. "PDI6,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 5. "PDI5,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 4. "PDI4,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 3. "PDI3,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 2. "PDI2,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 1. "PDI1,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 0. "PDI0,Port Data Input" "0: Logic 0,1: Logic 1"
group.long 0x54++0x7
line.long 0x0 "PDDR,Port Data Direction"
bitfld.long 0x0 31. "PDD31,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 30. "PDD30,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 29. "PDD29,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 28. "PDD28,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 27. "PDD27,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 26. "PDD26,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 25. "PDD25,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 24. "PDD24,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 23. "PDD23,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 22. "PDD22,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 21. "PDD21,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 20. "PDD20,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 19. "PDD19,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 18. "PDD18,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 17. "PDD17,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 16. "PDD16,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 15. "PDD15,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 14. "PDD14,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 13. "PDD13,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 12. "PDD12,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 11. "PDD11,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 10. "PDD10,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 9. "PDD9,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 8. "PDD8,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 7. "PDD7,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 6. "PDD6,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 5. "PDD5,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 4. "PDD4,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 3. "PDD3,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 2. "PDD2,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 1. "PDD1,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 0. "PDD0,Port Data Direction" "0: Input,1: Output"
line.long 0x4 "PIDR,Port Input Disable"
bitfld.long 0x4 31. "PID31,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 30. "PID30,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 29. "PID29,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 28. "PID28,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 27. "PID27,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 26. "PID26,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 25. "PID25,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 24. "PID24,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 23. "PID23,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 22. "PID22,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 21. "PID21,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 20. "PID20,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 19. "PID19,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 18. "PID18,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 17. "PID17,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 16. "PID16,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 15. "PID15,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 14. "PID14,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 13. "PID13,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 12. "PID12,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 11. "PID11,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 10. "PID10,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 9. "PID9,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 8. "PID8,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 7. "PID7,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 6. "PID6,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 5. "PID5,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 4. "PID4,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 3. "PID3,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 2. "PID2,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 1. "PID1,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 0. "PID0,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x60)++0x0
line.byte 0x0 "PDR[$1],Pin Data"
bitfld.byte 0x0 0. "PD,Pin Data (I/O)" "0: Logic zero,1: Logic one"
repeat.end
group.long 0x80++0x87
line.long 0x0 "ICR0,Interrupt Control 0"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4 "ICR1,Interrupt Control 1"
eventfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x8 "ICR2,Interrupt Control 2"
eventfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0xC "ICR3,Interrupt Control 3"
eventfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x10 "ICR4,Interrupt Control 4"
eventfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x14 "ICR5,Interrupt Control 5"
eventfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x18 "ICR6,Interrupt Control 6"
eventfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x1C "ICR7,Interrupt Control 7"
eventfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x20 "ICR8,Interrupt Control 8"
eventfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x24 "ICR9,Interrupt Control 9"
eventfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x28 "ICR10,Interrupt Control 10"
eventfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x2C "ICR11,Interrupt Control 11"
eventfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x30 "ICR12,Interrupt Control 12"
eventfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x34 "ICR13,Interrupt Control 13"
eventfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x38 "ICR14,Interrupt Control 14"
eventfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x3C "ICR15,Interrupt Control 15"
eventfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x40 "ICR16,Interrupt Control 16"
eventfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x44 "ICR17,Interrupt Control 17"
eventfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x48 "ICR18,Interrupt Control 18"
eventfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4C "ICR19,Interrupt Control 19"
eventfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x50 "ICR20,Interrupt Control 20"
eventfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x54 "ICR21,Interrupt Control 21"
eventfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x58 "ICR22,Interrupt Control 22"
eventfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x5C "ICR23,Interrupt Control 23"
eventfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x60 "ICR24,Interrupt Control 24"
eventfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x64 "ICR25,Interrupt Control 25"
eventfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x68 "ICR26,Interrupt Control 26"
eventfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x6C "ICR27,Interrupt Control 27"
eventfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x70 "ICR28,Interrupt Control 28"
eventfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x74 "ICR29,Interrupt Control 29"
eventfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x78 "ICR30,Interrupt Control 30"
eventfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x7C "ICR31,Interrupt Control 31"
eventfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x80 "GICLR,Global Interrupt Control Low"
hexmask.long.word 0x80 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x80 15. "GIWE15,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 14. "GIWE14,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 13. "GIWE13,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 12. "GIWE12,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 11. "GIWE11,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 10. "GIWE10,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 9. "GIWE9,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 8. "GIWE8,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 7. "GIWE7,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 6. "GIWE6,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 5. "GIWE5,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 4. "GIWE4,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 3. "GIWE3,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 2. "GIWE2,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 1. "GIWE1,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 0. "GIWE0,Global Interrupt Write Enable" "0: Not updated,1: Updated"
line.long 0x84 "GICHR,Global Interrupt Control High"
hexmask.long.word 0x84 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x84 15. "GIWE31,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 14. "GIWE30,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 13. "GIWE29,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 12. "GIWE28,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 11. "GIWE27,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 10. "GIWE26,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 9. "GIWE25,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 8. "GIWE24,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 7. "GIWE23,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 6. "GIWE22,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 5. "GIWE21,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 4. "GIWE20,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 3. "GIWE19,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 2. "GIWE18,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 1. "GIWE17,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 0. "GIWE16,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
group.long 0x120++0x3
line.long 0x0 "ISFR0,Interrupt Status Flag"
eventfld.long 0x0 31. "ISF31,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 30. "ISF30,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 29. "ISF29,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 28. "ISF28,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 27. "ISF27,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 26. "ISF26,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 25. "ISF25,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 24. "ISF24,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 23. "ISF23,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 22. "ISF22,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 21. "ISF21,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 20. "ISF20,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 19. "ISF19,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 18. "ISF18,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 17. "ISF17,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 16. "ISF16,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 15. "ISF15,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 14. "ISF14,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 13. "ISF13,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 12. "ISF12,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 11. "ISF11,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 10. "ISF10,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 9. "ISF9,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 8. "ISF8,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 7. "ISF7,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 6. "ISF6,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 5. "ISF5,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 4. "ISF4,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 3. "ISF3,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 2. "ISF2,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 1. "ISF1,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 0. "ISF0,Interrupt Status Flag" "0: Not detected,1: Detected"
tree.end
tree "GPIO2"
base ad:0x40104000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "IRQNUM,Interrupt Number"
group.long 0x40++0xF
line.long 0x0 "PDOR,Port Data Output"
bitfld.long 0x0 31. "PDO31,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 30. "PDO30,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 29. "PDO29,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 28. "PDO28,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 27. "PDO27,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 26. "PDO26,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 25. "PDO25,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 24. "PDO24,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 23. "PDO23,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 22. "PDO22,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 21. "PDO21,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 20. "PDO20,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 19. "PDO19,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 18. "PDO18,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 17. "PDO17,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 16. "PDO16,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 15. "PDO15,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 14. "PDO14,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 13. "PDO13,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 12. "PDO12,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 11. "PDO11,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 10. "PDO10,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 9. "PDO9,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 8. "PDO8,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 7. "PDO7,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 6. "PDO6,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 5. "PDO5,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 4. "PDO4,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 3. "PDO3,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 2. "PDO2,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 1. "PDO1,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 0. "PDO0,Port Data Output" "0: Logic level 0,1: Logic level 1"
line.long 0x4 "PSOR,Port Set Output"
bitfld.long 0x4 31. "PTSO31,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 30. "PTSO30,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 29. "PTSO29,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 28. "PTSO28,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 27. "PTSO27,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 26. "PTSO26,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 25. "PTSO25,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 24. "PTSO24,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 23. "PTSO23,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 22. "PTSO22,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 21. "PTSO21,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 20. "PTSO20,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 19. "PTSO19,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 18. "PTSO18,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 17. "PTSO17,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 16. "PTSO16,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 15. "PTSO15,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 14. "PTSO14,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 13. "PTSO13,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 12. "PTSO12,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 11. "PTSO11,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 10. "PTSO10,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 9. "PTSO9,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 8. "PTSO8,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 7. "PTSO7,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 6. "PTSO6,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 5. "PTSO5,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 4. "PTSO4,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 3. "PTSO3,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 2. "PTSO2,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 1. "PTSO1,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 0. "PTSO0,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
line.long 0x8 "PCOR,Port Clear Output"
bitfld.long 0x8 31. "PTCO31,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 30. "PTCO30,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 29. "PTCO29,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 28. "PTCO28,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 27. "PTCO27,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 26. "PTCO26,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 25. "PTCO25,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 24. "PTCO24,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 23. "PTCO23,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 22. "PTCO22,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 21. "PTCO21,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 20. "PTCO20,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 19. "PTCO19,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 18. "PTCO18,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 17. "PTCO17,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 16. "PTCO16,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 15. "PTCO15,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 14. "PTCO14,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 13. "PTCO13,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 12. "PTCO12,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 11. "PTCO11,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 10. "PTCO10,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 9. "PTCO9,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 8. "PTCO8,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 7. "PTCO7,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 6. "PTCO6,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 5. "PTCO5,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 4. "PTCO4,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 3. "PTCO3,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 2. "PTCO2,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 1. "PTCO1,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 0. "PTCO0,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
line.long 0xC "PTOR,Port Toggle Output"
bitfld.long 0xC 31. "PTTO31,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 30. "PTTO30,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 29. "PTTO29,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 28. "PTTO28,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 27. "PTTO27,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 26. "PTTO26,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 25. "PTTO25,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 24. "PTTO24,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 23. "PTTO23,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 22. "PTTO22,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 21. "PTTO21,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 20. "PTTO20,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 19. "PTTO19,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 18. "PTTO18,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 17. "PTTO17,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 16. "PTTO16,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 15. "PTTO15,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 14. "PTTO14,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 13. "PTTO13,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 12. "PTTO12,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 11. "PTTO11,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 10. "PTTO10,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 9. "PTTO9,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 8. "PTTO8,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 7. "PTTO7,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 6. "PTTO6,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 5. "PTTO5,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 4. "PTTO4,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 3. "PTTO3,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 2. "PTTO2,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 1. "PTTO1,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 0. "PTTO0,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
rgroup.long 0x50++0x3
line.long 0x0 "PDIR,Port Data Input"
bitfld.long 0x0 31. "PDI31,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 30. "PDI30,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 29. "PDI29,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 28. "PDI28,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 27. "PDI27,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 26. "PDI26,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 25. "PDI25,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 24. "PDI24,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 23. "PDI23,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 22. "PDI22,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 21. "PDI21,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 20. "PDI20,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 19. "PDI19,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 18. "PDI18,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 17. "PDI17,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 16. "PDI16,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 15. "PDI15,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 14. "PDI14,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 13. "PDI13,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 12. "PDI12,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 11. "PDI11,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 10. "PDI10,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 9. "PDI9,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 8. "PDI8,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 7. "PDI7,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 6. "PDI6,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 5. "PDI5,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 4. "PDI4,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 3. "PDI3,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 2. "PDI2,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 1. "PDI1,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 0. "PDI0,Port Data Input" "0: Logic 0,1: Logic 1"
group.long 0x54++0x7
line.long 0x0 "PDDR,Port Data Direction"
bitfld.long 0x0 31. "PDD31,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 30. "PDD30,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 29. "PDD29,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 28. "PDD28,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 27. "PDD27,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 26. "PDD26,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 25. "PDD25,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 24. "PDD24,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 23. "PDD23,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 22. "PDD22,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 21. "PDD21,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 20. "PDD20,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 19. "PDD19,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 18. "PDD18,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 17. "PDD17,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 16. "PDD16,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 15. "PDD15,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 14. "PDD14,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 13. "PDD13,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 12. "PDD12,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 11. "PDD11,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 10. "PDD10,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 9. "PDD9,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 8. "PDD8,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 7. "PDD7,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 6. "PDD6,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 5. "PDD5,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 4. "PDD4,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 3. "PDD3,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 2. "PDD2,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 1. "PDD1,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 0. "PDD0,Port Data Direction" "0: Input,1: Output"
line.long 0x4 "PIDR,Port Input Disable"
bitfld.long 0x4 31. "PID31,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 30. "PID30,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 29. "PID29,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 28. "PID28,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 27. "PID27,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 26. "PID26,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 25. "PID25,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 24. "PID24,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 23. "PID23,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 22. "PID22,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 21. "PID21,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 20. "PID20,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 19. "PID19,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 18. "PID18,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 17. "PID17,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 16. "PID16,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 15. "PID15,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 14. "PID14,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 13. "PID13,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 12. "PID12,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 11. "PID11,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 10. "PID10,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 9. "PID9,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 8. "PID8,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 7. "PID7,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 6. "PID6,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 5. "PID5,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 4. "PID4,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 3. "PID3,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 2. "PID2,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 1. "PID1,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 0. "PID0,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x60)++0x0
line.byte 0x0 "PDR[$1],Pin Data"
bitfld.byte 0x0 0. "PD,Pin Data (I/O)" "0: Logic zero,1: Logic one"
repeat.end
group.long 0x80++0x87
line.long 0x0 "ICR0,Interrupt Control 0"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4 "ICR1,Interrupt Control 1"
eventfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x8 "ICR2,Interrupt Control 2"
eventfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0xC "ICR3,Interrupt Control 3"
eventfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x10 "ICR4,Interrupt Control 4"
eventfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x14 "ICR5,Interrupt Control 5"
eventfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x18 "ICR6,Interrupt Control 6"
eventfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x1C "ICR7,Interrupt Control 7"
eventfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x20 "ICR8,Interrupt Control 8"
eventfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x24 "ICR9,Interrupt Control 9"
eventfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x28 "ICR10,Interrupt Control 10"
eventfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x2C "ICR11,Interrupt Control 11"
eventfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x30 "ICR12,Interrupt Control 12"
eventfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x34 "ICR13,Interrupt Control 13"
eventfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x38 "ICR14,Interrupt Control 14"
eventfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x3C "ICR15,Interrupt Control 15"
eventfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x40 "ICR16,Interrupt Control 16"
eventfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x44 "ICR17,Interrupt Control 17"
eventfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x48 "ICR18,Interrupt Control 18"
eventfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4C "ICR19,Interrupt Control 19"
eventfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x50 "ICR20,Interrupt Control 20"
eventfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x54 "ICR21,Interrupt Control 21"
eventfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x58 "ICR22,Interrupt Control 22"
eventfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x5C "ICR23,Interrupt Control 23"
eventfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x60 "ICR24,Interrupt Control 24"
eventfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x64 "ICR25,Interrupt Control 25"
eventfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x68 "ICR26,Interrupt Control 26"
eventfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x6C "ICR27,Interrupt Control 27"
eventfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x70 "ICR28,Interrupt Control 28"
eventfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x74 "ICR29,Interrupt Control 29"
eventfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x78 "ICR30,Interrupt Control 30"
eventfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x7C "ICR31,Interrupt Control 31"
eventfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x80 "GICLR,Global Interrupt Control Low"
hexmask.long.word 0x80 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x80 15. "GIWE15,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 14. "GIWE14,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 13. "GIWE13,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 12. "GIWE12,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 11. "GIWE11,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 10. "GIWE10,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 9. "GIWE9,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 8. "GIWE8,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 7. "GIWE7,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 6. "GIWE6,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 5. "GIWE5,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 4. "GIWE4,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 3. "GIWE3,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 2. "GIWE2,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 1. "GIWE1,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 0. "GIWE0,Global Interrupt Write Enable" "0: Not updated,1: Updated"
line.long 0x84 "GICHR,Global Interrupt Control High"
hexmask.long.word 0x84 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x84 15. "GIWE31,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 14. "GIWE30,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 13. "GIWE29,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 12. "GIWE28,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 11. "GIWE27,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 10. "GIWE26,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 9. "GIWE25,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 8. "GIWE24,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 7. "GIWE23,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 6. "GIWE22,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 5. "GIWE21,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 4. "GIWE20,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 3. "GIWE19,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 2. "GIWE18,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 1. "GIWE17,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 0. "GIWE16,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
group.long 0x120++0x3
line.long 0x0 "ISFR0,Interrupt Status Flag"
eventfld.long 0x0 31. "ISF31,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 30. "ISF30,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 29. "ISF29,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 28. "ISF28,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 27. "ISF27,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 26. "ISF26,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 25. "ISF25,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 24. "ISF24,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 23. "ISF23,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 22. "ISF22,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 21. "ISF21,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 20. "ISF20,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 19. "ISF19,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 18. "ISF18,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 17. "ISF17,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 16. "ISF16,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 15. "ISF15,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 14. "ISF14,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 13. "ISF13,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 12. "ISF12,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 11. "ISF11,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 10. "ISF10,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 9. "ISF9,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 8. "ISF8,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 7. "ISF7,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 6. "ISF6,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 5. "ISF5,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 4. "ISF4,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 3. "ISF3,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 2. "ISF2,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 1. "ISF1,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 0. "ISF0,Interrupt Status Flag" "0: Not detected,1: Detected"
tree.end
tree "GPIO3"
base ad:0x40105000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "IRQNUM,Interrupt Number"
group.long 0x40++0xF
line.long 0x0 "PDOR,Port Data Output"
bitfld.long 0x0 31. "PDO31,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 30. "PDO30,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 29. "PDO29,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 28. "PDO28,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 27. "PDO27,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 26. "PDO26,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 25. "PDO25,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 24. "PDO24,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 23. "PDO23,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 22. "PDO22,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 21. "PDO21,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 20. "PDO20,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 19. "PDO19,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 18. "PDO18,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 17. "PDO17,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 16. "PDO16,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 15. "PDO15,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 14. "PDO14,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 13. "PDO13,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 12. "PDO12,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 11. "PDO11,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 10. "PDO10,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 9. "PDO9,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 8. "PDO8,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 7. "PDO7,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 6. "PDO6,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 5. "PDO5,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 4. "PDO4,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 3. "PDO3,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 2. "PDO2,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 1. "PDO1,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 0. "PDO0,Port Data Output" "0: Logic level 0,1: Logic level 1"
line.long 0x4 "PSOR,Port Set Output"
bitfld.long 0x4 31. "PTSO31,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 30. "PTSO30,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 29. "PTSO29,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 28. "PTSO28,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 27. "PTSO27,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 26. "PTSO26,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 25. "PTSO25,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 24. "PTSO24,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 23. "PTSO23,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 22. "PTSO22,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 21. "PTSO21,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 20. "PTSO20,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 19. "PTSO19,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 18. "PTSO18,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 17. "PTSO17,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 16. "PTSO16,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 15. "PTSO15,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 14. "PTSO14,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 13. "PTSO13,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 12. "PTSO12,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 11. "PTSO11,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 10. "PTSO10,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 9. "PTSO9,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 8. "PTSO8,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 7. "PTSO7,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 6. "PTSO6,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 5. "PTSO5,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 4. "PTSO4,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 3. "PTSO3,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 2. "PTSO2,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 1. "PTSO1,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 0. "PTSO0,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
line.long 0x8 "PCOR,Port Clear Output"
bitfld.long 0x8 31. "PTCO31,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 30. "PTCO30,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 29. "PTCO29,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 28. "PTCO28,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 27. "PTCO27,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 26. "PTCO26,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 25. "PTCO25,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 24. "PTCO24,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 23. "PTCO23,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 22. "PTCO22,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 21. "PTCO21,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 20. "PTCO20,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 19. "PTCO19,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 18. "PTCO18,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 17. "PTCO17,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 16. "PTCO16,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 15. "PTCO15,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 14. "PTCO14,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 13. "PTCO13,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 12. "PTCO12,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 11. "PTCO11,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 10. "PTCO10,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 9. "PTCO9,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 8. "PTCO8,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 7. "PTCO7,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 6. "PTCO6,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 5. "PTCO5,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 4. "PTCO4,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 3. "PTCO3,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 2. "PTCO2,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 1. "PTCO1,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 0. "PTCO0,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
line.long 0xC "PTOR,Port Toggle Output"
bitfld.long 0xC 31. "PTTO31,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 30. "PTTO30,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 29. "PTTO29,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 28. "PTTO28,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 27. "PTTO27,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 26. "PTTO26,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 25. "PTTO25,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 24. "PTTO24,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 23. "PTTO23,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 22. "PTTO22,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 21. "PTTO21,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 20. "PTTO20,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 19. "PTTO19,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 18. "PTTO18,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 17. "PTTO17,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 16. "PTTO16,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 15. "PTTO15,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 14. "PTTO14,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 13. "PTTO13,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 12. "PTTO12,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 11. "PTTO11,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 10. "PTTO10,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 9. "PTTO9,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 8. "PTTO8,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 7. "PTTO7,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 6. "PTTO6,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 5. "PTTO5,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 4. "PTTO4,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 3. "PTTO3,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 2. "PTTO2,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 1. "PTTO1,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 0. "PTTO0,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
rgroup.long 0x50++0x3
line.long 0x0 "PDIR,Port Data Input"
bitfld.long 0x0 31. "PDI31,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 30. "PDI30,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 29. "PDI29,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 28. "PDI28,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 27. "PDI27,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 26. "PDI26,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 25. "PDI25,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 24. "PDI24,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 23. "PDI23,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 22. "PDI22,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 21. "PDI21,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 20. "PDI20,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 19. "PDI19,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 18. "PDI18,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 17. "PDI17,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 16. "PDI16,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 15. "PDI15,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 14. "PDI14,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 13. "PDI13,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 12. "PDI12,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 11. "PDI11,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 10. "PDI10,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 9. "PDI9,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 8. "PDI8,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 7. "PDI7,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 6. "PDI6,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 5. "PDI5,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 4. "PDI4,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 3. "PDI3,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 2. "PDI2,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 1. "PDI1,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 0. "PDI0,Port Data Input" "0: Logic 0,1: Logic 1"
group.long 0x54++0x7
line.long 0x0 "PDDR,Port Data Direction"
bitfld.long 0x0 31. "PDD31,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 30. "PDD30,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 29. "PDD29,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 28. "PDD28,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 27. "PDD27,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 26. "PDD26,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 25. "PDD25,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 24. "PDD24,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 23. "PDD23,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 22. "PDD22,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 21. "PDD21,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 20. "PDD20,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 19. "PDD19,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 18. "PDD18,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 17. "PDD17,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 16. "PDD16,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 15. "PDD15,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 14. "PDD14,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 13. "PDD13,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 12. "PDD12,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 11. "PDD11,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 10. "PDD10,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 9. "PDD9,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 8. "PDD8,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 7. "PDD7,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 6. "PDD6,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 5. "PDD5,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 4. "PDD4,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 3. "PDD3,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 2. "PDD2,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 1. "PDD1,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 0. "PDD0,Port Data Direction" "0: Input,1: Output"
line.long 0x4 "PIDR,Port Input Disable"
bitfld.long 0x4 31. "PID31,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 30. "PID30,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 29. "PID29,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 28. "PID28,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 27. "PID27,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 26. "PID26,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 25. "PID25,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 24. "PID24,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 23. "PID23,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 22. "PID22,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 21. "PID21,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 20. "PID20,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 19. "PID19,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 18. "PID18,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 17. "PID17,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 16. "PID16,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 15. "PID15,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 14. "PID14,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 13. "PID13,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 12. "PID12,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 11. "PID11,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 10. "PID10,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 9. "PID9,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 8. "PID8,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 7. "PID7,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 6. "PID6,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 5. "PID5,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 4. "PID4,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 3. "PID3,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 2. "PID2,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 1. "PID1,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 0. "PID0,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x60)++0x0
line.byte 0x0 "PDR[$1],Pin Data"
bitfld.byte 0x0 0. "PD,Pin Data (I/O)" "0: Logic zero,1: Logic one"
repeat.end
group.long 0x80++0x87
line.long 0x0 "ICR0,Interrupt Control 0"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4 "ICR1,Interrupt Control 1"
eventfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x8 "ICR2,Interrupt Control 2"
eventfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0xC "ICR3,Interrupt Control 3"
eventfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x10 "ICR4,Interrupt Control 4"
eventfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x14 "ICR5,Interrupt Control 5"
eventfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x18 "ICR6,Interrupt Control 6"
eventfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x1C "ICR7,Interrupt Control 7"
eventfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x20 "ICR8,Interrupt Control 8"
eventfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x24 "ICR9,Interrupt Control 9"
eventfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x28 "ICR10,Interrupt Control 10"
eventfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x2C "ICR11,Interrupt Control 11"
eventfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x30 "ICR12,Interrupt Control 12"
eventfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x34 "ICR13,Interrupt Control 13"
eventfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x38 "ICR14,Interrupt Control 14"
eventfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x3C "ICR15,Interrupt Control 15"
eventfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x40 "ICR16,Interrupt Control 16"
eventfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x44 "ICR17,Interrupt Control 17"
eventfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x48 "ICR18,Interrupt Control 18"
eventfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4C "ICR19,Interrupt Control 19"
eventfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x50 "ICR20,Interrupt Control 20"
eventfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x54 "ICR21,Interrupt Control 21"
eventfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x58 "ICR22,Interrupt Control 22"
eventfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x5C "ICR23,Interrupt Control 23"
eventfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x60 "ICR24,Interrupt Control 24"
eventfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x64 "ICR25,Interrupt Control 25"
eventfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x68 "ICR26,Interrupt Control 26"
eventfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x6C "ICR27,Interrupt Control 27"
eventfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x70 "ICR28,Interrupt Control 28"
eventfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x74 "ICR29,Interrupt Control 29"
eventfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x78 "ICR30,Interrupt Control 30"
eventfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x7C "ICR31,Interrupt Control 31"
eventfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x80 "GICLR,Global Interrupt Control Low"
hexmask.long.word 0x80 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x80 15. "GIWE15,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 14. "GIWE14,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 13. "GIWE13,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 12. "GIWE12,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 11. "GIWE11,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 10. "GIWE10,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 9. "GIWE9,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 8. "GIWE8,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 7. "GIWE7,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 6. "GIWE6,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 5. "GIWE5,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 4. "GIWE4,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 3. "GIWE3,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 2. "GIWE2,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 1. "GIWE1,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 0. "GIWE0,Global Interrupt Write Enable" "0: Not updated,1: Updated"
line.long 0x84 "GICHR,Global Interrupt Control High"
hexmask.long.word 0x84 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x84 15. "GIWE31,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 14. "GIWE30,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 13. "GIWE29,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 12. "GIWE28,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 11. "GIWE27,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 10. "GIWE26,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 9. "GIWE25,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 8. "GIWE24,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 7. "GIWE23,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 6. "GIWE22,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 5. "GIWE21,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 4. "GIWE20,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 3. "GIWE19,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 2. "GIWE18,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 1. "GIWE17,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 0. "GIWE16,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
group.long 0x120++0x3
line.long 0x0 "ISFR0,Interrupt Status Flag"
eventfld.long 0x0 31. "ISF31,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 30. "ISF30,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 29. "ISF29,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 28. "ISF28,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 27. "ISF27,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 26. "ISF26,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 25. "ISF25,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 24. "ISF24,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 23. "ISF23,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 22. "ISF22,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 21. "ISF21,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 20. "ISF20,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 19. "ISF19,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 18. "ISF18,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 17. "ISF17,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 16. "ISF16,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 15. "ISF15,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 14. "ISF14,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 13. "ISF13,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 12. "ISF12,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 11. "ISF11,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 10. "ISF10,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 9. "ISF9,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 8. "ISF8,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 7. "ISF7,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 6. "ISF6,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 5. "ISF5,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 4. "ISF4,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 3. "ISF3,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 2. "ISF2,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 1. "ISF1,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 0. "ISF0,Interrupt Status Flag" "0: Not detected,1: Detected"
tree.end
endif
sif (cpuis("MC?A146*"))
tree "GPIO0"
base ad:0x40102000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "IRQNUM,Interrupt Number"
group.long 0x40++0xF
line.long 0x0 "PDOR,Port Data Output"
bitfld.long 0x0 31. "PDO31,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 30. "PDO30,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 29. "PDO29,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 28. "PDO28,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 27. "PDO27,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 26. "PDO26,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 25. "PDO25,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 24. "PDO24,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 23. "PDO23,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 22. "PDO22,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 21. "PDO21,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 20. "PDO20,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 19. "PDO19,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 18. "PDO18,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 17. "PDO17,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 16. "PDO16,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 15. "PDO15,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 14. "PDO14,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 13. "PDO13,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 12. "PDO12,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 11. "PDO11,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 10. "PDO10,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 9. "PDO9,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 8. "PDO8,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 7. "PDO7,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 6. "PDO6,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 5. "PDO5,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 4. "PDO4,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 3. "PDO3,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 2. "PDO2,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 1. "PDO1,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 0. "PDO0,Port Data Output" "0: Logic level 0,1: Logic level 1"
line.long 0x4 "PSOR,Port Set Output"
bitfld.long 0x4 31. "PTSO31,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 30. "PTSO30,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 29. "PTSO29,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 28. "PTSO28,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 27. "PTSO27,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 26. "PTSO26,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 25. "PTSO25,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 24. "PTSO24,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 23. "PTSO23,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 22. "PTSO22,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 21. "PTSO21,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 20. "PTSO20,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 19. "PTSO19,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 18. "PTSO18,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 17. "PTSO17,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 16. "PTSO16,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 15. "PTSO15,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 14. "PTSO14,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 13. "PTSO13,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 12. "PTSO12,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 11. "PTSO11,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 10. "PTSO10,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 9. "PTSO9,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 8. "PTSO8,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 7. "PTSO7,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 6. "PTSO6,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 5. "PTSO5,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 4. "PTSO4,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 3. "PTSO3,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 2. "PTSO2,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 1. "PTSO1,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 0. "PTSO0,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
line.long 0x8 "PCOR,Port Clear Output"
bitfld.long 0x8 31. "PTCO31,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 30. "PTCO30,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 29. "PTCO29,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 28. "PTCO28,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 27. "PTCO27,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 26. "PTCO26,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 25. "PTCO25,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 24. "PTCO24,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 23. "PTCO23,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 22. "PTCO22,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 21. "PTCO21,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 20. "PTCO20,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 19. "PTCO19,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 18. "PTCO18,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 17. "PTCO17,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 16. "PTCO16,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 15. "PTCO15,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 14. "PTCO14,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 13. "PTCO13,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 12. "PTCO12,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 11. "PTCO11,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 10. "PTCO10,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 9. "PTCO9,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 8. "PTCO8,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 7. "PTCO7,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 6. "PTCO6,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 5. "PTCO5,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 4. "PTCO4,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 3. "PTCO3,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 2. "PTCO2,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 1. "PTCO1,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 0. "PTCO0,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
line.long 0xC "PTOR,Port Toggle Output"
bitfld.long 0xC 31. "PTTO31,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 30. "PTTO30,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 29. "PTTO29,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 28. "PTTO28,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 27. "PTTO27,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 26. "PTTO26,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 25. "PTTO25,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 24. "PTTO24,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 23. "PTTO23,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 22. "PTTO22,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 21. "PTTO21,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 20. "PTTO20,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 19. "PTTO19,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 18. "PTTO18,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 17. "PTTO17,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 16. "PTTO16,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 15. "PTTO15,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 14. "PTTO14,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 13. "PTTO13,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 12. "PTTO12,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 11. "PTTO11,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 10. "PTTO10,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 9. "PTTO9,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 8. "PTTO8,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 7. "PTTO7,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 6. "PTTO6,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 5. "PTTO5,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 4. "PTTO4,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 3. "PTTO3,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 2. "PTTO2,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 1. "PTTO1,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 0. "PTTO0,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
rgroup.long 0x50++0x3
line.long 0x0 "PDIR,Port Data Input"
bitfld.long 0x0 31. "PDI31,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 30. "PDI30,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 29. "PDI29,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 28. "PDI28,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 27. "PDI27,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 26. "PDI26,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 25. "PDI25,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 24. "PDI24,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 23. "PDI23,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 22. "PDI22,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 21. "PDI21,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 20. "PDI20,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 19. "PDI19,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 18. "PDI18,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 17. "PDI17,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 16. "PDI16,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 15. "PDI15,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 14. "PDI14,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 13. "PDI13,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 12. "PDI12,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 11. "PDI11,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 10. "PDI10,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 9. "PDI9,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 8. "PDI8,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 7. "PDI7,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 6. "PDI6,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 5. "PDI5,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 4. "PDI4,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 3. "PDI3,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 2. "PDI2,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 1. "PDI1,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 0. "PDI0,Port Data Input" "0: Logic 0,1: Logic 1"
group.long 0x54++0x7
line.long 0x0 "PDDR,Port Data Direction"
bitfld.long 0x0 31. "PDD31,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 30. "PDD30,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 29. "PDD29,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 28. "PDD28,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 27. "PDD27,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 26. "PDD26,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 25. "PDD25,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 24. "PDD24,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 23. "PDD23,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 22. "PDD22,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 21. "PDD21,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 20. "PDD20,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 19. "PDD19,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 18. "PDD18,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 17. "PDD17,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 16. "PDD16,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 15. "PDD15,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 14. "PDD14,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 13. "PDD13,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 12. "PDD12,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 11. "PDD11,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 10. "PDD10,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 9. "PDD9,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 8. "PDD8,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 7. "PDD7,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 6. "PDD6,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 5. "PDD5,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 4. "PDD4,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 3. "PDD3,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 2. "PDD2,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 1. "PDD1,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 0. "PDD0,Port Data Direction" "0: Input,1: Output"
line.long 0x4 "PIDR,Port Input Disable"
bitfld.long 0x4 31. "PID31,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 30. "PID30,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 29. "PID29,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 28. "PID28,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 27. "PID27,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 26. "PID26,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 25. "PID25,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 24. "PID24,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 23. "PID23,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 22. "PID22,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 21. "PID21,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 20. "PID20,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 19. "PID19,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 18. "PID18,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 17. "PID17,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 16. "PID16,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 15. "PID15,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 14. "PID14,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 13. "PID13,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 12. "PID12,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 11. "PID11,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 10. "PID10,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 9. "PID9,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 8. "PID8,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 7. "PID7,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 6. "PID6,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 5. "PID5,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 4. "PID4,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 3. "PID3,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 2. "PID2,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 1. "PID1,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 0. "PID0,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x60)++0x0
line.byte 0x0 "PDR[$1],Pin Data"
bitfld.byte 0x0 0. "PD,Pin Data (I/O)" "0: Logic zero,1: Logic one"
repeat.end
group.long 0x80++0x87
line.long 0x0 "ICR0,Interrupt Control 0"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4 "ICR1,Interrupt Control 1"
eventfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x8 "ICR2,Interrupt Control 2"
eventfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0xC "ICR3,Interrupt Control 3"
eventfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x10 "ICR4,Interrupt Control 4"
eventfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x14 "ICR5,Interrupt Control 5"
eventfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x18 "ICR6,Interrupt Control 6"
eventfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x1C "ICR7,Interrupt Control 7"
eventfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x20 "ICR8,Interrupt Control 8"
eventfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x24 "ICR9,Interrupt Control 9"
eventfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x28 "ICR10,Interrupt Control 10"
eventfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x2C "ICR11,Interrupt Control 11"
eventfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x30 "ICR12,Interrupt Control 12"
eventfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x34 "ICR13,Interrupt Control 13"
eventfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x38 "ICR14,Interrupt Control 14"
eventfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x3C "ICR15,Interrupt Control 15"
eventfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x40 "ICR16,Interrupt Control 16"
eventfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x44 "ICR17,Interrupt Control 17"
eventfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x48 "ICR18,Interrupt Control 18"
eventfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4C "ICR19,Interrupt Control 19"
eventfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x50 "ICR20,Interrupt Control 20"
eventfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x54 "ICR21,Interrupt Control 21"
eventfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x58 "ICR22,Interrupt Control 22"
eventfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x5C "ICR23,Interrupt Control 23"
eventfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x60 "ICR24,Interrupt Control 24"
eventfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x64 "ICR25,Interrupt Control 25"
eventfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x68 "ICR26,Interrupt Control 26"
eventfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x6C "ICR27,Interrupt Control 27"
eventfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x70 "ICR28,Interrupt Control 28"
eventfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x74 "ICR29,Interrupt Control 29"
eventfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x78 "ICR30,Interrupt Control 30"
eventfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x7C "ICR31,Interrupt Control 31"
eventfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x80 "GICLR,Global Interrupt Control Low"
hexmask.long.word 0x80 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x80 15. "GIWE15,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 14. "GIWE14,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 13. "GIWE13,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 12. "GIWE12,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 11. "GIWE11,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 10. "GIWE10,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 9. "GIWE9,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 8. "GIWE8,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 7. "GIWE7,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 6. "GIWE6,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 5. "GIWE5,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 4. "GIWE4,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 3. "GIWE3,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 2. "GIWE2,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 1. "GIWE1,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 0. "GIWE0,Global Interrupt Write Enable" "0: Not updated,1: Updated"
line.long 0x84 "GICHR,Global Interrupt Control High"
hexmask.long.word 0x84 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x84 15. "GIWE31,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 14. "GIWE30,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 13. "GIWE29,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 12. "GIWE28,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 11. "GIWE27,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 10. "GIWE26,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 9. "GIWE25,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 8. "GIWE24,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 7. "GIWE23,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 6. "GIWE22,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 5. "GIWE21,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 4. "GIWE20,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 3. "GIWE19,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 2. "GIWE18,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 1. "GIWE17,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 0. "GIWE16,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
group.long 0x120++0x3
line.long 0x0 "ISFR0,Interrupt Status Flag"
eventfld.long 0x0 31. "ISF31,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 30. "ISF30,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 29. "ISF29,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 28. "ISF28,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 27. "ISF27,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 26. "ISF26,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 25. "ISF25,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 24. "ISF24,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 23. "ISF23,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 22. "ISF22,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 21. "ISF21,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 20. "ISF20,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 19. "ISF19,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 18. "ISF18,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 17. "ISF17,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 16. "ISF16,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 15. "ISF15,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 14. "ISF14,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 13. "ISF13,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 12. "ISF12,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 11. "ISF11,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 10. "ISF10,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 9. "ISF9,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 8. "ISF8,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 7. "ISF7,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 6. "ISF6,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 5. "ISF5,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 4. "ISF4,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 3. "ISF3,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 2. "ISF2,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 1. "ISF1,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 0. "ISF0,Interrupt Status Flag" "0: Not detected,1: Detected"
tree.end
tree "GPIO1"
base ad:0x40103000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "IRQNUM,Interrupt Number"
group.long 0x40++0xF
line.long 0x0 "PDOR,Port Data Output"
bitfld.long 0x0 31. "PDO31,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 30. "PDO30,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 29. "PDO29,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 28. "PDO28,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 27. "PDO27,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 26. "PDO26,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 25. "PDO25,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 24. "PDO24,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 23. "PDO23,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 22. "PDO22,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 21. "PDO21,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 20. "PDO20,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 19. "PDO19,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 18. "PDO18,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 17. "PDO17,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 16. "PDO16,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 15. "PDO15,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 14. "PDO14,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 13. "PDO13,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 12. "PDO12,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 11. "PDO11,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 10. "PDO10,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 9. "PDO9,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 8. "PDO8,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 7. "PDO7,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 6. "PDO6,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 5. "PDO5,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 4. "PDO4,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 3. "PDO3,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 2. "PDO2,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 1. "PDO1,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 0. "PDO0,Port Data Output" "0: Logic level 0,1: Logic level 1"
line.long 0x4 "PSOR,Port Set Output"
bitfld.long 0x4 31. "PTSO31,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 30. "PTSO30,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 29. "PTSO29,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 28. "PTSO28,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 27. "PTSO27,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 26. "PTSO26,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 25. "PTSO25,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 24. "PTSO24,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 23. "PTSO23,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 22. "PTSO22,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 21. "PTSO21,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 20. "PTSO20,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 19. "PTSO19,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 18. "PTSO18,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 17. "PTSO17,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 16. "PTSO16,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 15. "PTSO15,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 14. "PTSO14,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 13. "PTSO13,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 12. "PTSO12,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 11. "PTSO11,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 10. "PTSO10,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 9. "PTSO9,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 8. "PTSO8,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 7. "PTSO7,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 6. "PTSO6,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 5. "PTSO5,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 4. "PTSO4,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 3. "PTSO3,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 2. "PTSO2,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 1. "PTSO1,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 0. "PTSO0,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
line.long 0x8 "PCOR,Port Clear Output"
bitfld.long 0x8 31. "PTCO31,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 30. "PTCO30,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 29. "PTCO29,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 28. "PTCO28,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 27. "PTCO27,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 26. "PTCO26,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 25. "PTCO25,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 24. "PTCO24,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 23. "PTCO23,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 22. "PTCO22,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 21. "PTCO21,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 20. "PTCO20,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 19. "PTCO19,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 18. "PTCO18,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 17. "PTCO17,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 16. "PTCO16,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 15. "PTCO15,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 14. "PTCO14,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 13. "PTCO13,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 12. "PTCO12,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 11. "PTCO11,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 10. "PTCO10,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 9. "PTCO9,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 8. "PTCO8,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 7. "PTCO7,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 6. "PTCO6,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 5. "PTCO5,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 4. "PTCO4,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 3. "PTCO3,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 2. "PTCO2,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 1. "PTCO1,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 0. "PTCO0,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
line.long 0xC "PTOR,Port Toggle Output"
bitfld.long 0xC 31. "PTTO31,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 30. "PTTO30,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 29. "PTTO29,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 28. "PTTO28,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 27. "PTTO27,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 26. "PTTO26,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 25. "PTTO25,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 24. "PTTO24,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 23. "PTTO23,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 22. "PTTO22,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 21. "PTTO21,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 20. "PTTO20,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 19. "PTTO19,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 18. "PTTO18,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 17. "PTTO17,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 16. "PTTO16,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 15. "PTTO15,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 14. "PTTO14,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 13. "PTTO13,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 12. "PTTO12,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 11. "PTTO11,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 10. "PTTO10,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 9. "PTTO9,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 8. "PTTO8,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 7. "PTTO7,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 6. "PTTO6,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 5. "PTTO5,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 4. "PTTO4,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 3. "PTTO3,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 2. "PTTO2,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 1. "PTTO1,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 0. "PTTO0,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
rgroup.long 0x50++0x3
line.long 0x0 "PDIR,Port Data Input"
bitfld.long 0x0 31. "PDI31,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 30. "PDI30,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 29. "PDI29,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 28. "PDI28,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 27. "PDI27,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 26. "PDI26,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 25. "PDI25,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 24. "PDI24,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 23. "PDI23,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 22. "PDI22,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 21. "PDI21,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 20. "PDI20,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 19. "PDI19,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 18. "PDI18,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 17. "PDI17,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 16. "PDI16,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 15. "PDI15,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 14. "PDI14,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 13. "PDI13,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 12. "PDI12,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 11. "PDI11,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 10. "PDI10,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 9. "PDI9,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 8. "PDI8,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 7. "PDI7,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 6. "PDI6,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 5. "PDI5,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 4. "PDI4,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 3. "PDI3,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 2. "PDI2,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 1. "PDI1,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 0. "PDI0,Port Data Input" "0: Logic 0,1: Logic 1"
group.long 0x54++0x7
line.long 0x0 "PDDR,Port Data Direction"
bitfld.long 0x0 31. "PDD31,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 30. "PDD30,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 29. "PDD29,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 28. "PDD28,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 27. "PDD27,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 26. "PDD26,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 25. "PDD25,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 24. "PDD24,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 23. "PDD23,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 22. "PDD22,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 21. "PDD21,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 20. "PDD20,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 19. "PDD19,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 18. "PDD18,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 17. "PDD17,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 16. "PDD16,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 15. "PDD15,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 14. "PDD14,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 13. "PDD13,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 12. "PDD12,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 11. "PDD11,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 10. "PDD10,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 9. "PDD9,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 8. "PDD8,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 7. "PDD7,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 6. "PDD6,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 5. "PDD5,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 4. "PDD4,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 3. "PDD3,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 2. "PDD2,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 1. "PDD1,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 0. "PDD0,Port Data Direction" "0: Input,1: Output"
line.long 0x4 "PIDR,Port Input Disable"
bitfld.long 0x4 31. "PID31,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 30. "PID30,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 29. "PID29,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 28. "PID28,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 27. "PID27,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 26. "PID26,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 25. "PID25,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 24. "PID24,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 23. "PID23,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 22. "PID22,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 21. "PID21,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 20. "PID20,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 19. "PID19,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 18. "PID18,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 17. "PID17,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 16. "PID16,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 15. "PID15,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 14. "PID14,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 13. "PID13,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 12. "PID12,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 11. "PID11,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 10. "PID10,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 9. "PID9,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 8. "PID8,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 7. "PID7,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 6. "PID6,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 5. "PID5,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 4. "PID4,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 3. "PID3,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 2. "PID2,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 1. "PID1,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 0. "PID0,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x60)++0x0
line.byte 0x0 "PDR[$1],Pin Data"
bitfld.byte 0x0 0. "PD,Pin Data (I/O)" "0: Logic zero,1: Logic one"
repeat.end
group.long 0x80++0x87
line.long 0x0 "ICR0,Interrupt Control 0"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4 "ICR1,Interrupt Control 1"
eventfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x8 "ICR2,Interrupt Control 2"
eventfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0xC "ICR3,Interrupt Control 3"
eventfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x10 "ICR4,Interrupt Control 4"
eventfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x14 "ICR5,Interrupt Control 5"
eventfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x18 "ICR6,Interrupt Control 6"
eventfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x1C "ICR7,Interrupt Control 7"
eventfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x20 "ICR8,Interrupt Control 8"
eventfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x24 "ICR9,Interrupt Control 9"
eventfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x28 "ICR10,Interrupt Control 10"
eventfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x2C "ICR11,Interrupt Control 11"
eventfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x30 "ICR12,Interrupt Control 12"
eventfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x34 "ICR13,Interrupt Control 13"
eventfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x38 "ICR14,Interrupt Control 14"
eventfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x3C "ICR15,Interrupt Control 15"
eventfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x40 "ICR16,Interrupt Control 16"
eventfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x44 "ICR17,Interrupt Control 17"
eventfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x48 "ICR18,Interrupt Control 18"
eventfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4C "ICR19,Interrupt Control 19"
eventfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x50 "ICR20,Interrupt Control 20"
eventfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x54 "ICR21,Interrupt Control 21"
eventfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x58 "ICR22,Interrupt Control 22"
eventfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x5C "ICR23,Interrupt Control 23"
eventfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x60 "ICR24,Interrupt Control 24"
eventfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x64 "ICR25,Interrupt Control 25"
eventfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x68 "ICR26,Interrupt Control 26"
eventfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x6C "ICR27,Interrupt Control 27"
eventfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x70 "ICR28,Interrupt Control 28"
eventfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x74 "ICR29,Interrupt Control 29"
eventfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x78 "ICR30,Interrupt Control 30"
eventfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x7C "ICR31,Interrupt Control 31"
eventfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x80 "GICLR,Global Interrupt Control Low"
hexmask.long.word 0x80 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x80 15. "GIWE15,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 14. "GIWE14,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 13. "GIWE13,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 12. "GIWE12,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 11. "GIWE11,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 10. "GIWE10,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 9. "GIWE9,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 8. "GIWE8,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 7. "GIWE7,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 6. "GIWE6,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 5. "GIWE5,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 4. "GIWE4,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 3. "GIWE3,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 2. "GIWE2,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 1. "GIWE1,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 0. "GIWE0,Global Interrupt Write Enable" "0: Not updated,1: Updated"
line.long 0x84 "GICHR,Global Interrupt Control High"
hexmask.long.word 0x84 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x84 15. "GIWE31,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 14. "GIWE30,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 13. "GIWE29,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 12. "GIWE28,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 11. "GIWE27,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 10. "GIWE26,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 9. "GIWE25,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 8. "GIWE24,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 7. "GIWE23,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 6. "GIWE22,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 5. "GIWE21,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 4. "GIWE20,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 3. "GIWE19,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 2. "GIWE18,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 1. "GIWE17,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 0. "GIWE16,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
group.long 0x120++0x3
line.long 0x0 "ISFR0,Interrupt Status Flag"
eventfld.long 0x0 31. "ISF31,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 30. "ISF30,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 29. "ISF29,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 28. "ISF28,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 27. "ISF27,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 26. "ISF26,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 25. "ISF25,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 24. "ISF24,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 23. "ISF23,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 22. "ISF22,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 21. "ISF21,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 20. "ISF20,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 19. "ISF19,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 18. "ISF18,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 17. "ISF17,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 16. "ISF16,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 15. "ISF15,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 14. "ISF14,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 13. "ISF13,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 12. "ISF12,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 11. "ISF11,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 10. "ISF10,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 9. "ISF9,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 8. "ISF8,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 7. "ISF7,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 6. "ISF6,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 5. "ISF5,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 4. "ISF4,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 3. "ISF3,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 2. "ISF2,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 1. "ISF1,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 0. "ISF0,Interrupt Status Flag" "0: Not detected,1: Detected"
tree.end
tree "GPIO2"
base ad:0x40104000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "IRQNUM,Interrupt Number"
group.long 0x40++0xF
line.long 0x0 "PDOR,Port Data Output"
bitfld.long 0x0 31. "PDO31,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 30. "PDO30,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 29. "PDO29,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 28. "PDO28,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 27. "PDO27,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 26. "PDO26,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 25. "PDO25,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 24. "PDO24,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 23. "PDO23,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 22. "PDO22,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 21. "PDO21,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 20. "PDO20,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 19. "PDO19,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 18. "PDO18,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 17. "PDO17,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 16. "PDO16,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 15. "PDO15,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 14. "PDO14,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 13. "PDO13,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 12. "PDO12,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 11. "PDO11,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 10. "PDO10,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 9. "PDO9,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 8. "PDO8,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 7. "PDO7,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 6. "PDO6,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 5. "PDO5,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 4. "PDO4,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 3. "PDO3,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 2. "PDO2,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 1. "PDO1,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 0. "PDO0,Port Data Output" "0: Logic level 0,1: Logic level 1"
line.long 0x4 "PSOR,Port Set Output"
bitfld.long 0x4 31. "PTSO31,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 30. "PTSO30,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 29. "PTSO29,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 28. "PTSO28,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 27. "PTSO27,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 26. "PTSO26,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 25. "PTSO25,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 24. "PTSO24,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 23. "PTSO23,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 22. "PTSO22,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 21. "PTSO21,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 20. "PTSO20,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 19. "PTSO19,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 18. "PTSO18,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 17. "PTSO17,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 16. "PTSO16,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 15. "PTSO15,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 14. "PTSO14,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 13. "PTSO13,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 12. "PTSO12,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 11. "PTSO11,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 10. "PTSO10,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 9. "PTSO9,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 8. "PTSO8,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 7. "PTSO7,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 6. "PTSO6,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 5. "PTSO5,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 4. "PTSO4,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 3. "PTSO3,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 2. "PTSO2,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 1. "PTSO1,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 0. "PTSO0,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
line.long 0x8 "PCOR,Port Clear Output"
bitfld.long 0x8 31. "PTCO31,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 30. "PTCO30,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 29. "PTCO29,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 28. "PTCO28,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 27. "PTCO27,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 26. "PTCO26,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 25. "PTCO25,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 24. "PTCO24,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 23. "PTCO23,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 22. "PTCO22,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 21. "PTCO21,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 20. "PTCO20,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 19. "PTCO19,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 18. "PTCO18,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 17. "PTCO17,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 16. "PTCO16,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 15. "PTCO15,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 14. "PTCO14,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 13. "PTCO13,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 12. "PTCO12,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 11. "PTCO11,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 10. "PTCO10,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 9. "PTCO9,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 8. "PTCO8,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 7. "PTCO7,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 6. "PTCO6,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 5. "PTCO5,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 4. "PTCO4,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 3. "PTCO3,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 2. "PTCO2,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 1. "PTCO1,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 0. "PTCO0,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
line.long 0xC "PTOR,Port Toggle Output"
bitfld.long 0xC 31. "PTTO31,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 30. "PTTO30,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 29. "PTTO29,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 28. "PTTO28,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 27. "PTTO27,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 26. "PTTO26,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 25. "PTTO25,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 24. "PTTO24,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 23. "PTTO23,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 22. "PTTO22,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 21. "PTTO21,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 20. "PTTO20,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 19. "PTTO19,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 18. "PTTO18,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 17. "PTTO17,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 16. "PTTO16,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 15. "PTTO15,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 14. "PTTO14,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 13. "PTTO13,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 12. "PTTO12,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 11. "PTTO11,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 10. "PTTO10,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 9. "PTTO9,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 8. "PTTO8,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 7. "PTTO7,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 6. "PTTO6,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 5. "PTTO5,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 4. "PTTO4,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 3. "PTTO3,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 2. "PTTO2,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 1. "PTTO1,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 0. "PTTO0,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
rgroup.long 0x50++0x3
line.long 0x0 "PDIR,Port Data Input"
bitfld.long 0x0 31. "PDI31,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 30. "PDI30,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 29. "PDI29,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 28. "PDI28,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 27. "PDI27,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 26. "PDI26,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 25. "PDI25,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 24. "PDI24,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 23. "PDI23,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 22. "PDI22,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 21. "PDI21,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 20. "PDI20,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 19. "PDI19,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 18. "PDI18,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 17. "PDI17,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 16. "PDI16,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 15. "PDI15,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 14. "PDI14,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 13. "PDI13,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 12. "PDI12,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 11. "PDI11,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 10. "PDI10,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 9. "PDI9,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 8. "PDI8,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 7. "PDI7,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 6. "PDI6,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 5. "PDI5,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 4. "PDI4,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 3. "PDI3,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 2. "PDI2,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 1. "PDI1,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 0. "PDI0,Port Data Input" "0: Logic 0,1: Logic 1"
group.long 0x54++0x7
line.long 0x0 "PDDR,Port Data Direction"
bitfld.long 0x0 31. "PDD31,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 30. "PDD30,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 29. "PDD29,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 28. "PDD28,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 27. "PDD27,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 26. "PDD26,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 25. "PDD25,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 24. "PDD24,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 23. "PDD23,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 22. "PDD22,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 21. "PDD21,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 20. "PDD20,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 19. "PDD19,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 18. "PDD18,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 17. "PDD17,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 16. "PDD16,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 15. "PDD15,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 14. "PDD14,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 13. "PDD13,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 12. "PDD12,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 11. "PDD11,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 10. "PDD10,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 9. "PDD9,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 8. "PDD8,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 7. "PDD7,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 6. "PDD6,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 5. "PDD5,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 4. "PDD4,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 3. "PDD3,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 2. "PDD2,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 1. "PDD1,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 0. "PDD0,Port Data Direction" "0: Input,1: Output"
line.long 0x4 "PIDR,Port Input Disable"
bitfld.long 0x4 31. "PID31,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 30. "PID30,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 29. "PID29,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 28. "PID28,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 27. "PID27,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 26. "PID26,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 25. "PID25,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 24. "PID24,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 23. "PID23,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 22. "PID22,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 21. "PID21,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 20. "PID20,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 19. "PID19,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 18. "PID18,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 17. "PID17,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 16. "PID16,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 15. "PID15,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 14. "PID14,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 13. "PID13,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 12. "PID12,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 11. "PID11,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 10. "PID10,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 9. "PID9,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 8. "PID8,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 7. "PID7,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 6. "PID6,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 5. "PID5,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 4. "PID4,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 3. "PID3,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 2. "PID2,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 1. "PID1,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 0. "PID0,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x60)++0x0
line.byte 0x0 "PDR[$1],Pin Data"
bitfld.byte 0x0 0. "PD,Pin Data (I/O)" "0: Logic zero,1: Logic one"
repeat.end
group.long 0x80++0x87
line.long 0x0 "ICR0,Interrupt Control 0"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4 "ICR1,Interrupt Control 1"
eventfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x8 "ICR2,Interrupt Control 2"
eventfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0xC "ICR3,Interrupt Control 3"
eventfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x10 "ICR4,Interrupt Control 4"
eventfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x14 "ICR5,Interrupt Control 5"
eventfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x18 "ICR6,Interrupt Control 6"
eventfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x1C "ICR7,Interrupt Control 7"
eventfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x20 "ICR8,Interrupt Control 8"
eventfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x24 "ICR9,Interrupt Control 9"
eventfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x28 "ICR10,Interrupt Control 10"
eventfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x2C "ICR11,Interrupt Control 11"
eventfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x30 "ICR12,Interrupt Control 12"
eventfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x34 "ICR13,Interrupt Control 13"
eventfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x38 "ICR14,Interrupt Control 14"
eventfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x3C "ICR15,Interrupt Control 15"
eventfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x40 "ICR16,Interrupt Control 16"
eventfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x44 "ICR17,Interrupt Control 17"
eventfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x48 "ICR18,Interrupt Control 18"
eventfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4C "ICR19,Interrupt Control 19"
eventfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x50 "ICR20,Interrupt Control 20"
eventfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x54 "ICR21,Interrupt Control 21"
eventfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x58 "ICR22,Interrupt Control 22"
eventfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x5C "ICR23,Interrupt Control 23"
eventfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x60 "ICR24,Interrupt Control 24"
eventfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x64 "ICR25,Interrupt Control 25"
eventfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x68 "ICR26,Interrupt Control 26"
eventfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x6C "ICR27,Interrupt Control 27"
eventfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x70 "ICR28,Interrupt Control 28"
eventfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x74 "ICR29,Interrupt Control 29"
eventfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x78 "ICR30,Interrupt Control 30"
eventfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x7C "ICR31,Interrupt Control 31"
eventfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x80 "GICLR,Global Interrupt Control Low"
hexmask.long.word 0x80 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x80 15. "GIWE15,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 14. "GIWE14,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 13. "GIWE13,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 12. "GIWE12,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 11. "GIWE11,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 10. "GIWE10,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 9. "GIWE9,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 8. "GIWE8,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 7. "GIWE7,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 6. "GIWE6,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 5. "GIWE5,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 4. "GIWE4,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 3. "GIWE3,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 2. "GIWE2,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 1. "GIWE1,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 0. "GIWE0,Global Interrupt Write Enable" "0: Not updated,1: Updated"
line.long 0x84 "GICHR,Global Interrupt Control High"
hexmask.long.word 0x84 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x84 15. "GIWE31,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 14. "GIWE30,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 13. "GIWE29,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 12. "GIWE28,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 11. "GIWE27,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 10. "GIWE26,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 9. "GIWE25,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 8. "GIWE24,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 7. "GIWE23,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 6. "GIWE22,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 5. "GIWE21,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 4. "GIWE20,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 3. "GIWE19,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 2. "GIWE18,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 1. "GIWE17,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 0. "GIWE16,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
group.long 0x120++0x3
line.long 0x0 "ISFR0,Interrupt Status Flag"
eventfld.long 0x0 31. "ISF31,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 30. "ISF30,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 29. "ISF29,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 28. "ISF28,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 27. "ISF27,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 26. "ISF26,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 25. "ISF25,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 24. "ISF24,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 23. "ISF23,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 22. "ISF22,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 21. "ISF21,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 20. "ISF20,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 19. "ISF19,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 18. "ISF18,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 17. "ISF17,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 16. "ISF16,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 15. "ISF15,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 14. "ISF14,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 13. "ISF13,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 12. "ISF12,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 11. "ISF11,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 10. "ISF10,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 9. "ISF9,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 8. "ISF8,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 7. "ISF7,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 6. "ISF6,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 5. "ISF5,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 4. "ISF4,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 3. "ISF3,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 2. "ISF2,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 1. "ISF1,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 0. "ISF0,Interrupt Status Flag" "0: Not detected,1: Detected"
tree.end
tree "GPIO3"
base ad:0x40105000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "IRQNUM,Interrupt Number"
group.long 0x40++0xF
line.long 0x0 "PDOR,Port Data Output"
bitfld.long 0x0 31. "PDO31,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 30. "PDO30,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 29. "PDO29,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 28. "PDO28,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 27. "PDO27,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 26. "PDO26,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 25. "PDO25,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 24. "PDO24,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 23. "PDO23,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 22. "PDO22,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 21. "PDO21,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 20. "PDO20,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 19. "PDO19,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 18. "PDO18,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 17. "PDO17,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 16. "PDO16,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 15. "PDO15,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 14. "PDO14,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 13. "PDO13,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 12. "PDO12,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 11. "PDO11,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 10. "PDO10,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 9. "PDO9,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 8. "PDO8,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 7. "PDO7,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 6. "PDO6,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 5. "PDO5,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 4. "PDO4,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 3. "PDO3,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 2. "PDO2,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 1. "PDO1,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 0. "PDO0,Port Data Output" "0: Logic level 0,1: Logic level 1"
line.long 0x4 "PSOR,Port Set Output"
bitfld.long 0x4 31. "PTSO31,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 30. "PTSO30,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 29. "PTSO29,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 28. "PTSO28,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 27. "PTSO27,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 26. "PTSO26,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 25. "PTSO25,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 24. "PTSO24,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 23. "PTSO23,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 22. "PTSO22,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 21. "PTSO21,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 20. "PTSO20,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 19. "PTSO19,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 18. "PTSO18,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 17. "PTSO17,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 16. "PTSO16,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 15. "PTSO15,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 14. "PTSO14,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 13. "PTSO13,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 12. "PTSO12,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 11. "PTSO11,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 10. "PTSO10,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 9. "PTSO9,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 8. "PTSO8,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 7. "PTSO7,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 6. "PTSO6,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 5. "PTSO5,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 4. "PTSO4,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 3. "PTSO3,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 2. "PTSO2,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 1. "PTSO1,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 0. "PTSO0,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
line.long 0x8 "PCOR,Port Clear Output"
bitfld.long 0x8 31. "PTCO31,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 30. "PTCO30,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 29. "PTCO29,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 28. "PTCO28,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 27. "PTCO27,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 26. "PTCO26,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 25. "PTCO25,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 24. "PTCO24,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 23. "PTCO23,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 22. "PTCO22,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 21. "PTCO21,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 20. "PTCO20,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 19. "PTCO19,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 18. "PTCO18,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 17. "PTCO17,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 16. "PTCO16,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 15. "PTCO15,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 14. "PTCO14,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 13. "PTCO13,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 12. "PTCO12,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 11. "PTCO11,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 10. "PTCO10,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 9. "PTCO9,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 8. "PTCO8,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 7. "PTCO7,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 6. "PTCO6,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 5. "PTCO5,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 4. "PTCO4,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 3. "PTCO3,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 2. "PTCO2,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 1. "PTCO1,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 0. "PTCO0,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
line.long 0xC "PTOR,Port Toggle Output"
bitfld.long 0xC 31. "PTTO31,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 30. "PTTO30,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 29. "PTTO29,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 28. "PTTO28,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 27. "PTTO27,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 26. "PTTO26,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 25. "PTTO25,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 24. "PTTO24,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 23. "PTTO23,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 22. "PTTO22,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 21. "PTTO21,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 20. "PTTO20,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 19. "PTTO19,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 18. "PTTO18,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 17. "PTTO17,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 16. "PTTO16,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 15. "PTTO15,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 14. "PTTO14,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 13. "PTTO13,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 12. "PTTO12,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 11. "PTTO11,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 10. "PTTO10,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 9. "PTTO9,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 8. "PTTO8,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 7. "PTTO7,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 6. "PTTO6,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 5. "PTTO5,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 4. "PTTO4,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 3. "PTTO3,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 2. "PTTO2,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 1. "PTTO1,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 0. "PTTO0,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
rgroup.long 0x50++0x3
line.long 0x0 "PDIR,Port Data Input"
bitfld.long 0x0 31. "PDI31,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 30. "PDI30,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 29. "PDI29,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 28. "PDI28,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 27. "PDI27,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 26. "PDI26,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 25. "PDI25,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 24. "PDI24,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 23. "PDI23,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 22. "PDI22,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 21. "PDI21,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 20. "PDI20,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 19. "PDI19,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 18. "PDI18,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 17. "PDI17,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 16. "PDI16,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 15. "PDI15,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 14. "PDI14,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 13. "PDI13,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 12. "PDI12,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 11. "PDI11,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 10. "PDI10,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 9. "PDI9,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 8. "PDI8,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 7. "PDI7,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 6. "PDI6,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 5. "PDI5,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 4. "PDI4,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 3. "PDI3,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 2. "PDI2,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 1. "PDI1,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 0. "PDI0,Port Data Input" "0: Logic 0,1: Logic 1"
group.long 0x54++0x7
line.long 0x0 "PDDR,Port Data Direction"
bitfld.long 0x0 31. "PDD31,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 30. "PDD30,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 29. "PDD29,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 28. "PDD28,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 27. "PDD27,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 26. "PDD26,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 25. "PDD25,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 24. "PDD24,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 23. "PDD23,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 22. "PDD22,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 21. "PDD21,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 20. "PDD20,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 19. "PDD19,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 18. "PDD18,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 17. "PDD17,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 16. "PDD16,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 15. "PDD15,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 14. "PDD14,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 13. "PDD13,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 12. "PDD12,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 11. "PDD11,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 10. "PDD10,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 9. "PDD9,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 8. "PDD8,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 7. "PDD7,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 6. "PDD6,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 5. "PDD5,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 4. "PDD4,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 3. "PDD3,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 2. "PDD2,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 1. "PDD1,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 0. "PDD0,Port Data Direction" "0: Input,1: Output"
line.long 0x4 "PIDR,Port Input Disable"
bitfld.long 0x4 31. "PID31,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 30. "PID30,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 29. "PID29,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 28. "PID28,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 27. "PID27,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 26. "PID26,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 25. "PID25,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 24. "PID24,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 23. "PID23,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 22. "PID22,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 21. "PID21,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 20. "PID20,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 19. "PID19,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 18. "PID18,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 17. "PID17,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 16. "PID16,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 15. "PID15,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 14. "PID14,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 13. "PID13,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 12. "PID12,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 11. "PID11,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 10. "PID10,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 9. "PID9,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 8. "PID8,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 7. "PID7,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 6. "PID6,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 5. "PID5,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 4. "PID4,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 3. "PID3,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 2. "PID2,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 1. "PID1,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 0. "PID0,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x60)++0x0
line.byte 0x0 "PDR[$1],Pin Data"
bitfld.byte 0x0 0. "PD,Pin Data (I/O)" "0: Logic zero,1: Logic one"
repeat.end
group.long 0x80++0x87
line.long 0x0 "ICR0,Interrupt Control 0"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4 "ICR1,Interrupt Control 1"
eventfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x8 "ICR2,Interrupt Control 2"
eventfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0xC "ICR3,Interrupt Control 3"
eventfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x10 "ICR4,Interrupt Control 4"
eventfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x14 "ICR5,Interrupt Control 5"
eventfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x18 "ICR6,Interrupt Control 6"
eventfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x1C "ICR7,Interrupt Control 7"
eventfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x20 "ICR8,Interrupt Control 8"
eventfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x24 "ICR9,Interrupt Control 9"
eventfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x28 "ICR10,Interrupt Control 10"
eventfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x2C "ICR11,Interrupt Control 11"
eventfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x30 "ICR12,Interrupt Control 12"
eventfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x34 "ICR13,Interrupt Control 13"
eventfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x38 "ICR14,Interrupt Control 14"
eventfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x3C "ICR15,Interrupt Control 15"
eventfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x40 "ICR16,Interrupt Control 16"
eventfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x44 "ICR17,Interrupt Control 17"
eventfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x48 "ICR18,Interrupt Control 18"
eventfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4C "ICR19,Interrupt Control 19"
eventfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x50 "ICR20,Interrupt Control 20"
eventfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x54 "ICR21,Interrupt Control 21"
eventfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x58 "ICR22,Interrupt Control 22"
eventfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x5C "ICR23,Interrupt Control 23"
eventfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x60 "ICR24,Interrupt Control 24"
eventfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x64 "ICR25,Interrupt Control 25"
eventfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x68 "ICR26,Interrupt Control 26"
eventfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x6C "ICR27,Interrupt Control 27"
eventfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x70 "ICR28,Interrupt Control 28"
eventfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x74 "ICR29,Interrupt Control 29"
eventfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x78 "ICR30,Interrupt Control 30"
eventfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x7C "ICR31,Interrupt Control 31"
eventfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x80 "GICLR,Global Interrupt Control Low"
hexmask.long.word 0x80 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x80 15. "GIWE15,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 14. "GIWE14,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 13. "GIWE13,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 12. "GIWE12,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 11. "GIWE11,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 10. "GIWE10,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 9. "GIWE9,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 8. "GIWE8,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 7. "GIWE7,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 6. "GIWE6,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 5. "GIWE5,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 4. "GIWE4,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 3. "GIWE3,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 2. "GIWE2,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 1. "GIWE1,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 0. "GIWE0,Global Interrupt Write Enable" "0: Not updated,1: Updated"
line.long 0x84 "GICHR,Global Interrupt Control High"
hexmask.long.word 0x84 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x84 15. "GIWE31,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 14. "GIWE30,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 13. "GIWE29,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 12. "GIWE28,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 11. "GIWE27,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 10. "GIWE26,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 9. "GIWE25,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 8. "GIWE24,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 7. "GIWE23,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 6. "GIWE22,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 5. "GIWE21,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 4. "GIWE20,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 3. "GIWE19,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 2. "GIWE18,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 1. "GIWE17,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 0. "GIWE16,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
group.long 0x120++0x3
line.long 0x0 "ISFR0,Interrupt Status Flag"
eventfld.long 0x0 31. "ISF31,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 30. "ISF30,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 29. "ISF29,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 28. "ISF28,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 27. "ISF27,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 26. "ISF26,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 25. "ISF25,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 24. "ISF24,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 23. "ISF23,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 22. "ISF22,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 21. "ISF21,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 20. "ISF20,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 19. "ISF19,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 18. "ISF18,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 17. "ISF17,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 16. "ISF16,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 15. "ISF15,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 14. "ISF14,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 13. "ISF13,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 12. "ISF12,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 11. "ISF11,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 10. "ISF10,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 9. "ISF9,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 8. "ISF8,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 7. "ISF7,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 6. "ISF6,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 5. "ISF5,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 4. "ISF4,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 3. "ISF3,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 2. "ISF2,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 1. "ISF1,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 0. "ISF0,Interrupt Status Flag" "0: Not detected,1: Detected"
tree.end
endif
sif (cpuis("MC?A152*"))
tree "GPIO0"
base ad:0x40102000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "IRQNUM,Interrupt Number"
group.long 0x40++0xF
line.long 0x0 "PDOR,Port Data Output"
bitfld.long 0x0 31. "PDO31,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 30. "PDO30,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 29. "PDO29,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 28. "PDO28,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 27. "PDO27,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 26. "PDO26,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 25. "PDO25,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 24. "PDO24,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 23. "PDO23,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 22. "PDO22,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 21. "PDO21,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 20. "PDO20,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 19. "PDO19,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 18. "PDO18,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 17. "PDO17,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 16. "PDO16,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 15. "PDO15,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 14. "PDO14,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 13. "PDO13,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 12. "PDO12,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 11. "PDO11,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 10. "PDO10,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 9. "PDO9,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 8. "PDO8,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 7. "PDO7,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 6. "PDO6,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 5. "PDO5,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 4. "PDO4,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 3. "PDO3,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 2. "PDO2,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 1. "PDO1,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 0. "PDO0,Port Data Output" "0: Logic level 0,1: Logic level 1"
line.long 0x4 "PSOR,Port Set Output"
bitfld.long 0x4 31. "PTSO31,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 30. "PTSO30,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 29. "PTSO29,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 28. "PTSO28,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 27. "PTSO27,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 26. "PTSO26,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 25. "PTSO25,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 24. "PTSO24,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 23. "PTSO23,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 22. "PTSO22,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 21. "PTSO21,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 20. "PTSO20,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 19. "PTSO19,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 18. "PTSO18,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 17. "PTSO17,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 16. "PTSO16,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 15. "PTSO15,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 14. "PTSO14,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 13. "PTSO13,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 12. "PTSO12,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 11. "PTSO11,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 10. "PTSO10,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 9. "PTSO9,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 8. "PTSO8,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 7. "PTSO7,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 6. "PTSO6,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 5. "PTSO5,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 4. "PTSO4,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 3. "PTSO3,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 2. "PTSO2,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 1. "PTSO1,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 0. "PTSO0,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
line.long 0x8 "PCOR,Port Clear Output"
bitfld.long 0x8 31. "PTCO31,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 30. "PTCO30,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 29. "PTCO29,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 28. "PTCO28,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 27. "PTCO27,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 26. "PTCO26,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 25. "PTCO25,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 24. "PTCO24,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 23. "PTCO23,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 22. "PTCO22,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 21. "PTCO21,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 20. "PTCO20,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 19. "PTCO19,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 18. "PTCO18,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 17. "PTCO17,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 16. "PTCO16,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 15. "PTCO15,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 14. "PTCO14,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 13. "PTCO13,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 12. "PTCO12,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 11. "PTCO11,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 10. "PTCO10,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 9. "PTCO9,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 8. "PTCO8,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 7. "PTCO7,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 6. "PTCO6,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 5. "PTCO5,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 4. "PTCO4,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 3. "PTCO3,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 2. "PTCO2,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 1. "PTCO1,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 0. "PTCO0,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
line.long 0xC "PTOR,Port Toggle Output"
bitfld.long 0xC 31. "PTTO31,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 30. "PTTO30,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 29. "PTTO29,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 28. "PTTO28,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 27. "PTTO27,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 26. "PTTO26,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 25. "PTTO25,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 24. "PTTO24,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 23. "PTTO23,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 22. "PTTO22,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 21. "PTTO21,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 20. "PTTO20,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 19. "PTTO19,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 18. "PTTO18,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 17. "PTTO17,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 16. "PTTO16,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 15. "PTTO15,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 14. "PTTO14,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 13. "PTTO13,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 12. "PTTO12,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 11. "PTTO11,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 10. "PTTO10,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 9. "PTTO9,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 8. "PTTO8,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 7. "PTTO7,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 6. "PTTO6,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 5. "PTTO5,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 4. "PTTO4,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 3. "PTTO3,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 2. "PTTO2,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 1. "PTTO1,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 0. "PTTO0,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
rgroup.long 0x50++0x3
line.long 0x0 "PDIR,Port Data Input"
bitfld.long 0x0 31. "PDI31,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 30. "PDI30,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 29. "PDI29,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 28. "PDI28,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 27. "PDI27,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 26. "PDI26,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 25. "PDI25,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 24. "PDI24,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 23. "PDI23,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 22. "PDI22,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 21. "PDI21,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 20. "PDI20,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 19. "PDI19,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 18. "PDI18,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 17. "PDI17,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 16. "PDI16,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 15. "PDI15,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 14. "PDI14,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 13. "PDI13,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 12. "PDI12,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 11. "PDI11,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 10. "PDI10,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 9. "PDI9,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 8. "PDI8,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 7. "PDI7,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 6. "PDI6,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 5. "PDI5,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 4. "PDI4,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 3. "PDI3,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 2. "PDI2,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 1. "PDI1,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 0. "PDI0,Port Data Input" "0: Logic 0,1: Logic 1"
group.long 0x54++0x7
line.long 0x0 "PDDR,Port Data Direction"
bitfld.long 0x0 31. "PDD31,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 30. "PDD30,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 29. "PDD29,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 28. "PDD28,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 27. "PDD27,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 26. "PDD26,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 25. "PDD25,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 24. "PDD24,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 23. "PDD23,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 22. "PDD22,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 21. "PDD21,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 20. "PDD20,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 19. "PDD19,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 18. "PDD18,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 17. "PDD17,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 16. "PDD16,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 15. "PDD15,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 14. "PDD14,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 13. "PDD13,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 12. "PDD12,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 11. "PDD11,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 10. "PDD10,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 9. "PDD9,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 8. "PDD8,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 7. "PDD7,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 6. "PDD6,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 5. "PDD5,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 4. "PDD4,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 3. "PDD3,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 2. "PDD2,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 1. "PDD1,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 0. "PDD0,Port Data Direction" "0: Input,1: Output"
line.long 0x4 "PIDR,Port Input Disable"
bitfld.long 0x4 31. "PID31,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 30. "PID30,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 29. "PID29,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 28. "PID28,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 27. "PID27,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 26. "PID26,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 25. "PID25,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 24. "PID24,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 23. "PID23,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 22. "PID22,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 21. "PID21,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 20. "PID20,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 19. "PID19,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 18. "PID18,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 17. "PID17,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 16. "PID16,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 15. "PID15,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 14. "PID14,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 13. "PID13,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 12. "PID12,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 11. "PID11,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 10. "PID10,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 9. "PID9,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 8. "PID8,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 7. "PID7,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 6. "PID6,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 5. "PID5,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 4. "PID4,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 3. "PID3,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 2. "PID2,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 1. "PID1,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 0. "PID0,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x60)++0x0
line.byte 0x0 "PDR[$1],Pin Data"
bitfld.byte 0x0 0. "PD,Pin Data (I/O)" "0: Logic zero,1: Logic one"
repeat.end
repeat 32. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x80)++0x3
line.long 0x0 "ICR[$1],Interrupt Control index"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
repeat.end
group.long 0x100++0x7
line.long 0x0 "GICLR,Global Interrupt Control Low"
hexmask.long.word 0x0 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x0 15. "GIWE15,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 14. "GIWE14,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 13. "GIWE13,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 12. "GIWE12,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 11. "GIWE11,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 10. "GIWE10,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 9. "GIWE9,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 8. "GIWE8,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 7. "GIWE7,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 6. "GIWE6,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 5. "GIWE5,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 4. "GIWE4,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 3. "GIWE3,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 2. "GIWE2,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 1. "GIWE1,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 0. "GIWE0,Global Interrupt Write Enable" "0: Not updated,1: Updated"
line.long 0x4 "GICHR,Global Interrupt Control High"
hexmask.long.word 0x4 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x4 15. "GIWE31,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 14. "GIWE30,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 13. "GIWE29,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 12. "GIWE28,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 11. "GIWE27,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 10. "GIWE26,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 9. "GIWE25,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 8. "GIWE24,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 7. "GIWE23,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 6. "GIWE22,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 5. "GIWE21,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 4. "GIWE20,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 3. "GIWE19,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 2. "GIWE18,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 1. "GIWE17,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 0. "GIWE16,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
group.long 0x120++0x3
line.long 0x0 "ISFR0,Interrupt Status Flag"
eventfld.long 0x0 31. "ISF31,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 30. "ISF30,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 29. "ISF29,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 28. "ISF28,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 27. "ISF27,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 26. "ISF26,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 25. "ISF25,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 24. "ISF24,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 23. "ISF23,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 22. "ISF22,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 21. "ISF21,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 20. "ISF20,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 19. "ISF19,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 18. "ISF18,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 17. "ISF17,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 16. "ISF16,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 15. "ISF15,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 14. "ISF14,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 13. "ISF13,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 12. "ISF12,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 11. "ISF11,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 10. "ISF10,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 9. "ISF9,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 8. "ISF8,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 7. "ISF7,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 6. "ISF6,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 5. "ISF5,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 4. "ISF4,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 3. "ISF3,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 2. "ISF2,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 1. "ISF1,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 0. "ISF0,Interrupt Status Flag" "0: Not detected,1: Detected"
tree.end
tree "GPIO1"
base ad:0x40103000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "IRQNUM,Interrupt Number"
group.long 0x40++0xF
line.long 0x0 "PDOR,Port Data Output"
bitfld.long 0x0 31. "PDO31,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 30. "PDO30,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 29. "PDO29,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 28. "PDO28,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 27. "PDO27,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 26. "PDO26,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 25. "PDO25,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 24. "PDO24,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 23. "PDO23,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 22. "PDO22,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 21. "PDO21,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 20. "PDO20,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 19. "PDO19,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 18. "PDO18,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 17. "PDO17,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 16. "PDO16,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 15. "PDO15,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 14. "PDO14,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 13. "PDO13,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 12. "PDO12,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 11. "PDO11,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 10. "PDO10,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 9. "PDO9,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 8. "PDO8,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 7. "PDO7,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 6. "PDO6,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 5. "PDO5,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 4. "PDO4,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 3. "PDO3,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 2. "PDO2,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 1. "PDO1,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 0. "PDO0,Port Data Output" "0: Logic level 0,1: Logic level 1"
line.long 0x4 "PSOR,Port Set Output"
bitfld.long 0x4 31. "PTSO31,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 30. "PTSO30,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 29. "PTSO29,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 28. "PTSO28,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 27. "PTSO27,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 26. "PTSO26,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 25. "PTSO25,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 24. "PTSO24,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 23. "PTSO23,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 22. "PTSO22,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 21. "PTSO21,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 20. "PTSO20,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 19. "PTSO19,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 18. "PTSO18,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 17. "PTSO17,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 16. "PTSO16,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 15. "PTSO15,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 14. "PTSO14,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 13. "PTSO13,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 12. "PTSO12,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 11. "PTSO11,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 10. "PTSO10,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 9. "PTSO9,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 8. "PTSO8,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 7. "PTSO7,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 6. "PTSO6,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 5. "PTSO5,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 4. "PTSO4,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 3. "PTSO3,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 2. "PTSO2,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 1. "PTSO1,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 0. "PTSO0,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
line.long 0x8 "PCOR,Port Clear Output"
bitfld.long 0x8 31. "PTCO31,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 30. "PTCO30,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 29. "PTCO29,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 28. "PTCO28,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 27. "PTCO27,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 26. "PTCO26,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 25. "PTCO25,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 24. "PTCO24,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 23. "PTCO23,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 22. "PTCO22,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 21. "PTCO21,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 20. "PTCO20,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 19. "PTCO19,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 18. "PTCO18,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 17. "PTCO17,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 16. "PTCO16,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 15. "PTCO15,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 14. "PTCO14,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 13. "PTCO13,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 12. "PTCO12,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 11. "PTCO11,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 10. "PTCO10,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 9. "PTCO9,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 8. "PTCO8,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 7. "PTCO7,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 6. "PTCO6,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 5. "PTCO5,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 4. "PTCO4,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 3. "PTCO3,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 2. "PTCO2,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 1. "PTCO1,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 0. "PTCO0,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
line.long 0xC "PTOR,Port Toggle Output"
bitfld.long 0xC 31. "PTTO31,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 30. "PTTO30,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 29. "PTTO29,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 28. "PTTO28,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 27. "PTTO27,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 26. "PTTO26,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 25. "PTTO25,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 24. "PTTO24,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 23. "PTTO23,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 22. "PTTO22,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 21. "PTTO21,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 20. "PTTO20,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 19. "PTTO19,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 18. "PTTO18,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 17. "PTTO17,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 16. "PTTO16,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 15. "PTTO15,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 14. "PTTO14,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 13. "PTTO13,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 12. "PTTO12,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 11. "PTTO11,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 10. "PTTO10,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 9. "PTTO9,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 8. "PTTO8,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 7. "PTTO7,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 6. "PTTO6,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 5. "PTTO5,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 4. "PTTO4,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 3. "PTTO3,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 2. "PTTO2,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 1. "PTTO1,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 0. "PTTO0,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
rgroup.long 0x50++0x3
line.long 0x0 "PDIR,Port Data Input"
bitfld.long 0x0 31. "PDI31,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 30. "PDI30,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 29. "PDI29,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 28. "PDI28,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 27. "PDI27,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 26. "PDI26,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 25. "PDI25,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 24. "PDI24,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 23. "PDI23,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 22. "PDI22,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 21. "PDI21,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 20. "PDI20,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 19. "PDI19,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 18. "PDI18,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 17. "PDI17,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 16. "PDI16,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 15. "PDI15,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 14. "PDI14,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 13. "PDI13,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 12. "PDI12,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 11. "PDI11,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 10. "PDI10,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 9. "PDI9,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 8. "PDI8,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 7. "PDI7,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 6. "PDI6,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 5. "PDI5,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 4. "PDI4,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 3. "PDI3,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 2. "PDI2,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 1. "PDI1,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 0. "PDI0,Port Data Input" "0: Logic 0,1: Logic 1"
group.long 0x54++0x7
line.long 0x0 "PDDR,Port Data Direction"
bitfld.long 0x0 31. "PDD31,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 30. "PDD30,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 29. "PDD29,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 28. "PDD28,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 27. "PDD27,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 26. "PDD26,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 25. "PDD25,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 24. "PDD24,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 23. "PDD23,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 22. "PDD22,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 21. "PDD21,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 20. "PDD20,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 19. "PDD19,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 18. "PDD18,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 17. "PDD17,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 16. "PDD16,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 15. "PDD15,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 14. "PDD14,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 13. "PDD13,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 12. "PDD12,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 11. "PDD11,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 10. "PDD10,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 9. "PDD9,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 8. "PDD8,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 7. "PDD7,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 6. "PDD6,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 5. "PDD5,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 4. "PDD4,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 3. "PDD3,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 2. "PDD2,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 1. "PDD1,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 0. "PDD0,Port Data Direction" "0: Input,1: Output"
line.long 0x4 "PIDR,Port Input Disable"
bitfld.long 0x4 31. "PID31,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 30. "PID30,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 29. "PID29,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 28. "PID28,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 27. "PID27,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 26. "PID26,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 25. "PID25,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 24. "PID24,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 23. "PID23,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 22. "PID22,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 21. "PID21,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 20. "PID20,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 19. "PID19,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 18. "PID18,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 17. "PID17,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 16. "PID16,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 15. "PID15,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 14. "PID14,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 13. "PID13,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 12. "PID12,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 11. "PID11,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 10. "PID10,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 9. "PID9,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 8. "PID8,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 7. "PID7,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 6. "PID6,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 5. "PID5,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 4. "PID4,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 3. "PID3,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 2. "PID2,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 1. "PID1,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 0. "PID0,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x60)++0x0
line.byte 0x0 "PDR[$1],Pin Data"
bitfld.byte 0x0 0. "PD,Pin Data (I/O)" "0: Logic zero,1: Logic one"
repeat.end
repeat 32. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x80)++0x3
line.long 0x0 "ICR[$1],Interrupt Control index"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
repeat.end
group.long 0x100++0x7
line.long 0x0 "GICLR,Global Interrupt Control Low"
hexmask.long.word 0x0 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x0 15. "GIWE15,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 14. "GIWE14,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 13. "GIWE13,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 12. "GIWE12,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 11. "GIWE11,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 10. "GIWE10,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 9. "GIWE9,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 8. "GIWE8,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 7. "GIWE7,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 6. "GIWE6,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 5. "GIWE5,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 4. "GIWE4,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 3. "GIWE3,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 2. "GIWE2,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 1. "GIWE1,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 0. "GIWE0,Global Interrupt Write Enable" "0: Not updated,1: Updated"
line.long 0x4 "GICHR,Global Interrupt Control High"
hexmask.long.word 0x4 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x4 15. "GIWE31,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 14. "GIWE30,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 13. "GIWE29,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 12. "GIWE28,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 11. "GIWE27,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 10. "GIWE26,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 9. "GIWE25,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 8. "GIWE24,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 7. "GIWE23,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 6. "GIWE22,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 5. "GIWE21,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 4. "GIWE20,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 3. "GIWE19,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 2. "GIWE18,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 1. "GIWE17,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 0. "GIWE16,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
group.long 0x120++0x3
line.long 0x0 "ISFR0,Interrupt Status Flag"
eventfld.long 0x0 31. "ISF31,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 30. "ISF30,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 29. "ISF29,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 28. "ISF28,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 27. "ISF27,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 26. "ISF26,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 25. "ISF25,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 24. "ISF24,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 23. "ISF23,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 22. "ISF22,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 21. "ISF21,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 20. "ISF20,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 19. "ISF19,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 18. "ISF18,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 17. "ISF17,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 16. "ISF16,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 15. "ISF15,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 14. "ISF14,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 13. "ISF13,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 12. "ISF12,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 11. "ISF11,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 10. "ISF10,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 9. "ISF9,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 8. "ISF8,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 7. "ISF7,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 6. "ISF6,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 5. "ISF5,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 4. "ISF4,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 3. "ISF3,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 2. "ISF2,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 1. "ISF1,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 0. "ISF0,Interrupt Status Flag" "0: Not detected,1: Detected"
tree.end
tree "GPIO2"
base ad:0x40104000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "IRQNUM,Interrupt Number"
group.long 0x40++0xF
line.long 0x0 "PDOR,Port Data Output"
bitfld.long 0x0 31. "PDO31,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 30. "PDO30,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 29. "PDO29,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 28. "PDO28,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 27. "PDO27,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 26. "PDO26,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 25. "PDO25,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 24. "PDO24,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 23. "PDO23,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 22. "PDO22,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 21. "PDO21,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 20. "PDO20,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 19. "PDO19,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 18. "PDO18,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 17. "PDO17,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 16. "PDO16,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 15. "PDO15,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 14. "PDO14,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 13. "PDO13,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 12. "PDO12,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 11. "PDO11,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 10. "PDO10,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 9. "PDO9,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 8. "PDO8,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 7. "PDO7,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 6. "PDO6,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 5. "PDO5,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 4. "PDO4,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 3. "PDO3,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 2. "PDO2,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 1. "PDO1,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 0. "PDO0,Port Data Output" "0: Logic level 0,1: Logic level 1"
line.long 0x4 "PSOR,Port Set Output"
bitfld.long 0x4 31. "PTSO31,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 30. "PTSO30,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 29. "PTSO29,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 28. "PTSO28,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 27. "PTSO27,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 26. "PTSO26,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 25. "PTSO25,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 24. "PTSO24,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 23. "PTSO23,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 22. "PTSO22,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 21. "PTSO21,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 20. "PTSO20,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 19. "PTSO19,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 18. "PTSO18,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 17. "PTSO17,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 16. "PTSO16,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 15. "PTSO15,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 14. "PTSO14,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 13. "PTSO13,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 12. "PTSO12,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 11. "PTSO11,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 10. "PTSO10,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 9. "PTSO9,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 8. "PTSO8,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 7. "PTSO7,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 6. "PTSO6,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 5. "PTSO5,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 4. "PTSO4,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 3. "PTSO3,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 2. "PTSO2,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 1. "PTSO1,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 0. "PTSO0,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
line.long 0x8 "PCOR,Port Clear Output"
bitfld.long 0x8 31. "PTCO31,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 30. "PTCO30,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 29. "PTCO29,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 28. "PTCO28,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 27. "PTCO27,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 26. "PTCO26,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 25. "PTCO25,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 24. "PTCO24,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 23. "PTCO23,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 22. "PTCO22,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 21. "PTCO21,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 20. "PTCO20,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 19. "PTCO19,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 18. "PTCO18,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 17. "PTCO17,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 16. "PTCO16,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 15. "PTCO15,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 14. "PTCO14,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 13. "PTCO13,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 12. "PTCO12,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 11. "PTCO11,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 10. "PTCO10,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 9. "PTCO9,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 8. "PTCO8,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 7. "PTCO7,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 6. "PTCO6,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 5. "PTCO5,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 4. "PTCO4,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 3. "PTCO3,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 2. "PTCO2,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 1. "PTCO1,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 0. "PTCO0,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
line.long 0xC "PTOR,Port Toggle Output"
bitfld.long 0xC 31. "PTTO31,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 30. "PTTO30,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 29. "PTTO29,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 28. "PTTO28,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 27. "PTTO27,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 26. "PTTO26,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 25. "PTTO25,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 24. "PTTO24,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 23. "PTTO23,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 22. "PTTO22,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 21. "PTTO21,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 20. "PTTO20,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 19. "PTTO19,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 18. "PTTO18,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 17. "PTTO17,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 16. "PTTO16,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 15. "PTTO15,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 14. "PTTO14,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 13. "PTTO13,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 12. "PTTO12,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 11. "PTTO11,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 10. "PTTO10,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 9. "PTTO9,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 8. "PTTO8,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 7. "PTTO7,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 6. "PTTO6,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 5. "PTTO5,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 4. "PTTO4,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 3. "PTTO3,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 2. "PTTO2,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 1. "PTTO1,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 0. "PTTO0,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
rgroup.long 0x50++0x3
line.long 0x0 "PDIR,Port Data Input"
bitfld.long 0x0 31. "PDI31,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 30. "PDI30,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 29. "PDI29,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 28. "PDI28,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 27. "PDI27,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 26. "PDI26,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 25. "PDI25,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 24. "PDI24,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 23. "PDI23,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 22. "PDI22,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 21. "PDI21,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 20. "PDI20,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 19. "PDI19,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 18. "PDI18,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 17. "PDI17,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 16. "PDI16,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 15. "PDI15,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 14. "PDI14,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 13. "PDI13,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 12. "PDI12,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 11. "PDI11,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 10. "PDI10,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 9. "PDI9,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 8. "PDI8,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 7. "PDI7,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 6. "PDI6,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 5. "PDI5,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 4. "PDI4,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 3. "PDI3,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 2. "PDI2,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 1. "PDI1,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 0. "PDI0,Port Data Input" "0: Logic 0,1: Logic 1"
group.long 0x54++0x7
line.long 0x0 "PDDR,Port Data Direction"
bitfld.long 0x0 31. "PDD31,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 30. "PDD30,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 29. "PDD29,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 28. "PDD28,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 27. "PDD27,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 26. "PDD26,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 25. "PDD25,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 24. "PDD24,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 23. "PDD23,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 22. "PDD22,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 21. "PDD21,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 20. "PDD20,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 19. "PDD19,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 18. "PDD18,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 17. "PDD17,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 16. "PDD16,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 15. "PDD15,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 14. "PDD14,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 13. "PDD13,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 12. "PDD12,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 11. "PDD11,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 10. "PDD10,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 9. "PDD9,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 8. "PDD8,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 7. "PDD7,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 6. "PDD6,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 5. "PDD5,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 4. "PDD4,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 3. "PDD3,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 2. "PDD2,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 1. "PDD1,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 0. "PDD0,Port Data Direction" "0: Input,1: Output"
line.long 0x4 "PIDR,Port Input Disable"
bitfld.long 0x4 31. "PID31,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 30. "PID30,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 29. "PID29,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 28. "PID28,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 27. "PID27,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 26. "PID26,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 25. "PID25,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 24. "PID24,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 23. "PID23,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 22. "PID22,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 21. "PID21,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 20. "PID20,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 19. "PID19,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 18. "PID18,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 17. "PID17,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 16. "PID16,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 15. "PID15,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 14. "PID14,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 13. "PID13,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 12. "PID12,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 11. "PID11,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 10. "PID10,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 9. "PID9,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 8. "PID8,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 7. "PID7,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 6. "PID6,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 5. "PID5,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 4. "PID4,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 3. "PID3,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 2. "PID2,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 1. "PID1,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 0. "PID0,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x60)++0x0
line.byte 0x0 "PDR[$1],Pin Data"
bitfld.byte 0x0 0. "PD,Pin Data (I/O)" "0: Logic zero,1: Logic one"
repeat.end
repeat 32. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x80)++0x3
line.long 0x0 "ICR[$1],Interrupt Control index"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
repeat.end
group.long 0x100++0x7
line.long 0x0 "GICLR,Global Interrupt Control Low"
hexmask.long.word 0x0 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x0 15. "GIWE15,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 14. "GIWE14,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 13. "GIWE13,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 12. "GIWE12,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 11. "GIWE11,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 10. "GIWE10,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 9. "GIWE9,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 8. "GIWE8,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 7. "GIWE7,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 6. "GIWE6,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 5. "GIWE5,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 4. "GIWE4,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 3. "GIWE3,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 2. "GIWE2,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 1. "GIWE1,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 0. "GIWE0,Global Interrupt Write Enable" "0: Not updated,1: Updated"
line.long 0x4 "GICHR,Global Interrupt Control High"
hexmask.long.word 0x4 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x4 15. "GIWE31,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 14. "GIWE30,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 13. "GIWE29,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 12. "GIWE28,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 11. "GIWE27,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 10. "GIWE26,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 9. "GIWE25,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 8. "GIWE24,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 7. "GIWE23,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 6. "GIWE22,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 5. "GIWE21,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 4. "GIWE20,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 3. "GIWE19,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 2. "GIWE18,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 1. "GIWE17,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 0. "GIWE16,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
group.long 0x120++0x3
line.long 0x0 "ISFR0,Interrupt Status Flag"
eventfld.long 0x0 31. "ISF31,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 30. "ISF30,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 29. "ISF29,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 28. "ISF28,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 27. "ISF27,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 26. "ISF26,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 25. "ISF25,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 24. "ISF24,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 23. "ISF23,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 22. "ISF22,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 21. "ISF21,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 20. "ISF20,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 19. "ISF19,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 18. "ISF18,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 17. "ISF17,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 16. "ISF16,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 15. "ISF15,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 14. "ISF14,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 13. "ISF13,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 12. "ISF12,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 11. "ISF11,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 10. "ISF10,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 9. "ISF9,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 8. "ISF8,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 7. "ISF7,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 6. "ISF6,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 5. "ISF5,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 4. "ISF4,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 3. "ISF3,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 2. "ISF2,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 1. "ISF1,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 0. "ISF0,Interrupt Status Flag" "0: Not detected,1: Detected"
tree.end
tree "GPIO3"
base ad:0x40105000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "IRQNUM,Interrupt Number"
group.long 0x40++0xF
line.long 0x0 "PDOR,Port Data Output"
bitfld.long 0x0 31. "PDO31,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 30. "PDO30,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 29. "PDO29,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 28. "PDO28,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 27. "PDO27,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 26. "PDO26,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 25. "PDO25,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 24. "PDO24,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 23. "PDO23,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 22. "PDO22,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 21. "PDO21,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 20. "PDO20,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 19. "PDO19,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 18. "PDO18,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 17. "PDO17,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 16. "PDO16,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 15. "PDO15,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 14. "PDO14,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 13. "PDO13,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 12. "PDO12,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 11. "PDO11,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 10. "PDO10,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 9. "PDO9,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 8. "PDO8,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 7. "PDO7,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 6. "PDO6,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 5. "PDO5,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 4. "PDO4,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 3. "PDO3,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 2. "PDO2,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 1. "PDO1,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 0. "PDO0,Port Data Output" "0: Logic level 0,1: Logic level 1"
line.long 0x4 "PSOR,Port Set Output"
bitfld.long 0x4 31. "PTSO31,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 30. "PTSO30,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 29. "PTSO29,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 28. "PTSO28,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 27. "PTSO27,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 26. "PTSO26,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 25. "PTSO25,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 24. "PTSO24,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 23. "PTSO23,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 22. "PTSO22,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 21. "PTSO21,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 20. "PTSO20,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 19. "PTSO19,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 18. "PTSO18,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 17. "PTSO17,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 16. "PTSO16,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 15. "PTSO15,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 14. "PTSO14,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 13. "PTSO13,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 12. "PTSO12,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 11. "PTSO11,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 10. "PTSO10,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 9. "PTSO9,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 8. "PTSO8,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 7. "PTSO7,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 6. "PTSO6,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 5. "PTSO5,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 4. "PTSO4,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 3. "PTSO3,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 2. "PTSO2,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 1. "PTSO1,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 0. "PTSO0,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
line.long 0x8 "PCOR,Port Clear Output"
bitfld.long 0x8 31. "PTCO31,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 30. "PTCO30,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 29. "PTCO29,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 28. "PTCO28,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 27. "PTCO27,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 26. "PTCO26,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 25. "PTCO25,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 24. "PTCO24,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 23. "PTCO23,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 22. "PTCO22,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 21. "PTCO21,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 20. "PTCO20,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 19. "PTCO19,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 18. "PTCO18,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 17. "PTCO17,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 16. "PTCO16,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 15. "PTCO15,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 14. "PTCO14,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 13. "PTCO13,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 12. "PTCO12,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 11. "PTCO11,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 10. "PTCO10,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 9. "PTCO9,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 8. "PTCO8,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 7. "PTCO7,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 6. "PTCO6,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 5. "PTCO5,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 4. "PTCO4,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 3. "PTCO3,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 2. "PTCO2,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 1. "PTCO1,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 0. "PTCO0,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
line.long 0xC "PTOR,Port Toggle Output"
bitfld.long 0xC 31. "PTTO31,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 30. "PTTO30,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 29. "PTTO29,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 28. "PTTO28,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 27. "PTTO27,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 26. "PTTO26,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 25. "PTTO25,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 24. "PTTO24,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 23. "PTTO23,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 22. "PTTO22,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 21. "PTTO21,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 20. "PTTO20,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 19. "PTTO19,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 18. "PTTO18,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 17. "PTTO17,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 16. "PTTO16,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 15. "PTTO15,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 14. "PTTO14,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 13. "PTTO13,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 12. "PTTO12,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 11. "PTTO11,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 10. "PTTO10,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 9. "PTTO9,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 8. "PTTO8,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 7. "PTTO7,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 6. "PTTO6,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 5. "PTTO5,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 4. "PTTO4,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 3. "PTTO3,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 2. "PTTO2,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 1. "PTTO1,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 0. "PTTO0,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
rgroup.long 0x50++0x3
line.long 0x0 "PDIR,Port Data Input"
bitfld.long 0x0 31. "PDI31,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 30. "PDI30,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 29. "PDI29,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 28. "PDI28,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 27. "PDI27,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 26. "PDI26,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 25. "PDI25,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 24. "PDI24,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 23. "PDI23,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 22. "PDI22,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 21. "PDI21,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 20. "PDI20,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 19. "PDI19,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 18. "PDI18,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 17. "PDI17,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 16. "PDI16,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 15. "PDI15,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 14. "PDI14,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 13. "PDI13,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 12. "PDI12,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 11. "PDI11,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 10. "PDI10,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 9. "PDI9,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 8. "PDI8,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 7. "PDI7,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 6. "PDI6,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 5. "PDI5,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 4. "PDI4,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 3. "PDI3,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 2. "PDI2,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 1. "PDI1,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 0. "PDI0,Port Data Input" "0: Logic 0,1: Logic 1"
group.long 0x54++0x7
line.long 0x0 "PDDR,Port Data Direction"
bitfld.long 0x0 31. "PDD31,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 30. "PDD30,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 29. "PDD29,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 28. "PDD28,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 27. "PDD27,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 26. "PDD26,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 25. "PDD25,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 24. "PDD24,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 23. "PDD23,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 22. "PDD22,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 21. "PDD21,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 20. "PDD20,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 19. "PDD19,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 18. "PDD18,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 17. "PDD17,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 16. "PDD16,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 15. "PDD15,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 14. "PDD14,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 13. "PDD13,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 12. "PDD12,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 11. "PDD11,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 10. "PDD10,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 9. "PDD9,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 8. "PDD8,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 7. "PDD7,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 6. "PDD6,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 5. "PDD5,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 4. "PDD4,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 3. "PDD3,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 2. "PDD2,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 1. "PDD1,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 0. "PDD0,Port Data Direction" "0: Input,1: Output"
line.long 0x4 "PIDR,Port Input Disable"
bitfld.long 0x4 31. "PID31,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 30. "PID30,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 29. "PID29,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 28. "PID28,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 27. "PID27,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 26. "PID26,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 25. "PID25,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 24. "PID24,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 23. "PID23,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 22. "PID22,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 21. "PID21,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 20. "PID20,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 19. "PID19,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 18. "PID18,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 17. "PID17,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 16. "PID16,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 15. "PID15,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 14. "PID14,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 13. "PID13,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 12. "PID12,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 11. "PID11,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 10. "PID10,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 9. "PID9,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 8. "PID8,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 7. "PID7,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 6. "PID6,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 5. "PID5,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 4. "PID4,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 3. "PID3,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 2. "PID2,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 1. "PID1,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 0. "PID0,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x60)++0x0
line.byte 0x0 "PDR[$1],Pin Data"
bitfld.byte 0x0 0. "PD,Pin Data (I/O)" "0: Logic zero,1: Logic one"
repeat.end
repeat 32. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x80)++0x3
line.long 0x0 "ICR[$1],Interrupt Control index"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
repeat.end
group.long 0x100++0x7
line.long 0x0 "GICLR,Global Interrupt Control Low"
hexmask.long.word 0x0 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x0 15. "GIWE15,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 14. "GIWE14,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 13. "GIWE13,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 12. "GIWE12,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 11. "GIWE11,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 10. "GIWE10,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 9. "GIWE9,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 8. "GIWE8,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 7. "GIWE7,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 6. "GIWE6,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 5. "GIWE5,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 4. "GIWE4,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 3. "GIWE3,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 2. "GIWE2,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 1. "GIWE1,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 0. "GIWE0,Global Interrupt Write Enable" "0: Not updated,1: Updated"
line.long 0x4 "GICHR,Global Interrupt Control High"
hexmask.long.word 0x4 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x4 15. "GIWE31,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 14. "GIWE30,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 13. "GIWE29,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 12. "GIWE28,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 11. "GIWE27,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 10. "GIWE26,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 9. "GIWE25,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 8. "GIWE24,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 7. "GIWE23,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 6. "GIWE22,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 5. "GIWE21,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 4. "GIWE20,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 3. "GIWE19,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 2. "GIWE18,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 1. "GIWE17,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 0. "GIWE16,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
group.long 0x120++0x3
line.long 0x0 "ISFR0,Interrupt Status Flag"
eventfld.long 0x0 31. "ISF31,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 30. "ISF30,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 29. "ISF29,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 28. "ISF28,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 27. "ISF27,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 26. "ISF26,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 25. "ISF25,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 24. "ISF24,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 23. "ISF23,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 22. "ISF22,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 21. "ISF21,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 20. "ISF20,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 19. "ISF19,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 18. "ISF18,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 17. "ISF17,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 16. "ISF16,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 15. "ISF15,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 14. "ISF14,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 13. "ISF13,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 12. "ISF12,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 11. "ISF11,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 10. "ISF10,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 9. "ISF9,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 8. "ISF8,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 7. "ISF7,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 6. "ISF6,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 5. "ISF5,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 4. "ISF4,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 3. "ISF3,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 2. "ISF2,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 1. "ISF1,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 0. "ISF0,Interrupt Status Flag" "0: Not detected,1: Detected"
tree.end
endif
sif (cpuis("MC?A153*"))
tree "GPIO0"
base ad:0x40102000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "IRQNUM,Interrupt Number"
group.long 0x40++0xF
line.long 0x0 "PDOR,Port Data Output"
bitfld.long 0x0 31. "PDO31,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 30. "PDO30,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 29. "PDO29,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 28. "PDO28,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 27. "PDO27,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 26. "PDO26,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 25. "PDO25,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 24. "PDO24,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 23. "PDO23,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 22. "PDO22,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 21. "PDO21,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 20. "PDO20,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 19. "PDO19,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 18. "PDO18,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 17. "PDO17,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 16. "PDO16,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 15. "PDO15,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 14. "PDO14,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 13. "PDO13,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 12. "PDO12,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 11. "PDO11,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 10. "PDO10,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 9. "PDO9,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 8. "PDO8,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 7. "PDO7,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 6. "PDO6,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 5. "PDO5,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 4. "PDO4,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 3. "PDO3,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 2. "PDO2,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 1. "PDO1,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 0. "PDO0,Port Data Output" "0: Logic level 0,1: Logic level 1"
line.long 0x4 "PSOR,Port Set Output"
bitfld.long 0x4 31. "PTSO31,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 30. "PTSO30,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 29. "PTSO29,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 28. "PTSO28,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 27. "PTSO27,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 26. "PTSO26,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 25. "PTSO25,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 24. "PTSO24,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 23. "PTSO23,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 22. "PTSO22,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 21. "PTSO21,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 20. "PTSO20,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 19. "PTSO19,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 18. "PTSO18,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 17. "PTSO17,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 16. "PTSO16,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 15. "PTSO15,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 14. "PTSO14,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 13. "PTSO13,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 12. "PTSO12,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 11. "PTSO11,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 10. "PTSO10,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 9. "PTSO9,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 8. "PTSO8,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 7. "PTSO7,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 6. "PTSO6,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 5. "PTSO5,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 4. "PTSO4,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 3. "PTSO3,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 2. "PTSO2,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 1. "PTSO1,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 0. "PTSO0,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
line.long 0x8 "PCOR,Port Clear Output"
bitfld.long 0x8 31. "PTCO31,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 30. "PTCO30,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 29. "PTCO29,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 28. "PTCO28,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 27. "PTCO27,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 26. "PTCO26,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 25. "PTCO25,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 24. "PTCO24,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 23. "PTCO23,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 22. "PTCO22,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 21. "PTCO21,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 20. "PTCO20,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 19. "PTCO19,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 18. "PTCO18,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 17. "PTCO17,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 16. "PTCO16,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 15. "PTCO15,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 14. "PTCO14,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 13. "PTCO13,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 12. "PTCO12,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 11. "PTCO11,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 10. "PTCO10,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 9. "PTCO9,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 8. "PTCO8,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 7. "PTCO7,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 6. "PTCO6,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 5. "PTCO5,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 4. "PTCO4,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 3. "PTCO3,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 2. "PTCO2,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 1. "PTCO1,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 0. "PTCO0,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
line.long 0xC "PTOR,Port Toggle Output"
bitfld.long 0xC 31. "PTTO31,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 30. "PTTO30,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 29. "PTTO29,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 28. "PTTO28,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 27. "PTTO27,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 26. "PTTO26,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 25. "PTTO25,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 24. "PTTO24,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 23. "PTTO23,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 22. "PTTO22,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 21. "PTTO21,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 20. "PTTO20,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 19. "PTTO19,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 18. "PTTO18,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 17. "PTTO17,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 16. "PTTO16,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 15. "PTTO15,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 14. "PTTO14,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 13. "PTTO13,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 12. "PTTO12,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 11. "PTTO11,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 10. "PTTO10,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 9. "PTTO9,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 8. "PTTO8,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 7. "PTTO7,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 6. "PTTO6,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 5. "PTTO5,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 4. "PTTO4,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 3. "PTTO3,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 2. "PTTO2,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 1. "PTTO1,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 0. "PTTO0,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
rgroup.long 0x50++0x3
line.long 0x0 "PDIR,Port Data Input"
bitfld.long 0x0 31. "PDI31,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 30. "PDI30,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 29. "PDI29,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 28. "PDI28,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 27. "PDI27,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 26. "PDI26,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 25. "PDI25,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 24. "PDI24,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 23. "PDI23,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 22. "PDI22,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 21. "PDI21,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 20. "PDI20,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 19. "PDI19,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 18. "PDI18,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 17. "PDI17,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 16. "PDI16,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 15. "PDI15,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 14. "PDI14,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 13. "PDI13,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 12. "PDI12,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 11. "PDI11,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 10. "PDI10,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 9. "PDI9,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 8. "PDI8,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 7. "PDI7,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 6. "PDI6,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 5. "PDI5,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 4. "PDI4,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 3. "PDI3,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 2. "PDI2,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 1. "PDI1,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 0. "PDI0,Port Data Input" "0: Logic 0,1: Logic 1"
group.long 0x54++0x7
line.long 0x0 "PDDR,Port Data Direction"
bitfld.long 0x0 31. "PDD31,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 30. "PDD30,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 29. "PDD29,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 28. "PDD28,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 27. "PDD27,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 26. "PDD26,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 25. "PDD25,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 24. "PDD24,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 23. "PDD23,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 22. "PDD22,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 21. "PDD21,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 20. "PDD20,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 19. "PDD19,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 18. "PDD18,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 17. "PDD17,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 16. "PDD16,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 15. "PDD15,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 14. "PDD14,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 13. "PDD13,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 12. "PDD12,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 11. "PDD11,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 10. "PDD10,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 9. "PDD9,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 8. "PDD8,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 7. "PDD7,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 6. "PDD6,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 5. "PDD5,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 4. "PDD4,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 3. "PDD3,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 2. "PDD2,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 1. "PDD1,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 0. "PDD0,Port Data Direction" "0: Input,1: Output"
line.long 0x4 "PIDR,Port Input Disable"
bitfld.long 0x4 31. "PID31,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 30. "PID30,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 29. "PID29,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 28. "PID28,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 27. "PID27,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 26. "PID26,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 25. "PID25,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 24. "PID24,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 23. "PID23,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 22. "PID22,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 21. "PID21,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 20. "PID20,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 19. "PID19,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 18. "PID18,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 17. "PID17,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 16. "PID16,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 15. "PID15,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 14. "PID14,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 13. "PID13,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 12. "PID12,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 11. "PID11,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 10. "PID10,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 9. "PID9,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 8. "PID8,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 7. "PID7,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 6. "PID6,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 5. "PID5,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 4. "PID4,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 3. "PID3,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 2. "PID2,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 1. "PID1,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 0. "PID0,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x60)++0x0
line.byte 0x0 "PDR[$1],Pin Data"
bitfld.byte 0x0 0. "PD,Pin Data (I/O)" "0: Logic zero,1: Logic one"
repeat.end
repeat 32. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x80)++0x3
line.long 0x0 "ICR[$1],Interrupt Control index"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
repeat.end
group.long 0x100++0x7
line.long 0x0 "GICLR,Global Interrupt Control Low"
hexmask.long.word 0x0 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x0 15. "GIWE15,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 14. "GIWE14,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 13. "GIWE13,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 12. "GIWE12,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 11. "GIWE11,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 10. "GIWE10,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 9. "GIWE9,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 8. "GIWE8,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 7. "GIWE7,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 6. "GIWE6,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 5. "GIWE5,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 4. "GIWE4,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 3. "GIWE3,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 2. "GIWE2,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 1. "GIWE1,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 0. "GIWE0,Global Interrupt Write Enable" "0: Not updated,1: Updated"
line.long 0x4 "GICHR,Global Interrupt Control High"
hexmask.long.word 0x4 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x4 15. "GIWE31,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 14. "GIWE30,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 13. "GIWE29,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 12. "GIWE28,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 11. "GIWE27,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 10. "GIWE26,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 9. "GIWE25,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 8. "GIWE24,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 7. "GIWE23,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 6. "GIWE22,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 5. "GIWE21,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 4. "GIWE20,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 3. "GIWE19,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 2. "GIWE18,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 1. "GIWE17,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 0. "GIWE16,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
group.long 0x120++0x3
line.long 0x0 "ISFR0,Interrupt Status Flag"
eventfld.long 0x0 31. "ISF31,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 30. "ISF30,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 29. "ISF29,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 28. "ISF28,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 27. "ISF27,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 26. "ISF26,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 25. "ISF25,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 24. "ISF24,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 23. "ISF23,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 22. "ISF22,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 21. "ISF21,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 20. "ISF20,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 19. "ISF19,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 18. "ISF18,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 17. "ISF17,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 16. "ISF16,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 15. "ISF15,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 14. "ISF14,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 13. "ISF13,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 12. "ISF12,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 11. "ISF11,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 10. "ISF10,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 9. "ISF9,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 8. "ISF8,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 7. "ISF7,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 6. "ISF6,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 5. "ISF5,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 4. "ISF4,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 3. "ISF3,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 2. "ISF2,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 1. "ISF1,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 0. "ISF0,Interrupt Status Flag" "0: Not detected,1: Detected"
tree.end
tree "GPIO1"
base ad:0x40103000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "IRQNUM,Interrupt Number"
group.long 0x40++0xF
line.long 0x0 "PDOR,Port Data Output"
bitfld.long 0x0 31. "PDO31,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 30. "PDO30,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 29. "PDO29,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 28. "PDO28,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 27. "PDO27,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 26. "PDO26,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 25. "PDO25,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 24. "PDO24,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 23. "PDO23,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 22. "PDO22,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 21. "PDO21,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 20. "PDO20,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 19. "PDO19,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 18. "PDO18,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 17. "PDO17,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 16. "PDO16,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 15. "PDO15,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 14. "PDO14,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 13. "PDO13,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 12. "PDO12,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 11. "PDO11,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 10. "PDO10,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 9. "PDO9,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 8. "PDO8,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 7. "PDO7,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 6. "PDO6,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 5. "PDO5,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 4. "PDO4,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 3. "PDO3,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 2. "PDO2,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 1. "PDO1,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 0. "PDO0,Port Data Output" "0: Logic level 0,1: Logic level 1"
line.long 0x4 "PSOR,Port Set Output"
bitfld.long 0x4 31. "PTSO31,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 30. "PTSO30,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 29. "PTSO29,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 28. "PTSO28,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 27. "PTSO27,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 26. "PTSO26,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 25. "PTSO25,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 24. "PTSO24,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 23. "PTSO23,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 22. "PTSO22,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 21. "PTSO21,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 20. "PTSO20,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 19. "PTSO19,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 18. "PTSO18,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 17. "PTSO17,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 16. "PTSO16,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 15. "PTSO15,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 14. "PTSO14,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 13. "PTSO13,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 12. "PTSO12,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 11. "PTSO11,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 10. "PTSO10,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 9. "PTSO9,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 8. "PTSO8,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 7. "PTSO7,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 6. "PTSO6,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 5. "PTSO5,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 4. "PTSO4,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 3. "PTSO3,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 2. "PTSO2,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 1. "PTSO1,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 0. "PTSO0,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
line.long 0x8 "PCOR,Port Clear Output"
bitfld.long 0x8 31. "PTCO31,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 30. "PTCO30,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 29. "PTCO29,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 28. "PTCO28,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 27. "PTCO27,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 26. "PTCO26,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 25. "PTCO25,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 24. "PTCO24,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 23. "PTCO23,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 22. "PTCO22,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 21. "PTCO21,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 20. "PTCO20,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 19. "PTCO19,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 18. "PTCO18,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 17. "PTCO17,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 16. "PTCO16,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 15. "PTCO15,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 14. "PTCO14,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 13. "PTCO13,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 12. "PTCO12,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 11. "PTCO11,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 10. "PTCO10,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 9. "PTCO9,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 8. "PTCO8,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 7. "PTCO7,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 6. "PTCO6,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 5. "PTCO5,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 4. "PTCO4,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 3. "PTCO3,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 2. "PTCO2,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 1. "PTCO1,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 0. "PTCO0,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
line.long 0xC "PTOR,Port Toggle Output"
bitfld.long 0xC 31. "PTTO31,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 30. "PTTO30,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 29. "PTTO29,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 28. "PTTO28,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 27. "PTTO27,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 26. "PTTO26,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 25. "PTTO25,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 24. "PTTO24,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 23. "PTTO23,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 22. "PTTO22,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 21. "PTTO21,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 20. "PTTO20,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 19. "PTTO19,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 18. "PTTO18,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 17. "PTTO17,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 16. "PTTO16,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 15. "PTTO15,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 14. "PTTO14,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 13. "PTTO13,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 12. "PTTO12,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 11. "PTTO11,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 10. "PTTO10,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 9. "PTTO9,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 8. "PTTO8,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 7. "PTTO7,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 6. "PTTO6,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 5. "PTTO5,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 4. "PTTO4,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 3. "PTTO3,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 2. "PTTO2,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 1. "PTTO1,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 0. "PTTO0,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
rgroup.long 0x50++0x3
line.long 0x0 "PDIR,Port Data Input"
bitfld.long 0x0 31. "PDI31,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 30. "PDI30,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 29. "PDI29,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 28. "PDI28,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 27. "PDI27,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 26. "PDI26,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 25. "PDI25,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 24. "PDI24,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 23. "PDI23,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 22. "PDI22,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 21. "PDI21,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 20. "PDI20,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 19. "PDI19,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 18. "PDI18,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 17. "PDI17,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 16. "PDI16,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 15. "PDI15,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 14. "PDI14,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 13. "PDI13,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 12. "PDI12,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 11. "PDI11,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 10. "PDI10,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 9. "PDI9,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 8. "PDI8,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 7. "PDI7,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 6. "PDI6,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 5. "PDI5,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 4. "PDI4,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 3. "PDI3,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 2. "PDI2,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 1. "PDI1,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 0. "PDI0,Port Data Input" "0: Logic 0,1: Logic 1"
group.long 0x54++0x7
line.long 0x0 "PDDR,Port Data Direction"
bitfld.long 0x0 31. "PDD31,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 30. "PDD30,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 29. "PDD29,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 28. "PDD28,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 27. "PDD27,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 26. "PDD26,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 25. "PDD25,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 24. "PDD24,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 23. "PDD23,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 22. "PDD22,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 21. "PDD21,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 20. "PDD20,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 19. "PDD19,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 18. "PDD18,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 17. "PDD17,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 16. "PDD16,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 15. "PDD15,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 14. "PDD14,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 13. "PDD13,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 12. "PDD12,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 11. "PDD11,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 10. "PDD10,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 9. "PDD9,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 8. "PDD8,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 7. "PDD7,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 6. "PDD6,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 5. "PDD5,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 4. "PDD4,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 3. "PDD3,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 2. "PDD2,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 1. "PDD1,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 0. "PDD0,Port Data Direction" "0: Input,1: Output"
line.long 0x4 "PIDR,Port Input Disable"
bitfld.long 0x4 31. "PID31,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 30. "PID30,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 29. "PID29,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 28. "PID28,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 27. "PID27,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 26. "PID26,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 25. "PID25,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 24. "PID24,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 23. "PID23,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 22. "PID22,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 21. "PID21,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 20. "PID20,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 19. "PID19,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 18. "PID18,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 17. "PID17,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 16. "PID16,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 15. "PID15,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 14. "PID14,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 13. "PID13,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 12. "PID12,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 11. "PID11,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 10. "PID10,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 9. "PID9,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 8. "PID8,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 7. "PID7,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 6. "PID6,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 5. "PID5,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 4. "PID4,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 3. "PID3,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 2. "PID2,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 1. "PID1,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 0. "PID0,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x60)++0x0
line.byte 0x0 "PDR[$1],Pin Data"
bitfld.byte 0x0 0. "PD,Pin Data (I/O)" "0: Logic zero,1: Logic one"
repeat.end
repeat 32. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x80)++0x3
line.long 0x0 "ICR[$1],Interrupt Control index"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
repeat.end
group.long 0x100++0x7
line.long 0x0 "GICLR,Global Interrupt Control Low"
hexmask.long.word 0x0 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x0 15. "GIWE15,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 14. "GIWE14,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 13. "GIWE13,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 12. "GIWE12,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 11. "GIWE11,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 10. "GIWE10,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 9. "GIWE9,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 8. "GIWE8,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 7. "GIWE7,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 6. "GIWE6,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 5. "GIWE5,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 4. "GIWE4,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 3. "GIWE3,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 2. "GIWE2,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 1. "GIWE1,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 0. "GIWE0,Global Interrupt Write Enable" "0: Not updated,1: Updated"
line.long 0x4 "GICHR,Global Interrupt Control High"
hexmask.long.word 0x4 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x4 15. "GIWE31,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 14. "GIWE30,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 13. "GIWE29,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 12. "GIWE28,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 11. "GIWE27,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 10. "GIWE26,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 9. "GIWE25,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 8. "GIWE24,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 7. "GIWE23,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 6. "GIWE22,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 5. "GIWE21,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 4. "GIWE20,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 3. "GIWE19,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 2. "GIWE18,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 1. "GIWE17,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 0. "GIWE16,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
group.long 0x120++0x3
line.long 0x0 "ISFR0,Interrupt Status Flag"
eventfld.long 0x0 31. "ISF31,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 30. "ISF30,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 29. "ISF29,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 28. "ISF28,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 27. "ISF27,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 26. "ISF26,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 25. "ISF25,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 24. "ISF24,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 23. "ISF23,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 22. "ISF22,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 21. "ISF21,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 20. "ISF20,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 19. "ISF19,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 18. "ISF18,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 17. "ISF17,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 16. "ISF16,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 15. "ISF15,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 14. "ISF14,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 13. "ISF13,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 12. "ISF12,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 11. "ISF11,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 10. "ISF10,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 9. "ISF9,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 8. "ISF8,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 7. "ISF7,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 6. "ISF6,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 5. "ISF5,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 4. "ISF4,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 3. "ISF3,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 2. "ISF2,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 1. "ISF1,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 0. "ISF0,Interrupt Status Flag" "0: Not detected,1: Detected"
tree.end
tree "GPIO2"
base ad:0x40104000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "IRQNUM,Interrupt Number"
group.long 0x40++0xF
line.long 0x0 "PDOR,Port Data Output"
bitfld.long 0x0 31. "PDO31,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 30. "PDO30,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 29. "PDO29,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 28. "PDO28,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 27. "PDO27,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 26. "PDO26,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 25. "PDO25,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 24. "PDO24,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 23. "PDO23,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 22. "PDO22,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 21. "PDO21,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 20. "PDO20,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 19. "PDO19,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 18. "PDO18,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 17. "PDO17,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 16. "PDO16,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 15. "PDO15,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 14. "PDO14,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 13. "PDO13,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 12. "PDO12,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 11. "PDO11,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 10. "PDO10,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 9. "PDO9,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 8. "PDO8,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 7. "PDO7,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 6. "PDO6,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 5. "PDO5,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 4. "PDO4,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 3. "PDO3,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 2. "PDO2,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 1. "PDO1,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 0. "PDO0,Port Data Output" "0: Logic level 0,1: Logic level 1"
line.long 0x4 "PSOR,Port Set Output"
bitfld.long 0x4 31. "PTSO31,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 30. "PTSO30,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 29. "PTSO29,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 28. "PTSO28,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 27. "PTSO27,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 26. "PTSO26,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 25. "PTSO25,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 24. "PTSO24,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 23. "PTSO23,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 22. "PTSO22,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 21. "PTSO21,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 20. "PTSO20,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 19. "PTSO19,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 18. "PTSO18,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 17. "PTSO17,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 16. "PTSO16,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 15. "PTSO15,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 14. "PTSO14,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 13. "PTSO13,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 12. "PTSO12,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 11. "PTSO11,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 10. "PTSO10,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 9. "PTSO9,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 8. "PTSO8,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 7. "PTSO7,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 6. "PTSO6,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 5. "PTSO5,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 4. "PTSO4,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 3. "PTSO3,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 2. "PTSO2,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 1. "PTSO1,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 0. "PTSO0,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
line.long 0x8 "PCOR,Port Clear Output"
bitfld.long 0x8 31. "PTCO31,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 30. "PTCO30,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 29. "PTCO29,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 28. "PTCO28,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 27. "PTCO27,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 26. "PTCO26,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 25. "PTCO25,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 24. "PTCO24,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 23. "PTCO23,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 22. "PTCO22,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 21. "PTCO21,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 20. "PTCO20,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 19. "PTCO19,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 18. "PTCO18,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 17. "PTCO17,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 16. "PTCO16,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 15. "PTCO15,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 14. "PTCO14,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 13. "PTCO13,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 12. "PTCO12,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 11. "PTCO11,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 10. "PTCO10,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 9. "PTCO9,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 8. "PTCO8,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 7. "PTCO7,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 6. "PTCO6,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 5. "PTCO5,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 4. "PTCO4,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 3. "PTCO3,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 2. "PTCO2,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 1. "PTCO1,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 0. "PTCO0,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
line.long 0xC "PTOR,Port Toggle Output"
bitfld.long 0xC 31. "PTTO31,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 30. "PTTO30,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 29. "PTTO29,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 28. "PTTO28,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 27. "PTTO27,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 26. "PTTO26,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 25. "PTTO25,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 24. "PTTO24,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 23. "PTTO23,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 22. "PTTO22,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 21. "PTTO21,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 20. "PTTO20,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 19. "PTTO19,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 18. "PTTO18,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 17. "PTTO17,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 16. "PTTO16,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 15. "PTTO15,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 14. "PTTO14,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 13. "PTTO13,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 12. "PTTO12,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 11. "PTTO11,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 10. "PTTO10,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 9. "PTTO9,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 8. "PTTO8,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 7. "PTTO7,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 6. "PTTO6,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 5. "PTTO5,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 4. "PTTO4,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 3. "PTTO3,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 2. "PTTO2,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 1. "PTTO1,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 0. "PTTO0,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
rgroup.long 0x50++0x3
line.long 0x0 "PDIR,Port Data Input"
bitfld.long 0x0 31. "PDI31,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 30. "PDI30,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 29. "PDI29,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 28. "PDI28,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 27. "PDI27,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 26. "PDI26,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 25. "PDI25,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 24. "PDI24,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 23. "PDI23,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 22. "PDI22,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 21. "PDI21,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 20. "PDI20,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 19. "PDI19,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 18. "PDI18,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 17. "PDI17,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 16. "PDI16,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 15. "PDI15,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 14. "PDI14,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 13. "PDI13,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 12. "PDI12,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 11. "PDI11,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 10. "PDI10,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 9. "PDI9,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 8. "PDI8,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 7. "PDI7,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 6. "PDI6,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 5. "PDI5,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 4. "PDI4,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 3. "PDI3,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 2. "PDI2,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 1. "PDI1,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 0. "PDI0,Port Data Input" "0: Logic 0,1: Logic 1"
group.long 0x54++0x7
line.long 0x0 "PDDR,Port Data Direction"
bitfld.long 0x0 31. "PDD31,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 30. "PDD30,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 29. "PDD29,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 28. "PDD28,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 27. "PDD27,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 26. "PDD26,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 25. "PDD25,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 24. "PDD24,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 23. "PDD23,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 22. "PDD22,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 21. "PDD21,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 20. "PDD20,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 19. "PDD19,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 18. "PDD18,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 17. "PDD17,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 16. "PDD16,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 15. "PDD15,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 14. "PDD14,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 13. "PDD13,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 12. "PDD12,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 11. "PDD11,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 10. "PDD10,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 9. "PDD9,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 8. "PDD8,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 7. "PDD7,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 6. "PDD6,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 5. "PDD5,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 4. "PDD4,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 3. "PDD3,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 2. "PDD2,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 1. "PDD1,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 0. "PDD0,Port Data Direction" "0: Input,1: Output"
line.long 0x4 "PIDR,Port Input Disable"
bitfld.long 0x4 31. "PID31,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 30. "PID30,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 29. "PID29,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 28. "PID28,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 27. "PID27,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 26. "PID26,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 25. "PID25,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 24. "PID24,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 23. "PID23,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 22. "PID22,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 21. "PID21,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 20. "PID20,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 19. "PID19,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 18. "PID18,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 17. "PID17,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 16. "PID16,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 15. "PID15,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 14. "PID14,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 13. "PID13,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 12. "PID12,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 11. "PID11,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 10. "PID10,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 9. "PID9,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 8. "PID8,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 7. "PID7,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 6. "PID6,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 5. "PID5,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 4. "PID4,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 3. "PID3,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 2. "PID2,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 1. "PID1,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 0. "PID0,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x60)++0x0
line.byte 0x0 "PDR[$1],Pin Data"
bitfld.byte 0x0 0. "PD,Pin Data (I/O)" "0: Logic zero,1: Logic one"
repeat.end
repeat 32. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x80)++0x3
line.long 0x0 "ICR[$1],Interrupt Control index"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
repeat.end
group.long 0x100++0x7
line.long 0x0 "GICLR,Global Interrupt Control Low"
hexmask.long.word 0x0 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x0 15. "GIWE15,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 14. "GIWE14,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 13. "GIWE13,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 12. "GIWE12,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 11. "GIWE11,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 10. "GIWE10,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 9. "GIWE9,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 8. "GIWE8,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 7. "GIWE7,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 6. "GIWE6,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 5. "GIWE5,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 4. "GIWE4,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 3. "GIWE3,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 2. "GIWE2,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 1. "GIWE1,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 0. "GIWE0,Global Interrupt Write Enable" "0: Not updated,1: Updated"
line.long 0x4 "GICHR,Global Interrupt Control High"
hexmask.long.word 0x4 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x4 15. "GIWE31,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 14. "GIWE30,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 13. "GIWE29,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 12. "GIWE28,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 11. "GIWE27,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 10. "GIWE26,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 9. "GIWE25,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 8. "GIWE24,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 7. "GIWE23,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 6. "GIWE22,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 5. "GIWE21,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 4. "GIWE20,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 3. "GIWE19,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 2. "GIWE18,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 1. "GIWE17,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 0. "GIWE16,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
group.long 0x120++0x3
line.long 0x0 "ISFR0,Interrupt Status Flag"
eventfld.long 0x0 31. "ISF31,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 30. "ISF30,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 29. "ISF29,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 28. "ISF28,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 27. "ISF27,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 26. "ISF26,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 25. "ISF25,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 24. "ISF24,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 23. "ISF23,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 22. "ISF22,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 21. "ISF21,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 20. "ISF20,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 19. "ISF19,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 18. "ISF18,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 17. "ISF17,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 16. "ISF16,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 15. "ISF15,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 14. "ISF14,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 13. "ISF13,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 12. "ISF12,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 11. "ISF11,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 10. "ISF10,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 9. "ISF9,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 8. "ISF8,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 7. "ISF7,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 6. "ISF6,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 5. "ISF5,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 4. "ISF4,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 3. "ISF3,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 2. "ISF2,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 1. "ISF1,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 0. "ISF0,Interrupt Status Flag" "0: Not detected,1: Detected"
tree.end
tree "GPIO3"
base ad:0x40105000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "IRQNUM,Interrupt Number"
group.long 0x40++0xF
line.long 0x0 "PDOR,Port Data Output"
bitfld.long 0x0 31. "PDO31,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 30. "PDO30,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 29. "PDO29,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 28. "PDO28,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 27. "PDO27,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 26. "PDO26,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 25. "PDO25,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 24. "PDO24,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 23. "PDO23,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 22. "PDO22,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 21. "PDO21,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 20. "PDO20,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 19. "PDO19,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 18. "PDO18,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 17. "PDO17,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 16. "PDO16,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 15. "PDO15,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 14. "PDO14,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 13. "PDO13,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 12. "PDO12,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 11. "PDO11,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 10. "PDO10,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 9. "PDO9,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 8. "PDO8,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 7. "PDO7,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 6. "PDO6,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 5. "PDO5,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 4. "PDO4,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 3. "PDO3,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 2. "PDO2,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 1. "PDO1,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 0. "PDO0,Port Data Output" "0: Logic level 0,1: Logic level 1"
line.long 0x4 "PSOR,Port Set Output"
bitfld.long 0x4 31. "PTSO31,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 30. "PTSO30,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 29. "PTSO29,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 28. "PTSO28,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 27. "PTSO27,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 26. "PTSO26,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 25. "PTSO25,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 24. "PTSO24,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 23. "PTSO23,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 22. "PTSO22,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 21. "PTSO21,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 20. "PTSO20,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 19. "PTSO19,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 18. "PTSO18,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 17. "PTSO17,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 16. "PTSO16,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 15. "PTSO15,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 14. "PTSO14,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 13. "PTSO13,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 12. "PTSO12,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 11. "PTSO11,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 10. "PTSO10,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 9. "PTSO9,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 8. "PTSO8,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 7. "PTSO7,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 6. "PTSO6,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 5. "PTSO5,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 4. "PTSO4,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 3. "PTSO3,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 2. "PTSO2,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 1. "PTSO1,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 0. "PTSO0,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
line.long 0x8 "PCOR,Port Clear Output"
bitfld.long 0x8 31. "PTCO31,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 30. "PTCO30,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 29. "PTCO29,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 28. "PTCO28,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 27. "PTCO27,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 26. "PTCO26,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 25. "PTCO25,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 24. "PTCO24,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 23. "PTCO23,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 22. "PTCO22,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 21. "PTCO21,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 20. "PTCO20,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 19. "PTCO19,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 18. "PTCO18,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 17. "PTCO17,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 16. "PTCO16,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 15. "PTCO15,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 14. "PTCO14,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 13. "PTCO13,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 12. "PTCO12,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 11. "PTCO11,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 10. "PTCO10,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 9. "PTCO9,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 8. "PTCO8,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 7. "PTCO7,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 6. "PTCO6,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 5. "PTCO5,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 4. "PTCO4,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 3. "PTCO3,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 2. "PTCO2,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 1. "PTCO1,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 0. "PTCO0,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
line.long 0xC "PTOR,Port Toggle Output"
bitfld.long 0xC 31. "PTTO31,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 30. "PTTO30,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 29. "PTTO29,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 28. "PTTO28,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 27. "PTTO27,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 26. "PTTO26,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 25. "PTTO25,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 24. "PTTO24,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 23. "PTTO23,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 22. "PTTO22,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 21. "PTTO21,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 20. "PTTO20,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 19. "PTTO19,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 18. "PTTO18,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 17. "PTTO17,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 16. "PTTO16,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 15. "PTTO15,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 14. "PTTO14,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 13. "PTTO13,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 12. "PTTO12,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 11. "PTTO11,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 10. "PTTO10,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 9. "PTTO9,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 8. "PTTO8,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 7. "PTTO7,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 6. "PTTO6,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 5. "PTTO5,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 4. "PTTO4,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 3. "PTTO3,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 2. "PTTO2,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 1. "PTTO1,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 0. "PTTO0,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
rgroup.long 0x50++0x3
line.long 0x0 "PDIR,Port Data Input"
bitfld.long 0x0 31. "PDI31,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 30. "PDI30,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 29. "PDI29,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 28. "PDI28,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 27. "PDI27,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 26. "PDI26,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 25. "PDI25,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 24. "PDI24,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 23. "PDI23,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 22. "PDI22,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 21. "PDI21,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 20. "PDI20,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 19. "PDI19,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 18. "PDI18,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 17. "PDI17,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 16. "PDI16,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 15. "PDI15,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 14. "PDI14,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 13. "PDI13,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 12. "PDI12,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 11. "PDI11,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 10. "PDI10,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 9. "PDI9,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 8. "PDI8,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 7. "PDI7,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 6. "PDI6,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 5. "PDI5,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 4. "PDI4,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 3. "PDI3,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 2. "PDI2,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 1. "PDI1,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 0. "PDI0,Port Data Input" "0: Logic 0,1: Logic 1"
group.long 0x54++0x7
line.long 0x0 "PDDR,Port Data Direction"
bitfld.long 0x0 31. "PDD31,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 30. "PDD30,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 29. "PDD29,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 28. "PDD28,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 27. "PDD27,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 26. "PDD26,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 25. "PDD25,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 24. "PDD24,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 23. "PDD23,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 22. "PDD22,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 21. "PDD21,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 20. "PDD20,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 19. "PDD19,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 18. "PDD18,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 17. "PDD17,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 16. "PDD16,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 15. "PDD15,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 14. "PDD14,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 13. "PDD13,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 12. "PDD12,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 11. "PDD11,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 10. "PDD10,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 9. "PDD9,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 8. "PDD8,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 7. "PDD7,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 6. "PDD6,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 5. "PDD5,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 4. "PDD4,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 3. "PDD3,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 2. "PDD2,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 1. "PDD1,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 0. "PDD0,Port Data Direction" "0: Input,1: Output"
line.long 0x4 "PIDR,Port Input Disable"
bitfld.long 0x4 31. "PID31,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 30. "PID30,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 29. "PID29,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 28. "PID28,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 27. "PID27,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 26. "PID26,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 25. "PID25,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 24. "PID24,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 23. "PID23,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 22. "PID22,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 21. "PID21,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 20. "PID20,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 19. "PID19,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 18. "PID18,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 17. "PID17,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 16. "PID16,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 15. "PID15,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 14. "PID14,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 13. "PID13,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 12. "PID12,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 11. "PID11,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 10. "PID10,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 9. "PID9,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 8. "PID8,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 7. "PID7,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 6. "PID6,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 5. "PID5,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 4. "PID4,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 3. "PID3,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 2. "PID2,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 1. "PID1,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 0. "PID0,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x60)++0x0
line.byte 0x0 "PDR[$1],Pin Data"
bitfld.byte 0x0 0. "PD,Pin Data (I/O)" "0: Logic zero,1: Logic one"
repeat.end
repeat 32. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x80)++0x3
line.long 0x0 "ICR[$1],Interrupt Control index"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
repeat.end
group.long 0x100++0x7
line.long 0x0 "GICLR,Global Interrupt Control Low"
hexmask.long.word 0x0 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x0 15. "GIWE15,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 14. "GIWE14,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 13. "GIWE13,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 12. "GIWE12,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 11. "GIWE11,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 10. "GIWE10,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 9. "GIWE9,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 8. "GIWE8,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 7. "GIWE7,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 6. "GIWE6,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 5. "GIWE5,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 4. "GIWE4,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 3. "GIWE3,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 2. "GIWE2,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 1. "GIWE1,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 0. "GIWE0,Global Interrupt Write Enable" "0: Not updated,1: Updated"
line.long 0x4 "GICHR,Global Interrupt Control High"
hexmask.long.word 0x4 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x4 15. "GIWE31,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 14. "GIWE30,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 13. "GIWE29,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 12. "GIWE28,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 11. "GIWE27,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 10. "GIWE26,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 9. "GIWE25,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 8. "GIWE24,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 7. "GIWE23,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 6. "GIWE22,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 5. "GIWE21,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 4. "GIWE20,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 3. "GIWE19,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 2. "GIWE18,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 1. "GIWE17,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 0. "GIWE16,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
group.long 0x120++0x3
line.long 0x0 "ISFR0,Interrupt Status Flag"
eventfld.long 0x0 31. "ISF31,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 30. "ISF30,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 29. "ISF29,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 28. "ISF28,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 27. "ISF27,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 26. "ISF26,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 25. "ISF25,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 24. "ISF24,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 23. "ISF23,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 22. "ISF22,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 21. "ISF21,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 20. "ISF20,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 19. "ISF19,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 18. "ISF18,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 17. "ISF17,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 16. "ISF16,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 15. "ISF15,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 14. "ISF14,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 13. "ISF13,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 12. "ISF12,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 11. "ISF11,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 10. "ISF10,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 9. "ISF9,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 8. "ISF8,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 7. "ISF7,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 6. "ISF6,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 5. "ISF5,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 4. "ISF4,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 3. "ISF3,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 2. "ISF2,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 1. "ISF1,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 0. "ISF0,Interrupt Status Flag" "0: Not detected,1: Detected"
tree.end
endif
sif (cpuis("MC?A154*"))
tree "GPIO0"
base ad:0x40102000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "IRQNUM,Interrupt Number"
group.long 0x40++0xF
line.long 0x0 "PDOR,Port Data Output"
bitfld.long 0x0 31. "PDO31,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 30. "PDO30,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 29. "PDO29,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 28. "PDO28,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 27. "PDO27,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 26. "PDO26,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 25. "PDO25,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 24. "PDO24,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 23. "PDO23,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 22. "PDO22,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 21. "PDO21,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 20. "PDO20,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 19. "PDO19,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 18. "PDO18,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 17. "PDO17,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 16. "PDO16,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 15. "PDO15,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 14. "PDO14,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 13. "PDO13,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 12. "PDO12,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 11. "PDO11,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 10. "PDO10,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 9. "PDO9,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 8. "PDO8,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 7. "PDO7,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 6. "PDO6,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 5. "PDO5,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 4. "PDO4,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 3. "PDO3,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 2. "PDO2,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 1. "PDO1,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 0. "PDO0,Port Data Output" "0: Logic level 0,1: Logic level 1"
line.long 0x4 "PSOR,Port Set Output"
bitfld.long 0x4 31. "PTSO31,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 30. "PTSO30,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 29. "PTSO29,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 28. "PTSO28,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 27. "PTSO27,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 26. "PTSO26,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 25. "PTSO25,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 24. "PTSO24,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 23. "PTSO23,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 22. "PTSO22,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 21. "PTSO21,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 20. "PTSO20,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 19. "PTSO19,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 18. "PTSO18,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 17. "PTSO17,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 16. "PTSO16,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 15. "PTSO15,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 14. "PTSO14,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 13. "PTSO13,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 12. "PTSO12,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 11. "PTSO11,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 10. "PTSO10,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 9. "PTSO9,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 8. "PTSO8,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 7. "PTSO7,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 6. "PTSO6,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 5. "PTSO5,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 4. "PTSO4,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 3. "PTSO3,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 2. "PTSO2,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 1. "PTSO1,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 0. "PTSO0,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
line.long 0x8 "PCOR,Port Clear Output"
bitfld.long 0x8 31. "PTCO31,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 30. "PTCO30,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 29. "PTCO29,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 28. "PTCO28,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 27. "PTCO27,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 26. "PTCO26,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 25. "PTCO25,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 24. "PTCO24,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 23. "PTCO23,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 22. "PTCO22,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 21. "PTCO21,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 20. "PTCO20,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 19. "PTCO19,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 18. "PTCO18,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 17. "PTCO17,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 16. "PTCO16,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 15. "PTCO15,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 14. "PTCO14,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 13. "PTCO13,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 12. "PTCO12,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 11. "PTCO11,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 10. "PTCO10,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 9. "PTCO9,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 8. "PTCO8,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 7. "PTCO7,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 6. "PTCO6,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 5. "PTCO5,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 4. "PTCO4,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 3. "PTCO3,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 2. "PTCO2,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 1. "PTCO1,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 0. "PTCO0,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
line.long 0xC "PTOR,Port Toggle Output"
bitfld.long 0xC 31. "PTTO31,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 30. "PTTO30,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 29. "PTTO29,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 28. "PTTO28,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 27. "PTTO27,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 26. "PTTO26,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 25. "PTTO25,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 24. "PTTO24,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 23. "PTTO23,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 22. "PTTO22,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 21. "PTTO21,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 20. "PTTO20,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 19. "PTTO19,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 18. "PTTO18,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 17. "PTTO17,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 16. "PTTO16,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 15. "PTTO15,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 14. "PTTO14,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 13. "PTTO13,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 12. "PTTO12,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 11. "PTTO11,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 10. "PTTO10,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 9. "PTTO9,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 8. "PTTO8,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 7. "PTTO7,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 6. "PTTO6,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 5. "PTTO5,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 4. "PTTO4,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 3. "PTTO3,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 2. "PTTO2,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 1. "PTTO1,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 0. "PTTO0,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
rgroup.long 0x50++0x3
line.long 0x0 "PDIR,Port Data Input"
bitfld.long 0x0 31. "PDI31,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 30. "PDI30,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 29. "PDI29,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 28. "PDI28,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 27. "PDI27,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 26. "PDI26,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 25. "PDI25,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 24. "PDI24,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 23. "PDI23,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 22. "PDI22,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 21. "PDI21,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 20. "PDI20,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 19. "PDI19,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 18. "PDI18,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 17. "PDI17,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 16. "PDI16,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 15. "PDI15,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 14. "PDI14,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 13. "PDI13,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 12. "PDI12,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 11. "PDI11,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 10. "PDI10,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 9. "PDI9,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 8. "PDI8,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 7. "PDI7,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 6. "PDI6,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 5. "PDI5,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 4. "PDI4,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 3. "PDI3,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 2. "PDI2,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 1. "PDI1,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 0. "PDI0,Port Data Input" "0: Logic 0,1: Logic 1"
group.long 0x54++0x7
line.long 0x0 "PDDR,Port Data Direction"
bitfld.long 0x0 31. "PDD31,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 30. "PDD30,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 29. "PDD29,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 28. "PDD28,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 27. "PDD27,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 26. "PDD26,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 25. "PDD25,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 24. "PDD24,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 23. "PDD23,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 22. "PDD22,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 21. "PDD21,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 20. "PDD20,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 19. "PDD19,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 18. "PDD18,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 17. "PDD17,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 16. "PDD16,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 15. "PDD15,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 14. "PDD14,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 13. "PDD13,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 12. "PDD12,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 11. "PDD11,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 10. "PDD10,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 9. "PDD9,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 8. "PDD8,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 7. "PDD7,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 6. "PDD6,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 5. "PDD5,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 4. "PDD4,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 3. "PDD3,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 2. "PDD2,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 1. "PDD1,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 0. "PDD0,Port Data Direction" "0: Input,1: Output"
line.long 0x4 "PIDR,Port Input Disable"
bitfld.long 0x4 31. "PID31,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 30. "PID30,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 29. "PID29,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 28. "PID28,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 27. "PID27,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 26. "PID26,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 25. "PID25,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 24. "PID24,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 23. "PID23,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 22. "PID22,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 21. "PID21,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 20. "PID20,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 19. "PID19,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 18. "PID18,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 17. "PID17,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 16. "PID16,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 15. "PID15,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 14. "PID14,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 13. "PID13,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 12. "PID12,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 11. "PID11,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 10. "PID10,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 9. "PID9,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 8. "PID8,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 7. "PID7,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 6. "PID6,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 5. "PID5,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 4. "PID4,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 3. "PID3,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 2. "PID2,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 1. "PID1,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 0. "PID0,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x60)++0x0
line.byte 0x0 "PDR[$1],Pin Data"
bitfld.byte 0x0 0. "PD,Pin Data (I/O)" "0: Logic zero,1: Logic one"
repeat.end
group.long 0x80++0x87
line.long 0x0 "ICR0,Interrupt Control 0"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4 "ICR1,Interrupt Control 1"
eventfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x8 "ICR2,Interrupt Control 2"
eventfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0xC "ICR3,Interrupt Control 3"
eventfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x10 "ICR4,Interrupt Control 4"
eventfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x14 "ICR5,Interrupt Control 5"
eventfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x18 "ICR6,Interrupt Control 6"
eventfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x1C "ICR7,Interrupt Control 7"
eventfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x20 "ICR8,Interrupt Control 8"
eventfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x24 "ICR9,Interrupt Control 9"
eventfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x28 "ICR10,Interrupt Control 10"
eventfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x2C "ICR11,Interrupt Control 11"
eventfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x30 "ICR12,Interrupt Control 12"
eventfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x34 "ICR13,Interrupt Control 13"
eventfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x38 "ICR14,Interrupt Control 14"
eventfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x3C "ICR15,Interrupt Control 15"
eventfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x40 "ICR16,Interrupt Control 16"
eventfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x44 "ICR17,Interrupt Control 17"
eventfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x48 "ICR18,Interrupt Control 18"
eventfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4C "ICR19,Interrupt Control 19"
eventfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x50 "ICR20,Interrupt Control 20"
eventfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x54 "ICR21,Interrupt Control 21"
eventfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x58 "ICR22,Interrupt Control 22"
eventfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x5C "ICR23,Interrupt Control 23"
eventfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x60 "ICR24,Interrupt Control 24"
eventfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x64 "ICR25,Interrupt Control 25"
eventfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x68 "ICR26,Interrupt Control 26"
eventfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x6C "ICR27,Interrupt Control 27"
eventfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x70 "ICR28,Interrupt Control 28"
eventfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x74 "ICR29,Interrupt Control 29"
eventfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x78 "ICR30,Interrupt Control 30"
eventfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x7C "ICR31,Interrupt Control 31"
eventfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x80 "GICLR,Global Interrupt Control Low"
hexmask.long.word 0x80 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x80 15. "GIWE15,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 14. "GIWE14,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 13. "GIWE13,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 12. "GIWE12,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 11. "GIWE11,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 10. "GIWE10,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 9. "GIWE9,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 8. "GIWE8,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 7. "GIWE7,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 6. "GIWE6,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 5. "GIWE5,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 4. "GIWE4,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 3. "GIWE3,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 2. "GIWE2,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 1. "GIWE1,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 0. "GIWE0,Global Interrupt Write Enable" "0: Not updated,1: Updated"
line.long 0x84 "GICHR,Global Interrupt Control High"
hexmask.long.word 0x84 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x84 15. "GIWE31,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 14. "GIWE30,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 13. "GIWE29,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 12. "GIWE28,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 11. "GIWE27,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 10. "GIWE26,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 9. "GIWE25,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 8. "GIWE24,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 7. "GIWE23,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 6. "GIWE22,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 5. "GIWE21,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 4. "GIWE20,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 3. "GIWE19,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 2. "GIWE18,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 1. "GIWE17,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 0. "GIWE16,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
group.long 0x120++0x3
line.long 0x0 "ISFR0,Interrupt Status Flag"
eventfld.long 0x0 31. "ISF31,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 30. "ISF30,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 29. "ISF29,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 28. "ISF28,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 27. "ISF27,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 26. "ISF26,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 25. "ISF25,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 24. "ISF24,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 23. "ISF23,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 22. "ISF22,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 21. "ISF21,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 20. "ISF20,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 19. "ISF19,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 18. "ISF18,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 17. "ISF17,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 16. "ISF16,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 15. "ISF15,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 14. "ISF14,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 13. "ISF13,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 12. "ISF12,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 11. "ISF11,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 10. "ISF10,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 9. "ISF9,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 8. "ISF8,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 7. "ISF7,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 6. "ISF6,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 5. "ISF5,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 4. "ISF4,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 3. "ISF3,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 2. "ISF2,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 1. "ISF1,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 0. "ISF0,Interrupt Status Flag" "0: Not detected,1: Detected"
tree.end
tree "GPIO1"
base ad:0x40103000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "IRQNUM,Interrupt Number"
group.long 0x40++0xF
line.long 0x0 "PDOR,Port Data Output"
bitfld.long 0x0 31. "PDO31,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 30. "PDO30,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 29. "PDO29,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 28. "PDO28,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 27. "PDO27,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 26. "PDO26,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 25. "PDO25,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 24. "PDO24,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 23. "PDO23,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 22. "PDO22,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 21. "PDO21,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 20. "PDO20,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 19. "PDO19,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 18. "PDO18,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 17. "PDO17,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 16. "PDO16,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 15. "PDO15,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 14. "PDO14,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 13. "PDO13,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 12. "PDO12,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 11. "PDO11,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 10. "PDO10,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 9. "PDO9,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 8. "PDO8,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 7. "PDO7,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 6. "PDO6,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 5. "PDO5,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 4. "PDO4,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 3. "PDO3,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 2. "PDO2,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 1. "PDO1,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 0. "PDO0,Port Data Output" "0: Logic level 0,1: Logic level 1"
line.long 0x4 "PSOR,Port Set Output"
bitfld.long 0x4 31. "PTSO31,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 30. "PTSO30,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 29. "PTSO29,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 28. "PTSO28,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 27. "PTSO27,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 26. "PTSO26,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 25. "PTSO25,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 24. "PTSO24,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 23. "PTSO23,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 22. "PTSO22,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 21. "PTSO21,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 20. "PTSO20,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 19. "PTSO19,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 18. "PTSO18,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 17. "PTSO17,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 16. "PTSO16,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 15. "PTSO15,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 14. "PTSO14,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 13. "PTSO13,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 12. "PTSO12,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 11. "PTSO11,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 10. "PTSO10,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 9. "PTSO9,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 8. "PTSO8,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 7. "PTSO7,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 6. "PTSO6,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 5. "PTSO5,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 4. "PTSO4,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 3. "PTSO3,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 2. "PTSO2,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 1. "PTSO1,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 0. "PTSO0,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
line.long 0x8 "PCOR,Port Clear Output"
bitfld.long 0x8 31. "PTCO31,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 30. "PTCO30,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 29. "PTCO29,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 28. "PTCO28,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 27. "PTCO27,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 26. "PTCO26,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 25. "PTCO25,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 24. "PTCO24,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 23. "PTCO23,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 22. "PTCO22,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 21. "PTCO21,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 20. "PTCO20,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 19. "PTCO19,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 18. "PTCO18,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 17. "PTCO17,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 16. "PTCO16,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 15. "PTCO15,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 14. "PTCO14,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 13. "PTCO13,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 12. "PTCO12,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 11. "PTCO11,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 10. "PTCO10,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 9. "PTCO9,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 8. "PTCO8,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 7. "PTCO7,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 6. "PTCO6,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 5. "PTCO5,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 4. "PTCO4,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 3. "PTCO3,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 2. "PTCO2,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 1. "PTCO1,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 0. "PTCO0,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
line.long 0xC "PTOR,Port Toggle Output"
bitfld.long 0xC 31. "PTTO31,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 30. "PTTO30,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 29. "PTTO29,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 28. "PTTO28,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 27. "PTTO27,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 26. "PTTO26,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 25. "PTTO25,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 24. "PTTO24,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 23. "PTTO23,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 22. "PTTO22,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 21. "PTTO21,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 20. "PTTO20,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 19. "PTTO19,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 18. "PTTO18,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 17. "PTTO17,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 16. "PTTO16,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 15. "PTTO15,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 14. "PTTO14,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 13. "PTTO13,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 12. "PTTO12,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 11. "PTTO11,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 10. "PTTO10,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 9. "PTTO9,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 8. "PTTO8,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 7. "PTTO7,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 6. "PTTO6,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 5. "PTTO5,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 4. "PTTO4,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 3. "PTTO3,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 2. "PTTO2,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 1. "PTTO1,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 0. "PTTO0,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
rgroup.long 0x50++0x3
line.long 0x0 "PDIR,Port Data Input"
bitfld.long 0x0 31. "PDI31,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 30. "PDI30,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 29. "PDI29,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 28. "PDI28,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 27. "PDI27,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 26. "PDI26,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 25. "PDI25,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 24. "PDI24,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 23. "PDI23,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 22. "PDI22,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 21. "PDI21,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 20. "PDI20,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 19. "PDI19,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 18. "PDI18,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 17. "PDI17,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 16. "PDI16,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 15. "PDI15,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 14. "PDI14,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 13. "PDI13,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 12. "PDI12,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 11. "PDI11,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 10. "PDI10,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 9. "PDI9,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 8. "PDI8,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 7. "PDI7,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 6. "PDI6,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 5. "PDI5,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 4. "PDI4,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 3. "PDI3,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 2. "PDI2,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 1. "PDI1,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 0. "PDI0,Port Data Input" "0: Logic 0,1: Logic 1"
group.long 0x54++0x7
line.long 0x0 "PDDR,Port Data Direction"
bitfld.long 0x0 31. "PDD31,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 30. "PDD30,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 29. "PDD29,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 28. "PDD28,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 27. "PDD27,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 26. "PDD26,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 25. "PDD25,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 24. "PDD24,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 23. "PDD23,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 22. "PDD22,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 21. "PDD21,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 20. "PDD20,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 19. "PDD19,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 18. "PDD18,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 17. "PDD17,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 16. "PDD16,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 15. "PDD15,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 14. "PDD14,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 13. "PDD13,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 12. "PDD12,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 11. "PDD11,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 10. "PDD10,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 9. "PDD9,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 8. "PDD8,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 7. "PDD7,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 6. "PDD6,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 5. "PDD5,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 4. "PDD4,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 3. "PDD3,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 2. "PDD2,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 1. "PDD1,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 0. "PDD0,Port Data Direction" "0: Input,1: Output"
line.long 0x4 "PIDR,Port Input Disable"
bitfld.long 0x4 31. "PID31,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 30. "PID30,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 29. "PID29,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 28. "PID28,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 27. "PID27,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 26. "PID26,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 25. "PID25,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 24. "PID24,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 23. "PID23,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 22. "PID22,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 21. "PID21,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 20. "PID20,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 19. "PID19,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 18. "PID18,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 17. "PID17,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 16. "PID16,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 15. "PID15,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 14. "PID14,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 13. "PID13,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 12. "PID12,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 11. "PID11,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 10. "PID10,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 9. "PID9,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 8. "PID8,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 7. "PID7,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 6. "PID6,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 5. "PID5,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 4. "PID4,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 3. "PID3,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 2. "PID2,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 1. "PID1,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 0. "PID0,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x60)++0x0
line.byte 0x0 "PDR[$1],Pin Data"
bitfld.byte 0x0 0. "PD,Pin Data (I/O)" "0: Logic zero,1: Logic one"
repeat.end
group.long 0x80++0x87
line.long 0x0 "ICR0,Interrupt Control 0"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4 "ICR1,Interrupt Control 1"
eventfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x8 "ICR2,Interrupt Control 2"
eventfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0xC "ICR3,Interrupt Control 3"
eventfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x10 "ICR4,Interrupt Control 4"
eventfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x14 "ICR5,Interrupt Control 5"
eventfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x18 "ICR6,Interrupt Control 6"
eventfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x1C "ICR7,Interrupt Control 7"
eventfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x20 "ICR8,Interrupt Control 8"
eventfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x24 "ICR9,Interrupt Control 9"
eventfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x28 "ICR10,Interrupt Control 10"
eventfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x2C "ICR11,Interrupt Control 11"
eventfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x30 "ICR12,Interrupt Control 12"
eventfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x34 "ICR13,Interrupt Control 13"
eventfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x38 "ICR14,Interrupt Control 14"
eventfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x3C "ICR15,Interrupt Control 15"
eventfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x40 "ICR16,Interrupt Control 16"
eventfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x44 "ICR17,Interrupt Control 17"
eventfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x48 "ICR18,Interrupt Control 18"
eventfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4C "ICR19,Interrupt Control 19"
eventfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x50 "ICR20,Interrupt Control 20"
eventfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x54 "ICR21,Interrupt Control 21"
eventfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x58 "ICR22,Interrupt Control 22"
eventfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x5C "ICR23,Interrupt Control 23"
eventfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x60 "ICR24,Interrupt Control 24"
eventfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x64 "ICR25,Interrupt Control 25"
eventfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x68 "ICR26,Interrupt Control 26"
eventfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x6C "ICR27,Interrupt Control 27"
eventfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x70 "ICR28,Interrupt Control 28"
eventfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x74 "ICR29,Interrupt Control 29"
eventfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x78 "ICR30,Interrupt Control 30"
eventfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x7C "ICR31,Interrupt Control 31"
eventfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x80 "GICLR,Global Interrupt Control Low"
hexmask.long.word 0x80 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x80 15. "GIWE15,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 14. "GIWE14,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 13. "GIWE13,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 12. "GIWE12,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 11. "GIWE11,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 10. "GIWE10,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 9. "GIWE9,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 8. "GIWE8,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 7. "GIWE7,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 6. "GIWE6,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 5. "GIWE5,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 4. "GIWE4,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 3. "GIWE3,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 2. "GIWE2,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 1. "GIWE1,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 0. "GIWE0,Global Interrupt Write Enable" "0: Not updated,1: Updated"
line.long 0x84 "GICHR,Global Interrupt Control High"
hexmask.long.word 0x84 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x84 15. "GIWE31,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 14. "GIWE30,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 13. "GIWE29,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 12. "GIWE28,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 11. "GIWE27,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 10. "GIWE26,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 9. "GIWE25,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 8. "GIWE24,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 7. "GIWE23,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 6. "GIWE22,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 5. "GIWE21,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 4. "GIWE20,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 3. "GIWE19,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 2. "GIWE18,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 1. "GIWE17,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 0. "GIWE16,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
group.long 0x120++0x3
line.long 0x0 "ISFR0,Interrupt Status Flag"
eventfld.long 0x0 31. "ISF31,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 30. "ISF30,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 29. "ISF29,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 28. "ISF28,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 27. "ISF27,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 26. "ISF26,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 25. "ISF25,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 24. "ISF24,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 23. "ISF23,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 22. "ISF22,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 21. "ISF21,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 20. "ISF20,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 19. "ISF19,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 18. "ISF18,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 17. "ISF17,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 16. "ISF16,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 15. "ISF15,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 14. "ISF14,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 13. "ISF13,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 12. "ISF12,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 11. "ISF11,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 10. "ISF10,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 9. "ISF9,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 8. "ISF8,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 7. "ISF7,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 6. "ISF6,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 5. "ISF5,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 4. "ISF4,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 3. "ISF3,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 2. "ISF2,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 1. "ISF1,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 0. "ISF0,Interrupt Status Flag" "0: Not detected,1: Detected"
tree.end
tree "GPIO2"
base ad:0x40104000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "IRQNUM,Interrupt Number"
group.long 0x40++0xF
line.long 0x0 "PDOR,Port Data Output"
bitfld.long 0x0 31. "PDO31,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 30. "PDO30,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 29. "PDO29,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 28. "PDO28,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 27. "PDO27,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 26. "PDO26,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 25. "PDO25,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 24. "PDO24,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 23. "PDO23,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 22. "PDO22,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 21. "PDO21,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 20. "PDO20,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 19. "PDO19,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 18. "PDO18,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 17. "PDO17,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 16. "PDO16,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 15. "PDO15,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 14. "PDO14,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 13. "PDO13,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 12. "PDO12,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 11. "PDO11,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 10. "PDO10,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 9. "PDO9,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 8. "PDO8,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 7. "PDO7,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 6. "PDO6,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 5. "PDO5,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 4. "PDO4,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 3. "PDO3,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 2. "PDO2,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 1. "PDO1,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 0. "PDO0,Port Data Output" "0: Logic level 0,1: Logic level 1"
line.long 0x4 "PSOR,Port Set Output"
bitfld.long 0x4 31. "PTSO31,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 30. "PTSO30,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 29. "PTSO29,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 28. "PTSO28,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 27. "PTSO27,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 26. "PTSO26,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 25. "PTSO25,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 24. "PTSO24,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 23. "PTSO23,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 22. "PTSO22,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 21. "PTSO21,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 20. "PTSO20,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 19. "PTSO19,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 18. "PTSO18,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 17. "PTSO17,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 16. "PTSO16,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 15. "PTSO15,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 14. "PTSO14,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 13. "PTSO13,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 12. "PTSO12,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 11. "PTSO11,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 10. "PTSO10,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 9. "PTSO9,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 8. "PTSO8,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 7. "PTSO7,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 6. "PTSO6,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 5. "PTSO5,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 4. "PTSO4,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 3. "PTSO3,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 2. "PTSO2,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 1. "PTSO1,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 0. "PTSO0,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
line.long 0x8 "PCOR,Port Clear Output"
bitfld.long 0x8 31. "PTCO31,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 30. "PTCO30,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 29. "PTCO29,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 28. "PTCO28,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 27. "PTCO27,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 26. "PTCO26,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 25. "PTCO25,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 24. "PTCO24,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 23. "PTCO23,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 22. "PTCO22,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 21. "PTCO21,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 20. "PTCO20,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 19. "PTCO19,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 18. "PTCO18,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 17. "PTCO17,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 16. "PTCO16,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 15. "PTCO15,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 14. "PTCO14,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 13. "PTCO13,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 12. "PTCO12,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 11. "PTCO11,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 10. "PTCO10,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 9. "PTCO9,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 8. "PTCO8,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 7. "PTCO7,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 6. "PTCO6,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 5. "PTCO5,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 4. "PTCO4,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 3. "PTCO3,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 2. "PTCO2,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 1. "PTCO1,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 0. "PTCO0,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
line.long 0xC "PTOR,Port Toggle Output"
bitfld.long 0xC 31. "PTTO31,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 30. "PTTO30,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 29. "PTTO29,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 28. "PTTO28,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 27. "PTTO27,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 26. "PTTO26,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 25. "PTTO25,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 24. "PTTO24,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 23. "PTTO23,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 22. "PTTO22,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 21. "PTTO21,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 20. "PTTO20,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 19. "PTTO19,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 18. "PTTO18,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 17. "PTTO17,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 16. "PTTO16,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 15. "PTTO15,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 14. "PTTO14,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 13. "PTTO13,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 12. "PTTO12,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 11. "PTTO11,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 10. "PTTO10,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 9. "PTTO9,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 8. "PTTO8,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 7. "PTTO7,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 6. "PTTO6,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 5. "PTTO5,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 4. "PTTO4,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 3. "PTTO3,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 2. "PTTO2,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 1. "PTTO1,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 0. "PTTO0,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
rgroup.long 0x50++0x3
line.long 0x0 "PDIR,Port Data Input"
bitfld.long 0x0 31. "PDI31,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 30. "PDI30,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 29. "PDI29,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 28. "PDI28,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 27. "PDI27,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 26. "PDI26,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 25. "PDI25,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 24. "PDI24,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 23. "PDI23,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 22. "PDI22,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 21. "PDI21,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 20. "PDI20,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 19. "PDI19,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 18. "PDI18,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 17. "PDI17,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 16. "PDI16,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 15. "PDI15,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 14. "PDI14,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 13. "PDI13,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 12. "PDI12,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 11. "PDI11,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 10. "PDI10,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 9. "PDI9,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 8. "PDI8,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 7. "PDI7,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 6. "PDI6,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 5. "PDI5,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 4. "PDI4,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 3. "PDI3,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 2. "PDI2,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 1. "PDI1,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 0. "PDI0,Port Data Input" "0: Logic 0,1: Logic 1"
group.long 0x54++0x7
line.long 0x0 "PDDR,Port Data Direction"
bitfld.long 0x0 31. "PDD31,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 30. "PDD30,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 29. "PDD29,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 28. "PDD28,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 27. "PDD27,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 26. "PDD26,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 25. "PDD25,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 24. "PDD24,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 23. "PDD23,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 22. "PDD22,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 21. "PDD21,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 20. "PDD20,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 19. "PDD19,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 18. "PDD18,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 17. "PDD17,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 16. "PDD16,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 15. "PDD15,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 14. "PDD14,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 13. "PDD13,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 12. "PDD12,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 11. "PDD11,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 10. "PDD10,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 9. "PDD9,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 8. "PDD8,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 7. "PDD7,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 6. "PDD6,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 5. "PDD5,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 4. "PDD4,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 3. "PDD3,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 2. "PDD2,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 1. "PDD1,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 0. "PDD0,Port Data Direction" "0: Input,1: Output"
line.long 0x4 "PIDR,Port Input Disable"
bitfld.long 0x4 31. "PID31,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 30. "PID30,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 29. "PID29,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 28. "PID28,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 27. "PID27,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 26. "PID26,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 25. "PID25,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 24. "PID24,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 23. "PID23,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 22. "PID22,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 21. "PID21,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 20. "PID20,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 19. "PID19,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 18. "PID18,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 17. "PID17,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 16. "PID16,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 15. "PID15,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 14. "PID14,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 13. "PID13,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 12. "PID12,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 11. "PID11,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 10. "PID10,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 9. "PID9,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 8. "PID8,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 7. "PID7,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 6. "PID6,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 5. "PID5,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 4. "PID4,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 3. "PID3,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 2. "PID2,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 1. "PID1,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 0. "PID0,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x60)++0x0
line.byte 0x0 "PDR[$1],Pin Data"
bitfld.byte 0x0 0. "PD,Pin Data (I/O)" "0: Logic zero,1: Logic one"
repeat.end
group.long 0x80++0x87
line.long 0x0 "ICR0,Interrupt Control 0"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4 "ICR1,Interrupt Control 1"
eventfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x8 "ICR2,Interrupt Control 2"
eventfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0xC "ICR3,Interrupt Control 3"
eventfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x10 "ICR4,Interrupt Control 4"
eventfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x14 "ICR5,Interrupt Control 5"
eventfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x18 "ICR6,Interrupt Control 6"
eventfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x1C "ICR7,Interrupt Control 7"
eventfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x20 "ICR8,Interrupt Control 8"
eventfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x24 "ICR9,Interrupt Control 9"
eventfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x28 "ICR10,Interrupt Control 10"
eventfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x2C "ICR11,Interrupt Control 11"
eventfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x30 "ICR12,Interrupt Control 12"
eventfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x34 "ICR13,Interrupt Control 13"
eventfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x38 "ICR14,Interrupt Control 14"
eventfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x3C "ICR15,Interrupt Control 15"
eventfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x40 "ICR16,Interrupt Control 16"
eventfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x44 "ICR17,Interrupt Control 17"
eventfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x48 "ICR18,Interrupt Control 18"
eventfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4C "ICR19,Interrupt Control 19"
eventfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x50 "ICR20,Interrupt Control 20"
eventfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x54 "ICR21,Interrupt Control 21"
eventfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x58 "ICR22,Interrupt Control 22"
eventfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x5C "ICR23,Interrupt Control 23"
eventfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x60 "ICR24,Interrupt Control 24"
eventfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x64 "ICR25,Interrupt Control 25"
eventfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x68 "ICR26,Interrupt Control 26"
eventfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x6C "ICR27,Interrupt Control 27"
eventfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x70 "ICR28,Interrupt Control 28"
eventfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x74 "ICR29,Interrupt Control 29"
eventfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x78 "ICR30,Interrupt Control 30"
eventfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x7C "ICR31,Interrupt Control 31"
eventfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x80 "GICLR,Global Interrupt Control Low"
hexmask.long.word 0x80 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x80 15. "GIWE15,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 14. "GIWE14,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 13. "GIWE13,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 12. "GIWE12,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 11. "GIWE11,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 10. "GIWE10,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 9. "GIWE9,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 8. "GIWE8,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 7. "GIWE7,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 6. "GIWE6,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 5. "GIWE5,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 4. "GIWE4,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 3. "GIWE3,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 2. "GIWE2,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 1. "GIWE1,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 0. "GIWE0,Global Interrupt Write Enable" "0: Not updated,1: Updated"
line.long 0x84 "GICHR,Global Interrupt Control High"
hexmask.long.word 0x84 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x84 15. "GIWE31,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 14. "GIWE30,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 13. "GIWE29,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 12. "GIWE28,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 11. "GIWE27,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 10. "GIWE26,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 9. "GIWE25,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 8. "GIWE24,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 7. "GIWE23,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 6. "GIWE22,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 5. "GIWE21,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 4. "GIWE20,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 3. "GIWE19,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 2. "GIWE18,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 1. "GIWE17,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 0. "GIWE16,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
group.long 0x120++0x3
line.long 0x0 "ISFR0,Interrupt Status Flag"
eventfld.long 0x0 31. "ISF31,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 30. "ISF30,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 29. "ISF29,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 28. "ISF28,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 27. "ISF27,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 26. "ISF26,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 25. "ISF25,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 24. "ISF24,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 23. "ISF23,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 22. "ISF22,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 21. "ISF21,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 20. "ISF20,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 19. "ISF19,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 18. "ISF18,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 17. "ISF17,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 16. "ISF16,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 15. "ISF15,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 14. "ISF14,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 13. "ISF13,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 12. "ISF12,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 11. "ISF11,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 10. "ISF10,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 9. "ISF9,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 8. "ISF8,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 7. "ISF7,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 6. "ISF6,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 5. "ISF5,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 4. "ISF4,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 3. "ISF3,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 2. "ISF2,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 1. "ISF1,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 0. "ISF0,Interrupt Status Flag" "0: Not detected,1: Detected"
tree.end
tree "GPIO3"
base ad:0x40105000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "IRQNUM,Interrupt Number"
group.long 0x40++0xF
line.long 0x0 "PDOR,Port Data Output"
bitfld.long 0x0 31. "PDO31,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 30. "PDO30,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 29. "PDO29,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 28. "PDO28,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 27. "PDO27,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 26. "PDO26,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 25. "PDO25,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 24. "PDO24,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 23. "PDO23,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 22. "PDO22,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 21. "PDO21,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 20. "PDO20,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 19. "PDO19,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 18. "PDO18,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 17. "PDO17,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 16. "PDO16,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 15. "PDO15,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 14. "PDO14,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 13. "PDO13,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 12. "PDO12,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 11. "PDO11,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 10. "PDO10,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 9. "PDO9,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 8. "PDO8,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 7. "PDO7,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 6. "PDO6,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 5. "PDO5,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 4. "PDO4,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 3. "PDO3,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 2. "PDO2,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 1. "PDO1,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 0. "PDO0,Port Data Output" "0: Logic level 0,1: Logic level 1"
line.long 0x4 "PSOR,Port Set Output"
bitfld.long 0x4 31. "PTSO31,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 30. "PTSO30,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 29. "PTSO29,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 28. "PTSO28,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 27. "PTSO27,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 26. "PTSO26,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 25. "PTSO25,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 24. "PTSO24,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 23. "PTSO23,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 22. "PTSO22,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 21. "PTSO21,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 20. "PTSO20,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 19. "PTSO19,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 18. "PTSO18,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 17. "PTSO17,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 16. "PTSO16,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 15. "PTSO15,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 14. "PTSO14,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 13. "PTSO13,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 12. "PTSO12,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 11. "PTSO11,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 10. "PTSO10,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 9. "PTSO9,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 8. "PTSO8,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 7. "PTSO7,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 6. "PTSO6,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 5. "PTSO5,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 4. "PTSO4,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 3. "PTSO3,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 2. "PTSO2,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 1. "PTSO1,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 0. "PTSO0,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
line.long 0x8 "PCOR,Port Clear Output"
bitfld.long 0x8 31. "PTCO31,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 30. "PTCO30,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 29. "PTCO29,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 28. "PTCO28,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 27. "PTCO27,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 26. "PTCO26,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 25. "PTCO25,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 24. "PTCO24,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 23. "PTCO23,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 22. "PTCO22,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 21. "PTCO21,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 20. "PTCO20,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 19. "PTCO19,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 18. "PTCO18,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 17. "PTCO17,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 16. "PTCO16,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 15. "PTCO15,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 14. "PTCO14,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 13. "PTCO13,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 12. "PTCO12,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 11. "PTCO11,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 10. "PTCO10,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 9. "PTCO9,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 8. "PTCO8,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 7. "PTCO7,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 6. "PTCO6,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 5. "PTCO5,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 4. "PTCO4,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 3. "PTCO3,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 2. "PTCO2,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 1. "PTCO1,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 0. "PTCO0,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
line.long 0xC "PTOR,Port Toggle Output"
bitfld.long 0xC 31. "PTTO31,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 30. "PTTO30,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 29. "PTTO29,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 28. "PTTO28,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 27. "PTTO27,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 26. "PTTO26,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 25. "PTTO25,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 24. "PTTO24,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 23. "PTTO23,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 22. "PTTO22,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 21. "PTTO21,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 20. "PTTO20,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 19. "PTTO19,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 18. "PTTO18,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 17. "PTTO17,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 16. "PTTO16,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 15. "PTTO15,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 14. "PTTO14,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 13. "PTTO13,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 12. "PTTO12,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 11. "PTTO11,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 10. "PTTO10,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 9. "PTTO9,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 8. "PTTO8,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 7. "PTTO7,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 6. "PTTO6,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 5. "PTTO5,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 4. "PTTO4,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 3. "PTTO3,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 2. "PTTO2,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 1. "PTTO1,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 0. "PTTO0,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
rgroup.long 0x50++0x3
line.long 0x0 "PDIR,Port Data Input"
bitfld.long 0x0 31. "PDI31,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 30. "PDI30,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 29. "PDI29,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 28. "PDI28,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 27. "PDI27,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 26. "PDI26,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 25. "PDI25,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 24. "PDI24,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 23. "PDI23,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 22. "PDI22,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 21. "PDI21,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 20. "PDI20,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 19. "PDI19,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 18. "PDI18,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 17. "PDI17,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 16. "PDI16,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 15. "PDI15,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 14. "PDI14,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 13. "PDI13,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 12. "PDI12,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 11. "PDI11,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 10. "PDI10,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 9. "PDI9,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 8. "PDI8,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 7. "PDI7,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 6. "PDI6,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 5. "PDI5,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 4. "PDI4,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 3. "PDI3,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 2. "PDI2,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 1. "PDI1,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 0. "PDI0,Port Data Input" "0: Logic 0,1: Logic 1"
group.long 0x54++0x7
line.long 0x0 "PDDR,Port Data Direction"
bitfld.long 0x0 31. "PDD31,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 30. "PDD30,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 29. "PDD29,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 28. "PDD28,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 27. "PDD27,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 26. "PDD26,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 25. "PDD25,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 24. "PDD24,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 23. "PDD23,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 22. "PDD22,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 21. "PDD21,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 20. "PDD20,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 19. "PDD19,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 18. "PDD18,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 17. "PDD17,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 16. "PDD16,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 15. "PDD15,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 14. "PDD14,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 13. "PDD13,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 12. "PDD12,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 11. "PDD11,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 10. "PDD10,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 9. "PDD9,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 8. "PDD8,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 7. "PDD7,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 6. "PDD6,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 5. "PDD5,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 4. "PDD4,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 3. "PDD3,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 2. "PDD2,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 1. "PDD1,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 0. "PDD0,Port Data Direction" "0: Input,1: Output"
line.long 0x4 "PIDR,Port Input Disable"
bitfld.long 0x4 31. "PID31,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 30. "PID30,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 29. "PID29,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 28. "PID28,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 27. "PID27,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 26. "PID26,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 25. "PID25,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 24. "PID24,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 23. "PID23,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 22. "PID22,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 21. "PID21,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 20. "PID20,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 19. "PID19,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 18. "PID18,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 17. "PID17,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 16. "PID16,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 15. "PID15,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 14. "PID14,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 13. "PID13,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 12. "PID12,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 11. "PID11,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 10. "PID10,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 9. "PID9,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 8. "PID8,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 7. "PID7,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 6. "PID6,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 5. "PID5,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 4. "PID4,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 3. "PID3,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 2. "PID2,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 1. "PID1,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 0. "PID0,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x60)++0x0
line.byte 0x0 "PDR[$1],Pin Data"
bitfld.byte 0x0 0. "PD,Pin Data (I/O)" "0: Logic zero,1: Logic one"
repeat.end
group.long 0x80++0x87
line.long 0x0 "ICR0,Interrupt Control 0"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4 "ICR1,Interrupt Control 1"
eventfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x8 "ICR2,Interrupt Control 2"
eventfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0xC "ICR3,Interrupt Control 3"
eventfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x10 "ICR4,Interrupt Control 4"
eventfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x14 "ICR5,Interrupt Control 5"
eventfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x18 "ICR6,Interrupt Control 6"
eventfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x1C "ICR7,Interrupt Control 7"
eventfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x20 "ICR8,Interrupt Control 8"
eventfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x24 "ICR9,Interrupt Control 9"
eventfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x28 "ICR10,Interrupt Control 10"
eventfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x2C "ICR11,Interrupt Control 11"
eventfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x30 "ICR12,Interrupt Control 12"
eventfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x34 "ICR13,Interrupt Control 13"
eventfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x38 "ICR14,Interrupt Control 14"
eventfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x3C "ICR15,Interrupt Control 15"
eventfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x40 "ICR16,Interrupt Control 16"
eventfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x44 "ICR17,Interrupt Control 17"
eventfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x48 "ICR18,Interrupt Control 18"
eventfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4C "ICR19,Interrupt Control 19"
eventfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x50 "ICR20,Interrupt Control 20"
eventfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x54 "ICR21,Interrupt Control 21"
eventfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x58 "ICR22,Interrupt Control 22"
eventfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x5C "ICR23,Interrupt Control 23"
eventfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x60 "ICR24,Interrupt Control 24"
eventfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x64 "ICR25,Interrupt Control 25"
eventfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x68 "ICR26,Interrupt Control 26"
eventfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x6C "ICR27,Interrupt Control 27"
eventfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x70 "ICR28,Interrupt Control 28"
eventfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x74 "ICR29,Interrupt Control 29"
eventfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x78 "ICR30,Interrupt Control 30"
eventfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x7C "ICR31,Interrupt Control 31"
eventfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x80 "GICLR,Global Interrupt Control Low"
hexmask.long.word 0x80 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x80 15. "GIWE15,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 14. "GIWE14,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 13. "GIWE13,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 12. "GIWE12,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 11. "GIWE11,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 10. "GIWE10,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 9. "GIWE9,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 8. "GIWE8,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 7. "GIWE7,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 6. "GIWE6,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 5. "GIWE5,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 4. "GIWE4,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 3. "GIWE3,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 2. "GIWE2,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 1. "GIWE1,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 0. "GIWE0,Global Interrupt Write Enable" "0: Not updated,1: Updated"
line.long 0x84 "GICHR,Global Interrupt Control High"
hexmask.long.word 0x84 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x84 15. "GIWE31,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 14. "GIWE30,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 13. "GIWE29,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 12. "GIWE28,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 11. "GIWE27,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 10. "GIWE26,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 9. "GIWE25,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 8. "GIWE24,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 7. "GIWE23,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 6. "GIWE22,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 5. "GIWE21,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 4. "GIWE20,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 3. "GIWE19,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 2. "GIWE18,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 1. "GIWE17,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 0. "GIWE16,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
group.long 0x120++0x3
line.long 0x0 "ISFR0,Interrupt Status Flag"
eventfld.long 0x0 31. "ISF31,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 30. "ISF30,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 29. "ISF29,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 28. "ISF28,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 27. "ISF27,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 26. "ISF26,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 25. "ISF25,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 24. "ISF24,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 23. "ISF23,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 22. "ISF22,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 21. "ISF21,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 20. "ISF20,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 19. "ISF19,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 18. "ISF18,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 17. "ISF17,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 16. "ISF16,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 15. "ISF15,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 14. "ISF14,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 13. "ISF13,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 12. "ISF12,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 11. "ISF11,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 10. "ISF10,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 9. "ISF9,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 8. "ISF8,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 7. "ISF7,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 6. "ISF6,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 5. "ISF5,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 4. "ISF4,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 3. "ISF3,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 2. "ISF2,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 1. "ISF1,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 0. "ISF0,Interrupt Status Flag" "0: Not detected,1: Detected"
tree.end
endif
sif (cpuis("MC?A155*"))
tree "GPIO0"
base ad:0x40102000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "IRQNUM,Interrupt Number"
group.long 0x40++0xF
line.long 0x0 "PDOR,Port Data Output"
bitfld.long 0x0 31. "PDO31,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 30. "PDO30,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 29. "PDO29,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 28. "PDO28,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 27. "PDO27,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 26. "PDO26,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 25. "PDO25,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 24. "PDO24,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 23. "PDO23,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 22. "PDO22,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 21. "PDO21,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 20. "PDO20,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 19. "PDO19,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 18. "PDO18,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 17. "PDO17,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 16. "PDO16,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 15. "PDO15,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 14. "PDO14,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 13. "PDO13,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 12. "PDO12,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 11. "PDO11,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 10. "PDO10,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 9. "PDO9,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 8. "PDO8,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 7. "PDO7,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 6. "PDO6,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 5. "PDO5,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 4. "PDO4,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 3. "PDO3,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 2. "PDO2,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 1. "PDO1,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 0. "PDO0,Port Data Output" "0: Logic level 0,1: Logic level 1"
line.long 0x4 "PSOR,Port Set Output"
bitfld.long 0x4 31. "PTSO31,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 30. "PTSO30,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 29. "PTSO29,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 28. "PTSO28,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 27. "PTSO27,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 26. "PTSO26,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 25. "PTSO25,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 24. "PTSO24,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 23. "PTSO23,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 22. "PTSO22,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 21. "PTSO21,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 20. "PTSO20,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 19. "PTSO19,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 18. "PTSO18,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 17. "PTSO17,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 16. "PTSO16,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 15. "PTSO15,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 14. "PTSO14,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 13. "PTSO13,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 12. "PTSO12,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 11. "PTSO11,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 10. "PTSO10,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 9. "PTSO9,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 8. "PTSO8,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 7. "PTSO7,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 6. "PTSO6,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 5. "PTSO5,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 4. "PTSO4,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 3. "PTSO3,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 2. "PTSO2,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 1. "PTSO1,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 0. "PTSO0,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
line.long 0x8 "PCOR,Port Clear Output"
bitfld.long 0x8 31. "PTCO31,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 30. "PTCO30,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 29. "PTCO29,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 28. "PTCO28,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 27. "PTCO27,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 26. "PTCO26,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 25. "PTCO25,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 24. "PTCO24,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 23. "PTCO23,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 22. "PTCO22,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 21. "PTCO21,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 20. "PTCO20,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 19. "PTCO19,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 18. "PTCO18,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 17. "PTCO17,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 16. "PTCO16,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 15. "PTCO15,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 14. "PTCO14,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 13. "PTCO13,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 12. "PTCO12,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 11. "PTCO11,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 10. "PTCO10,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 9. "PTCO9,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 8. "PTCO8,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 7. "PTCO7,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 6. "PTCO6,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 5. "PTCO5,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 4. "PTCO4,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 3. "PTCO3,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 2. "PTCO2,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 1. "PTCO1,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 0. "PTCO0,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
line.long 0xC "PTOR,Port Toggle Output"
bitfld.long 0xC 31. "PTTO31,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 30. "PTTO30,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 29. "PTTO29,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 28. "PTTO28,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 27. "PTTO27,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 26. "PTTO26,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 25. "PTTO25,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 24. "PTTO24,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 23. "PTTO23,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 22. "PTTO22,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 21. "PTTO21,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 20. "PTTO20,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 19. "PTTO19,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 18. "PTTO18,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 17. "PTTO17,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 16. "PTTO16,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 15. "PTTO15,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 14. "PTTO14,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 13. "PTTO13,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 12. "PTTO12,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 11. "PTTO11,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 10. "PTTO10,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 9. "PTTO9,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 8. "PTTO8,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 7. "PTTO7,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 6. "PTTO6,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 5. "PTTO5,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 4. "PTTO4,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 3. "PTTO3,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 2. "PTTO2,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 1. "PTTO1,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 0. "PTTO0,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
rgroup.long 0x50++0x3
line.long 0x0 "PDIR,Port Data Input"
bitfld.long 0x0 31. "PDI31,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 30. "PDI30,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 29. "PDI29,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 28. "PDI28,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 27. "PDI27,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 26. "PDI26,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 25. "PDI25,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 24. "PDI24,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 23. "PDI23,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 22. "PDI22,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 21. "PDI21,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 20. "PDI20,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 19. "PDI19,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 18. "PDI18,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 17. "PDI17,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 16. "PDI16,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 15. "PDI15,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 14. "PDI14,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 13. "PDI13,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 12. "PDI12,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 11. "PDI11,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 10. "PDI10,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 9. "PDI9,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 8. "PDI8,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 7. "PDI7,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 6. "PDI6,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 5. "PDI5,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 4. "PDI4,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 3. "PDI3,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 2. "PDI2,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 1. "PDI1,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 0. "PDI0,Port Data Input" "0: Logic 0,1: Logic 1"
group.long 0x54++0x7
line.long 0x0 "PDDR,Port Data Direction"
bitfld.long 0x0 31. "PDD31,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 30. "PDD30,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 29. "PDD29,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 28. "PDD28,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 27. "PDD27,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 26. "PDD26,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 25. "PDD25,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 24. "PDD24,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 23. "PDD23,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 22. "PDD22,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 21. "PDD21,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 20. "PDD20,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 19. "PDD19,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 18. "PDD18,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 17. "PDD17,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 16. "PDD16,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 15. "PDD15,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 14. "PDD14,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 13. "PDD13,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 12. "PDD12,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 11. "PDD11,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 10. "PDD10,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 9. "PDD9,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 8. "PDD8,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 7. "PDD7,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 6. "PDD6,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 5. "PDD5,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 4. "PDD4,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 3. "PDD3,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 2. "PDD2,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 1. "PDD1,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 0. "PDD0,Port Data Direction" "0: Input,1: Output"
line.long 0x4 "PIDR,Port Input Disable"
bitfld.long 0x4 31. "PID31,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 30. "PID30,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 29. "PID29,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 28. "PID28,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 27. "PID27,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 26. "PID26,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 25. "PID25,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 24. "PID24,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 23. "PID23,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 22. "PID22,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 21. "PID21,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 20. "PID20,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 19. "PID19,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 18. "PID18,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 17. "PID17,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 16. "PID16,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 15. "PID15,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 14. "PID14,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 13. "PID13,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 12. "PID12,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 11. "PID11,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 10. "PID10,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 9. "PID9,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 8. "PID8,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 7. "PID7,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 6. "PID6,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 5. "PID5,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 4. "PID4,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 3. "PID3,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 2. "PID2,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 1. "PID1,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 0. "PID0,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x60)++0x0
line.byte 0x0 "PDR[$1],Pin Data"
bitfld.byte 0x0 0. "PD,Pin Data (I/O)" "0: Logic zero,1: Logic one"
repeat.end
group.long 0x80++0x87
line.long 0x0 "ICR0,Interrupt Control 0"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4 "ICR1,Interrupt Control 1"
eventfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x8 "ICR2,Interrupt Control 2"
eventfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0xC "ICR3,Interrupt Control 3"
eventfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x10 "ICR4,Interrupt Control 4"
eventfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x14 "ICR5,Interrupt Control 5"
eventfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x18 "ICR6,Interrupt Control 6"
eventfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x1C "ICR7,Interrupt Control 7"
eventfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x20 "ICR8,Interrupt Control 8"
eventfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x24 "ICR9,Interrupt Control 9"
eventfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x28 "ICR10,Interrupt Control 10"
eventfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x2C "ICR11,Interrupt Control 11"
eventfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x30 "ICR12,Interrupt Control 12"
eventfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x34 "ICR13,Interrupt Control 13"
eventfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x38 "ICR14,Interrupt Control 14"
eventfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x3C "ICR15,Interrupt Control 15"
eventfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x40 "ICR16,Interrupt Control 16"
eventfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x44 "ICR17,Interrupt Control 17"
eventfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x48 "ICR18,Interrupt Control 18"
eventfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4C "ICR19,Interrupt Control 19"
eventfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x50 "ICR20,Interrupt Control 20"
eventfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x54 "ICR21,Interrupt Control 21"
eventfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x58 "ICR22,Interrupt Control 22"
eventfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x5C "ICR23,Interrupt Control 23"
eventfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x60 "ICR24,Interrupt Control 24"
eventfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x64 "ICR25,Interrupt Control 25"
eventfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x68 "ICR26,Interrupt Control 26"
eventfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x6C "ICR27,Interrupt Control 27"
eventfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x70 "ICR28,Interrupt Control 28"
eventfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x74 "ICR29,Interrupt Control 29"
eventfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x78 "ICR30,Interrupt Control 30"
eventfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x7C "ICR31,Interrupt Control 31"
eventfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x80 "GICLR,Global Interrupt Control Low"
hexmask.long.word 0x80 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x80 15. "GIWE15,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 14. "GIWE14,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 13. "GIWE13,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 12. "GIWE12,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 11. "GIWE11,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 10. "GIWE10,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 9. "GIWE9,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 8. "GIWE8,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 7. "GIWE7,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 6. "GIWE6,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 5. "GIWE5,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 4. "GIWE4,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 3. "GIWE3,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 2. "GIWE2,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 1. "GIWE1,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 0. "GIWE0,Global Interrupt Write Enable" "0: Not updated,1: Updated"
line.long 0x84 "GICHR,Global Interrupt Control High"
hexmask.long.word 0x84 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x84 15. "GIWE31,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 14. "GIWE30,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 13. "GIWE29,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 12. "GIWE28,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 11. "GIWE27,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 10. "GIWE26,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 9. "GIWE25,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 8. "GIWE24,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 7. "GIWE23,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 6. "GIWE22,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 5. "GIWE21,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 4. "GIWE20,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 3. "GIWE19,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 2. "GIWE18,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 1. "GIWE17,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 0. "GIWE16,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
group.long 0x120++0x3
line.long 0x0 "ISFR0,Interrupt Status Flag"
eventfld.long 0x0 31. "ISF31,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 30. "ISF30,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 29. "ISF29,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 28. "ISF28,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 27. "ISF27,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 26. "ISF26,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 25. "ISF25,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 24. "ISF24,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 23. "ISF23,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 22. "ISF22,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 21. "ISF21,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 20. "ISF20,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 19. "ISF19,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 18. "ISF18,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 17. "ISF17,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 16. "ISF16,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 15. "ISF15,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 14. "ISF14,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 13. "ISF13,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 12. "ISF12,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 11. "ISF11,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 10. "ISF10,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 9. "ISF9,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 8. "ISF8,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 7. "ISF7,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 6. "ISF6,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 5. "ISF5,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 4. "ISF4,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 3. "ISF3,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 2. "ISF2,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 1. "ISF1,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 0. "ISF0,Interrupt Status Flag" "0: Not detected,1: Detected"
tree.end
tree "GPIO1"
base ad:0x40103000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "IRQNUM,Interrupt Number"
group.long 0x40++0xF
line.long 0x0 "PDOR,Port Data Output"
bitfld.long 0x0 31. "PDO31,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 30. "PDO30,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 29. "PDO29,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 28. "PDO28,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 27. "PDO27,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 26. "PDO26,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 25. "PDO25,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 24. "PDO24,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 23. "PDO23,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 22. "PDO22,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 21. "PDO21,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 20. "PDO20,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 19. "PDO19,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 18. "PDO18,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 17. "PDO17,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 16. "PDO16,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 15. "PDO15,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 14. "PDO14,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 13. "PDO13,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 12. "PDO12,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 11. "PDO11,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 10. "PDO10,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 9. "PDO9,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 8. "PDO8,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 7. "PDO7,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 6. "PDO6,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 5. "PDO5,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 4. "PDO4,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 3. "PDO3,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 2. "PDO2,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 1. "PDO1,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 0. "PDO0,Port Data Output" "0: Logic level 0,1: Logic level 1"
line.long 0x4 "PSOR,Port Set Output"
bitfld.long 0x4 31. "PTSO31,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 30. "PTSO30,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 29. "PTSO29,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 28. "PTSO28,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 27. "PTSO27,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 26. "PTSO26,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 25. "PTSO25,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 24. "PTSO24,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 23. "PTSO23,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 22. "PTSO22,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 21. "PTSO21,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 20. "PTSO20,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 19. "PTSO19,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 18. "PTSO18,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 17. "PTSO17,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 16. "PTSO16,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 15. "PTSO15,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 14. "PTSO14,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 13. "PTSO13,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 12. "PTSO12,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 11. "PTSO11,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 10. "PTSO10,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 9. "PTSO9,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 8. "PTSO8,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 7. "PTSO7,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 6. "PTSO6,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 5. "PTSO5,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 4. "PTSO4,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 3. "PTSO3,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 2. "PTSO2,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 1. "PTSO1,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 0. "PTSO0,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
line.long 0x8 "PCOR,Port Clear Output"
bitfld.long 0x8 31. "PTCO31,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 30. "PTCO30,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 29. "PTCO29,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 28. "PTCO28,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 27. "PTCO27,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 26. "PTCO26,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 25. "PTCO25,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 24. "PTCO24,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 23. "PTCO23,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 22. "PTCO22,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 21. "PTCO21,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 20. "PTCO20,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 19. "PTCO19,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 18. "PTCO18,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 17. "PTCO17,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 16. "PTCO16,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 15. "PTCO15,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 14. "PTCO14,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 13. "PTCO13,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 12. "PTCO12,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 11. "PTCO11,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 10. "PTCO10,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 9. "PTCO9,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 8. "PTCO8,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 7. "PTCO7,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 6. "PTCO6,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 5. "PTCO5,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 4. "PTCO4,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 3. "PTCO3,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 2. "PTCO2,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 1. "PTCO1,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 0. "PTCO0,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
line.long 0xC "PTOR,Port Toggle Output"
bitfld.long 0xC 31. "PTTO31,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 30. "PTTO30,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 29. "PTTO29,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 28. "PTTO28,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 27. "PTTO27,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 26. "PTTO26,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 25. "PTTO25,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 24. "PTTO24,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 23. "PTTO23,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 22. "PTTO22,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 21. "PTTO21,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 20. "PTTO20,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 19. "PTTO19,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 18. "PTTO18,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 17. "PTTO17,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 16. "PTTO16,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 15. "PTTO15,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 14. "PTTO14,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 13. "PTTO13,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 12. "PTTO12,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 11. "PTTO11,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 10. "PTTO10,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 9. "PTTO9,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 8. "PTTO8,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 7. "PTTO7,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 6. "PTTO6,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 5. "PTTO5,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 4. "PTTO4,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 3. "PTTO3,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 2. "PTTO2,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 1. "PTTO1,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 0. "PTTO0,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
rgroup.long 0x50++0x3
line.long 0x0 "PDIR,Port Data Input"
bitfld.long 0x0 31. "PDI31,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 30. "PDI30,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 29. "PDI29,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 28. "PDI28,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 27. "PDI27,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 26. "PDI26,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 25. "PDI25,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 24. "PDI24,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 23. "PDI23,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 22. "PDI22,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 21. "PDI21,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 20. "PDI20,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 19. "PDI19,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 18. "PDI18,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 17. "PDI17,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 16. "PDI16,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 15. "PDI15,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 14. "PDI14,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 13. "PDI13,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 12. "PDI12,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 11. "PDI11,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 10. "PDI10,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 9. "PDI9,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 8. "PDI8,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 7. "PDI7,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 6. "PDI6,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 5. "PDI5,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 4. "PDI4,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 3. "PDI3,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 2. "PDI2,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 1. "PDI1,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 0. "PDI0,Port Data Input" "0: Logic 0,1: Logic 1"
group.long 0x54++0x7
line.long 0x0 "PDDR,Port Data Direction"
bitfld.long 0x0 31. "PDD31,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 30. "PDD30,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 29. "PDD29,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 28. "PDD28,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 27. "PDD27,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 26. "PDD26,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 25. "PDD25,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 24. "PDD24,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 23. "PDD23,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 22. "PDD22,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 21. "PDD21,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 20. "PDD20,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 19. "PDD19,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 18. "PDD18,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 17. "PDD17,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 16. "PDD16,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 15. "PDD15,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 14. "PDD14,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 13. "PDD13,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 12. "PDD12,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 11. "PDD11,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 10. "PDD10,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 9. "PDD9,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 8. "PDD8,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 7. "PDD7,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 6. "PDD6,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 5. "PDD5,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 4. "PDD4,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 3. "PDD3,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 2. "PDD2,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 1. "PDD1,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 0. "PDD0,Port Data Direction" "0: Input,1: Output"
line.long 0x4 "PIDR,Port Input Disable"
bitfld.long 0x4 31. "PID31,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 30. "PID30,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 29. "PID29,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 28. "PID28,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 27. "PID27,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 26. "PID26,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 25. "PID25,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 24. "PID24,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 23. "PID23,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 22. "PID22,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 21. "PID21,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 20. "PID20,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 19. "PID19,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 18. "PID18,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 17. "PID17,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 16. "PID16,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 15. "PID15,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 14. "PID14,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 13. "PID13,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 12. "PID12,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 11. "PID11,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 10. "PID10,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 9. "PID9,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 8. "PID8,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 7. "PID7,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 6. "PID6,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 5. "PID5,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 4. "PID4,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 3. "PID3,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 2. "PID2,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 1. "PID1,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 0. "PID0,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x60)++0x0
line.byte 0x0 "PDR[$1],Pin Data"
bitfld.byte 0x0 0. "PD,Pin Data (I/O)" "0: Logic zero,1: Logic one"
repeat.end
group.long 0x80++0x87
line.long 0x0 "ICR0,Interrupt Control 0"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4 "ICR1,Interrupt Control 1"
eventfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x8 "ICR2,Interrupt Control 2"
eventfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0xC "ICR3,Interrupt Control 3"
eventfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x10 "ICR4,Interrupt Control 4"
eventfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x14 "ICR5,Interrupt Control 5"
eventfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x18 "ICR6,Interrupt Control 6"
eventfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x1C "ICR7,Interrupt Control 7"
eventfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x20 "ICR8,Interrupt Control 8"
eventfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x24 "ICR9,Interrupt Control 9"
eventfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x28 "ICR10,Interrupt Control 10"
eventfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x2C "ICR11,Interrupt Control 11"
eventfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x30 "ICR12,Interrupt Control 12"
eventfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x34 "ICR13,Interrupt Control 13"
eventfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x38 "ICR14,Interrupt Control 14"
eventfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x3C "ICR15,Interrupt Control 15"
eventfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x40 "ICR16,Interrupt Control 16"
eventfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x44 "ICR17,Interrupt Control 17"
eventfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x48 "ICR18,Interrupt Control 18"
eventfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4C "ICR19,Interrupt Control 19"
eventfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x50 "ICR20,Interrupt Control 20"
eventfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x54 "ICR21,Interrupt Control 21"
eventfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x58 "ICR22,Interrupt Control 22"
eventfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x5C "ICR23,Interrupt Control 23"
eventfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x60 "ICR24,Interrupt Control 24"
eventfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x64 "ICR25,Interrupt Control 25"
eventfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x68 "ICR26,Interrupt Control 26"
eventfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x6C "ICR27,Interrupt Control 27"
eventfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x70 "ICR28,Interrupt Control 28"
eventfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x74 "ICR29,Interrupt Control 29"
eventfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x78 "ICR30,Interrupt Control 30"
eventfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x7C "ICR31,Interrupt Control 31"
eventfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x80 "GICLR,Global Interrupt Control Low"
hexmask.long.word 0x80 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x80 15. "GIWE15,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 14. "GIWE14,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 13. "GIWE13,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 12. "GIWE12,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 11. "GIWE11,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 10. "GIWE10,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 9. "GIWE9,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 8. "GIWE8,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 7. "GIWE7,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 6. "GIWE6,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 5. "GIWE5,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 4. "GIWE4,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 3. "GIWE3,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 2. "GIWE2,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 1. "GIWE1,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 0. "GIWE0,Global Interrupt Write Enable" "0: Not updated,1: Updated"
line.long 0x84 "GICHR,Global Interrupt Control High"
hexmask.long.word 0x84 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x84 15. "GIWE31,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 14. "GIWE30,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 13. "GIWE29,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 12. "GIWE28,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 11. "GIWE27,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 10. "GIWE26,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 9. "GIWE25,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 8. "GIWE24,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 7. "GIWE23,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 6. "GIWE22,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 5. "GIWE21,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 4. "GIWE20,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 3. "GIWE19,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 2. "GIWE18,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 1. "GIWE17,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 0. "GIWE16,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
group.long 0x120++0x3
line.long 0x0 "ISFR0,Interrupt Status Flag"
eventfld.long 0x0 31. "ISF31,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 30. "ISF30,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 29. "ISF29,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 28. "ISF28,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 27. "ISF27,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 26. "ISF26,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 25. "ISF25,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 24. "ISF24,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 23. "ISF23,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 22. "ISF22,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 21. "ISF21,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 20. "ISF20,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 19. "ISF19,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 18. "ISF18,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 17. "ISF17,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 16. "ISF16,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 15. "ISF15,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 14. "ISF14,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 13. "ISF13,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 12. "ISF12,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 11. "ISF11,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 10. "ISF10,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 9. "ISF9,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 8. "ISF8,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 7. "ISF7,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 6. "ISF6,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 5. "ISF5,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 4. "ISF4,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 3. "ISF3,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 2. "ISF2,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 1. "ISF1,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 0. "ISF0,Interrupt Status Flag" "0: Not detected,1: Detected"
tree.end
tree "GPIO2"
base ad:0x40104000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "IRQNUM,Interrupt Number"
group.long 0x40++0xF
line.long 0x0 "PDOR,Port Data Output"
bitfld.long 0x0 31. "PDO31,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 30. "PDO30,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 29. "PDO29,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 28. "PDO28,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 27. "PDO27,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 26. "PDO26,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 25. "PDO25,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 24. "PDO24,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 23. "PDO23,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 22. "PDO22,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 21. "PDO21,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 20. "PDO20,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 19. "PDO19,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 18. "PDO18,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 17. "PDO17,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 16. "PDO16,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 15. "PDO15,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 14. "PDO14,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 13. "PDO13,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 12. "PDO12,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 11. "PDO11,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 10. "PDO10,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 9. "PDO9,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 8. "PDO8,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 7. "PDO7,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 6. "PDO6,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 5. "PDO5,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 4. "PDO4,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 3. "PDO3,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 2. "PDO2,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 1. "PDO1,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 0. "PDO0,Port Data Output" "0: Logic level 0,1: Logic level 1"
line.long 0x4 "PSOR,Port Set Output"
bitfld.long 0x4 31. "PTSO31,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 30. "PTSO30,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 29. "PTSO29,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 28. "PTSO28,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 27. "PTSO27,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 26. "PTSO26,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 25. "PTSO25,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 24. "PTSO24,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 23. "PTSO23,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 22. "PTSO22,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 21. "PTSO21,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 20. "PTSO20,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 19. "PTSO19,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 18. "PTSO18,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 17. "PTSO17,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 16. "PTSO16,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 15. "PTSO15,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 14. "PTSO14,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 13. "PTSO13,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 12. "PTSO12,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 11. "PTSO11,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 10. "PTSO10,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 9. "PTSO9,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 8. "PTSO8,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 7. "PTSO7,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 6. "PTSO6,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 5. "PTSO5,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 4. "PTSO4,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 3. "PTSO3,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 2. "PTSO2,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 1. "PTSO1,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 0. "PTSO0,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
line.long 0x8 "PCOR,Port Clear Output"
bitfld.long 0x8 31. "PTCO31,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 30. "PTCO30,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 29. "PTCO29,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 28. "PTCO28,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 27. "PTCO27,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 26. "PTCO26,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 25. "PTCO25,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 24. "PTCO24,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 23. "PTCO23,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 22. "PTCO22,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 21. "PTCO21,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 20. "PTCO20,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 19. "PTCO19,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 18. "PTCO18,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 17. "PTCO17,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 16. "PTCO16,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 15. "PTCO15,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 14. "PTCO14,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 13. "PTCO13,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 12. "PTCO12,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 11. "PTCO11,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 10. "PTCO10,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 9. "PTCO9,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 8. "PTCO8,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 7. "PTCO7,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 6. "PTCO6,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 5. "PTCO5,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 4. "PTCO4,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 3. "PTCO3,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 2. "PTCO2,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 1. "PTCO1,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 0. "PTCO0,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
line.long 0xC "PTOR,Port Toggle Output"
bitfld.long 0xC 31. "PTTO31,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 30. "PTTO30,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 29. "PTTO29,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 28. "PTTO28,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 27. "PTTO27,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 26. "PTTO26,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 25. "PTTO25,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 24. "PTTO24,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 23. "PTTO23,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 22. "PTTO22,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 21. "PTTO21,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 20. "PTTO20,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 19. "PTTO19,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 18. "PTTO18,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 17. "PTTO17,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 16. "PTTO16,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 15. "PTTO15,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 14. "PTTO14,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 13. "PTTO13,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 12. "PTTO12,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 11. "PTTO11,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 10. "PTTO10,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 9. "PTTO9,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 8. "PTTO8,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 7. "PTTO7,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 6. "PTTO6,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 5. "PTTO5,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 4. "PTTO4,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 3. "PTTO3,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 2. "PTTO2,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 1. "PTTO1,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 0. "PTTO0,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
rgroup.long 0x50++0x3
line.long 0x0 "PDIR,Port Data Input"
bitfld.long 0x0 31. "PDI31,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 30. "PDI30,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 29. "PDI29,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 28. "PDI28,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 27. "PDI27,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 26. "PDI26,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 25. "PDI25,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 24. "PDI24,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 23. "PDI23,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 22. "PDI22,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 21. "PDI21,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 20. "PDI20,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 19. "PDI19,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 18. "PDI18,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 17. "PDI17,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 16. "PDI16,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 15. "PDI15,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 14. "PDI14,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 13. "PDI13,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 12. "PDI12,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 11. "PDI11,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 10. "PDI10,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 9. "PDI9,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 8. "PDI8,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 7. "PDI7,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 6. "PDI6,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 5. "PDI5,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 4. "PDI4,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 3. "PDI3,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 2. "PDI2,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 1. "PDI1,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 0. "PDI0,Port Data Input" "0: Logic 0,1: Logic 1"
group.long 0x54++0x7
line.long 0x0 "PDDR,Port Data Direction"
bitfld.long 0x0 31. "PDD31,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 30. "PDD30,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 29. "PDD29,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 28. "PDD28,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 27. "PDD27,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 26. "PDD26,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 25. "PDD25,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 24. "PDD24,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 23. "PDD23,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 22. "PDD22,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 21. "PDD21,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 20. "PDD20,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 19. "PDD19,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 18. "PDD18,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 17. "PDD17,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 16. "PDD16,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 15. "PDD15,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 14. "PDD14,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 13. "PDD13,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 12. "PDD12,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 11. "PDD11,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 10. "PDD10,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 9. "PDD9,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 8. "PDD8,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 7. "PDD7,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 6. "PDD6,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 5. "PDD5,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 4. "PDD4,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 3. "PDD3,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 2. "PDD2,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 1. "PDD1,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 0. "PDD0,Port Data Direction" "0: Input,1: Output"
line.long 0x4 "PIDR,Port Input Disable"
bitfld.long 0x4 31. "PID31,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 30. "PID30,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 29. "PID29,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 28. "PID28,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 27. "PID27,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 26. "PID26,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 25. "PID25,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 24. "PID24,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 23. "PID23,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 22. "PID22,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 21. "PID21,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 20. "PID20,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 19. "PID19,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 18. "PID18,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 17. "PID17,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 16. "PID16,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 15. "PID15,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 14. "PID14,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 13. "PID13,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 12. "PID12,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 11. "PID11,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 10. "PID10,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 9. "PID9,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 8. "PID8,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 7. "PID7,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 6. "PID6,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 5. "PID5,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 4. "PID4,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 3. "PID3,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 2. "PID2,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 1. "PID1,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 0. "PID0,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x60)++0x0
line.byte 0x0 "PDR[$1],Pin Data"
bitfld.byte 0x0 0. "PD,Pin Data (I/O)" "0: Logic zero,1: Logic one"
repeat.end
group.long 0x80++0x87
line.long 0x0 "ICR0,Interrupt Control 0"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4 "ICR1,Interrupt Control 1"
eventfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x8 "ICR2,Interrupt Control 2"
eventfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0xC "ICR3,Interrupt Control 3"
eventfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x10 "ICR4,Interrupt Control 4"
eventfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x14 "ICR5,Interrupt Control 5"
eventfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x18 "ICR6,Interrupt Control 6"
eventfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x1C "ICR7,Interrupt Control 7"
eventfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x20 "ICR8,Interrupt Control 8"
eventfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x24 "ICR9,Interrupt Control 9"
eventfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x28 "ICR10,Interrupt Control 10"
eventfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x2C "ICR11,Interrupt Control 11"
eventfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x30 "ICR12,Interrupt Control 12"
eventfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x34 "ICR13,Interrupt Control 13"
eventfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x38 "ICR14,Interrupt Control 14"
eventfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x3C "ICR15,Interrupt Control 15"
eventfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x40 "ICR16,Interrupt Control 16"
eventfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x44 "ICR17,Interrupt Control 17"
eventfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x48 "ICR18,Interrupt Control 18"
eventfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4C "ICR19,Interrupt Control 19"
eventfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x50 "ICR20,Interrupt Control 20"
eventfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x54 "ICR21,Interrupt Control 21"
eventfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x58 "ICR22,Interrupt Control 22"
eventfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x5C "ICR23,Interrupt Control 23"
eventfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x60 "ICR24,Interrupt Control 24"
eventfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x64 "ICR25,Interrupt Control 25"
eventfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x68 "ICR26,Interrupt Control 26"
eventfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x6C "ICR27,Interrupt Control 27"
eventfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x70 "ICR28,Interrupt Control 28"
eventfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x74 "ICR29,Interrupt Control 29"
eventfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x78 "ICR30,Interrupt Control 30"
eventfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x7C "ICR31,Interrupt Control 31"
eventfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x80 "GICLR,Global Interrupt Control Low"
hexmask.long.word 0x80 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x80 15. "GIWE15,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 14. "GIWE14,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 13. "GIWE13,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 12. "GIWE12,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 11. "GIWE11,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 10. "GIWE10,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 9. "GIWE9,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 8. "GIWE8,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 7. "GIWE7,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 6. "GIWE6,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 5. "GIWE5,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 4. "GIWE4,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 3. "GIWE3,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 2. "GIWE2,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 1. "GIWE1,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 0. "GIWE0,Global Interrupt Write Enable" "0: Not updated,1: Updated"
line.long 0x84 "GICHR,Global Interrupt Control High"
hexmask.long.word 0x84 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x84 15. "GIWE31,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 14. "GIWE30,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 13. "GIWE29,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 12. "GIWE28,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 11. "GIWE27,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 10. "GIWE26,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 9. "GIWE25,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 8. "GIWE24,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 7. "GIWE23,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 6. "GIWE22,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 5. "GIWE21,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 4. "GIWE20,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 3. "GIWE19,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 2. "GIWE18,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 1. "GIWE17,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 0. "GIWE16,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
group.long 0x120++0x3
line.long 0x0 "ISFR0,Interrupt Status Flag"
eventfld.long 0x0 31. "ISF31,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 30. "ISF30,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 29. "ISF29,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 28. "ISF28,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 27. "ISF27,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 26. "ISF26,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 25. "ISF25,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 24. "ISF24,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 23. "ISF23,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 22. "ISF22,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 21. "ISF21,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 20. "ISF20,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 19. "ISF19,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 18. "ISF18,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 17. "ISF17,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 16. "ISF16,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 15. "ISF15,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 14. "ISF14,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 13. "ISF13,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 12. "ISF12,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 11. "ISF11,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 10. "ISF10,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 9. "ISF9,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 8. "ISF8,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 7. "ISF7,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 6. "ISF6,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 5. "ISF5,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 4. "ISF4,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 3. "ISF3,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 2. "ISF2,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 1. "ISF1,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 0. "ISF0,Interrupt Status Flag" "0: Not detected,1: Detected"
tree.end
tree "GPIO3"
base ad:0x40105000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "IRQNUM,Interrupt Number"
group.long 0x40++0xF
line.long 0x0 "PDOR,Port Data Output"
bitfld.long 0x0 31. "PDO31,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 30. "PDO30,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 29. "PDO29,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 28. "PDO28,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 27. "PDO27,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 26. "PDO26,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 25. "PDO25,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 24. "PDO24,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 23. "PDO23,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 22. "PDO22,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 21. "PDO21,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 20. "PDO20,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 19. "PDO19,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 18. "PDO18,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 17. "PDO17,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 16. "PDO16,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 15. "PDO15,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 14. "PDO14,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 13. "PDO13,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 12. "PDO12,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 11. "PDO11,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 10. "PDO10,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 9. "PDO9,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 8. "PDO8,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 7. "PDO7,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 6. "PDO6,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 5. "PDO5,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 4. "PDO4,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 3. "PDO3,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 2. "PDO2,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 1. "PDO1,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 0. "PDO0,Port Data Output" "0: Logic level 0,1: Logic level 1"
line.long 0x4 "PSOR,Port Set Output"
bitfld.long 0x4 31. "PTSO31,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 30. "PTSO30,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 29. "PTSO29,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 28. "PTSO28,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 27. "PTSO27,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 26. "PTSO26,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 25. "PTSO25,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 24. "PTSO24,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 23. "PTSO23,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 22. "PTSO22,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 21. "PTSO21,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 20. "PTSO20,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 19. "PTSO19,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 18. "PTSO18,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 17. "PTSO17,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 16. "PTSO16,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 15. "PTSO15,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 14. "PTSO14,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 13. "PTSO13,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 12. "PTSO12,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 11. "PTSO11,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 10. "PTSO10,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 9. "PTSO9,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 8. "PTSO8,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 7. "PTSO7,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 6. "PTSO6,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 5. "PTSO5,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 4. "PTSO4,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 3. "PTSO3,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 2. "PTSO2,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 1. "PTSO1,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 0. "PTSO0,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
line.long 0x8 "PCOR,Port Clear Output"
bitfld.long 0x8 31. "PTCO31,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 30. "PTCO30,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 29. "PTCO29,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 28. "PTCO28,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 27. "PTCO27,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 26. "PTCO26,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 25. "PTCO25,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 24. "PTCO24,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 23. "PTCO23,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 22. "PTCO22,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 21. "PTCO21,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 20. "PTCO20,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 19. "PTCO19,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 18. "PTCO18,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 17. "PTCO17,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 16. "PTCO16,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 15. "PTCO15,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 14. "PTCO14,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 13. "PTCO13,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 12. "PTCO12,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 11. "PTCO11,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 10. "PTCO10,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 9. "PTCO9,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 8. "PTCO8,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 7. "PTCO7,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 6. "PTCO6,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 5. "PTCO5,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 4. "PTCO4,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 3. "PTCO3,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 2. "PTCO2,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 1. "PTCO1,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 0. "PTCO0,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
line.long 0xC "PTOR,Port Toggle Output"
bitfld.long 0xC 31. "PTTO31,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 30. "PTTO30,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 29. "PTTO29,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 28. "PTTO28,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 27. "PTTO27,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 26. "PTTO26,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 25. "PTTO25,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 24. "PTTO24,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 23. "PTTO23,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 22. "PTTO22,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 21. "PTTO21,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 20. "PTTO20,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 19. "PTTO19,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 18. "PTTO18,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 17. "PTTO17,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 16. "PTTO16,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 15. "PTTO15,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 14. "PTTO14,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 13. "PTTO13,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 12. "PTTO12,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 11. "PTTO11,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 10. "PTTO10,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 9. "PTTO9,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 8. "PTTO8,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 7. "PTTO7,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 6. "PTTO6,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 5. "PTTO5,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 4. "PTTO4,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 3. "PTTO3,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 2. "PTTO2,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 1. "PTTO1,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 0. "PTTO0,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
rgroup.long 0x50++0x3
line.long 0x0 "PDIR,Port Data Input"
bitfld.long 0x0 31. "PDI31,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 30. "PDI30,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 29. "PDI29,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 28. "PDI28,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 27. "PDI27,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 26. "PDI26,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 25. "PDI25,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 24. "PDI24,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 23. "PDI23,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 22. "PDI22,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 21. "PDI21,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 20. "PDI20,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 19. "PDI19,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 18. "PDI18,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 17. "PDI17,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 16. "PDI16,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 15. "PDI15,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 14. "PDI14,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 13. "PDI13,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 12. "PDI12,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 11. "PDI11,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 10. "PDI10,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 9. "PDI9,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 8. "PDI8,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 7. "PDI7,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 6. "PDI6,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 5. "PDI5,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 4. "PDI4,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 3. "PDI3,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 2. "PDI2,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 1. "PDI1,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 0. "PDI0,Port Data Input" "0: Logic 0,1: Logic 1"
group.long 0x54++0x7
line.long 0x0 "PDDR,Port Data Direction"
bitfld.long 0x0 31. "PDD31,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 30. "PDD30,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 29. "PDD29,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 28. "PDD28,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 27. "PDD27,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 26. "PDD26,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 25. "PDD25,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 24. "PDD24,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 23. "PDD23,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 22. "PDD22,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 21. "PDD21,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 20. "PDD20,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 19. "PDD19,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 18. "PDD18,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 17. "PDD17,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 16. "PDD16,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 15. "PDD15,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 14. "PDD14,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 13. "PDD13,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 12. "PDD12,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 11. "PDD11,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 10. "PDD10,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 9. "PDD9,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 8. "PDD8,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 7. "PDD7,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 6. "PDD6,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 5. "PDD5,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 4. "PDD4,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 3. "PDD3,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 2. "PDD2,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 1. "PDD1,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 0. "PDD0,Port Data Direction" "0: Input,1: Output"
line.long 0x4 "PIDR,Port Input Disable"
bitfld.long 0x4 31. "PID31,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 30. "PID30,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 29. "PID29,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 28. "PID28,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 27. "PID27,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 26. "PID26,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 25. "PID25,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 24. "PID24,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 23. "PID23,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 22. "PID22,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 21. "PID21,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 20. "PID20,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 19. "PID19,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 18. "PID18,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 17. "PID17,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 16. "PID16,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 15. "PID15,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 14. "PID14,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 13. "PID13,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 12. "PID12,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 11. "PID11,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 10. "PID10,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 9. "PID9,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 8. "PID8,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 7. "PID7,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 6. "PID6,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 5. "PID5,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 4. "PID4,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 3. "PID3,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 2. "PID2,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 1. "PID1,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 0. "PID0,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x60)++0x0
line.byte 0x0 "PDR[$1],Pin Data"
bitfld.byte 0x0 0. "PD,Pin Data (I/O)" "0: Logic zero,1: Logic one"
repeat.end
group.long 0x80++0x87
line.long 0x0 "ICR0,Interrupt Control 0"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4 "ICR1,Interrupt Control 1"
eventfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x8 "ICR2,Interrupt Control 2"
eventfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0xC "ICR3,Interrupt Control 3"
eventfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x10 "ICR4,Interrupt Control 4"
eventfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x14 "ICR5,Interrupt Control 5"
eventfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x18 "ICR6,Interrupt Control 6"
eventfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x1C "ICR7,Interrupt Control 7"
eventfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x20 "ICR8,Interrupt Control 8"
eventfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x24 "ICR9,Interrupt Control 9"
eventfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x28 "ICR10,Interrupt Control 10"
eventfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x2C "ICR11,Interrupt Control 11"
eventfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x30 "ICR12,Interrupt Control 12"
eventfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x34 "ICR13,Interrupt Control 13"
eventfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x38 "ICR14,Interrupt Control 14"
eventfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x3C "ICR15,Interrupt Control 15"
eventfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x40 "ICR16,Interrupt Control 16"
eventfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x44 "ICR17,Interrupt Control 17"
eventfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x48 "ICR18,Interrupt Control 18"
eventfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4C "ICR19,Interrupt Control 19"
eventfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x50 "ICR20,Interrupt Control 20"
eventfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x54 "ICR21,Interrupt Control 21"
eventfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x58 "ICR22,Interrupt Control 22"
eventfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x5C "ICR23,Interrupt Control 23"
eventfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x60 "ICR24,Interrupt Control 24"
eventfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x64 "ICR25,Interrupt Control 25"
eventfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x68 "ICR26,Interrupt Control 26"
eventfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x6C "ICR27,Interrupt Control 27"
eventfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x70 "ICR28,Interrupt Control 28"
eventfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x74 "ICR29,Interrupt Control 29"
eventfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x78 "ICR30,Interrupt Control 30"
eventfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x7C "ICR31,Interrupt Control 31"
eventfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x80 "GICLR,Global Interrupt Control Low"
hexmask.long.word 0x80 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x80 15. "GIWE15,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 14. "GIWE14,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 13. "GIWE13,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 12. "GIWE12,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 11. "GIWE11,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 10. "GIWE10,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 9. "GIWE9,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 8. "GIWE8,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 7. "GIWE7,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 6. "GIWE6,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 5. "GIWE5,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 4. "GIWE4,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 3. "GIWE3,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 2. "GIWE2,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 1. "GIWE1,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 0. "GIWE0,Global Interrupt Write Enable" "0: Not updated,1: Updated"
line.long 0x84 "GICHR,Global Interrupt Control High"
hexmask.long.word 0x84 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x84 15. "GIWE31,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 14. "GIWE30,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 13. "GIWE29,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 12. "GIWE28,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 11. "GIWE27,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 10. "GIWE26,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 9. "GIWE25,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 8. "GIWE24,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 7. "GIWE23,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 6. "GIWE22,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 5. "GIWE21,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 4. "GIWE20,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 3. "GIWE19,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 2. "GIWE18,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 1. "GIWE17,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 0. "GIWE16,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
group.long 0x120++0x3
line.long 0x0 "ISFR0,Interrupt Status Flag"
eventfld.long 0x0 31. "ISF31,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 30. "ISF30,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 29. "ISF29,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 28. "ISF28,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 27. "ISF27,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 26. "ISF26,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 25. "ISF25,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 24. "ISF24,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 23. "ISF23,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 22. "ISF22,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 21. "ISF21,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 20. "ISF20,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 19. "ISF19,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 18. "ISF18,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 17. "ISF17,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 16. "ISF16,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 15. "ISF15,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 14. "ISF14,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 13. "ISF13,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 12. "ISF12,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 11. "ISF11,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 10. "ISF10,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 9. "ISF9,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 8. "ISF8,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 7. "ISF7,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 6. "ISF6,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 5. "ISF5,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 4. "ISF4,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 3. "ISF3,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 2. "ISF2,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 1. "ISF1,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 0. "ISF0,Interrupt Status Flag" "0: Not detected,1: Detected"
tree.end
endif
sif (cpuis("MC?A156*"))
tree "GPIO0"
base ad:0x40102000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "IRQNUM,Interrupt Number"
group.long 0x40++0xF
line.long 0x0 "PDOR,Port Data Output"
bitfld.long 0x0 31. "PDO31,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 30. "PDO30,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 29. "PDO29,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 28. "PDO28,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 27. "PDO27,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 26. "PDO26,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 25. "PDO25,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 24. "PDO24,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 23. "PDO23,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 22. "PDO22,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 21. "PDO21,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 20. "PDO20,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 19. "PDO19,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 18. "PDO18,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 17. "PDO17,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 16. "PDO16,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 15. "PDO15,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 14. "PDO14,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 13. "PDO13,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 12. "PDO12,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 11. "PDO11,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 10. "PDO10,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 9. "PDO9,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 8. "PDO8,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 7. "PDO7,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 6. "PDO6,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 5. "PDO5,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 4. "PDO4,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 3. "PDO3,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 2. "PDO2,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 1. "PDO1,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 0. "PDO0,Port Data Output" "0: Logic level 0,1: Logic level 1"
line.long 0x4 "PSOR,Port Set Output"
bitfld.long 0x4 31. "PTSO31,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 30. "PTSO30,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 29. "PTSO29,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 28. "PTSO28,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 27. "PTSO27,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 26. "PTSO26,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 25. "PTSO25,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 24. "PTSO24,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 23. "PTSO23,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 22. "PTSO22,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 21. "PTSO21,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 20. "PTSO20,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 19. "PTSO19,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 18. "PTSO18,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 17. "PTSO17,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 16. "PTSO16,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 15. "PTSO15,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 14. "PTSO14,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 13. "PTSO13,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 12. "PTSO12,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 11. "PTSO11,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 10. "PTSO10,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 9. "PTSO9,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 8. "PTSO8,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 7. "PTSO7,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 6. "PTSO6,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 5. "PTSO5,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 4. "PTSO4,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 3. "PTSO3,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 2. "PTSO2,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 1. "PTSO1,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 0. "PTSO0,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
line.long 0x8 "PCOR,Port Clear Output"
bitfld.long 0x8 31. "PTCO31,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 30. "PTCO30,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 29. "PTCO29,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 28. "PTCO28,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 27. "PTCO27,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 26. "PTCO26,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 25. "PTCO25,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 24. "PTCO24,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 23. "PTCO23,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 22. "PTCO22,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 21. "PTCO21,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 20. "PTCO20,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 19. "PTCO19,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 18. "PTCO18,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 17. "PTCO17,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 16. "PTCO16,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 15. "PTCO15,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 14. "PTCO14,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 13. "PTCO13,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 12. "PTCO12,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 11. "PTCO11,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 10. "PTCO10,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 9. "PTCO9,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 8. "PTCO8,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 7. "PTCO7,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 6. "PTCO6,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 5. "PTCO5,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 4. "PTCO4,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 3. "PTCO3,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 2. "PTCO2,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 1. "PTCO1,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 0. "PTCO0,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
line.long 0xC "PTOR,Port Toggle Output"
bitfld.long 0xC 31. "PTTO31,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 30. "PTTO30,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 29. "PTTO29,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 28. "PTTO28,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 27. "PTTO27,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 26. "PTTO26,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 25. "PTTO25,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 24. "PTTO24,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 23. "PTTO23,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 22. "PTTO22,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 21. "PTTO21,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 20. "PTTO20,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 19. "PTTO19,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 18. "PTTO18,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 17. "PTTO17,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 16. "PTTO16,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 15. "PTTO15,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 14. "PTTO14,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 13. "PTTO13,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 12. "PTTO12,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 11. "PTTO11,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 10. "PTTO10,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 9. "PTTO9,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 8. "PTTO8,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 7. "PTTO7,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 6. "PTTO6,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 5. "PTTO5,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 4. "PTTO4,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 3. "PTTO3,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 2. "PTTO2,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 1. "PTTO1,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 0. "PTTO0,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
rgroup.long 0x50++0x3
line.long 0x0 "PDIR,Port Data Input"
bitfld.long 0x0 31. "PDI31,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 30. "PDI30,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 29. "PDI29,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 28. "PDI28,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 27. "PDI27,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 26. "PDI26,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 25. "PDI25,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 24. "PDI24,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 23. "PDI23,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 22. "PDI22,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 21. "PDI21,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 20. "PDI20,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 19. "PDI19,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 18. "PDI18,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 17. "PDI17,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 16. "PDI16,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 15. "PDI15,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 14. "PDI14,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 13. "PDI13,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 12. "PDI12,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 11. "PDI11,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 10. "PDI10,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 9. "PDI9,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 8. "PDI8,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 7. "PDI7,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 6. "PDI6,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 5. "PDI5,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 4. "PDI4,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 3. "PDI3,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 2. "PDI2,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 1. "PDI1,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 0. "PDI0,Port Data Input" "0: Logic 0,1: Logic 1"
group.long 0x54++0x7
line.long 0x0 "PDDR,Port Data Direction"
bitfld.long 0x0 31. "PDD31,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 30. "PDD30,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 29. "PDD29,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 28. "PDD28,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 27. "PDD27,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 26. "PDD26,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 25. "PDD25,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 24. "PDD24,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 23. "PDD23,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 22. "PDD22,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 21. "PDD21,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 20. "PDD20,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 19. "PDD19,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 18. "PDD18,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 17. "PDD17,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 16. "PDD16,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 15. "PDD15,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 14. "PDD14,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 13. "PDD13,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 12. "PDD12,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 11. "PDD11,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 10. "PDD10,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 9. "PDD9,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 8. "PDD8,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 7. "PDD7,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 6. "PDD6,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 5. "PDD5,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 4. "PDD4,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 3. "PDD3,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 2. "PDD2,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 1. "PDD1,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 0. "PDD0,Port Data Direction" "0: Input,1: Output"
line.long 0x4 "PIDR,Port Input Disable"
bitfld.long 0x4 31. "PID31,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 30. "PID30,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 29. "PID29,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 28. "PID28,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 27. "PID27,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 26. "PID26,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 25. "PID25,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 24. "PID24,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 23. "PID23,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 22. "PID22,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 21. "PID21,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 20. "PID20,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 19. "PID19,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 18. "PID18,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 17. "PID17,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 16. "PID16,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 15. "PID15,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 14. "PID14,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 13. "PID13,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 12. "PID12,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 11. "PID11,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 10. "PID10,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 9. "PID9,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 8. "PID8,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 7. "PID7,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 6. "PID6,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 5. "PID5,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 4. "PID4,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 3. "PID3,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 2. "PID2,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 1. "PID1,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 0. "PID0,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x60)++0x0
line.byte 0x0 "PDR[$1],Pin Data"
bitfld.byte 0x0 0. "PD,Pin Data (I/O)" "0: Logic zero,1: Logic one"
repeat.end
group.long 0x80++0x87
line.long 0x0 "ICR0,Interrupt Control 0"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4 "ICR1,Interrupt Control 1"
eventfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x8 "ICR2,Interrupt Control 2"
eventfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0xC "ICR3,Interrupt Control 3"
eventfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x10 "ICR4,Interrupt Control 4"
eventfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x14 "ICR5,Interrupt Control 5"
eventfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x18 "ICR6,Interrupt Control 6"
eventfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x1C "ICR7,Interrupt Control 7"
eventfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x20 "ICR8,Interrupt Control 8"
eventfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x24 "ICR9,Interrupt Control 9"
eventfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x28 "ICR10,Interrupt Control 10"
eventfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x2C "ICR11,Interrupt Control 11"
eventfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x30 "ICR12,Interrupt Control 12"
eventfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x34 "ICR13,Interrupt Control 13"
eventfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x38 "ICR14,Interrupt Control 14"
eventfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x3C "ICR15,Interrupt Control 15"
eventfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x40 "ICR16,Interrupt Control 16"
eventfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x44 "ICR17,Interrupt Control 17"
eventfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x48 "ICR18,Interrupt Control 18"
eventfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4C "ICR19,Interrupt Control 19"
eventfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x50 "ICR20,Interrupt Control 20"
eventfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x54 "ICR21,Interrupt Control 21"
eventfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x58 "ICR22,Interrupt Control 22"
eventfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x5C "ICR23,Interrupt Control 23"
eventfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x60 "ICR24,Interrupt Control 24"
eventfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x64 "ICR25,Interrupt Control 25"
eventfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x68 "ICR26,Interrupt Control 26"
eventfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x6C "ICR27,Interrupt Control 27"
eventfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x70 "ICR28,Interrupt Control 28"
eventfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x74 "ICR29,Interrupt Control 29"
eventfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x78 "ICR30,Interrupt Control 30"
eventfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x7C "ICR31,Interrupt Control 31"
eventfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x80 "GICLR,Global Interrupt Control Low"
hexmask.long.word 0x80 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x80 15. "GIWE15,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 14. "GIWE14,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 13. "GIWE13,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 12. "GIWE12,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 11. "GIWE11,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 10. "GIWE10,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 9. "GIWE9,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 8. "GIWE8,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 7. "GIWE7,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 6. "GIWE6,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 5. "GIWE5,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 4. "GIWE4,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 3. "GIWE3,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 2. "GIWE2,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 1. "GIWE1,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 0. "GIWE0,Global Interrupt Write Enable" "0: Not updated,1: Updated"
line.long 0x84 "GICHR,Global Interrupt Control High"
hexmask.long.word 0x84 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x84 15. "GIWE31,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 14. "GIWE30,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 13. "GIWE29,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 12. "GIWE28,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 11. "GIWE27,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 10. "GIWE26,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 9. "GIWE25,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 8. "GIWE24,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 7. "GIWE23,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 6. "GIWE22,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 5. "GIWE21,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 4. "GIWE20,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 3. "GIWE19,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 2. "GIWE18,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 1. "GIWE17,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 0. "GIWE16,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
group.long 0x120++0x3
line.long 0x0 "ISFR0,Interrupt Status Flag"
eventfld.long 0x0 31. "ISF31,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 30. "ISF30,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 29. "ISF29,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 28. "ISF28,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 27. "ISF27,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 26. "ISF26,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 25. "ISF25,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 24. "ISF24,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 23. "ISF23,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 22. "ISF22,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 21. "ISF21,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 20. "ISF20,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 19. "ISF19,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 18. "ISF18,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 17. "ISF17,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 16. "ISF16,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 15. "ISF15,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 14. "ISF14,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 13. "ISF13,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 12. "ISF12,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 11. "ISF11,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 10. "ISF10,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 9. "ISF9,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 8. "ISF8,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 7. "ISF7,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 6. "ISF6,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 5. "ISF5,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 4. "ISF4,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 3. "ISF3,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 2. "ISF2,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 1. "ISF1,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 0. "ISF0,Interrupt Status Flag" "0: Not detected,1: Detected"
tree.end
tree "GPIO1"
base ad:0x40103000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "IRQNUM,Interrupt Number"
group.long 0x40++0xF
line.long 0x0 "PDOR,Port Data Output"
bitfld.long 0x0 31. "PDO31,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 30. "PDO30,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 29. "PDO29,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 28. "PDO28,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 27. "PDO27,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 26. "PDO26,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 25. "PDO25,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 24. "PDO24,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 23. "PDO23,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 22. "PDO22,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 21. "PDO21,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 20. "PDO20,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 19. "PDO19,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 18. "PDO18,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 17. "PDO17,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 16. "PDO16,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 15. "PDO15,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 14. "PDO14,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 13. "PDO13,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 12. "PDO12,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 11. "PDO11,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 10. "PDO10,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 9. "PDO9,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 8. "PDO8,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 7. "PDO7,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 6. "PDO6,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 5. "PDO5,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 4. "PDO4,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 3. "PDO3,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 2. "PDO2,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 1. "PDO1,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 0. "PDO0,Port Data Output" "0: Logic level 0,1: Logic level 1"
line.long 0x4 "PSOR,Port Set Output"
bitfld.long 0x4 31. "PTSO31,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 30. "PTSO30,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 29. "PTSO29,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 28. "PTSO28,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 27. "PTSO27,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 26. "PTSO26,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 25. "PTSO25,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 24. "PTSO24,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 23. "PTSO23,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 22. "PTSO22,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 21. "PTSO21,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 20. "PTSO20,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 19. "PTSO19,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 18. "PTSO18,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 17. "PTSO17,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 16. "PTSO16,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 15. "PTSO15,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 14. "PTSO14,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 13. "PTSO13,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 12. "PTSO12,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 11. "PTSO11,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 10. "PTSO10,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 9. "PTSO9,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 8. "PTSO8,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 7. "PTSO7,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 6. "PTSO6,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 5. "PTSO5,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 4. "PTSO4,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 3. "PTSO3,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 2. "PTSO2,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 1. "PTSO1,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 0. "PTSO0,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
line.long 0x8 "PCOR,Port Clear Output"
bitfld.long 0x8 31. "PTCO31,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 30. "PTCO30,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 29. "PTCO29,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 28. "PTCO28,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 27. "PTCO27,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 26. "PTCO26,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 25. "PTCO25,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 24. "PTCO24,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 23. "PTCO23,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 22. "PTCO22,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 21. "PTCO21,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 20. "PTCO20,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 19. "PTCO19,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 18. "PTCO18,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 17. "PTCO17,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 16. "PTCO16,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 15. "PTCO15,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 14. "PTCO14,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 13. "PTCO13,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 12. "PTCO12,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 11. "PTCO11,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 10. "PTCO10,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 9. "PTCO9,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 8. "PTCO8,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 7. "PTCO7,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 6. "PTCO6,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 5. "PTCO5,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 4. "PTCO4,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 3. "PTCO3,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 2. "PTCO2,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 1. "PTCO1,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 0. "PTCO0,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
line.long 0xC "PTOR,Port Toggle Output"
bitfld.long 0xC 31. "PTTO31,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 30. "PTTO30,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 29. "PTTO29,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 28. "PTTO28,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 27. "PTTO27,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 26. "PTTO26,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 25. "PTTO25,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 24. "PTTO24,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 23. "PTTO23,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 22. "PTTO22,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 21. "PTTO21,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 20. "PTTO20,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 19. "PTTO19,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 18. "PTTO18,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 17. "PTTO17,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 16. "PTTO16,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 15. "PTTO15,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 14. "PTTO14,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 13. "PTTO13,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 12. "PTTO12,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 11. "PTTO11,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 10. "PTTO10,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 9. "PTTO9,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 8. "PTTO8,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 7. "PTTO7,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 6. "PTTO6,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 5. "PTTO5,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 4. "PTTO4,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 3. "PTTO3,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 2. "PTTO2,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 1. "PTTO1,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 0. "PTTO0,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
rgroup.long 0x50++0x3
line.long 0x0 "PDIR,Port Data Input"
bitfld.long 0x0 31. "PDI31,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 30. "PDI30,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 29. "PDI29,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 28. "PDI28,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 27. "PDI27,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 26. "PDI26,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 25. "PDI25,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 24. "PDI24,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 23. "PDI23,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 22. "PDI22,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 21. "PDI21,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 20. "PDI20,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 19. "PDI19,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 18. "PDI18,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 17. "PDI17,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 16. "PDI16,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 15. "PDI15,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 14. "PDI14,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 13. "PDI13,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 12. "PDI12,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 11. "PDI11,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 10. "PDI10,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 9. "PDI9,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 8. "PDI8,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 7. "PDI7,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 6. "PDI6,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 5. "PDI5,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 4. "PDI4,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 3. "PDI3,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 2. "PDI2,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 1. "PDI1,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 0. "PDI0,Port Data Input" "0: Logic 0,1: Logic 1"
group.long 0x54++0x7
line.long 0x0 "PDDR,Port Data Direction"
bitfld.long 0x0 31. "PDD31,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 30. "PDD30,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 29. "PDD29,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 28. "PDD28,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 27. "PDD27,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 26. "PDD26,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 25. "PDD25,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 24. "PDD24,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 23. "PDD23,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 22. "PDD22,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 21. "PDD21,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 20. "PDD20,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 19. "PDD19,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 18. "PDD18,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 17. "PDD17,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 16. "PDD16,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 15. "PDD15,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 14. "PDD14,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 13. "PDD13,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 12. "PDD12,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 11. "PDD11,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 10. "PDD10,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 9. "PDD9,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 8. "PDD8,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 7. "PDD7,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 6. "PDD6,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 5. "PDD5,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 4. "PDD4,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 3. "PDD3,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 2. "PDD2,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 1. "PDD1,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 0. "PDD0,Port Data Direction" "0: Input,1: Output"
line.long 0x4 "PIDR,Port Input Disable"
bitfld.long 0x4 31. "PID31,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 30. "PID30,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 29. "PID29,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 28. "PID28,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 27. "PID27,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 26. "PID26,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 25. "PID25,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 24. "PID24,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 23. "PID23,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 22. "PID22,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 21. "PID21,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 20. "PID20,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 19. "PID19,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 18. "PID18,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 17. "PID17,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 16. "PID16,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 15. "PID15,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 14. "PID14,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 13. "PID13,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 12. "PID12,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 11. "PID11,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 10. "PID10,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 9. "PID9,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 8. "PID8,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 7. "PID7,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 6. "PID6,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 5. "PID5,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 4. "PID4,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 3. "PID3,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 2. "PID2,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 1. "PID1,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 0. "PID0,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x60)++0x0
line.byte 0x0 "PDR[$1],Pin Data"
bitfld.byte 0x0 0. "PD,Pin Data (I/O)" "0: Logic zero,1: Logic one"
repeat.end
group.long 0x80++0x87
line.long 0x0 "ICR0,Interrupt Control 0"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4 "ICR1,Interrupt Control 1"
eventfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x8 "ICR2,Interrupt Control 2"
eventfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0xC "ICR3,Interrupt Control 3"
eventfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x10 "ICR4,Interrupt Control 4"
eventfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x14 "ICR5,Interrupt Control 5"
eventfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x18 "ICR6,Interrupt Control 6"
eventfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x1C "ICR7,Interrupt Control 7"
eventfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x20 "ICR8,Interrupt Control 8"
eventfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x24 "ICR9,Interrupt Control 9"
eventfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x28 "ICR10,Interrupt Control 10"
eventfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x2C "ICR11,Interrupt Control 11"
eventfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x30 "ICR12,Interrupt Control 12"
eventfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x34 "ICR13,Interrupt Control 13"
eventfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x38 "ICR14,Interrupt Control 14"
eventfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x3C "ICR15,Interrupt Control 15"
eventfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x40 "ICR16,Interrupt Control 16"
eventfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x44 "ICR17,Interrupt Control 17"
eventfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x48 "ICR18,Interrupt Control 18"
eventfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4C "ICR19,Interrupt Control 19"
eventfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x50 "ICR20,Interrupt Control 20"
eventfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x54 "ICR21,Interrupt Control 21"
eventfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x58 "ICR22,Interrupt Control 22"
eventfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x5C "ICR23,Interrupt Control 23"
eventfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x60 "ICR24,Interrupt Control 24"
eventfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x64 "ICR25,Interrupt Control 25"
eventfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x68 "ICR26,Interrupt Control 26"
eventfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x6C "ICR27,Interrupt Control 27"
eventfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x70 "ICR28,Interrupt Control 28"
eventfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x74 "ICR29,Interrupt Control 29"
eventfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x78 "ICR30,Interrupt Control 30"
eventfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x7C "ICR31,Interrupt Control 31"
eventfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x80 "GICLR,Global Interrupt Control Low"
hexmask.long.word 0x80 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x80 15. "GIWE15,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 14. "GIWE14,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 13. "GIWE13,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 12. "GIWE12,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 11. "GIWE11,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 10. "GIWE10,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 9. "GIWE9,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 8. "GIWE8,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 7. "GIWE7,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 6. "GIWE6,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 5. "GIWE5,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 4. "GIWE4,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 3. "GIWE3,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 2. "GIWE2,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 1. "GIWE1,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 0. "GIWE0,Global Interrupt Write Enable" "0: Not updated,1: Updated"
line.long 0x84 "GICHR,Global Interrupt Control High"
hexmask.long.word 0x84 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x84 15. "GIWE31,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 14. "GIWE30,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 13. "GIWE29,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 12. "GIWE28,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 11. "GIWE27,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 10. "GIWE26,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 9. "GIWE25,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 8. "GIWE24,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 7. "GIWE23,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 6. "GIWE22,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 5. "GIWE21,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 4. "GIWE20,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 3. "GIWE19,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 2. "GIWE18,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 1. "GIWE17,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 0. "GIWE16,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
group.long 0x120++0x3
line.long 0x0 "ISFR0,Interrupt Status Flag"
eventfld.long 0x0 31. "ISF31,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 30. "ISF30,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 29. "ISF29,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 28. "ISF28,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 27. "ISF27,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 26. "ISF26,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 25. "ISF25,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 24. "ISF24,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 23. "ISF23,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 22. "ISF22,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 21. "ISF21,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 20. "ISF20,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 19. "ISF19,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 18. "ISF18,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 17. "ISF17,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 16. "ISF16,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 15. "ISF15,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 14. "ISF14,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 13. "ISF13,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 12. "ISF12,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 11. "ISF11,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 10. "ISF10,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 9. "ISF9,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 8. "ISF8,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 7. "ISF7,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 6. "ISF6,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 5. "ISF5,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 4. "ISF4,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 3. "ISF3,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 2. "ISF2,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 1. "ISF1,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 0. "ISF0,Interrupt Status Flag" "0: Not detected,1: Detected"
tree.end
tree "GPIO2"
base ad:0x40104000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "IRQNUM,Interrupt Number"
group.long 0x40++0xF
line.long 0x0 "PDOR,Port Data Output"
bitfld.long 0x0 31. "PDO31,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 30. "PDO30,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 29. "PDO29,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 28. "PDO28,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 27. "PDO27,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 26. "PDO26,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 25. "PDO25,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 24. "PDO24,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 23. "PDO23,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 22. "PDO22,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 21. "PDO21,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 20. "PDO20,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 19. "PDO19,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 18. "PDO18,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 17. "PDO17,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 16. "PDO16,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 15. "PDO15,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 14. "PDO14,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 13. "PDO13,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 12. "PDO12,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 11. "PDO11,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 10. "PDO10,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 9. "PDO9,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 8. "PDO8,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 7. "PDO7,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 6. "PDO6,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 5. "PDO5,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 4. "PDO4,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 3. "PDO3,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 2. "PDO2,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 1. "PDO1,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 0. "PDO0,Port Data Output" "0: Logic level 0,1: Logic level 1"
line.long 0x4 "PSOR,Port Set Output"
bitfld.long 0x4 31. "PTSO31,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 30. "PTSO30,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 29. "PTSO29,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 28. "PTSO28,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 27. "PTSO27,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 26. "PTSO26,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 25. "PTSO25,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 24. "PTSO24,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 23. "PTSO23,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 22. "PTSO22,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 21. "PTSO21,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 20. "PTSO20,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 19. "PTSO19,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 18. "PTSO18,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 17. "PTSO17,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 16. "PTSO16,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 15. "PTSO15,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 14. "PTSO14,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 13. "PTSO13,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 12. "PTSO12,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 11. "PTSO11,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 10. "PTSO10,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 9. "PTSO9,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 8. "PTSO8,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 7. "PTSO7,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 6. "PTSO6,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 5. "PTSO5,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 4. "PTSO4,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 3. "PTSO3,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 2. "PTSO2,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 1. "PTSO1,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 0. "PTSO0,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
line.long 0x8 "PCOR,Port Clear Output"
bitfld.long 0x8 31. "PTCO31,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 30. "PTCO30,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 29. "PTCO29,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 28. "PTCO28,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 27. "PTCO27,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 26. "PTCO26,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 25. "PTCO25,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 24. "PTCO24,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 23. "PTCO23,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 22. "PTCO22,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 21. "PTCO21,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 20. "PTCO20,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 19. "PTCO19,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 18. "PTCO18,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 17. "PTCO17,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 16. "PTCO16,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 15. "PTCO15,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 14. "PTCO14,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 13. "PTCO13,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 12. "PTCO12,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 11. "PTCO11,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 10. "PTCO10,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 9. "PTCO9,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 8. "PTCO8,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 7. "PTCO7,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 6. "PTCO6,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 5. "PTCO5,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 4. "PTCO4,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 3. "PTCO3,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 2. "PTCO2,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 1. "PTCO1,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 0. "PTCO0,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
line.long 0xC "PTOR,Port Toggle Output"
bitfld.long 0xC 31. "PTTO31,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 30. "PTTO30,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 29. "PTTO29,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 28. "PTTO28,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 27. "PTTO27,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 26. "PTTO26,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 25. "PTTO25,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 24. "PTTO24,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 23. "PTTO23,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 22. "PTTO22,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 21. "PTTO21,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 20. "PTTO20,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 19. "PTTO19,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 18. "PTTO18,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 17. "PTTO17,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 16. "PTTO16,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 15. "PTTO15,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 14. "PTTO14,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 13. "PTTO13,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 12. "PTTO12,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 11. "PTTO11,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 10. "PTTO10,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 9. "PTTO9,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 8. "PTTO8,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 7. "PTTO7,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 6. "PTTO6,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 5. "PTTO5,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 4. "PTTO4,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 3. "PTTO3,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 2. "PTTO2,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 1. "PTTO1,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 0. "PTTO0,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
rgroup.long 0x50++0x3
line.long 0x0 "PDIR,Port Data Input"
bitfld.long 0x0 31. "PDI31,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 30. "PDI30,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 29. "PDI29,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 28. "PDI28,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 27. "PDI27,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 26. "PDI26,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 25. "PDI25,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 24. "PDI24,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 23. "PDI23,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 22. "PDI22,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 21. "PDI21,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 20. "PDI20,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 19. "PDI19,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 18. "PDI18,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 17. "PDI17,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 16. "PDI16,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 15. "PDI15,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 14. "PDI14,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 13. "PDI13,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 12. "PDI12,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 11. "PDI11,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 10. "PDI10,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 9. "PDI9,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 8. "PDI8,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 7. "PDI7,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 6. "PDI6,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 5. "PDI5,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 4. "PDI4,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 3. "PDI3,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 2. "PDI2,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 1. "PDI1,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 0. "PDI0,Port Data Input" "0: Logic 0,1: Logic 1"
group.long 0x54++0x7
line.long 0x0 "PDDR,Port Data Direction"
bitfld.long 0x0 31. "PDD31,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 30. "PDD30,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 29. "PDD29,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 28. "PDD28,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 27. "PDD27,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 26. "PDD26,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 25. "PDD25,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 24. "PDD24,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 23. "PDD23,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 22. "PDD22,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 21. "PDD21,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 20. "PDD20,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 19. "PDD19,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 18. "PDD18,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 17. "PDD17,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 16. "PDD16,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 15. "PDD15,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 14. "PDD14,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 13. "PDD13,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 12. "PDD12,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 11. "PDD11,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 10. "PDD10,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 9. "PDD9,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 8. "PDD8,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 7. "PDD7,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 6. "PDD6,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 5. "PDD5,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 4. "PDD4,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 3. "PDD3,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 2. "PDD2,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 1. "PDD1,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 0. "PDD0,Port Data Direction" "0: Input,1: Output"
line.long 0x4 "PIDR,Port Input Disable"
bitfld.long 0x4 31. "PID31,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 30. "PID30,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 29. "PID29,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 28. "PID28,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 27. "PID27,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 26. "PID26,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 25. "PID25,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 24. "PID24,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 23. "PID23,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 22. "PID22,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 21. "PID21,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 20. "PID20,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 19. "PID19,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 18. "PID18,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 17. "PID17,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 16. "PID16,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 15. "PID15,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 14. "PID14,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 13. "PID13,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 12. "PID12,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 11. "PID11,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 10. "PID10,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 9. "PID9,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 8. "PID8,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 7. "PID7,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 6. "PID6,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 5. "PID5,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 4. "PID4,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 3. "PID3,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 2. "PID2,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 1. "PID1,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 0. "PID0,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x60)++0x0
line.byte 0x0 "PDR[$1],Pin Data"
bitfld.byte 0x0 0. "PD,Pin Data (I/O)" "0: Logic zero,1: Logic one"
repeat.end
group.long 0x80++0x87
line.long 0x0 "ICR0,Interrupt Control 0"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4 "ICR1,Interrupt Control 1"
eventfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x8 "ICR2,Interrupt Control 2"
eventfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0xC "ICR3,Interrupt Control 3"
eventfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x10 "ICR4,Interrupt Control 4"
eventfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x14 "ICR5,Interrupt Control 5"
eventfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x18 "ICR6,Interrupt Control 6"
eventfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x1C "ICR7,Interrupt Control 7"
eventfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x20 "ICR8,Interrupt Control 8"
eventfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x24 "ICR9,Interrupt Control 9"
eventfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x28 "ICR10,Interrupt Control 10"
eventfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x2C "ICR11,Interrupt Control 11"
eventfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x30 "ICR12,Interrupt Control 12"
eventfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x34 "ICR13,Interrupt Control 13"
eventfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x38 "ICR14,Interrupt Control 14"
eventfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x3C "ICR15,Interrupt Control 15"
eventfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x40 "ICR16,Interrupt Control 16"
eventfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x44 "ICR17,Interrupt Control 17"
eventfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x48 "ICR18,Interrupt Control 18"
eventfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4C "ICR19,Interrupt Control 19"
eventfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x50 "ICR20,Interrupt Control 20"
eventfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x54 "ICR21,Interrupt Control 21"
eventfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x58 "ICR22,Interrupt Control 22"
eventfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x5C "ICR23,Interrupt Control 23"
eventfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x60 "ICR24,Interrupt Control 24"
eventfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x64 "ICR25,Interrupt Control 25"
eventfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x68 "ICR26,Interrupt Control 26"
eventfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x6C "ICR27,Interrupt Control 27"
eventfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x70 "ICR28,Interrupt Control 28"
eventfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x74 "ICR29,Interrupt Control 29"
eventfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x78 "ICR30,Interrupt Control 30"
eventfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x7C "ICR31,Interrupt Control 31"
eventfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x80 "GICLR,Global Interrupt Control Low"
hexmask.long.word 0x80 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x80 15. "GIWE15,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 14. "GIWE14,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 13. "GIWE13,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 12. "GIWE12,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 11. "GIWE11,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 10. "GIWE10,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 9. "GIWE9,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 8. "GIWE8,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 7. "GIWE7,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 6. "GIWE6,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 5. "GIWE5,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 4. "GIWE4,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 3. "GIWE3,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 2. "GIWE2,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 1. "GIWE1,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 0. "GIWE0,Global Interrupt Write Enable" "0: Not updated,1: Updated"
line.long 0x84 "GICHR,Global Interrupt Control High"
hexmask.long.word 0x84 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x84 15. "GIWE31,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 14. "GIWE30,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 13. "GIWE29,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 12. "GIWE28,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 11. "GIWE27,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 10. "GIWE26,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 9. "GIWE25,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 8. "GIWE24,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 7. "GIWE23,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 6. "GIWE22,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 5. "GIWE21,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 4. "GIWE20,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 3. "GIWE19,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 2. "GIWE18,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 1. "GIWE17,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 0. "GIWE16,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
group.long 0x120++0x3
line.long 0x0 "ISFR0,Interrupt Status Flag"
eventfld.long 0x0 31. "ISF31,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 30. "ISF30,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 29. "ISF29,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 28. "ISF28,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 27. "ISF27,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 26. "ISF26,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 25. "ISF25,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 24. "ISF24,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 23. "ISF23,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 22. "ISF22,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 21. "ISF21,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 20. "ISF20,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 19. "ISF19,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 18. "ISF18,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 17. "ISF17,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 16. "ISF16,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 15. "ISF15,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 14. "ISF14,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 13. "ISF13,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 12. "ISF12,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 11. "ISF11,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 10. "ISF10,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 9. "ISF9,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 8. "ISF8,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 7. "ISF7,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 6. "ISF6,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 5. "ISF5,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 4. "ISF4,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 3. "ISF3,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 2. "ISF2,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 1. "ISF1,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 0. "ISF0,Interrupt Status Flag" "0: Not detected,1: Detected"
tree.end
tree "GPIO3"
base ad:0x40105000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "IRQNUM,Interrupt Number"
group.long 0x40++0xF
line.long 0x0 "PDOR,Port Data Output"
bitfld.long 0x0 31. "PDO31,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 30. "PDO30,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 29. "PDO29,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 28. "PDO28,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 27. "PDO27,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 26. "PDO26,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 25. "PDO25,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 24. "PDO24,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 23. "PDO23,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 22. "PDO22,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 21. "PDO21,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 20. "PDO20,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 19. "PDO19,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 18. "PDO18,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 17. "PDO17,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 16. "PDO16,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 15. "PDO15,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 14. "PDO14,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 13. "PDO13,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 12. "PDO12,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 11. "PDO11,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 10. "PDO10,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 9. "PDO9,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 8. "PDO8,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 7. "PDO7,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 6. "PDO6,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 5. "PDO5,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 4. "PDO4,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 3. "PDO3,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 2. "PDO2,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 1. "PDO1,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 0. "PDO0,Port Data Output" "0: Logic level 0,1: Logic level 1"
line.long 0x4 "PSOR,Port Set Output"
bitfld.long 0x4 31. "PTSO31,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 30. "PTSO30,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 29. "PTSO29,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 28. "PTSO28,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 27. "PTSO27,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 26. "PTSO26,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 25. "PTSO25,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 24. "PTSO24,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 23. "PTSO23,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 22. "PTSO22,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 21. "PTSO21,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 20. "PTSO20,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 19. "PTSO19,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 18. "PTSO18,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 17. "PTSO17,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 16. "PTSO16,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 15. "PTSO15,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 14. "PTSO14,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 13. "PTSO13,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 12. "PTSO12,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 11. "PTSO11,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 10. "PTSO10,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 9. "PTSO9,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 8. "PTSO8,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 7. "PTSO7,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 6. "PTSO6,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 5. "PTSO5,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 4. "PTSO4,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 3. "PTSO3,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 2. "PTSO2,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 1. "PTSO1,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 0. "PTSO0,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
line.long 0x8 "PCOR,Port Clear Output"
bitfld.long 0x8 31. "PTCO31,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 30. "PTCO30,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 29. "PTCO29,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 28. "PTCO28,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 27. "PTCO27,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 26. "PTCO26,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 25. "PTCO25,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 24. "PTCO24,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 23. "PTCO23,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 22. "PTCO22,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 21. "PTCO21,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 20. "PTCO20,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 19. "PTCO19,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 18. "PTCO18,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 17. "PTCO17,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 16. "PTCO16,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 15. "PTCO15,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 14. "PTCO14,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 13. "PTCO13,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 12. "PTCO12,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 11. "PTCO11,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 10. "PTCO10,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 9. "PTCO9,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 8. "PTCO8,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 7. "PTCO7,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 6. "PTCO6,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 5. "PTCO5,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 4. "PTCO4,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 3. "PTCO3,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 2. "PTCO2,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 1. "PTCO1,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 0. "PTCO0,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
line.long 0xC "PTOR,Port Toggle Output"
bitfld.long 0xC 31. "PTTO31,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 30. "PTTO30,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 29. "PTTO29,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 28. "PTTO28,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 27. "PTTO27,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 26. "PTTO26,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 25. "PTTO25,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 24. "PTTO24,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 23. "PTTO23,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 22. "PTTO22,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 21. "PTTO21,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 20. "PTTO20,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 19. "PTTO19,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 18. "PTTO18,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 17. "PTTO17,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 16. "PTTO16,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 15. "PTTO15,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 14. "PTTO14,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 13. "PTTO13,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 12. "PTTO12,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 11. "PTTO11,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 10. "PTTO10,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 9. "PTTO9,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 8. "PTTO8,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 7. "PTTO7,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 6. "PTTO6,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 5. "PTTO5,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 4. "PTTO4,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 3. "PTTO3,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 2. "PTTO2,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 1. "PTTO1,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 0. "PTTO0,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
rgroup.long 0x50++0x3
line.long 0x0 "PDIR,Port Data Input"
bitfld.long 0x0 31. "PDI31,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 30. "PDI30,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 29. "PDI29,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 28. "PDI28,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 27. "PDI27,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 26. "PDI26,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 25. "PDI25,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 24. "PDI24,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 23. "PDI23,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 22. "PDI22,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 21. "PDI21,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 20. "PDI20,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 19. "PDI19,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 18. "PDI18,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 17. "PDI17,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 16. "PDI16,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 15. "PDI15,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 14. "PDI14,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 13. "PDI13,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 12. "PDI12,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 11. "PDI11,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 10. "PDI10,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 9. "PDI9,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 8. "PDI8,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 7. "PDI7,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 6. "PDI6,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 5. "PDI5,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 4. "PDI4,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 3. "PDI3,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 2. "PDI2,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 1. "PDI1,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 0. "PDI0,Port Data Input" "0: Logic 0,1: Logic 1"
group.long 0x54++0x7
line.long 0x0 "PDDR,Port Data Direction"
bitfld.long 0x0 31. "PDD31,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 30. "PDD30,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 29. "PDD29,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 28. "PDD28,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 27. "PDD27,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 26. "PDD26,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 25. "PDD25,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 24. "PDD24,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 23. "PDD23,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 22. "PDD22,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 21. "PDD21,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 20. "PDD20,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 19. "PDD19,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 18. "PDD18,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 17. "PDD17,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 16. "PDD16,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 15. "PDD15,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 14. "PDD14,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 13. "PDD13,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 12. "PDD12,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 11. "PDD11,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 10. "PDD10,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 9. "PDD9,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 8. "PDD8,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 7. "PDD7,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 6. "PDD6,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 5. "PDD5,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 4. "PDD4,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 3. "PDD3,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 2. "PDD2,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 1. "PDD1,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 0. "PDD0,Port Data Direction" "0: Input,1: Output"
line.long 0x4 "PIDR,Port Input Disable"
bitfld.long 0x4 31. "PID31,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 30. "PID30,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 29. "PID29,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 28. "PID28,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 27. "PID27,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 26. "PID26,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 25. "PID25,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 24. "PID24,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 23. "PID23,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 22. "PID22,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 21. "PID21,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 20. "PID20,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 19. "PID19,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 18. "PID18,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 17. "PID17,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 16. "PID16,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 15. "PID15,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 14. "PID14,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 13. "PID13,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 12. "PID12,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 11. "PID11,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 10. "PID10,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 9. "PID9,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 8. "PID8,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 7. "PID7,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 6. "PID6,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 5. "PID5,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 4. "PID4,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 3. "PID3,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 2. "PID2,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 1. "PID1,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 0. "PID0,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x60)++0x0
line.byte 0x0 "PDR[$1],Pin Data"
bitfld.byte 0x0 0. "PD,Pin Data (I/O)" "0: Logic zero,1: Logic one"
repeat.end
group.long 0x80++0x87
line.long 0x0 "ICR0,Interrupt Control 0"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4 "ICR1,Interrupt Control 1"
eventfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x8 "ICR2,Interrupt Control 2"
eventfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0xC "ICR3,Interrupt Control 3"
eventfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x10 "ICR4,Interrupt Control 4"
eventfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x14 "ICR5,Interrupt Control 5"
eventfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x18 "ICR6,Interrupt Control 6"
eventfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x1C "ICR7,Interrupt Control 7"
eventfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x20 "ICR8,Interrupt Control 8"
eventfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x24 "ICR9,Interrupt Control 9"
eventfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x28 "ICR10,Interrupt Control 10"
eventfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x2C "ICR11,Interrupt Control 11"
eventfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x30 "ICR12,Interrupt Control 12"
eventfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x34 "ICR13,Interrupt Control 13"
eventfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x38 "ICR14,Interrupt Control 14"
eventfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x3C "ICR15,Interrupt Control 15"
eventfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x40 "ICR16,Interrupt Control 16"
eventfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x44 "ICR17,Interrupt Control 17"
eventfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x48 "ICR18,Interrupt Control 18"
eventfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4C "ICR19,Interrupt Control 19"
eventfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x50 "ICR20,Interrupt Control 20"
eventfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x54 "ICR21,Interrupt Control 21"
eventfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x58 "ICR22,Interrupt Control 22"
eventfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x5C "ICR23,Interrupt Control 23"
eventfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x60 "ICR24,Interrupt Control 24"
eventfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x64 "ICR25,Interrupt Control 25"
eventfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x68 "ICR26,Interrupt Control 26"
eventfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x6C "ICR27,Interrupt Control 27"
eventfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x70 "ICR28,Interrupt Control 28"
eventfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x74 "ICR29,Interrupt Control 29"
eventfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x78 "ICR30,Interrupt Control 30"
eventfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x7C "ICR31,Interrupt Control 31"
eventfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x80 "GICLR,Global Interrupt Control Low"
hexmask.long.word 0x80 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x80 15. "GIWE15,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 14. "GIWE14,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 13. "GIWE13,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 12. "GIWE12,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 11. "GIWE11,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 10. "GIWE10,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 9. "GIWE9,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 8. "GIWE8,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 7. "GIWE7,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 6. "GIWE6,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 5. "GIWE5,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 4. "GIWE4,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 3. "GIWE3,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 2. "GIWE2,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 1. "GIWE1,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 0. "GIWE0,Global Interrupt Write Enable" "0: Not updated,1: Updated"
line.long 0x84 "GICHR,Global Interrupt Control High"
hexmask.long.word 0x84 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x84 15. "GIWE31,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 14. "GIWE30,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 13. "GIWE29,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 12. "GIWE28,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 11. "GIWE27,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 10. "GIWE26,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 9. "GIWE25,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 8. "GIWE24,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 7. "GIWE23,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 6. "GIWE22,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 5. "GIWE21,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 4. "GIWE20,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 3. "GIWE19,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 2. "GIWE18,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 1. "GIWE17,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 0. "GIWE16,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
group.long 0x120++0x3
line.long 0x0 "ISFR0,Interrupt Status Flag"
eventfld.long 0x0 31. "ISF31,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 30. "ISF30,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 29. "ISF29,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 28. "ISF28,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 27. "ISF27,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 26. "ISF26,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 25. "ISF25,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 24. "ISF24,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 23. "ISF23,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 22. "ISF22,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 21. "ISF21,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 20. "ISF20,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 19. "ISF19,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 18. "ISF18,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 17. "ISF17,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 16. "ISF16,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 15. "ISF15,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 14. "ISF14,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 13. "ISF13,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 12. "ISF12,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 11. "ISF11,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 10. "ISF10,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 9. "ISF9,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 8. "ISF8,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 7. "ISF7,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 6. "ISF6,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 5. "ISF5,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 4. "ISF4,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 3. "ISF3,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 2. "ISF2,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 1. "ISF1,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 0. "ISF0,Interrupt Status Flag" "0: Not detected,1: Detected"
tree.end
endif
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*")||cpuis("MC?A144*"))
tree "GPIO1"
base ad:0x40103000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "IRQNUM,Interrupt Number"
group.long 0x40++0xF
line.long 0x0 "PDOR,Port Data Output"
bitfld.long 0x0 31. "PDO31,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 30. "PDO30,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 29. "PDO29,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 28. "PDO28,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 27. "PDO27,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 26. "PDO26,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 25. "PDO25,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 24. "PDO24,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 23. "PDO23,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 22. "PDO22,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 21. "PDO21,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 20. "PDO20,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 19. "PDO19,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 18. "PDO18,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 17. "PDO17,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 16. "PDO16,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 15. "PDO15,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 14. "PDO14,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 13. "PDO13,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 12. "PDO12,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 11. "PDO11,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 10. "PDO10,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 9. "PDO9,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 8. "PDO8,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 7. "PDO7,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 6. "PDO6,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 5. "PDO5,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 4. "PDO4,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 3. "PDO3,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 2. "PDO2,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 1. "PDO1,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 0. "PDO0,Port Data Output" "0: Logic level 0,1: Logic level 1"
line.long 0x4 "PSOR,Port Set Output"
bitfld.long 0x4 31. "PTSO31,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 30. "PTSO30,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 29. "PTSO29,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 28. "PTSO28,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 27. "PTSO27,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 26. "PTSO26,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 25. "PTSO25,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 24. "PTSO24,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 23. "PTSO23,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 22. "PTSO22,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 21. "PTSO21,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 20. "PTSO20,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 19. "PTSO19,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 18. "PTSO18,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 17. "PTSO17,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 16. "PTSO16,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 15. "PTSO15,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 14. "PTSO14,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 13. "PTSO13,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 12. "PTSO12,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 11. "PTSO11,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 10. "PTSO10,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 9. "PTSO9,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 8. "PTSO8,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 7. "PTSO7,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 6. "PTSO6,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 5. "PTSO5,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 4. "PTSO4,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 3. "PTSO3,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 2. "PTSO2,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 1. "PTSO1,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 0. "PTSO0,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
line.long 0x8 "PCOR,Port Clear Output"
bitfld.long 0x8 31. "PTCO31,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 30. "PTCO30,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 29. "PTCO29,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 28. "PTCO28,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 27. "PTCO27,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 26. "PTCO26,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 25. "PTCO25,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 24. "PTCO24,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 23. "PTCO23,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 22. "PTCO22,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 21. "PTCO21,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 20. "PTCO20,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 19. "PTCO19,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 18. "PTCO18,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 17. "PTCO17,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 16. "PTCO16,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 15. "PTCO15,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 14. "PTCO14,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 13. "PTCO13,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 12. "PTCO12,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 11. "PTCO11,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 10. "PTCO10,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 9. "PTCO9,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 8. "PTCO8,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 7. "PTCO7,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 6. "PTCO6,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 5. "PTCO5,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 4. "PTCO4,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 3. "PTCO3,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 2. "PTCO2,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 1. "PTCO1,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 0. "PTCO0,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
line.long 0xC "PTOR,Port Toggle Output"
bitfld.long 0xC 31. "PTTO31,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 30. "PTTO30,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 29. "PTTO29,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 28. "PTTO28,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 27. "PTTO27,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 26. "PTTO26,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 25. "PTTO25,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 24. "PTTO24,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 23. "PTTO23,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 22. "PTTO22,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 21. "PTTO21,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 20. "PTTO20,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 19. "PTTO19,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 18. "PTTO18,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 17. "PTTO17,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 16. "PTTO16,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 15. "PTTO15,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 14. "PTTO14,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 13. "PTTO13,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 12. "PTTO12,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 11. "PTTO11,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 10. "PTTO10,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 9. "PTTO9,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 8. "PTTO8,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 7. "PTTO7,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 6. "PTTO6,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 5. "PTTO5,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 4. "PTTO4,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 3. "PTTO3,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 2. "PTTO2,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 1. "PTTO1,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 0. "PTTO0,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
rgroup.long 0x50++0x3
line.long 0x0 "PDIR,Port Data Input"
bitfld.long 0x0 31. "PDI31,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 30. "PDI30,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 29. "PDI29,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 28. "PDI28,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 27. "PDI27,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 26. "PDI26,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 25. "PDI25,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 24. "PDI24,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 23. "PDI23,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 22. "PDI22,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 21. "PDI21,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 20. "PDI20,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 19. "PDI19,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 18. "PDI18,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 17. "PDI17,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 16. "PDI16,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 15. "PDI15,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 14. "PDI14,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 13. "PDI13,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 12. "PDI12,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 11. "PDI11,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 10. "PDI10,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 9. "PDI9,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 8. "PDI8,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 7. "PDI7,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 6. "PDI6,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 5. "PDI5,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 4. "PDI4,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 3. "PDI3,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 2. "PDI2,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 1. "PDI1,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 0. "PDI0,Port Data Input" "0: Logic 0,1: Logic 1"
group.long 0x54++0x7
line.long 0x0 "PDDR,Port Data Direction"
bitfld.long 0x0 31. "PDD31,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 30. "PDD30,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 29. "PDD29,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 28. "PDD28,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 27. "PDD27,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 26. "PDD26,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 25. "PDD25,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 24. "PDD24,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 23. "PDD23,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 22. "PDD22,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 21. "PDD21,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 20. "PDD20,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 19. "PDD19,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 18. "PDD18,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 17. "PDD17,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 16. "PDD16,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 15. "PDD15,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 14. "PDD14,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 13. "PDD13,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 12. "PDD12,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 11. "PDD11,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 10. "PDD10,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 9. "PDD9,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 8. "PDD8,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 7. "PDD7,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 6. "PDD6,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 5. "PDD5,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 4. "PDD4,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 3. "PDD3,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 2. "PDD2,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 1. "PDD1,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 0. "PDD0,Port Data Direction" "0: Input,1: Output"
line.long 0x4 "PIDR,Port Input Disable"
bitfld.long 0x4 31. "PID31,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 30. "PID30,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 29. "PID29,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 28. "PID28,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 27. "PID27,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 26. "PID26,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 25. "PID25,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 24. "PID24,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 23. "PID23,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 22. "PID22,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 21. "PID21,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 20. "PID20,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 19. "PID19,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 18. "PID18,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 17. "PID17,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 16. "PID16,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 15. "PID15,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 14. "PID14,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 13. "PID13,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 12. "PID12,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 11. "PID11,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 10. "PID10,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 9. "PID9,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 8. "PID8,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 7. "PID7,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 6. "PID6,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 5. "PID5,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 4. "PID4,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 3. "PID3,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 2. "PID2,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 1. "PID1,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 0. "PID0,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x60)++0x0
line.byte 0x0 "PDR[$1],Pin Data"
bitfld.byte 0x0 0. "PD,Pin Data (I/O)" "0: Logic zero,1: Logic one"
repeat.end
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
repeat 32. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x80)++0x3
line.long 0x0 "ICR[$1],Interrupt Control index"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
repeat.end
endif
sif (cpuis("MC?A144*"))
group.long 0x80++0x7F
line.long 0x0 "ICR0,Interrupt Control 0"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4 "ICR1,Interrupt Control 1"
eventfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x8 "ICR2,Interrupt Control 2"
eventfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0xC "ICR3,Interrupt Control 3"
eventfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x10 "ICR4,Interrupt Control 4"
eventfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x14 "ICR5,Interrupt Control 5"
eventfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x18 "ICR6,Interrupt Control 6"
eventfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x1C "ICR7,Interrupt Control 7"
eventfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x20 "ICR8,Interrupt Control 8"
eventfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x24 "ICR9,Interrupt Control 9"
eventfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x28 "ICR10,Interrupt Control 10"
eventfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x2C "ICR11,Interrupt Control 11"
eventfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x30 "ICR12,Interrupt Control 12"
eventfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x34 "ICR13,Interrupt Control 13"
eventfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x38 "ICR14,Interrupt Control 14"
eventfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x3C "ICR15,Interrupt Control 15"
eventfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x40 "ICR16,Interrupt Control 16"
eventfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x44 "ICR17,Interrupt Control 17"
eventfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x48 "ICR18,Interrupt Control 18"
eventfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4C "ICR19,Interrupt Control 19"
eventfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x50 "ICR20,Interrupt Control 20"
eventfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x54 "ICR21,Interrupt Control 21"
eventfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x58 "ICR22,Interrupt Control 22"
eventfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x5C "ICR23,Interrupt Control 23"
eventfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x60 "ICR24,Interrupt Control 24"
eventfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x64 "ICR25,Interrupt Control 25"
eventfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x68 "ICR26,Interrupt Control 26"
eventfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x6C "ICR27,Interrupt Control 27"
eventfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x70 "ICR28,Interrupt Control 28"
eventfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x74 "ICR29,Interrupt Control 29"
eventfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x78 "ICR30,Interrupt Control 30"
eventfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x7C "ICR31,Interrupt Control 31"
eventfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration"
endif
group.long 0x100++0x7
line.long 0x0 "GICLR,Global Interrupt Control Low"
hexmask.long.word 0x0 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x0 15. "GIWE15,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 14. "GIWE14,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 13. "GIWE13,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 12. "GIWE12,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 11. "GIWE11,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 10. "GIWE10,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 9. "GIWE9,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 8. "GIWE8,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 7. "GIWE7,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 6. "GIWE6,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 5. "GIWE5,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 4. "GIWE4,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 3. "GIWE3,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 2. "GIWE2,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 1. "GIWE1,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 0. "GIWE0,Global Interrupt Write Enable" "0: Not updated,1: Updated"
line.long 0x4 "GICHR,Global Interrupt Control High"
hexmask.long.word 0x4 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x4 15. "GIWE31,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 14. "GIWE30,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 13. "GIWE29,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 12. "GIWE28,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 11. "GIWE27,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 10. "GIWE26,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 9. "GIWE25,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 8. "GIWE24,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 7. "GIWE23,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 6. "GIWE22,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 5. "GIWE21,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 4. "GIWE20,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 3. "GIWE19,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 2. "GIWE18,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 1. "GIWE17,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 0. "GIWE16,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
group.long 0x120++0x3
line.long 0x0 "ISFR0,Interrupt Status Flag"
eventfld.long 0x0 31. "ISF31,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 30. "ISF30,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 29. "ISF29,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 28. "ISF28,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 27. "ISF27,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 26. "ISF26,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 25. "ISF25,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 24. "ISF24,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 23. "ISF23,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 22. "ISF22,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 21. "ISF21,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 20. "ISF20,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 19. "ISF19,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 18. "ISF18,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 17. "ISF17,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 16. "ISF16,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 15. "ISF15,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 14. "ISF14,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 13. "ISF13,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 12. "ISF12,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 11. "ISF11,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 10. "ISF10,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 9. "ISF9,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 8. "ISF8,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 7. "ISF7,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 6. "ISF6,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 5. "ISF5,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 4. "ISF4,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 3. "ISF3,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 2. "ISF2,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 1. "ISF1,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 0. "ISF0,Interrupt Status Flag" "0: Not detected,1: Detected"
tree.end
endif
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*")||cpuis("MC?A144*"))
tree "GPIO2"
base ad:0x40104000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "IRQNUM,Interrupt Number"
group.long 0x40++0xF
line.long 0x0 "PDOR,Port Data Output"
bitfld.long 0x0 31. "PDO31,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 30. "PDO30,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 29. "PDO29,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 28. "PDO28,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 27. "PDO27,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 26. "PDO26,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 25. "PDO25,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 24. "PDO24,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 23. "PDO23,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 22. "PDO22,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 21. "PDO21,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 20. "PDO20,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 19. "PDO19,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 18. "PDO18,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 17. "PDO17,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 16. "PDO16,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 15. "PDO15,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 14. "PDO14,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 13. "PDO13,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 12. "PDO12,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 11. "PDO11,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 10. "PDO10,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 9. "PDO9,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 8. "PDO8,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 7. "PDO7,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 6. "PDO6,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 5. "PDO5,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 4. "PDO4,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 3. "PDO3,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 2. "PDO2,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 1. "PDO1,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 0. "PDO0,Port Data Output" "0: Logic level 0,1: Logic level 1"
line.long 0x4 "PSOR,Port Set Output"
bitfld.long 0x4 31. "PTSO31,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 30. "PTSO30,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 29. "PTSO29,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 28. "PTSO28,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 27. "PTSO27,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 26. "PTSO26,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 25. "PTSO25,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 24. "PTSO24,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 23. "PTSO23,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 22. "PTSO22,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 21. "PTSO21,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 20. "PTSO20,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 19. "PTSO19,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 18. "PTSO18,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 17. "PTSO17,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 16. "PTSO16,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 15. "PTSO15,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 14. "PTSO14,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 13. "PTSO13,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 12. "PTSO12,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 11. "PTSO11,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 10. "PTSO10,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 9. "PTSO9,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 8. "PTSO8,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 7. "PTSO7,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 6. "PTSO6,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 5. "PTSO5,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 4. "PTSO4,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 3. "PTSO3,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 2. "PTSO2,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 1. "PTSO1,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 0. "PTSO0,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
line.long 0x8 "PCOR,Port Clear Output"
bitfld.long 0x8 31. "PTCO31,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 30. "PTCO30,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 29. "PTCO29,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 28. "PTCO28,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 27. "PTCO27,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 26. "PTCO26,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 25. "PTCO25,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 24. "PTCO24,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 23. "PTCO23,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 22. "PTCO22,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 21. "PTCO21,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 20. "PTCO20,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 19. "PTCO19,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 18. "PTCO18,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 17. "PTCO17,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 16. "PTCO16,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 15. "PTCO15,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 14. "PTCO14,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 13. "PTCO13,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 12. "PTCO12,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 11. "PTCO11,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 10. "PTCO10,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 9. "PTCO9,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 8. "PTCO8,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 7. "PTCO7,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 6. "PTCO6,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 5. "PTCO5,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 4. "PTCO4,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 3. "PTCO3,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 2. "PTCO2,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 1. "PTCO1,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 0. "PTCO0,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
line.long 0xC "PTOR,Port Toggle Output"
bitfld.long 0xC 31. "PTTO31,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 30. "PTTO30,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 29. "PTTO29,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 28. "PTTO28,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 27. "PTTO27,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 26. "PTTO26,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 25. "PTTO25,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 24. "PTTO24,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 23. "PTTO23,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 22. "PTTO22,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 21. "PTTO21,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 20. "PTTO20,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 19. "PTTO19,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 18. "PTTO18,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 17. "PTTO17,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 16. "PTTO16,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 15. "PTTO15,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 14. "PTTO14,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 13. "PTTO13,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 12. "PTTO12,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 11. "PTTO11,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 10. "PTTO10,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 9. "PTTO9,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 8. "PTTO8,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 7. "PTTO7,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 6. "PTTO6,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 5. "PTTO5,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 4. "PTTO4,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 3. "PTTO3,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 2. "PTTO2,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 1. "PTTO1,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 0. "PTTO0,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
rgroup.long 0x50++0x3
line.long 0x0 "PDIR,Port Data Input"
bitfld.long 0x0 31. "PDI31,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 30. "PDI30,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 29. "PDI29,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 28. "PDI28,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 27. "PDI27,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 26. "PDI26,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 25. "PDI25,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 24. "PDI24,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 23. "PDI23,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 22. "PDI22,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 21. "PDI21,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 20. "PDI20,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 19. "PDI19,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 18. "PDI18,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 17. "PDI17,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 16. "PDI16,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 15. "PDI15,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 14. "PDI14,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 13. "PDI13,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 12. "PDI12,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 11. "PDI11,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 10. "PDI10,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 9. "PDI9,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 8. "PDI8,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 7. "PDI7,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 6. "PDI6,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 5. "PDI5,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 4. "PDI4,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 3. "PDI3,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 2. "PDI2,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 1. "PDI1,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 0. "PDI0,Port Data Input" "0: Logic 0,1: Logic 1"
group.long 0x54++0x7
line.long 0x0 "PDDR,Port Data Direction"
bitfld.long 0x0 31. "PDD31,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 30. "PDD30,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 29. "PDD29,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 28. "PDD28,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 27. "PDD27,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 26. "PDD26,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 25. "PDD25,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 24. "PDD24,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 23. "PDD23,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 22. "PDD22,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 21. "PDD21,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 20. "PDD20,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 19. "PDD19,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 18. "PDD18,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 17. "PDD17,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 16. "PDD16,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 15. "PDD15,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 14. "PDD14,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 13. "PDD13,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 12. "PDD12,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 11. "PDD11,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 10. "PDD10,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 9. "PDD9,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 8. "PDD8,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 7. "PDD7,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 6. "PDD6,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 5. "PDD5,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 4. "PDD4,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 3. "PDD3,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 2. "PDD2,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 1. "PDD1,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 0. "PDD0,Port Data Direction" "0: Input,1: Output"
line.long 0x4 "PIDR,Port Input Disable"
bitfld.long 0x4 31. "PID31,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 30. "PID30,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 29. "PID29,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 28. "PID28,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 27. "PID27,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 26. "PID26,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 25. "PID25,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 24. "PID24,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 23. "PID23,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 22. "PID22,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 21. "PID21,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 20. "PID20,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 19. "PID19,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 18. "PID18,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 17. "PID17,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 16. "PID16,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 15. "PID15,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 14. "PID14,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 13. "PID13,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 12. "PID12,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 11. "PID11,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 10. "PID10,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 9. "PID9,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 8. "PID8,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 7. "PID7,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 6. "PID6,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 5. "PID5,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 4. "PID4,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 3. "PID3,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 2. "PID2,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 1. "PID1,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 0. "PID0,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x60)++0x0
line.byte 0x0 "PDR[$1],Pin Data"
bitfld.byte 0x0 0. "PD,Pin Data (I/O)" "0: Logic zero,1: Logic one"
repeat.end
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
repeat 32. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x80)++0x3
line.long 0x0 "ICR[$1],Interrupt Control index"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
repeat.end
endif
sif (cpuis("MC?A144*"))
group.long 0x80++0x7F
line.long 0x0 "ICR0,Interrupt Control 0"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4 "ICR1,Interrupt Control 1"
eventfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x8 "ICR2,Interrupt Control 2"
eventfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0xC "ICR3,Interrupt Control 3"
eventfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x10 "ICR4,Interrupt Control 4"
eventfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x14 "ICR5,Interrupt Control 5"
eventfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x18 "ICR6,Interrupt Control 6"
eventfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x1C "ICR7,Interrupt Control 7"
eventfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x20 "ICR8,Interrupt Control 8"
eventfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x24 "ICR9,Interrupt Control 9"
eventfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x28 "ICR10,Interrupt Control 10"
eventfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x2C "ICR11,Interrupt Control 11"
eventfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x30 "ICR12,Interrupt Control 12"
eventfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x34 "ICR13,Interrupt Control 13"
eventfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x38 "ICR14,Interrupt Control 14"
eventfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x3C "ICR15,Interrupt Control 15"
eventfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x40 "ICR16,Interrupt Control 16"
eventfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x44 "ICR17,Interrupt Control 17"
eventfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x48 "ICR18,Interrupt Control 18"
eventfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4C "ICR19,Interrupt Control 19"
eventfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x50 "ICR20,Interrupt Control 20"
eventfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x54 "ICR21,Interrupt Control 21"
eventfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x58 "ICR22,Interrupt Control 22"
eventfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x5C "ICR23,Interrupt Control 23"
eventfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x60 "ICR24,Interrupt Control 24"
eventfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x64 "ICR25,Interrupt Control 25"
eventfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x68 "ICR26,Interrupt Control 26"
eventfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x6C "ICR27,Interrupt Control 27"
eventfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x70 "ICR28,Interrupt Control 28"
eventfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x74 "ICR29,Interrupt Control 29"
eventfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x78 "ICR30,Interrupt Control 30"
eventfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x7C "ICR31,Interrupt Control 31"
eventfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration"
endif
group.long 0x100++0x7
line.long 0x0 "GICLR,Global Interrupt Control Low"
hexmask.long.word 0x0 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x0 15. "GIWE15,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 14. "GIWE14,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 13. "GIWE13,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 12. "GIWE12,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 11. "GIWE11,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 10. "GIWE10,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 9. "GIWE9,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 8. "GIWE8,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 7. "GIWE7,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 6. "GIWE6,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 5. "GIWE5,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 4. "GIWE4,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 3. "GIWE3,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 2. "GIWE2,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 1. "GIWE1,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 0. "GIWE0,Global Interrupt Write Enable" "0: Not updated,1: Updated"
line.long 0x4 "GICHR,Global Interrupt Control High"
hexmask.long.word 0x4 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x4 15. "GIWE31,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 14. "GIWE30,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 13. "GIWE29,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 12. "GIWE28,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 11. "GIWE27,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 10. "GIWE26,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 9. "GIWE25,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 8. "GIWE24,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 7. "GIWE23,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 6. "GIWE22,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 5. "GIWE21,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 4. "GIWE20,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 3. "GIWE19,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 2. "GIWE18,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 1. "GIWE17,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 0. "GIWE16,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
group.long 0x120++0x3
line.long 0x0 "ISFR0,Interrupt Status Flag"
eventfld.long 0x0 31. "ISF31,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 30. "ISF30,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 29. "ISF29,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 28. "ISF28,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 27. "ISF27,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 26. "ISF26,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 25. "ISF25,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 24. "ISF24,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 23. "ISF23,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 22. "ISF22,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 21. "ISF21,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 20. "ISF20,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 19. "ISF19,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 18. "ISF18,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 17. "ISF17,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 16. "ISF16,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 15. "ISF15,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 14. "ISF14,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 13. "ISF13,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 12. "ISF12,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 11. "ISF11,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 10. "ISF10,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 9. "ISF9,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 8. "ISF8,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 7. "ISF7,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 6. "ISF6,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 5. "ISF5,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 4. "ISF4,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 3. "ISF3,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 2. "ISF2,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 1. "ISF1,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 0. "ISF0,Interrupt Status Flag" "0: Not detected,1: Detected"
tree.end
endif
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*")||cpuis("MC?A144*"))
tree "GPIO3"
base ad:0x40105000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "IRQNUM,Interrupt Number"
group.long 0x40++0xF
line.long 0x0 "PDOR,Port Data Output"
bitfld.long 0x0 31. "PDO31,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 30. "PDO30,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 29. "PDO29,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 28. "PDO28,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 27. "PDO27,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 26. "PDO26,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 25. "PDO25,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 24. "PDO24,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 23. "PDO23,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 22. "PDO22,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 21. "PDO21,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 20. "PDO20,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 19. "PDO19,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 18. "PDO18,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 17. "PDO17,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 16. "PDO16,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 15. "PDO15,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 14. "PDO14,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 13. "PDO13,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 12. "PDO12,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 11. "PDO11,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 10. "PDO10,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 9. "PDO9,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 8. "PDO8,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 7. "PDO7,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 6. "PDO6,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 5. "PDO5,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 4. "PDO4,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 3. "PDO3,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 2. "PDO2,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 1. "PDO1,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 0. "PDO0,Port Data Output" "0: Logic level 0,1: Logic level 1"
line.long 0x4 "PSOR,Port Set Output"
bitfld.long 0x4 31. "PTSO31,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 30. "PTSO30,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 29. "PTSO29,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 28. "PTSO28,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 27. "PTSO27,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 26. "PTSO26,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 25. "PTSO25,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 24. "PTSO24,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 23. "PTSO23,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 22. "PTSO22,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 21. "PTSO21,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 20. "PTSO20,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 19. "PTSO19,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 18. "PTSO18,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 17. "PTSO17,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 16. "PTSO16,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 15. "PTSO15,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 14. "PTSO14,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 13. "PTSO13,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 12. "PTSO12,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 11. "PTSO11,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 10. "PTSO10,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 9. "PTSO9,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 8. "PTSO8,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 7. "PTSO7,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 6. "PTSO6,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 5. "PTSO5,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 4. "PTSO4,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 3. "PTSO3,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 2. "PTSO2,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 1. "PTSO1,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 0. "PTSO0,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
line.long 0x8 "PCOR,Port Clear Output"
bitfld.long 0x8 31. "PTCO31,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 30. "PTCO30,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 29. "PTCO29,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 28. "PTCO28,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 27. "PTCO27,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 26. "PTCO26,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 25. "PTCO25,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 24. "PTCO24,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 23. "PTCO23,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 22. "PTCO22,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 21. "PTCO21,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 20. "PTCO20,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 19. "PTCO19,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 18. "PTCO18,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 17. "PTCO17,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 16. "PTCO16,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 15. "PTCO15,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 14. "PTCO14,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 13. "PTCO13,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 12. "PTCO12,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 11. "PTCO11,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 10. "PTCO10,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 9. "PTCO9,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 8. "PTCO8,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 7. "PTCO7,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 6. "PTCO6,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 5. "PTCO5,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 4. "PTCO4,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 3. "PTCO3,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 2. "PTCO2,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 1. "PTCO1,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 0. "PTCO0,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
line.long 0xC "PTOR,Port Toggle Output"
bitfld.long 0xC 31. "PTTO31,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 30. "PTTO30,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 29. "PTTO29,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 28. "PTTO28,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 27. "PTTO27,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 26. "PTTO26,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 25. "PTTO25,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 24. "PTTO24,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 23. "PTTO23,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 22. "PTTO22,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 21. "PTTO21,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 20. "PTTO20,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 19. "PTTO19,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 18. "PTTO18,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 17. "PTTO17,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 16. "PTTO16,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 15. "PTTO15,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 14. "PTTO14,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 13. "PTTO13,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 12. "PTTO12,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 11. "PTTO11,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 10. "PTTO10,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 9. "PTTO9,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 8. "PTTO8,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 7. "PTTO7,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 6. "PTTO6,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 5. "PTTO5,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 4. "PTTO4,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 3. "PTTO3,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 2. "PTTO2,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 1. "PTTO1,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 0. "PTTO0,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
rgroup.long 0x50++0x3
line.long 0x0 "PDIR,Port Data Input"
bitfld.long 0x0 31. "PDI31,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 30. "PDI30,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 29. "PDI29,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 28. "PDI28,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 27. "PDI27,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 26. "PDI26,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 25. "PDI25,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 24. "PDI24,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 23. "PDI23,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 22. "PDI22,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 21. "PDI21,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 20. "PDI20,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 19. "PDI19,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 18. "PDI18,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 17. "PDI17,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 16. "PDI16,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 15. "PDI15,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 14. "PDI14,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 13. "PDI13,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 12. "PDI12,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 11. "PDI11,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 10. "PDI10,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 9. "PDI9,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 8. "PDI8,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 7. "PDI7,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 6. "PDI6,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 5. "PDI5,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 4. "PDI4,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 3. "PDI3,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 2. "PDI2,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 1. "PDI1,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 0. "PDI0,Port Data Input" "0: Logic 0,1: Logic 1"
group.long 0x54++0x7
line.long 0x0 "PDDR,Port Data Direction"
bitfld.long 0x0 31. "PDD31,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 30. "PDD30,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 29. "PDD29,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 28. "PDD28,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 27. "PDD27,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 26. "PDD26,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 25. "PDD25,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 24. "PDD24,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 23. "PDD23,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 22. "PDD22,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 21. "PDD21,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 20. "PDD20,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 19. "PDD19,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 18. "PDD18,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 17. "PDD17,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 16. "PDD16,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 15. "PDD15,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 14. "PDD14,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 13. "PDD13,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 12. "PDD12,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 11. "PDD11,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 10. "PDD10,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 9. "PDD9,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 8. "PDD8,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 7. "PDD7,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 6. "PDD6,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 5. "PDD5,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 4. "PDD4,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 3. "PDD3,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 2. "PDD2,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 1. "PDD1,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 0. "PDD0,Port Data Direction" "0: Input,1: Output"
line.long 0x4 "PIDR,Port Input Disable"
bitfld.long 0x4 31. "PID31,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 30. "PID30,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 29. "PID29,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 28. "PID28,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 27. "PID27,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 26. "PID26,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 25. "PID25,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 24. "PID24,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 23. "PID23,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 22. "PID22,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 21. "PID21,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 20. "PID20,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 19. "PID19,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 18. "PID18,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 17. "PID17,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 16. "PID16,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 15. "PID15,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 14. "PID14,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 13. "PID13,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 12. "PID12,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 11. "PID11,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 10. "PID10,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 9. "PID9,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 8. "PID8,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 7. "PID7,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 6. "PID6,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 5. "PID5,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 4. "PID4,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 3. "PID3,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 2. "PID2,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 1. "PID1,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 0. "PID0,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x60)++0x0
line.byte 0x0 "PDR[$1],Pin Data"
bitfld.byte 0x0 0. "PD,Pin Data (I/O)" "0: Logic zero,1: Logic one"
repeat.end
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
repeat 32. (increment 0x0 0x1)(increment 0x0 0x4)
group.long ($2+0x80)++0x3
line.long 0x0 "ICR[$1],Interrupt Control index"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
repeat.end
endif
sif (cpuis("MC?A144*"))
group.long 0x80++0x7F
line.long 0x0 "ICR0,Interrupt Control 0"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4 "ICR1,Interrupt Control 1"
eventfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x8 "ICR2,Interrupt Control 2"
eventfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0xC "ICR3,Interrupt Control 3"
eventfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x10 "ICR4,Interrupt Control 4"
eventfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x14 "ICR5,Interrupt Control 5"
eventfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x18 "ICR6,Interrupt Control 6"
eventfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x1C "ICR7,Interrupt Control 7"
eventfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x20 "ICR8,Interrupt Control 8"
eventfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x24 "ICR9,Interrupt Control 9"
eventfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x28 "ICR10,Interrupt Control 10"
eventfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x2C "ICR11,Interrupt Control 11"
eventfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x30 "ICR12,Interrupt Control 12"
eventfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x34 "ICR13,Interrupt Control 13"
eventfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x38 "ICR14,Interrupt Control 14"
eventfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x3C "ICR15,Interrupt Control 15"
eventfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x40 "ICR16,Interrupt Control 16"
eventfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x44 "ICR17,Interrupt Control 17"
eventfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x48 "ICR18,Interrupt Control 18"
eventfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4C "ICR19,Interrupt Control 19"
eventfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x50 "ICR20,Interrupt Control 20"
eventfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x54 "ICR21,Interrupt Control 21"
eventfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x58 "ICR22,Interrupt Control 22"
eventfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x5C "ICR23,Interrupt Control 23"
eventfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x60 "ICR24,Interrupt Control 24"
eventfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x64 "ICR25,Interrupt Control 25"
eventfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x68 "ICR26,Interrupt Control 26"
eventfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x6C "ICR27,Interrupt Control 27"
eventfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x70 "ICR28,Interrupt Control 28"
eventfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x74 "ICR29,Interrupt Control 29"
eventfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x78 "ICR30,Interrupt Control 30"
eventfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x7C "ICR31,Interrupt Control 31"
eventfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration"
endif
group.long 0x100++0x7
line.long 0x0 "GICLR,Global Interrupt Control Low"
hexmask.long.word 0x0 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x0 15. "GIWE15,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 14. "GIWE14,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 13. "GIWE13,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 12. "GIWE12,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 11. "GIWE11,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 10. "GIWE10,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 9. "GIWE9,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 8. "GIWE8,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 7. "GIWE7,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 6. "GIWE6,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 5. "GIWE5,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 4. "GIWE4,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 3. "GIWE3,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 2. "GIWE2,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x0 1. "GIWE1,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x0 0. "GIWE0,Global Interrupt Write Enable" "0: Not updated,1: Updated"
line.long 0x4 "GICHR,Global Interrupt Control High"
hexmask.long.word 0x4 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x4 15. "GIWE31,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 14. "GIWE30,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 13. "GIWE29,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 12. "GIWE28,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 11. "GIWE27,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 10. "GIWE26,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 9. "GIWE25,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 8. "GIWE24,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 7. "GIWE23,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 6. "GIWE22,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 5. "GIWE21,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 4. "GIWE20,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 3. "GIWE19,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 2. "GIWE18,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x4 1. "GIWE17,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x4 0. "GIWE16,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
group.long 0x120++0x3
line.long 0x0 "ISFR0,Interrupt Status Flag"
eventfld.long 0x0 31. "ISF31,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 30. "ISF30,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 29. "ISF29,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 28. "ISF28,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 27. "ISF27,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 26. "ISF26,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 25. "ISF25,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 24. "ISF24,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 23. "ISF23,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 22. "ISF22,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 21. "ISF21,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 20. "ISF20,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 19. "ISF19,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 18. "ISF18,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 17. "ISF17,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 16. "ISF16,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 15. "ISF15,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 14. "ISF14,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 13. "ISF13,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 12. "ISF12,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 11. "ISF11,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 10. "ISF10,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 9. "ISF9,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 8. "ISF8,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 7. "ISF7,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 6. "ISF6,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 5. "ISF5,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 4. "ISF4,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 3. "ISF3,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 2. "ISF2,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 1. "ISF1,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 0. "ISF0,Interrupt Status Flag" "0: Not detected,1: Detected"
tree.end
endif
sif (cpuis("MC?A144*"))
tree "GPIO4"
base ad:0x40106000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "IRQNUM,Interrupt Number"
group.long 0x40++0xF
line.long 0x0 "PDOR,Port Data Output"
bitfld.long 0x0 31. "PDO31,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 30. "PDO30,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 29. "PDO29,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 28. "PDO28,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 27. "PDO27,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 26. "PDO26,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 25. "PDO25,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 24. "PDO24,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 23. "PDO23,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 22. "PDO22,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 21. "PDO21,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 20. "PDO20,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 19. "PDO19,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 18. "PDO18,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 17. "PDO17,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 16. "PDO16,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 15. "PDO15,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 14. "PDO14,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 13. "PDO13,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 12. "PDO12,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 11. "PDO11,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 10. "PDO10,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 9. "PDO9,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 8. "PDO8,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 7. "PDO7,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 6. "PDO6,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 5. "PDO5,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 4. "PDO4,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 3. "PDO3,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 2. "PDO2,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 1. "PDO1,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 0. "PDO0,Port Data Output" "0: Logic level 0,1: Logic level 1"
line.long 0x4 "PSOR,Port Set Output"
bitfld.long 0x4 31. "PTSO31,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 30. "PTSO30,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 29. "PTSO29,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 28. "PTSO28,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 27. "PTSO27,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 26. "PTSO26,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 25. "PTSO25,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 24. "PTSO24,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 23. "PTSO23,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 22. "PTSO22,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 21. "PTSO21,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 20. "PTSO20,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 19. "PTSO19,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 18. "PTSO18,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 17. "PTSO17,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 16. "PTSO16,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 15. "PTSO15,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 14. "PTSO14,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 13. "PTSO13,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 12. "PTSO12,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 11. "PTSO11,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 10. "PTSO10,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 9. "PTSO9,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 8. "PTSO8,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 7. "PTSO7,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 6. "PTSO6,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 5. "PTSO5,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 4. "PTSO4,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 3. "PTSO3,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 2. "PTSO2,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 1. "PTSO1,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 0. "PTSO0,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
line.long 0x8 "PCOR,Port Clear Output"
bitfld.long 0x8 31. "PTCO31,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 30. "PTCO30,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 29. "PTCO29,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 28. "PTCO28,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 27. "PTCO27,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 26. "PTCO26,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 25. "PTCO25,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 24. "PTCO24,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 23. "PTCO23,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 22. "PTCO22,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 21. "PTCO21,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 20. "PTCO20,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 19. "PTCO19,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 18. "PTCO18,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 17. "PTCO17,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 16. "PTCO16,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 15. "PTCO15,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 14. "PTCO14,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 13. "PTCO13,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 12. "PTCO12,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 11. "PTCO11,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 10. "PTCO10,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 9. "PTCO9,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 8. "PTCO8,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 7. "PTCO7,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 6. "PTCO6,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 5. "PTCO5,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 4. "PTCO4,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 3. "PTCO3,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 2. "PTCO2,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 1. "PTCO1,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 0. "PTCO0,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
line.long 0xC "PTOR,Port Toggle Output"
bitfld.long 0xC 31. "PTTO31,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 30. "PTTO30,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 29. "PTTO29,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 28. "PTTO28,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 27. "PTTO27,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 26. "PTTO26,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 25. "PTTO25,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 24. "PTTO24,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 23. "PTTO23,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 22. "PTTO22,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 21. "PTTO21,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 20. "PTTO20,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 19. "PTTO19,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 18. "PTTO18,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 17. "PTTO17,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 16. "PTTO16,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 15. "PTTO15,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 14. "PTTO14,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 13. "PTTO13,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 12. "PTTO12,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 11. "PTTO11,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 10. "PTTO10,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 9. "PTTO9,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 8. "PTTO8,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 7. "PTTO7,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 6. "PTTO6,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 5. "PTTO5,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 4. "PTTO4,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 3. "PTTO3,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 2. "PTTO2,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 1. "PTTO1,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 0. "PTTO0,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
rgroup.long 0x50++0x3
line.long 0x0 "PDIR,Port Data Input"
bitfld.long 0x0 31. "PDI31,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 30. "PDI30,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 29. "PDI29,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 28. "PDI28,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 27. "PDI27,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 26. "PDI26,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 25. "PDI25,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 24. "PDI24,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 23. "PDI23,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 22. "PDI22,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 21. "PDI21,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 20. "PDI20,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 19. "PDI19,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 18. "PDI18,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 17. "PDI17,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 16. "PDI16,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 15. "PDI15,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 14. "PDI14,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 13. "PDI13,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 12. "PDI12,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 11. "PDI11,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 10. "PDI10,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 9. "PDI9,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 8. "PDI8,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 7. "PDI7,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 6. "PDI6,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 5. "PDI5,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 4. "PDI4,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 3. "PDI3,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 2. "PDI2,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 1. "PDI1,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 0. "PDI0,Port Data Input" "0: Logic 0,1: Logic 1"
group.long 0x54++0x7
line.long 0x0 "PDDR,Port Data Direction"
bitfld.long 0x0 31. "PDD31,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 30. "PDD30,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 29. "PDD29,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 28. "PDD28,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 27. "PDD27,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 26. "PDD26,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 25. "PDD25,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 24. "PDD24,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 23. "PDD23,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 22. "PDD22,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 21. "PDD21,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 20. "PDD20,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 19. "PDD19,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 18. "PDD18,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 17. "PDD17,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 16. "PDD16,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 15. "PDD15,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 14. "PDD14,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 13. "PDD13,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 12. "PDD12,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 11. "PDD11,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 10. "PDD10,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 9. "PDD9,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 8. "PDD8,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 7. "PDD7,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 6. "PDD6,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 5. "PDD5,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 4. "PDD4,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 3. "PDD3,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 2. "PDD2,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 1. "PDD1,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 0. "PDD0,Port Data Direction" "0: Input,1: Output"
line.long 0x4 "PIDR,Port Input Disable"
bitfld.long 0x4 31. "PID31,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 30. "PID30,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 29. "PID29,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 28. "PID28,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 27. "PID27,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 26. "PID26,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 25. "PID25,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 24. "PID24,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 23. "PID23,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 22. "PID22,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 21. "PID21,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 20. "PID20,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 19. "PID19,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 18. "PID18,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 17. "PID17,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 16. "PID16,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 15. "PID15,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 14. "PID14,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 13. "PID13,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 12. "PID12,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 11. "PID11,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 10. "PID10,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 9. "PID9,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 8. "PID8,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 7. "PID7,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 6. "PID6,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 5. "PID5,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 4. "PID4,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 3. "PID3,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 2. "PID2,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 1. "PID1,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 0. "PID0,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x60)++0x0
line.byte 0x0 "PDR[$1],Pin Data"
bitfld.byte 0x0 0. "PD,Pin Data (I/O)" "0: Logic zero,1: Logic one"
repeat.end
group.long 0x80++0x87
line.long 0x0 "ICR0,Interrupt Control 0"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4 "ICR1,Interrupt Control 1"
eventfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x8 "ICR2,Interrupt Control 2"
eventfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0xC "ICR3,Interrupt Control 3"
eventfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x10 "ICR4,Interrupt Control 4"
eventfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x14 "ICR5,Interrupt Control 5"
eventfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x18 "ICR6,Interrupt Control 6"
eventfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x1C "ICR7,Interrupt Control 7"
eventfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x20 "ICR8,Interrupt Control 8"
eventfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x24 "ICR9,Interrupt Control 9"
eventfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x28 "ICR10,Interrupt Control 10"
eventfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x2C "ICR11,Interrupt Control 11"
eventfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x30 "ICR12,Interrupt Control 12"
eventfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x34 "ICR13,Interrupt Control 13"
eventfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x38 "ICR14,Interrupt Control 14"
eventfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x3C "ICR15,Interrupt Control 15"
eventfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x40 "ICR16,Interrupt Control 16"
eventfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x44 "ICR17,Interrupt Control 17"
eventfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x48 "ICR18,Interrupt Control 18"
eventfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4C "ICR19,Interrupt Control 19"
eventfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x50 "ICR20,Interrupt Control 20"
eventfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x54 "ICR21,Interrupt Control 21"
eventfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x58 "ICR22,Interrupt Control 22"
eventfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x5C "ICR23,Interrupt Control 23"
eventfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x60 "ICR24,Interrupt Control 24"
eventfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x64 "ICR25,Interrupt Control 25"
eventfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x68 "ICR26,Interrupt Control 26"
eventfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x6C "ICR27,Interrupt Control 27"
eventfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x70 "ICR28,Interrupt Control 28"
eventfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x74 "ICR29,Interrupt Control 29"
eventfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x78 "ICR30,Interrupt Control 30"
eventfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x7C "ICR31,Interrupt Control 31"
eventfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x80 "GICLR,Global Interrupt Control Low"
hexmask.long.word 0x80 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x80 15. "GIWE15,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 14. "GIWE14,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 13. "GIWE13,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 12. "GIWE12,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 11. "GIWE11,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 10. "GIWE10,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 9. "GIWE9,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 8. "GIWE8,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 7. "GIWE7,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 6. "GIWE6,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 5. "GIWE5,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 4. "GIWE4,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 3. "GIWE3,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 2. "GIWE2,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 1. "GIWE1,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 0. "GIWE0,Global Interrupt Write Enable" "0: Not updated,1: Updated"
line.long 0x84 "GICHR,Global Interrupt Control High"
hexmask.long.word 0x84 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x84 15. "GIWE31,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 14. "GIWE30,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 13. "GIWE29,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 12. "GIWE28,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 11. "GIWE27,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 10. "GIWE26,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 9. "GIWE25,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 8. "GIWE24,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 7. "GIWE23,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 6. "GIWE22,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 5. "GIWE21,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 4. "GIWE20,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 3. "GIWE19,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 2. "GIWE18,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 1. "GIWE17,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 0. "GIWE16,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
group.long 0x120++0x3
line.long 0x0 "ISFR0,Interrupt Status Flag"
eventfld.long 0x0 31. "ISF31,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 30. "ISF30,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 29. "ISF29,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 28. "ISF28,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 27. "ISF27,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 26. "ISF26,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 25. "ISF25,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 24. "ISF24,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 23. "ISF23,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 22. "ISF22,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 21. "ISF21,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 20. "ISF20,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 19. "ISF19,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 18. "ISF18,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 17. "ISF17,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 16. "ISF16,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 15. "ISF15,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 14. "ISF14,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 13. "ISF13,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 12. "ISF12,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 11. "ISF11,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 10. "ISF10,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 9. "ISF9,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 8. "ISF8,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 7. "ISF7,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 6. "ISF6,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 5. "ISF5,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 4. "ISF4,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 3. "ISF3,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 2. "ISF2,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 1. "ISF1,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 0. "ISF0,Interrupt Status Flag" "0: Not detected,1: Detected"
tree.end
endif
sif (cpuis("MC?A145*"))
tree "GPIO4"
base ad:0x40106000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "IRQNUM,Interrupt Number"
group.long 0x40++0xF
line.long 0x0 "PDOR,Port Data Output"
bitfld.long 0x0 31. "PDO31,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 30. "PDO30,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 29. "PDO29,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 28. "PDO28,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 27. "PDO27,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 26. "PDO26,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 25. "PDO25,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 24. "PDO24,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 23. "PDO23,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 22. "PDO22,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 21. "PDO21,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 20. "PDO20,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 19. "PDO19,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 18. "PDO18,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 17. "PDO17,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 16. "PDO16,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 15. "PDO15,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 14. "PDO14,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 13. "PDO13,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 12. "PDO12,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 11. "PDO11,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 10. "PDO10,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 9. "PDO9,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 8. "PDO8,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 7. "PDO7,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 6. "PDO6,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 5. "PDO5,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 4. "PDO4,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 3. "PDO3,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 2. "PDO2,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 1. "PDO1,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 0. "PDO0,Port Data Output" "0: Logic level 0,1: Logic level 1"
line.long 0x4 "PSOR,Port Set Output"
bitfld.long 0x4 31. "PTSO31,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 30. "PTSO30,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 29. "PTSO29,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 28. "PTSO28,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 27. "PTSO27,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 26. "PTSO26,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 25. "PTSO25,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 24. "PTSO24,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 23. "PTSO23,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 22. "PTSO22,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 21. "PTSO21,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 20. "PTSO20,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 19. "PTSO19,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 18. "PTSO18,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 17. "PTSO17,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 16. "PTSO16,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 15. "PTSO15,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 14. "PTSO14,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 13. "PTSO13,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 12. "PTSO12,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 11. "PTSO11,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 10. "PTSO10,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 9. "PTSO9,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 8. "PTSO8,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 7. "PTSO7,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 6. "PTSO6,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 5. "PTSO5,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 4. "PTSO4,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 3. "PTSO3,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 2. "PTSO2,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 1. "PTSO1,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 0. "PTSO0,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
line.long 0x8 "PCOR,Port Clear Output"
bitfld.long 0x8 31. "PTCO31,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 30. "PTCO30,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 29. "PTCO29,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 28. "PTCO28,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 27. "PTCO27,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 26. "PTCO26,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 25. "PTCO25,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 24. "PTCO24,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 23. "PTCO23,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 22. "PTCO22,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 21. "PTCO21,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 20. "PTCO20,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 19. "PTCO19,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 18. "PTCO18,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 17. "PTCO17,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 16. "PTCO16,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 15. "PTCO15,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 14. "PTCO14,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 13. "PTCO13,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 12. "PTCO12,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 11. "PTCO11,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 10. "PTCO10,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 9. "PTCO9,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 8. "PTCO8,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 7. "PTCO7,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 6. "PTCO6,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 5. "PTCO5,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 4. "PTCO4,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 3. "PTCO3,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 2. "PTCO2,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 1. "PTCO1,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 0. "PTCO0,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
line.long 0xC "PTOR,Port Toggle Output"
bitfld.long 0xC 31. "PTTO31,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 30. "PTTO30,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 29. "PTTO29,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 28. "PTTO28,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 27. "PTTO27,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 26. "PTTO26,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 25. "PTTO25,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 24. "PTTO24,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 23. "PTTO23,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 22. "PTTO22,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 21. "PTTO21,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 20. "PTTO20,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 19. "PTTO19,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 18. "PTTO18,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 17. "PTTO17,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 16. "PTTO16,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 15. "PTTO15,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 14. "PTTO14,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 13. "PTTO13,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 12. "PTTO12,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 11. "PTTO11,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 10. "PTTO10,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 9. "PTTO9,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 8. "PTTO8,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 7. "PTTO7,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 6. "PTTO6,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 5. "PTTO5,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 4. "PTTO4,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 3. "PTTO3,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 2. "PTTO2,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 1. "PTTO1,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 0. "PTTO0,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
rgroup.long 0x50++0x3
line.long 0x0 "PDIR,Port Data Input"
bitfld.long 0x0 31. "PDI31,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 30. "PDI30,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 29. "PDI29,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 28. "PDI28,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 27. "PDI27,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 26. "PDI26,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 25. "PDI25,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 24. "PDI24,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 23. "PDI23,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 22. "PDI22,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 21. "PDI21,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 20. "PDI20,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 19. "PDI19,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 18. "PDI18,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 17. "PDI17,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 16. "PDI16,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 15. "PDI15,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 14. "PDI14,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 13. "PDI13,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 12. "PDI12,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 11. "PDI11,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 10. "PDI10,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 9. "PDI9,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 8. "PDI8,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 7. "PDI7,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 6. "PDI6,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 5. "PDI5,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 4. "PDI4,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 3. "PDI3,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 2. "PDI2,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 1. "PDI1,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 0. "PDI0,Port Data Input" "0: Logic 0,1: Logic 1"
group.long 0x54++0x7
line.long 0x0 "PDDR,Port Data Direction"
bitfld.long 0x0 31. "PDD31,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 30. "PDD30,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 29. "PDD29,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 28. "PDD28,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 27. "PDD27,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 26. "PDD26,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 25. "PDD25,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 24. "PDD24,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 23. "PDD23,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 22. "PDD22,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 21. "PDD21,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 20. "PDD20,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 19. "PDD19,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 18. "PDD18,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 17. "PDD17,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 16. "PDD16,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 15. "PDD15,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 14. "PDD14,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 13. "PDD13,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 12. "PDD12,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 11. "PDD11,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 10. "PDD10,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 9. "PDD9,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 8. "PDD8,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 7. "PDD7,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 6. "PDD6,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 5. "PDD5,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 4. "PDD4,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 3. "PDD3,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 2. "PDD2,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 1. "PDD1,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 0. "PDD0,Port Data Direction" "0: Input,1: Output"
line.long 0x4 "PIDR,Port Input Disable"
bitfld.long 0x4 31. "PID31,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 30. "PID30,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 29. "PID29,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 28. "PID28,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 27. "PID27,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 26. "PID26,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 25. "PID25,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 24. "PID24,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 23. "PID23,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 22. "PID22,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 21. "PID21,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 20. "PID20,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 19. "PID19,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 18. "PID18,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 17. "PID17,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 16. "PID16,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 15. "PID15,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 14. "PID14,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 13. "PID13,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 12. "PID12,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 11. "PID11,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 10. "PID10,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 9. "PID9,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 8. "PID8,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 7. "PID7,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 6. "PID6,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 5. "PID5,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 4. "PID4,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 3. "PID3,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 2. "PID2,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 1. "PID1,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 0. "PID0,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x60)++0x0
line.byte 0x0 "PDR[$1],Pin Data"
bitfld.byte 0x0 0. "PD,Pin Data (I/O)" "0: Logic zero,1: Logic one"
repeat.end
group.long 0x80++0x87
line.long 0x0 "ICR0,Interrupt Control 0"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4 "ICR1,Interrupt Control 1"
eventfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x8 "ICR2,Interrupt Control 2"
eventfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0xC "ICR3,Interrupt Control 3"
eventfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x10 "ICR4,Interrupt Control 4"
eventfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x14 "ICR5,Interrupt Control 5"
eventfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x18 "ICR6,Interrupt Control 6"
eventfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x1C "ICR7,Interrupt Control 7"
eventfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x20 "ICR8,Interrupt Control 8"
eventfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x24 "ICR9,Interrupt Control 9"
eventfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x28 "ICR10,Interrupt Control 10"
eventfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x2C "ICR11,Interrupt Control 11"
eventfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x30 "ICR12,Interrupt Control 12"
eventfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x34 "ICR13,Interrupt Control 13"
eventfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x38 "ICR14,Interrupt Control 14"
eventfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x3C "ICR15,Interrupt Control 15"
eventfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x40 "ICR16,Interrupt Control 16"
eventfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x44 "ICR17,Interrupt Control 17"
eventfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x48 "ICR18,Interrupt Control 18"
eventfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4C "ICR19,Interrupt Control 19"
eventfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x50 "ICR20,Interrupt Control 20"
eventfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x54 "ICR21,Interrupt Control 21"
eventfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x58 "ICR22,Interrupt Control 22"
eventfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x5C "ICR23,Interrupt Control 23"
eventfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x60 "ICR24,Interrupt Control 24"
eventfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x64 "ICR25,Interrupt Control 25"
eventfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x68 "ICR26,Interrupt Control 26"
eventfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x6C "ICR27,Interrupt Control 27"
eventfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x70 "ICR28,Interrupt Control 28"
eventfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x74 "ICR29,Interrupt Control 29"
eventfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x78 "ICR30,Interrupt Control 30"
eventfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x7C "ICR31,Interrupt Control 31"
eventfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x80 "GICLR,Global Interrupt Control Low"
hexmask.long.word 0x80 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x80 15. "GIWE15,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 14. "GIWE14,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 13. "GIWE13,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 12. "GIWE12,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 11. "GIWE11,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 10. "GIWE10,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 9. "GIWE9,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 8. "GIWE8,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 7. "GIWE7,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 6. "GIWE6,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 5. "GIWE5,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 4. "GIWE4,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 3. "GIWE3,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 2. "GIWE2,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 1. "GIWE1,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 0. "GIWE0,Global Interrupt Write Enable" "0: Not updated,1: Updated"
line.long 0x84 "GICHR,Global Interrupt Control High"
hexmask.long.word 0x84 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x84 15. "GIWE31,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 14. "GIWE30,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 13. "GIWE29,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 12. "GIWE28,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 11. "GIWE27,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 10. "GIWE26,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 9. "GIWE25,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 8. "GIWE24,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 7. "GIWE23,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 6. "GIWE22,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 5. "GIWE21,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 4. "GIWE20,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 3. "GIWE19,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 2. "GIWE18,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 1. "GIWE17,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 0. "GIWE16,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
group.long 0x120++0x3
line.long 0x0 "ISFR0,Interrupt Status Flag"
eventfld.long 0x0 31. "ISF31,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 30. "ISF30,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 29. "ISF29,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 28. "ISF28,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 27. "ISF27,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 26. "ISF26,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 25. "ISF25,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 24. "ISF24,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 23. "ISF23,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 22. "ISF22,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 21. "ISF21,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 20. "ISF20,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 19. "ISF19,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 18. "ISF18,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 17. "ISF17,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 16. "ISF16,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 15. "ISF15,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 14. "ISF14,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 13. "ISF13,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 12. "ISF12,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 11. "ISF11,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 10. "ISF10,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 9. "ISF9,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 8. "ISF8,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 7. "ISF7,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 6. "ISF6,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 5. "ISF5,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 4. "ISF4,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 3. "ISF3,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 2. "ISF2,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 1. "ISF1,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 0. "ISF0,Interrupt Status Flag" "0: Not detected,1: Detected"
tree.end
endif
sif (cpuis("MC?A146*"))
tree "GPIO4"
base ad:0x40106000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "IRQNUM,Interrupt Number"
group.long 0x40++0xF
line.long 0x0 "PDOR,Port Data Output"
bitfld.long 0x0 31. "PDO31,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 30. "PDO30,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 29. "PDO29,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 28. "PDO28,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 27. "PDO27,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 26. "PDO26,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 25. "PDO25,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 24. "PDO24,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 23. "PDO23,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 22. "PDO22,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 21. "PDO21,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 20. "PDO20,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 19. "PDO19,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 18. "PDO18,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 17. "PDO17,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 16. "PDO16,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 15. "PDO15,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 14. "PDO14,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 13. "PDO13,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 12. "PDO12,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 11. "PDO11,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 10. "PDO10,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 9. "PDO9,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 8. "PDO8,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 7. "PDO7,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 6. "PDO6,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 5. "PDO5,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 4. "PDO4,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 3. "PDO3,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 2. "PDO2,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 1. "PDO1,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 0. "PDO0,Port Data Output" "0: Logic level 0,1: Logic level 1"
line.long 0x4 "PSOR,Port Set Output"
bitfld.long 0x4 31. "PTSO31,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 30. "PTSO30,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 29. "PTSO29,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 28. "PTSO28,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 27. "PTSO27,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 26. "PTSO26,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 25. "PTSO25,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 24. "PTSO24,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 23. "PTSO23,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 22. "PTSO22,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 21. "PTSO21,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 20. "PTSO20,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 19. "PTSO19,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 18. "PTSO18,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 17. "PTSO17,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 16. "PTSO16,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 15. "PTSO15,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 14. "PTSO14,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 13. "PTSO13,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 12. "PTSO12,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 11. "PTSO11,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 10. "PTSO10,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 9. "PTSO9,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 8. "PTSO8,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 7. "PTSO7,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 6. "PTSO6,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 5. "PTSO5,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 4. "PTSO4,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 3. "PTSO3,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 2. "PTSO2,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 1. "PTSO1,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 0. "PTSO0,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
line.long 0x8 "PCOR,Port Clear Output"
bitfld.long 0x8 31. "PTCO31,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 30. "PTCO30,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 29. "PTCO29,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 28. "PTCO28,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 27. "PTCO27,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 26. "PTCO26,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 25. "PTCO25,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 24. "PTCO24,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 23. "PTCO23,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 22. "PTCO22,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 21. "PTCO21,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 20. "PTCO20,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 19. "PTCO19,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 18. "PTCO18,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 17. "PTCO17,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 16. "PTCO16,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 15. "PTCO15,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 14. "PTCO14,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 13. "PTCO13,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 12. "PTCO12,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 11. "PTCO11,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 10. "PTCO10,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 9. "PTCO9,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 8. "PTCO8,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 7. "PTCO7,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 6. "PTCO6,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 5. "PTCO5,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 4. "PTCO4,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 3. "PTCO3,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 2. "PTCO2,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 1. "PTCO1,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 0. "PTCO0,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
line.long 0xC "PTOR,Port Toggle Output"
bitfld.long 0xC 31. "PTTO31,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 30. "PTTO30,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 29. "PTTO29,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 28. "PTTO28,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 27. "PTTO27,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 26. "PTTO26,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 25. "PTTO25,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 24. "PTTO24,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 23. "PTTO23,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 22. "PTTO22,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 21. "PTTO21,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 20. "PTTO20,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 19. "PTTO19,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 18. "PTTO18,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 17. "PTTO17,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 16. "PTTO16,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 15. "PTTO15,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 14. "PTTO14,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 13. "PTTO13,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 12. "PTTO12,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 11. "PTTO11,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 10. "PTTO10,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 9. "PTTO9,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 8. "PTTO8,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 7. "PTTO7,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 6. "PTTO6,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 5. "PTTO5,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 4. "PTTO4,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 3. "PTTO3,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 2. "PTTO2,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 1. "PTTO1,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 0. "PTTO0,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
rgroup.long 0x50++0x3
line.long 0x0 "PDIR,Port Data Input"
bitfld.long 0x0 31. "PDI31,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 30. "PDI30,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 29. "PDI29,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 28. "PDI28,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 27. "PDI27,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 26. "PDI26,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 25. "PDI25,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 24. "PDI24,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 23. "PDI23,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 22. "PDI22,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 21. "PDI21,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 20. "PDI20,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 19. "PDI19,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 18. "PDI18,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 17. "PDI17,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 16. "PDI16,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 15. "PDI15,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 14. "PDI14,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 13. "PDI13,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 12. "PDI12,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 11. "PDI11,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 10. "PDI10,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 9. "PDI9,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 8. "PDI8,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 7. "PDI7,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 6. "PDI6,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 5. "PDI5,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 4. "PDI4,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 3. "PDI3,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 2. "PDI2,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 1. "PDI1,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 0. "PDI0,Port Data Input" "0: Logic 0,1: Logic 1"
group.long 0x54++0x7
line.long 0x0 "PDDR,Port Data Direction"
bitfld.long 0x0 31. "PDD31,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 30. "PDD30,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 29. "PDD29,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 28. "PDD28,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 27. "PDD27,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 26. "PDD26,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 25. "PDD25,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 24. "PDD24,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 23. "PDD23,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 22. "PDD22,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 21. "PDD21,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 20. "PDD20,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 19. "PDD19,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 18. "PDD18,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 17. "PDD17,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 16. "PDD16,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 15. "PDD15,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 14. "PDD14,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 13. "PDD13,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 12. "PDD12,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 11. "PDD11,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 10. "PDD10,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 9. "PDD9,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 8. "PDD8,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 7. "PDD7,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 6. "PDD6,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 5. "PDD5,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 4. "PDD4,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 3. "PDD3,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 2. "PDD2,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 1. "PDD1,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 0. "PDD0,Port Data Direction" "0: Input,1: Output"
line.long 0x4 "PIDR,Port Input Disable"
bitfld.long 0x4 31. "PID31,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 30. "PID30,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 29. "PID29,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 28. "PID28,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 27. "PID27,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 26. "PID26,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 25. "PID25,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 24. "PID24,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 23. "PID23,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 22. "PID22,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 21. "PID21,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 20. "PID20,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 19. "PID19,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 18. "PID18,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 17. "PID17,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 16. "PID16,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 15. "PID15,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 14. "PID14,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 13. "PID13,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 12. "PID12,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 11. "PID11,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 10. "PID10,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 9. "PID9,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 8. "PID8,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 7. "PID7,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 6. "PID6,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 5. "PID5,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 4. "PID4,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 3. "PID3,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 2. "PID2,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 1. "PID1,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 0. "PID0,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x60)++0x0
line.byte 0x0 "PDR[$1],Pin Data"
bitfld.byte 0x0 0. "PD,Pin Data (I/O)" "0: Logic zero,1: Logic one"
repeat.end
group.long 0x80++0x87
line.long 0x0 "ICR0,Interrupt Control 0"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4 "ICR1,Interrupt Control 1"
eventfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x8 "ICR2,Interrupt Control 2"
eventfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0xC "ICR3,Interrupt Control 3"
eventfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x10 "ICR4,Interrupt Control 4"
eventfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x14 "ICR5,Interrupt Control 5"
eventfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x18 "ICR6,Interrupt Control 6"
eventfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x1C "ICR7,Interrupt Control 7"
eventfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x20 "ICR8,Interrupt Control 8"
eventfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x24 "ICR9,Interrupt Control 9"
eventfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x28 "ICR10,Interrupt Control 10"
eventfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x2C "ICR11,Interrupt Control 11"
eventfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x30 "ICR12,Interrupt Control 12"
eventfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x34 "ICR13,Interrupt Control 13"
eventfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x38 "ICR14,Interrupt Control 14"
eventfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x3C "ICR15,Interrupt Control 15"
eventfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x40 "ICR16,Interrupt Control 16"
eventfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x44 "ICR17,Interrupt Control 17"
eventfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x48 "ICR18,Interrupt Control 18"
eventfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4C "ICR19,Interrupt Control 19"
eventfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x50 "ICR20,Interrupt Control 20"
eventfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x54 "ICR21,Interrupt Control 21"
eventfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x58 "ICR22,Interrupt Control 22"
eventfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x5C "ICR23,Interrupt Control 23"
eventfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x60 "ICR24,Interrupt Control 24"
eventfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x64 "ICR25,Interrupt Control 25"
eventfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x68 "ICR26,Interrupt Control 26"
eventfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x6C "ICR27,Interrupt Control 27"
eventfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x70 "ICR28,Interrupt Control 28"
eventfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x74 "ICR29,Interrupt Control 29"
eventfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x78 "ICR30,Interrupt Control 30"
eventfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x7C "ICR31,Interrupt Control 31"
eventfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x80 "GICLR,Global Interrupt Control Low"
hexmask.long.word 0x80 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x80 15. "GIWE15,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 14. "GIWE14,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 13. "GIWE13,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 12. "GIWE12,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 11. "GIWE11,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 10. "GIWE10,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 9. "GIWE9,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 8. "GIWE8,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 7. "GIWE7,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 6. "GIWE6,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 5. "GIWE5,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 4. "GIWE4,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 3. "GIWE3,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 2. "GIWE2,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 1. "GIWE1,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 0. "GIWE0,Global Interrupt Write Enable" "0: Not updated,1: Updated"
line.long 0x84 "GICHR,Global Interrupt Control High"
hexmask.long.word 0x84 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x84 15. "GIWE31,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 14. "GIWE30,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 13. "GIWE29,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 12. "GIWE28,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 11. "GIWE27,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 10. "GIWE26,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 9. "GIWE25,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 8. "GIWE24,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 7. "GIWE23,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 6. "GIWE22,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 5. "GIWE21,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 4. "GIWE20,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 3. "GIWE19,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 2. "GIWE18,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 1. "GIWE17,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 0. "GIWE16,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
group.long 0x120++0x3
line.long 0x0 "ISFR0,Interrupt Status Flag"
eventfld.long 0x0 31. "ISF31,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 30. "ISF30,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 29. "ISF29,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 28. "ISF28,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 27. "ISF27,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 26. "ISF26,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 25. "ISF25,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 24. "ISF24,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 23. "ISF23,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 22. "ISF22,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 21. "ISF21,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 20. "ISF20,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 19. "ISF19,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 18. "ISF18,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 17. "ISF17,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 16. "ISF16,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 15. "ISF15,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 14. "ISF14,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 13. "ISF13,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 12. "ISF12,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 11. "ISF11,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 10. "ISF10,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 9. "ISF9,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 8. "ISF8,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 7. "ISF7,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 6. "ISF6,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 5. "ISF5,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 4. "ISF4,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 3. "ISF3,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 2. "ISF2,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 1. "ISF1,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 0. "ISF0,Interrupt Status Flag" "0: Not detected,1: Detected"
tree.end
endif
sif (cpuis("MC?A154*"))
tree "GPIO4"
base ad:0x40106000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "IRQNUM,Interrupt Number"
group.long 0x40++0xF
line.long 0x0 "PDOR,Port Data Output"
bitfld.long 0x0 31. "PDO31,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 30. "PDO30,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 29. "PDO29,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 28. "PDO28,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 27. "PDO27,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 26. "PDO26,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 25. "PDO25,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 24. "PDO24,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 23. "PDO23,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 22. "PDO22,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 21. "PDO21,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 20. "PDO20,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 19. "PDO19,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 18. "PDO18,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 17. "PDO17,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 16. "PDO16,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 15. "PDO15,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 14. "PDO14,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 13. "PDO13,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 12. "PDO12,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 11. "PDO11,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 10. "PDO10,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 9. "PDO9,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 8. "PDO8,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 7. "PDO7,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 6. "PDO6,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 5. "PDO5,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 4. "PDO4,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 3. "PDO3,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 2. "PDO2,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 1. "PDO1,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 0. "PDO0,Port Data Output" "0: Logic level 0,1: Logic level 1"
line.long 0x4 "PSOR,Port Set Output"
bitfld.long 0x4 31. "PTSO31,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 30. "PTSO30,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 29. "PTSO29,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 28. "PTSO28,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 27. "PTSO27,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 26. "PTSO26,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 25. "PTSO25,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 24. "PTSO24,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 23. "PTSO23,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 22. "PTSO22,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 21. "PTSO21,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 20. "PTSO20,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 19. "PTSO19,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 18. "PTSO18,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 17. "PTSO17,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 16. "PTSO16,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 15. "PTSO15,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 14. "PTSO14,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 13. "PTSO13,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 12. "PTSO12,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 11. "PTSO11,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 10. "PTSO10,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 9. "PTSO9,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 8. "PTSO8,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 7. "PTSO7,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 6. "PTSO6,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 5. "PTSO5,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 4. "PTSO4,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 3. "PTSO3,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 2. "PTSO2,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 1. "PTSO1,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 0. "PTSO0,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
line.long 0x8 "PCOR,Port Clear Output"
bitfld.long 0x8 31. "PTCO31,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 30. "PTCO30,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 29. "PTCO29,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 28. "PTCO28,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 27. "PTCO27,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 26. "PTCO26,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 25. "PTCO25,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 24. "PTCO24,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 23. "PTCO23,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 22. "PTCO22,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 21. "PTCO21,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 20. "PTCO20,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 19. "PTCO19,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 18. "PTCO18,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 17. "PTCO17,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 16. "PTCO16,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 15. "PTCO15,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 14. "PTCO14,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 13. "PTCO13,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 12. "PTCO12,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 11. "PTCO11,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 10. "PTCO10,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 9. "PTCO9,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 8. "PTCO8,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 7. "PTCO7,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 6. "PTCO6,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 5. "PTCO5,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 4. "PTCO4,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 3. "PTCO3,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 2. "PTCO2,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 1. "PTCO1,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 0. "PTCO0,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
line.long 0xC "PTOR,Port Toggle Output"
bitfld.long 0xC 31. "PTTO31,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 30. "PTTO30,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 29. "PTTO29,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 28. "PTTO28,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 27. "PTTO27,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 26. "PTTO26,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 25. "PTTO25,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 24. "PTTO24,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 23. "PTTO23,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 22. "PTTO22,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 21. "PTTO21,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 20. "PTTO20,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 19. "PTTO19,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 18. "PTTO18,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 17. "PTTO17,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 16. "PTTO16,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 15. "PTTO15,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 14. "PTTO14,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 13. "PTTO13,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 12. "PTTO12,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 11. "PTTO11,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 10. "PTTO10,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 9. "PTTO9,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 8. "PTTO8,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 7. "PTTO7,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 6. "PTTO6,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 5. "PTTO5,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 4. "PTTO4,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 3. "PTTO3,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 2. "PTTO2,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 1. "PTTO1,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 0. "PTTO0,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
rgroup.long 0x50++0x3
line.long 0x0 "PDIR,Port Data Input"
bitfld.long 0x0 31. "PDI31,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 30. "PDI30,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 29. "PDI29,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 28. "PDI28,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 27. "PDI27,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 26. "PDI26,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 25. "PDI25,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 24. "PDI24,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 23. "PDI23,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 22. "PDI22,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 21. "PDI21,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 20. "PDI20,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 19. "PDI19,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 18. "PDI18,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 17. "PDI17,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 16. "PDI16,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 15. "PDI15,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 14. "PDI14,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 13. "PDI13,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 12. "PDI12,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 11. "PDI11,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 10. "PDI10,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 9. "PDI9,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 8. "PDI8,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 7. "PDI7,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 6. "PDI6,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 5. "PDI5,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 4. "PDI4,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 3. "PDI3,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 2. "PDI2,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 1. "PDI1,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 0. "PDI0,Port Data Input" "0: Logic 0,1: Logic 1"
group.long 0x54++0x7
line.long 0x0 "PDDR,Port Data Direction"
bitfld.long 0x0 31. "PDD31,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 30. "PDD30,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 29. "PDD29,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 28. "PDD28,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 27. "PDD27,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 26. "PDD26,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 25. "PDD25,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 24. "PDD24,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 23. "PDD23,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 22. "PDD22,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 21. "PDD21,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 20. "PDD20,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 19. "PDD19,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 18. "PDD18,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 17. "PDD17,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 16. "PDD16,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 15. "PDD15,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 14. "PDD14,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 13. "PDD13,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 12. "PDD12,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 11. "PDD11,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 10. "PDD10,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 9. "PDD9,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 8. "PDD8,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 7. "PDD7,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 6. "PDD6,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 5. "PDD5,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 4. "PDD4,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 3. "PDD3,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 2. "PDD2,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 1. "PDD1,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 0. "PDD0,Port Data Direction" "0: Input,1: Output"
line.long 0x4 "PIDR,Port Input Disable"
bitfld.long 0x4 31. "PID31,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 30. "PID30,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 29. "PID29,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 28. "PID28,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 27. "PID27,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 26. "PID26,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 25. "PID25,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 24. "PID24,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 23. "PID23,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 22. "PID22,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 21. "PID21,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 20. "PID20,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 19. "PID19,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 18. "PID18,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 17. "PID17,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 16. "PID16,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 15. "PID15,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 14. "PID14,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 13. "PID13,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 12. "PID12,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 11. "PID11,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 10. "PID10,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 9. "PID9,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 8. "PID8,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 7. "PID7,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 6. "PID6,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 5. "PID5,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 4. "PID4,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 3. "PID3,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 2. "PID2,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 1. "PID1,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 0. "PID0,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x60)++0x0
line.byte 0x0 "PDR[$1],Pin Data"
bitfld.byte 0x0 0. "PD,Pin Data (I/O)" "0: Logic zero,1: Logic one"
repeat.end
group.long 0x80++0x87
line.long 0x0 "ICR0,Interrupt Control 0"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4 "ICR1,Interrupt Control 1"
eventfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x8 "ICR2,Interrupt Control 2"
eventfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0xC "ICR3,Interrupt Control 3"
eventfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x10 "ICR4,Interrupt Control 4"
eventfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x14 "ICR5,Interrupt Control 5"
eventfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x18 "ICR6,Interrupt Control 6"
eventfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x1C "ICR7,Interrupt Control 7"
eventfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x20 "ICR8,Interrupt Control 8"
eventfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x24 "ICR9,Interrupt Control 9"
eventfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x28 "ICR10,Interrupt Control 10"
eventfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x2C "ICR11,Interrupt Control 11"
eventfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x30 "ICR12,Interrupt Control 12"
eventfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x34 "ICR13,Interrupt Control 13"
eventfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x38 "ICR14,Interrupt Control 14"
eventfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x3C "ICR15,Interrupt Control 15"
eventfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x40 "ICR16,Interrupt Control 16"
eventfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x44 "ICR17,Interrupt Control 17"
eventfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x48 "ICR18,Interrupt Control 18"
eventfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4C "ICR19,Interrupt Control 19"
eventfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x50 "ICR20,Interrupt Control 20"
eventfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x54 "ICR21,Interrupt Control 21"
eventfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x58 "ICR22,Interrupt Control 22"
eventfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x5C "ICR23,Interrupt Control 23"
eventfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x60 "ICR24,Interrupt Control 24"
eventfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x64 "ICR25,Interrupt Control 25"
eventfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x68 "ICR26,Interrupt Control 26"
eventfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x6C "ICR27,Interrupt Control 27"
eventfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x70 "ICR28,Interrupt Control 28"
eventfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x74 "ICR29,Interrupt Control 29"
eventfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x78 "ICR30,Interrupt Control 30"
eventfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x7C "ICR31,Interrupt Control 31"
eventfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x80 "GICLR,Global Interrupt Control Low"
hexmask.long.word 0x80 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x80 15. "GIWE15,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 14. "GIWE14,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 13. "GIWE13,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 12. "GIWE12,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 11. "GIWE11,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 10. "GIWE10,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 9. "GIWE9,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 8. "GIWE8,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 7. "GIWE7,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 6. "GIWE6,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 5. "GIWE5,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 4. "GIWE4,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 3. "GIWE3,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 2. "GIWE2,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 1. "GIWE1,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 0. "GIWE0,Global Interrupt Write Enable" "0: Not updated,1: Updated"
line.long 0x84 "GICHR,Global Interrupt Control High"
hexmask.long.word 0x84 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x84 15. "GIWE31,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 14. "GIWE30,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 13. "GIWE29,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 12. "GIWE28,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 11. "GIWE27,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 10. "GIWE26,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 9. "GIWE25,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 8. "GIWE24,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 7. "GIWE23,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 6. "GIWE22,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 5. "GIWE21,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 4. "GIWE20,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 3. "GIWE19,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 2. "GIWE18,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 1. "GIWE17,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 0. "GIWE16,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
group.long 0x120++0x3
line.long 0x0 "ISFR0,Interrupt Status Flag"
eventfld.long 0x0 31. "ISF31,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 30. "ISF30,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 29. "ISF29,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 28. "ISF28,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 27. "ISF27,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 26. "ISF26,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 25. "ISF25,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 24. "ISF24,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 23. "ISF23,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 22. "ISF22,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 21. "ISF21,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 20. "ISF20,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 19. "ISF19,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 18. "ISF18,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 17. "ISF17,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 16. "ISF16,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 15. "ISF15,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 14. "ISF14,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 13. "ISF13,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 12. "ISF12,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 11. "ISF11,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 10. "ISF10,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 9. "ISF9,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 8. "ISF8,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 7. "ISF7,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 6. "ISF6,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 5. "ISF5,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 4. "ISF4,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 3. "ISF3,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 2. "ISF2,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 1. "ISF1,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 0. "ISF0,Interrupt Status Flag" "0: Not detected,1: Detected"
tree.end
endif
sif (cpuis("MC?A155*"))
tree "GPIO4"
base ad:0x40106000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "IRQNUM,Interrupt Number"
group.long 0x40++0xF
line.long 0x0 "PDOR,Port Data Output"
bitfld.long 0x0 31. "PDO31,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 30. "PDO30,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 29. "PDO29,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 28. "PDO28,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 27. "PDO27,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 26. "PDO26,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 25. "PDO25,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 24. "PDO24,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 23. "PDO23,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 22. "PDO22,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 21. "PDO21,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 20. "PDO20,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 19. "PDO19,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 18. "PDO18,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 17. "PDO17,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 16. "PDO16,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 15. "PDO15,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 14. "PDO14,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 13. "PDO13,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 12. "PDO12,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 11. "PDO11,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 10. "PDO10,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 9. "PDO9,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 8. "PDO8,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 7. "PDO7,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 6. "PDO6,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 5. "PDO5,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 4. "PDO4,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 3. "PDO3,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 2. "PDO2,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 1. "PDO1,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 0. "PDO0,Port Data Output" "0: Logic level 0,1: Logic level 1"
line.long 0x4 "PSOR,Port Set Output"
bitfld.long 0x4 31. "PTSO31,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 30. "PTSO30,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 29. "PTSO29,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 28. "PTSO28,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 27. "PTSO27,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 26. "PTSO26,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 25. "PTSO25,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 24. "PTSO24,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 23. "PTSO23,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 22. "PTSO22,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 21. "PTSO21,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 20. "PTSO20,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 19. "PTSO19,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 18. "PTSO18,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 17. "PTSO17,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 16. "PTSO16,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 15. "PTSO15,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 14. "PTSO14,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 13. "PTSO13,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 12. "PTSO12,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 11. "PTSO11,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 10. "PTSO10,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 9. "PTSO9,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 8. "PTSO8,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 7. "PTSO7,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 6. "PTSO6,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 5. "PTSO5,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 4. "PTSO4,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 3. "PTSO3,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 2. "PTSO2,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 1. "PTSO1,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 0. "PTSO0,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
line.long 0x8 "PCOR,Port Clear Output"
bitfld.long 0x8 31. "PTCO31,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 30. "PTCO30,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 29. "PTCO29,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 28. "PTCO28,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 27. "PTCO27,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 26. "PTCO26,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 25. "PTCO25,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 24. "PTCO24,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 23. "PTCO23,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 22. "PTCO22,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 21. "PTCO21,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 20. "PTCO20,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 19. "PTCO19,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 18. "PTCO18,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 17. "PTCO17,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 16. "PTCO16,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 15. "PTCO15,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 14. "PTCO14,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 13. "PTCO13,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 12. "PTCO12,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 11. "PTCO11,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 10. "PTCO10,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 9. "PTCO9,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 8. "PTCO8,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 7. "PTCO7,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 6. "PTCO6,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 5. "PTCO5,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 4. "PTCO4,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 3. "PTCO3,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 2. "PTCO2,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 1. "PTCO1,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 0. "PTCO0,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
line.long 0xC "PTOR,Port Toggle Output"
bitfld.long 0xC 31. "PTTO31,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 30. "PTTO30,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 29. "PTTO29,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 28. "PTTO28,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 27. "PTTO27,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 26. "PTTO26,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 25. "PTTO25,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 24. "PTTO24,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 23. "PTTO23,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 22. "PTTO22,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 21. "PTTO21,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 20. "PTTO20,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 19. "PTTO19,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 18. "PTTO18,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 17. "PTTO17,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 16. "PTTO16,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 15. "PTTO15,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 14. "PTTO14,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 13. "PTTO13,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 12. "PTTO12,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 11. "PTTO11,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 10. "PTTO10,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 9. "PTTO9,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 8. "PTTO8,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 7. "PTTO7,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 6. "PTTO6,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 5. "PTTO5,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 4. "PTTO4,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 3. "PTTO3,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 2. "PTTO2,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 1. "PTTO1,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 0. "PTTO0,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
rgroup.long 0x50++0x3
line.long 0x0 "PDIR,Port Data Input"
bitfld.long 0x0 31. "PDI31,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 30. "PDI30,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 29. "PDI29,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 28. "PDI28,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 27. "PDI27,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 26. "PDI26,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 25. "PDI25,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 24. "PDI24,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 23. "PDI23,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 22. "PDI22,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 21. "PDI21,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 20. "PDI20,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 19. "PDI19,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 18. "PDI18,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 17. "PDI17,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 16. "PDI16,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 15. "PDI15,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 14. "PDI14,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 13. "PDI13,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 12. "PDI12,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 11. "PDI11,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 10. "PDI10,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 9. "PDI9,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 8. "PDI8,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 7. "PDI7,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 6. "PDI6,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 5. "PDI5,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 4. "PDI4,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 3. "PDI3,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 2. "PDI2,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 1. "PDI1,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 0. "PDI0,Port Data Input" "0: Logic 0,1: Logic 1"
group.long 0x54++0x7
line.long 0x0 "PDDR,Port Data Direction"
bitfld.long 0x0 31. "PDD31,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 30. "PDD30,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 29. "PDD29,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 28. "PDD28,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 27. "PDD27,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 26. "PDD26,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 25. "PDD25,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 24. "PDD24,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 23. "PDD23,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 22. "PDD22,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 21. "PDD21,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 20. "PDD20,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 19. "PDD19,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 18. "PDD18,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 17. "PDD17,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 16. "PDD16,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 15. "PDD15,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 14. "PDD14,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 13. "PDD13,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 12. "PDD12,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 11. "PDD11,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 10. "PDD10,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 9. "PDD9,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 8. "PDD8,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 7. "PDD7,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 6. "PDD6,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 5. "PDD5,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 4. "PDD4,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 3. "PDD3,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 2. "PDD2,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 1. "PDD1,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 0. "PDD0,Port Data Direction" "0: Input,1: Output"
line.long 0x4 "PIDR,Port Input Disable"
bitfld.long 0x4 31. "PID31,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 30. "PID30,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 29. "PID29,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 28. "PID28,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 27. "PID27,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 26. "PID26,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 25. "PID25,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 24. "PID24,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 23. "PID23,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 22. "PID22,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 21. "PID21,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 20. "PID20,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 19. "PID19,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 18. "PID18,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 17. "PID17,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 16. "PID16,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 15. "PID15,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 14. "PID14,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 13. "PID13,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 12. "PID12,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 11. "PID11,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 10. "PID10,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 9. "PID9,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 8. "PID8,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 7. "PID7,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 6. "PID6,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 5. "PID5,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 4. "PID4,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 3. "PID3,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 2. "PID2,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 1. "PID1,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 0. "PID0,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x60)++0x0
line.byte 0x0 "PDR[$1],Pin Data"
bitfld.byte 0x0 0. "PD,Pin Data (I/O)" "0: Logic zero,1: Logic one"
repeat.end
group.long 0x80++0x87
line.long 0x0 "ICR0,Interrupt Control 0"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4 "ICR1,Interrupt Control 1"
eventfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x8 "ICR2,Interrupt Control 2"
eventfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0xC "ICR3,Interrupt Control 3"
eventfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x10 "ICR4,Interrupt Control 4"
eventfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x14 "ICR5,Interrupt Control 5"
eventfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x18 "ICR6,Interrupt Control 6"
eventfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x1C "ICR7,Interrupt Control 7"
eventfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x20 "ICR8,Interrupt Control 8"
eventfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x24 "ICR9,Interrupt Control 9"
eventfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x28 "ICR10,Interrupt Control 10"
eventfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x2C "ICR11,Interrupt Control 11"
eventfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x30 "ICR12,Interrupt Control 12"
eventfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x34 "ICR13,Interrupt Control 13"
eventfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x38 "ICR14,Interrupt Control 14"
eventfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x3C "ICR15,Interrupt Control 15"
eventfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x40 "ICR16,Interrupt Control 16"
eventfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x44 "ICR17,Interrupt Control 17"
eventfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x48 "ICR18,Interrupt Control 18"
eventfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4C "ICR19,Interrupt Control 19"
eventfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x50 "ICR20,Interrupt Control 20"
eventfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x54 "ICR21,Interrupt Control 21"
eventfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x58 "ICR22,Interrupt Control 22"
eventfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x5C "ICR23,Interrupt Control 23"
eventfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x60 "ICR24,Interrupt Control 24"
eventfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x64 "ICR25,Interrupt Control 25"
eventfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x68 "ICR26,Interrupt Control 26"
eventfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x6C "ICR27,Interrupt Control 27"
eventfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x70 "ICR28,Interrupt Control 28"
eventfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x74 "ICR29,Interrupt Control 29"
eventfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x78 "ICR30,Interrupt Control 30"
eventfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x7C "ICR31,Interrupt Control 31"
eventfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x80 "GICLR,Global Interrupt Control Low"
hexmask.long.word 0x80 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x80 15. "GIWE15,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 14. "GIWE14,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 13. "GIWE13,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 12. "GIWE12,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 11. "GIWE11,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 10. "GIWE10,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 9. "GIWE9,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 8. "GIWE8,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 7. "GIWE7,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 6. "GIWE6,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 5. "GIWE5,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 4. "GIWE4,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 3. "GIWE3,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 2. "GIWE2,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 1. "GIWE1,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 0. "GIWE0,Global Interrupt Write Enable" "0: Not updated,1: Updated"
line.long 0x84 "GICHR,Global Interrupt Control High"
hexmask.long.word 0x84 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x84 15. "GIWE31,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 14. "GIWE30,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 13. "GIWE29,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 12. "GIWE28,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 11. "GIWE27,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 10. "GIWE26,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 9. "GIWE25,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 8. "GIWE24,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 7. "GIWE23,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 6. "GIWE22,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 5. "GIWE21,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 4. "GIWE20,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 3. "GIWE19,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 2. "GIWE18,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 1. "GIWE17,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 0. "GIWE16,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
group.long 0x120++0x3
line.long 0x0 "ISFR0,Interrupt Status Flag"
eventfld.long 0x0 31. "ISF31,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 30. "ISF30,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 29. "ISF29,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 28. "ISF28,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 27. "ISF27,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 26. "ISF26,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 25. "ISF25,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 24. "ISF24,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 23. "ISF23,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 22. "ISF22,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 21. "ISF21,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 20. "ISF20,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 19. "ISF19,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 18. "ISF18,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 17. "ISF17,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 16. "ISF16,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 15. "ISF15,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 14. "ISF14,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 13. "ISF13,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 12. "ISF12,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 11. "ISF11,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 10. "ISF10,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 9. "ISF9,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 8. "ISF8,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 7. "ISF7,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 6. "ISF6,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 5. "ISF5,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 4. "ISF4,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 3. "ISF3,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 2. "ISF2,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 1. "ISF1,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 0. "ISF0,Interrupt Status Flag" "0: Not detected,1: Detected"
tree.end
endif
sif (cpuis("MC?A156*"))
tree "GPIO4"
base ad:0x40106000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 0.--3. 1. "IRQNUM,Interrupt Number"
group.long 0x40++0xF
line.long 0x0 "PDOR,Port Data Output"
bitfld.long 0x0 31. "PDO31,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 30. "PDO30,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 29. "PDO29,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 28. "PDO28,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 27. "PDO27,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 26. "PDO26,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 25. "PDO25,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 24. "PDO24,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 23. "PDO23,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 22. "PDO22,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 21. "PDO21,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 20. "PDO20,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 19. "PDO19,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 18. "PDO18,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 17. "PDO17,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 16. "PDO16,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 15. "PDO15,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 14. "PDO14,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 13. "PDO13,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 12. "PDO12,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 11. "PDO11,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 10. "PDO10,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 9. "PDO9,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 8. "PDO8,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 7. "PDO7,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 6. "PDO6,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 5. "PDO5,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 4. "PDO4,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 3. "PDO3,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 2. "PDO2,Port Data Output" "0: Logic level 0,1: Logic level 1"
newline
bitfld.long 0x0 1. "PDO1,Port Data Output" "0: Logic level 0,1: Logic level 1"
bitfld.long 0x0 0. "PDO0,Port Data Output" "0: Logic level 0,1: Logic level 1"
line.long 0x4 "PSOR,Port Set Output"
bitfld.long 0x4 31. "PTSO31,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 30. "PTSO30,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 29. "PTSO29,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 28. "PTSO28,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 27. "PTSO27,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 26. "PTSO26,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 25. "PTSO25,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 24. "PTSO24,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 23. "PTSO23,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 22. "PTSO22,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 21. "PTSO21,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 20. "PTSO20,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 19. "PTSO19,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 18. "PTSO18,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 17. "PTSO17,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 16. "PTSO16,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 15. "PTSO15,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 14. "PTSO14,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 13. "PTSO13,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 12. "PTSO12,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 11. "PTSO11,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 10. "PTSO10,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 9. "PTSO9,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 8. "PTSO8,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 7. "PTSO7,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 6. "PTSO6,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 5. "PTSO5,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 4. "PTSO4,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 3. "PTSO3,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 2. "PTSO2,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
newline
bitfld.long 0x4 1. "PTSO1,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
bitfld.long 0x4 0. "PTSO0,Port Set Output" "0: No change,1: Corresponding field in PDOR becomes 1"
line.long 0x8 "PCOR,Port Clear Output"
bitfld.long 0x8 31. "PTCO31,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 30. "PTCO30,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 29. "PTCO29,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 28. "PTCO28,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 27. "PTCO27,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 26. "PTCO26,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 25. "PTCO25,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 24. "PTCO24,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 23. "PTCO23,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 22. "PTCO22,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 21. "PTCO21,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 20. "PTCO20,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 19. "PTCO19,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 18. "PTCO18,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 17. "PTCO17,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 16. "PTCO16,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 15. "PTCO15,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 14. "PTCO14,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 13. "PTCO13,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 12. "PTCO12,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 11. "PTCO11,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 10. "PTCO10,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 9. "PTCO9,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 8. "PTCO8,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 7. "PTCO7,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 6. "PTCO6,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 5. "PTCO5,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 4. "PTCO4,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 3. "PTCO3,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 2. "PTCO2,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
newline
bitfld.long 0x8 1. "PTCO1,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
bitfld.long 0x8 0. "PTCO0,Port Clear Output" "0: No change,1: Corresponding field in PDOR becomes 0"
line.long 0xC "PTOR,Port Toggle Output"
bitfld.long 0xC 31. "PTTO31,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 30. "PTTO30,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 29. "PTTO29,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 28. "PTTO28,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 27. "PTTO27,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 26. "PTTO26,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 25. "PTTO25,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 24. "PTTO24,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 23. "PTTO23,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 22. "PTTO22,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 21. "PTTO21,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 20. "PTTO20,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 19. "PTTO19,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 18. "PTTO18,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 17. "PTTO17,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 16. "PTTO16,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 15. "PTTO15,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 14. "PTTO14,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 13. "PTTO13,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 12. "PTTO12,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 11. "PTTO11,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 10. "PTTO10,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 9. "PTTO9,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 8. "PTTO8,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 7. "PTTO7,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 6. "PTTO6,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 5. "PTTO5,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 4. "PTTO4,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 3. "PTTO3,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 2. "PTTO2,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
newline
bitfld.long 0xC 1. "PTTO1,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
bitfld.long 0xC 0. "PTTO0,Port Toggle Output" "0: No change,1: Set to the inverse of its current logic state"
rgroup.long 0x50++0x3
line.long 0x0 "PDIR,Port Data Input"
bitfld.long 0x0 31. "PDI31,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 30. "PDI30,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 29. "PDI29,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 28. "PDI28,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 27. "PDI27,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 26. "PDI26,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 25. "PDI25,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 24. "PDI24,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 23. "PDI23,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 22. "PDI22,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 21. "PDI21,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 20. "PDI20,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 19. "PDI19,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 18. "PDI18,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 17. "PDI17,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 16. "PDI16,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 15. "PDI15,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 14. "PDI14,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 13. "PDI13,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 12. "PDI12,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 11. "PDI11,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 10. "PDI10,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 9. "PDI9,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 8. "PDI8,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 7. "PDI7,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 6. "PDI6,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 5. "PDI5,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 4. "PDI4,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 3. "PDI3,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 2. "PDI2,Port Data Input" "0: Logic 0,1: Logic 1"
newline
bitfld.long 0x0 1. "PDI1,Port Data Input" "0: Logic 0,1: Logic 1"
bitfld.long 0x0 0. "PDI0,Port Data Input" "0: Logic 0,1: Logic 1"
group.long 0x54++0x7
line.long 0x0 "PDDR,Port Data Direction"
bitfld.long 0x0 31. "PDD31,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 30. "PDD30,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 29. "PDD29,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 28. "PDD28,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 27. "PDD27,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 26. "PDD26,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 25. "PDD25,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 24. "PDD24,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 23. "PDD23,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 22. "PDD22,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 21. "PDD21,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 20. "PDD20,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 19. "PDD19,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 18. "PDD18,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 17. "PDD17,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 16. "PDD16,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 15. "PDD15,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 14. "PDD14,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 13. "PDD13,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 12. "PDD12,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 11. "PDD11,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 10. "PDD10,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 9. "PDD9,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 8. "PDD8,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 7. "PDD7,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 6. "PDD6,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 5. "PDD5,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 4. "PDD4,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 3. "PDD3,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 2. "PDD2,Port Data Direction" "0: Input,1: Output"
newline
bitfld.long 0x0 1. "PDD1,Port Data Direction" "0: Input,1: Output"
bitfld.long 0x0 0. "PDD0,Port Data Direction" "0: Input,1: Output"
line.long 0x4 "PIDR,Port Input Disable"
bitfld.long 0x4 31. "PID31,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 30. "PID30,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 29. "PID29,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 28. "PID28,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 27. "PID27,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 26. "PID26,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 25. "PID25,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 24. "PID24,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 23. "PID23,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 22. "PID22,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 21. "PID21,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 20. "PID20,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 19. "PID19,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 18. "PID18,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 17. "PID17,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 16. "PID16,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 15. "PID15,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 14. "PID14,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 13. "PID13,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 12. "PID12,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 11. "PID11,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 10. "PID10,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 9. "PID9,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 8. "PID8,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 7. "PID7,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 6. "PID6,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 5. "PID5,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 4. "PID4,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 3. "PID3,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 2. "PID2,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
newline
bitfld.long 0x4 1. "PID1,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
bitfld.long 0x4 0. "PID0,Port Input Disable" "0: Configured for general-purpose input,1: Disabled for general-purpose input"
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
group.byte ($2+0x60)++0x0
line.byte 0x0 "PDR[$1],Pin Data"
bitfld.byte 0x0 0. "PD,Pin Data (I/O)" "0: Logic zero,1: Logic one"
repeat.end
group.long 0x80++0x87
line.long 0x0 "ICR0,Interrupt Control 0"
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4 "ICR1,Interrupt Control 1"
eventfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x8 "ICR2,Interrupt Control 2"
eventfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0xC "ICR3,Interrupt Control 3"
eventfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x10 "ICR4,Interrupt Control 4"
eventfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x14 "ICR5,Interrupt Control 5"
eventfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x18 "ICR6,Interrupt Control 6"
eventfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x1C "ICR7,Interrupt Control 7"
eventfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x20 "ICR8,Interrupt Control 8"
eventfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x24 "ICR9,Interrupt Control 9"
eventfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x28 "ICR10,Interrupt Control 10"
eventfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x2C "ICR11,Interrupt Control 11"
eventfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x30 "ICR12,Interrupt Control 12"
eventfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x34 "ICR13,Interrupt Control 13"
eventfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x38 "ICR14,Interrupt Control 14"
eventfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x3C "ICR15,Interrupt Control 15"
eventfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x40 "ICR16,Interrupt Control 16"
eventfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x44 "ICR17,Interrupt Control 17"
eventfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x48 "ICR18,Interrupt Control 18"
eventfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x4C "ICR19,Interrupt Control 19"
eventfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x50 "ICR20,Interrupt Control 20"
eventfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x54 "ICR21,Interrupt Control 21"
eventfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x58 "ICR22,Interrupt Control 22"
eventfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x5C "ICR23,Interrupt Control 23"
eventfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x60 "ICR24,Interrupt Control 24"
eventfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x64 "ICR25,Interrupt Control 25"
eventfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x68 "ICR26,Interrupt Control 26"
eventfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x6C "ICR27,Interrupt Control 27"
eventfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x70 "ICR28,Interrupt Control 28"
eventfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x74 "ICR29,Interrupt Control 29"
eventfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x78 "ICR30,Interrupt Control 30"
eventfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x7C "ICR31,Interrupt Control 31"
eventfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Not detected,1: Detected"
hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration"
line.long 0x80 "GICLR,Global Interrupt Control Low"
hexmask.long.word 0x80 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x80 15. "GIWE15,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 14. "GIWE14,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 13. "GIWE13,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 12. "GIWE12,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 11. "GIWE11,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 10. "GIWE10,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 9. "GIWE9,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 8. "GIWE8,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 7. "GIWE7,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 6. "GIWE6,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 5. "GIWE5,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 4. "GIWE4,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 3. "GIWE3,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 2. "GIWE2,Global Interrupt Write Enable" "0: Not updated,1: Updated"
bitfld.long 0x80 1. "GIWE1,Global Interrupt Write Enable" "0: Not updated,1: Updated"
newline
bitfld.long 0x80 0. "GIWE0,Global Interrupt Write Enable" "0: Not updated,1: Updated"
line.long 0x84 "GICHR,Global Interrupt Control High"
hexmask.long.word 0x84 16.--31. 1. "GIWD,Global Interrupt Write Data"
bitfld.long 0x84 15. "GIWE31,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 14. "GIWE30,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 13. "GIWE29,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 12. "GIWE28,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 11. "GIWE27,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 10. "GIWE26,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 9. "GIWE25,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 8. "GIWE24,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 7. "GIWE23,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 6. "GIWE22,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 5. "GIWE21,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 4. "GIWE20,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 3. "GIWE19,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 2. "GIWE18,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
bitfld.long 0x84 1. "GIWE17,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
newline
bitfld.long 0x84 0. "GIWE16,Global Interrupt Write Enable" "0: Not updated.,1: Updated"
group.long 0x120++0x3
line.long 0x0 "ISFR0,Interrupt Status Flag"
eventfld.long 0x0 31. "ISF31,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 30. "ISF30,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 29. "ISF29,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 28. "ISF28,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 27. "ISF27,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 26. "ISF26,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 25. "ISF25,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 24. "ISF24,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 23. "ISF23,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 22. "ISF22,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 21. "ISF21,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 20. "ISF20,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 19. "ISF19,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 18. "ISF18,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 17. "ISF17,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 16. "ISF16,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 15. "ISF15,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 14. "ISF14,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 13. "ISF13,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 12. "ISF12,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 11. "ISF11,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 10. "ISF10,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 9. "ISF9,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 8. "ISF8,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 7. "ISF7,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 6. "ISF6,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 5. "ISF5,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 4. "ISF4,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 3. "ISF3,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 2. "ISF2,Interrupt Status Flag" "0: Not detected,1: Detected"
newline
eventfld.long 0x0 1. "ISF1,Interrupt Status Flag" "0: Not detected,1: Detected"
eventfld.long 0x0 0. "ISF0,Interrupt Status Flag" "0: Not detected,1: Detected"
tree.end
endif
tree.end
tree "SCG (System Clock Generator)"
base ad:0x4008F000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID Register"
hexmask.long 0x0 0.--31. 1. "VERSION,SCG Version Number"
line.long 0x4 "PARAM,Parameter Register"
bitfld.long 0x4 4. "ROSCCLKPRES,ROSC Clock Present" "0: ROSC clock source is not present,1: ROSC clock source is present"
newline
bitfld.long 0x4 3. "FIRCCLKPRES,FIRC Clock Present" "0: FIRC clock source is not present,1: FIRC clock source is present"
newline
bitfld.long 0x4 2. "SIRCCLKPRES,SIRC Clock Present" "0: SIRC clock source is not present,1: SIRC clock source is present"
newline
bitfld.long 0x4 1. "SOSCCLKPRES,SOSC Clock Present" "0: SOSC clock source is not present,1: SOSC clock source is present"
group.long 0x8++0x3
line.long 0x0 "TRIM_LOCK,Trim Lock register"
hexmask.long.word 0x0 16.--31. 1. "TRIM_LOCK_KEY,TRIM_LOCK_KEY"
newline
bitfld.long 0x0 1. "IFR_DISABLE,IFR_DISABLE" "0: IFR write access to SCG trim registers not..,1: IFR write access to SCG trim registers during.."
newline
bitfld.long 0x0 0. "TRIM_UNLOCK,TRIM_UNLOCK" "0: SCG Trim Registers locked and not writable.,1: SCG Trim registers unlocked and writable."
rgroup.long 0x10++0x3
line.long 0x0 "CSR,Clock Status Register"
bitfld.long 0x0 24.--26. "SCS,System Clock Source" "?,1: SOSC,2: SIRC,3: FIRC,4: ROSC,?,?,?"
group.long 0x14++0x3
line.long 0x0 "RCCR,Run Clock Control Register"
bitfld.long 0x0 24.--26. "SCS,System Clock Source" "?,1: SOSC,2: SIRC,3: FIRC,4: ROSC,?,?,?"
group.long 0x100++0x3
line.long 0x0 "SOSCCSR,SOSC Control Status Register"
bitfld.long 0x0 30. "SOSCVLD_IE,SOSC Valid Interrupt Enable" "0: SOSCVLD interrupt is not enabled,1: SOSCVLD interrupt is enabled"
newline
eventfld.long 0x0 26. "SOSCERR,SOSC Clock Error" "0: SOSC Clock Monitor is disabled or has not..,1: SOSC Clock Monitor is enabled and detected an.."
newline
rbitfld.long 0x0 25. "SOSCSEL,SOSC Selected" "0: SOSC is not the system clock source,1: SOSC is the system clock source"
newline
rbitfld.long 0x0 24. "SOSCVLD,SOSC Valid" "0: SOSC is not enabled or clock is not valid,1: SOSC is enabled and output clock is valid"
newline
bitfld.long 0x0 23. "LK,Lock Register" "0: This Control Status Register can be written,1: This Control Status Register cannot be written"
newline
bitfld.long 0x0 17. "SOSCCMRE,SOSC Clock Monitor Reset Enable" "0: Clock monitor generates an interrupt when an..,1: Clock monitor generates a reset when an error is.."
newline
bitfld.long 0x0 16. "SOSCCM,SOSC Clock Monitor Enable" "0: SOSC Clock Monitor is disabled,1: SOSC Clock Monitor is enabled"
newline
bitfld.long 0x0 1. "SOSCSTEN,SOSC Stop Enable" "0: SOSC is disabled in Deep Sleep mode,1: SOSC is enabled in Deep Sleep mode only if.."
newline
bitfld.long 0x0 0. "SOSCEN,SOSC Enable" "0: SOSC is disabled,1: SOSC is enabled"
group.long 0x108++0x3
line.long 0x0 "SOSCCFG,SOSC Configuration Register"
bitfld.long 0x0 4.--5. "RANGE,SOSC Range Select" "0: Frequency range select of 8-16 MHz.,1: Frequency range select of 16-25 MHz.,2: Frequency range select of 25-40 MHz.,3: Frequency range select of 40-50 MHz."
newline
bitfld.long 0x0 2. "EREFS,External Reference Select" "0: External reference clock selected.,1: Internal crystal oscillator of OSC selected."
group.long 0x200++0x3
line.long 0x0 "SIRCCSR,SIRC Control Status Register"
bitfld.long 0x0 27. "SIRCERR_IE,SIRC Clock Error Interrupt Enable" "0: SIRCERR interrupt is not enabled,1: SIRCERR interrupt is enabled"
newline
eventfld.long 0x0 26. "SIRCERR,SIRC Clock Error" "0: Error not detected with the SIRC trimming,1: Error detected with the SIRC trimming"
newline
rbitfld.long 0x0 25. "SIRCSEL,SIRC Selected" "0: SIRC is not the system clock source,1: SIRC is the system clock source"
newline
rbitfld.long 0x0 24. "SIRCVLD,SIRC Valid" "0: SIRC is not enabled or clock is not valid,1: SIRC is enabled and output clock is valid"
newline
bitfld.long 0x0 23. "LK,Lock Register" "0: Control Status Register can be written,1: Control Status Register cannot be written"
newline
bitfld.long 0x0 11. "COARSE_TRIM_BYPASS,Coarse Auto Trim Bypass" "0: SIRC Coarse Auto Trim NOT Bypassed,1: SIRC Coarse Auto Trim Bypassed"
newline
rbitfld.long 0x0 10. "TRIM_LOCK,SIRC TRIM LOCK" "0: SIRC auto trim not locked to target frequency..,1: SIRC auto trim locked to target frequency range"
newline
bitfld.long 0x0 9. "SIRCTRUP,SIRC Trim Update" "0: Disables SIRC trimming updates,1: Enables SIRC trimming updates"
newline
bitfld.long 0x0 8. "SIRCTREN,SIRC 12 MHz Trim Enable (SIRCCFG[RANGE]=1)" "0: Disables trimming SIRC to an external clock source,1: Enables trimming SIRC to an external clock source"
newline
bitfld.long 0x0 5. "SIRC_CLK_PERIPH_EN,SIRC Clock to Peripherals Enable" "0: SIRC clock to peripherals is disabled,1: SIRC clock to peripherals is enabled"
newline
bitfld.long 0x0 1. "SIRCSTEN,SIRC Stop Enable" "0: SIRC is disabled in Deep Sleep mode,1: SIRC is enabled in Deep Sleep mode"
group.long 0x20C++0x3
line.long 0x0 "SIRCTCFG,SIRC Trim Configuration Register"
hexmask.long.byte 0x0 16.--22. 1. "TRIMDIV,SIRC Trim Pre-divider"
newline
bitfld.long 0x0 0.--1. "TRIMSRC,Trim Source" "?,?,2: SOSC. This option requires that SOSC be divided..,?"
sif (cpuis("MC?A144*"))
group.long 0x210++0x3
line.long 0x0 "SIRCTRIM,SIRC Trim Register"
hexmask.long.byte 0x0 24.--28. 1. "FVCHTRIM,Calibrates the replica voltage in FSU for CCO to get well frequency at initial period"
hexmask.long.byte 0x0 16.--20. 1. "TCTRIM,Trim Temp"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLTRIM,CL Trim"
hexmask.long.byte 0x0 0.--5. 1. "CCOTRIM,CCO Trim"
group.long 0x31C++0xB
line.long 0x0 "FIRCATC1,FIRC Auto-trimming Counter 1"
hexmask.long.word 0x0 0.--15. 1. "IDEALC,Ideal Counter"
line.long 0x4 "FIRCATC2,FIRC Auto-trimming Counter 2"
hexmask.long.word 0x4 16.--31. 1. "COARMAXC,Coarse Trim Maximum Counter"
hexmask.long.word 0x4 0.--15. 1. "COARMINC,Coarse Trim Minimum Counter"
line.long 0x8 "FIRCATC3,FIRC Auto-trimming Counter 2"
hexmask.long.word 0x8 16.--31. 1. "FINEMAXC,Fine Trim Maximum Counter"
hexmask.long.word 0x8 0.--15. 1. "FINEMINC,Fine Trim Minimum Counter"
endif
sif (cpuis("MC?A145*"))
group.long 0x210++0x3
line.long 0x0 "SIRCTRIM,SIRC Trim Register"
hexmask.long.byte 0x0 24.--28. 1. "FVCHTRIM,Calibrates the replica voltage in FSU for CCO to get well frequency at initial period"
hexmask.long.byte 0x0 16.--20. 1. "TCTRIM,Trim Temp"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLTRIM,CL Trim"
hexmask.long.byte 0x0 0.--5. 1. "CCOTRIM,CCO Trim"
group.long 0x31C++0xB
line.long 0x0 "FIRCATC1,FIRC Auto-trimming Counter 1"
hexmask.long.word 0x0 0.--15. 1. "IDEALC,Ideal Counter"
line.long 0x4 "FIRCATC2,FIRC Auto-trimming Counter 2"
hexmask.long.word 0x4 16.--31. 1. "COARMAXC,Coarse Trim Maximum Counter"
hexmask.long.word 0x4 0.--15. 1. "COARMINC,Coarse Trim Minimum Counter"
line.long 0x8 "FIRCATC3,FIRC Auto-trimming Counter 2"
hexmask.long.word 0x8 16.--31. 1. "FINEMAXC,Fine Trim Maximum Counter"
hexmask.long.word 0x8 0.--15. 1. "FINEMINC,Fine Trim Minimum Counter"
endif
sif (cpuis("MC?A146*"))
group.long 0x210++0x3
line.long 0x0 "SIRCTRIM,SIRC Trim Register"
hexmask.long.byte 0x0 24.--28. 1. "FVCHTRIM,Calibrates the replica voltage in FSU for CCO to get well frequency at initial period"
hexmask.long.byte 0x0 16.--20. 1. "TCTRIM,Trim Temp"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLTRIM,CL Trim"
hexmask.long.byte 0x0 0.--5. 1. "CCOTRIM,CCO Trim"
group.long 0x31C++0xB
line.long 0x0 "FIRCATC1,FIRC Auto-trimming Counter 1"
hexmask.long.word 0x0 0.--15. 1. "IDEALC,Ideal Counter"
line.long 0x4 "FIRCATC2,FIRC Auto-trimming Counter 2"
hexmask.long.word 0x4 16.--31. 1. "COARMAXC,Coarse Trim Maximum Counter"
hexmask.long.word 0x4 0.--15. 1. "COARMINC,Coarse Trim Minimum Counter"
line.long 0x8 "FIRCATC3,FIRC Auto-trimming Counter 2"
hexmask.long.word 0x8 16.--31. 1. "FINEMAXC,Fine Trim Maximum Counter"
hexmask.long.word 0x8 0.--15. 1. "FINEMINC,Fine Trim Minimum Counter"
endif
sif (cpuis("MC?A154*"))
group.long 0x210++0x3
line.long 0x0 "SIRCTRIM,SIRC Trim Register"
hexmask.long.byte 0x0 24.--28. 1. "FVCHTRIM,Calibrates the replica voltage in FSU for CCO to get well frequency at initial period"
hexmask.long.byte 0x0 16.--20. 1. "TCTRIM,Trim Temp"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLTRIM,CL Trim"
hexmask.long.byte 0x0 0.--5. 1. "CCOTRIM,CCO Trim"
group.long 0x31C++0xB
line.long 0x0 "FIRCATC1,FIRC Auto-trimming Counter 1"
hexmask.long.word 0x0 0.--15. 1. "IDEALC,Ideal Counter"
line.long 0x4 "FIRCATC2,FIRC Auto-trimming Counter 2"
hexmask.long.word 0x4 16.--31. 1. "COARMAXC,Coarse Trim Maximum Counter"
hexmask.long.word 0x4 0.--15. 1. "COARMINC,Coarse Trim Minimum Counter"
line.long 0x8 "FIRCATC3,FIRC Auto-trimming Counter 2"
hexmask.long.word 0x8 16.--31. 1. "FINEMAXC,Fine Trim Maximum Counter"
hexmask.long.word 0x8 0.--15. 1. "FINEMINC,Fine Trim Minimum Counter"
endif
sif (cpuis("MC?A155*"))
group.long 0x210++0x3
line.long 0x0 "SIRCTRIM,SIRC Trim Register"
hexmask.long.byte 0x0 24.--28. 1. "FVCHTRIM,Calibrates the replica voltage in FSU for CCO to get well frequency at initial period"
hexmask.long.byte 0x0 16.--20. 1. "TCTRIM,Trim Temp"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLTRIM,CL Trim"
hexmask.long.byte 0x0 0.--5. 1. "CCOTRIM,CCO Trim"
group.long 0x31C++0xB
line.long 0x0 "FIRCATC1,FIRC Auto-trimming Counter 1"
hexmask.long.word 0x0 0.--15. 1. "IDEALC,Ideal Counter"
line.long 0x4 "FIRCATC2,FIRC Auto-trimming Counter 2"
hexmask.long.word 0x4 16.--31. 1. "COARMAXC,Coarse Trim Maximum Counter"
hexmask.long.word 0x4 0.--15. 1. "COARMINC,Coarse Trim Minimum Counter"
line.long 0x8 "FIRCATC3,FIRC Auto-trimming Counter 2"
hexmask.long.word 0x8 16.--31. 1. "FINEMAXC,Fine Trim Maximum Counter"
hexmask.long.word 0x8 0.--15. 1. "FINEMINC,Fine Trim Minimum Counter"
endif
sif (cpuis("MC?A156*"))
group.long 0x210++0x3
line.long 0x0 "SIRCTRIM,SIRC Trim Register"
hexmask.long.byte 0x0 24.--28. 1. "FVCHTRIM,Calibrates the replica voltage in FSU for CCO to get well frequency at initial period"
hexmask.long.byte 0x0 16.--20. 1. "TCTRIM,Trim Temp"
newline
hexmask.long.byte 0x0 8.--13. 1. "CLTRIM,CL Trim"
hexmask.long.byte 0x0 0.--5. 1. "CCOTRIM,CCO Trim"
group.long 0x31C++0xB
line.long 0x0 "FIRCATC1,FIRC Auto-trimming Counter 1"
hexmask.long.word 0x0 0.--15. 1. "IDEALC,Ideal Counter"
line.long 0x4 "FIRCATC2,FIRC Auto-trimming Counter 2"
hexmask.long.word 0x4 16.--31. 1. "COARMAXC,Coarse Trim Maximum Counter"
hexmask.long.word 0x4 0.--15. 1. "COARMINC,Coarse Trim Minimum Counter"
line.long 0x8 "FIRCATC3,FIRC Auto-trimming Counter 2"
hexmask.long.word 0x8 16.--31. 1. "FINEMAXC,Fine Trim Maximum Counter"
hexmask.long.word 0x8 0.--15. 1. "FINEMINC,Fine Trim Minimum Counter"
endif
group.long 0x218++0x3
line.long 0x0 "SIRCSTAT,SIRC Auto-trimming Status Register"
hexmask.long.byte 0x0 8.--13. 1. "CLTRIM,CL Trim"
newline
hexmask.long.byte 0x0 0.--5. 1. "CCOTRIM,CCO Trim"
group.long 0x300++0x3
line.long 0x0 "FIRCCSR,FIRC Control Status Register"
rbitfld.long 0x0 31. "FIRCACC,FIRC Frequency Accurate" "0: FIRC is not enabled or clock is not accurate.,1: FIRC is enabled and output clock is accurate."
newline
bitfld.long 0x0 30. "FIRCACC_IE,FIRC Accurate Interrupt Enable" "0: FIRCACC interrupt is not enabled,1: FIRCACC interrupt is enabled"
newline
bitfld.long 0x0 27. "FIRCERR_IE,FIRC Clock Error Interrupt Enable" "0: FIRCERR interrupt is not enabled,1: FIRCERR interrupt is enabled"
newline
eventfld.long 0x0 26. "FIRCERR,FIRC Clock Error" "0: Error not detected with the FIRC trimming,1: Error detected with the FIRC trimming"
newline
rbitfld.long 0x0 25. "FIRCSEL,FIRC Selected" "0: FIRC is not the system clock source,1: FIRC is the system clock source"
newline
rbitfld.long 0x0 24. "FIRCVLD,FIRC Valid status" "0: FIRC is not enabled or clock is not valid.,1: FIRC is enabled and output clock is valid. The.."
newline
bitfld.long 0x0 23. "LK,Lock Register" "0: Control Status Register can be written,1: Control Status Register cannot be written"
newline
bitfld.long 0x0 11. "COARSE_TRIM_BYPASS,Coarse Auto Trim Bypass" "0: FIRC Coarse Auto Trim NOT Bypassed,1: FIRC Coarse Auto Trim Bypassed"
newline
rbitfld.long 0x0 10. "TRIM_LOCK,FIRC TRIM LOCK" "0: FIRC auto trim not locked to target frequency..,1: FIRC auto trim locked to target frequency range"
newline
bitfld.long 0x0 9. "FIRCTRUP,FIRC Trim Update" "0: Disables FIRC trimming updates,1: Enables FIRC trimming updates"
newline
bitfld.long 0x0 8. "FIRCTREN,FRO_HF Trim Enable" "0: Disables trimming FRO_HF by an external clock..,1: Enables trimming FRO_HF by an external clock.."
newline
bitfld.long 0x0 5. "FIRC_FCLK_PERIPH_EN,FRO_HF Clock to peripherals Enable" "0: FRO_HF to peripherals is disabled,1: FRO_HF to peripherals is enabled"
newline
bitfld.long 0x0 4. "FIRC_SCLK_PERIPH_EN,FIRC 48 MHz Clock to peripherals Enable" "0: FIRC 48 MHz to peripherals is disabled,1: FIRC 48 MHz to peripherals is enabled"
newline
bitfld.long 0x0 1. "FIRCSTEN,FIRC Stop Enable" "0: FIRC is disabled in Deep Sleep mode,1: FIRC is enabled in Deep Sleep mode"
newline
bitfld.long 0x0 0. "FIRCEN,FIRC Enable" "0: FIRC is disabled,1: FIRC is enabled"
group.long 0x308++0xB
line.long 0x0 "FIRCCFG,FIRC Configuration Register"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
bitfld.long 0x0 1.--3. "FREQ_SEL,Frequency select" "0: 36 MHz FIRC clock selected,1: 48 MHz FIRC clock selected divided from 192 MHz,2: 48 MHz FIRC clock selected divided from 144 MHz,3: 64 MHz FIRC clock selected,4: 72 MHz FIRC clock selected,5: 96 MHz FIRC clock selected,6: 144 MHz FIRC clock selected,7: 192 MHz FIRC clock selected"
newline
endif
sif (cpuis("MC?A145*"))
bitfld.long 0x0 1.--3. "FREQ_SEL,Frequency select" "?,1: 48 MHz FIRC clock selected divided from 192 MHz,?,3: 64 MHz FIRC clock selected,?,5: 96 MHz FIRC clock selected,?,7: 192 MHz FIRC clock selected"
newline
endif
sif (cpuis("MC?A146*"))
bitfld.long 0x0 1.--3. "FREQ_SEL,Frequency select" "?,1: 48 MHz FIRC clock selected divided from 192 MHz,?,3: 64 MHz FIRC clock selected,?,5: 96 MHz FIRC clock selected,?,7: 192 MHz FIRC clock selected"
newline
endif
sif (cpuis("MC?A152*"))
bitfld.long 0x0 1.--3. "FREQ_SEL,Frequency select" "0: 36 MHz FIRC clock selected,1: 48 MHz FIRC clock selected divided from 192 MHz,2: 48 MHz FIRC clock selected divided from 144 MHz,3: 64 MHz FIRC clock selected,4: 72 MHz FIRC clock selected,5: 96 MHz FIRC clock selected,6: 144 MHz FIRC clock selected,7: 192 MHz FIRC clock selected"
newline
endif
sif (cpuis("MC?A153*"))
bitfld.long 0x0 1.--3. "FREQ_SEL,Frequency select" "0: 36 MHz FIRC clock selected,1: 48 MHz FIRC clock selected divided from 192 MHz,2: 48 MHz FIRC clock selected divided from 144 MHz,3: 64 MHz FIRC clock selected,4: 72 MHz FIRC clock selected,5: 96 MHz FIRC clock selected,6: 144 MHz FIRC clock selected,7: 192 MHz FIRC clock selected"
newline
endif
sif (cpuis("MC?A154*"))
bitfld.long 0x0 1.--3. "FREQ_SEL,Frequency select" "?,1: 48 MHz FIRC clock selected divided from 192 MHz,?,3: 64 MHz FIRC clock selected,?,5: 96 MHz FIRC clock selected,?,7: 192 MHz FIRC clock selected"
newline
endif
sif (cpuis("MC?A155*"))
bitfld.long 0x0 1.--3. "FREQ_SEL,Frequency select" "?,1: 48 MHz FIRC clock selected divided from 192 MHz,?,3: 64 MHz FIRC clock selected,?,5: 96 MHz FIRC clock selected,?,7: 192 MHz FIRC clock selected"
newline
endif
sif (cpuis("MC?A156*"))
bitfld.long 0x0 1.--3. "FREQ_SEL,Frequency select" "?,1: 48 MHz FIRC clock selected divided from 192 MHz,?,3: 64 MHz FIRC clock selected,?,5: 96 MHz FIRC clock selected,?,7: 192 MHz FIRC clock selected"
endif
line.long 0x4 "FIRCTCFG,FIRC Trim Configuration Register"
hexmask.long.byte 0x4 16.--22. 1. "TRIMDIV,FIRC Trim Pre-divider"
newline
bitfld.long 0x4 0.--1. "TRIMSRC,Trim Source" "0: USB0 Start of Frame (1 KHz). This option does..,?,2: SOSC. This option requires that SOSC be divided..,?"
line.long 0x8 "FIRCTRIM,FIRC Trim Register"
hexmask.long.byte 0x8 24.--29. 1. "TRIMSTART,Trim Start"
newline
bitfld.long 0x8 18.--19. "TRIMTEMP2,Trim Temperature2" "0,1,2,3"
newline
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
bitfld.long 0x8 16.--17. "TRIMTEMP1,Trim Temperature1" "0,1,2,3"
newline
endif
sif (cpuis("MC?A152*"))
bitfld.long 0x8 16.--17. "TRIMTEMP1,Trim Temperature1" "0,1,2,3"
newline
endif
sif (cpuis("MC?A153*"))
bitfld.long 0x8 16.--17. "TRIMTEMP1,Trim Temperature1" "0,1,2,3"
newline
endif
hexmask.long.byte 0x8 8.--13. 1. "TRIMCOAR,Trim Coarse"
newline
hexmask.long.byte 0x8 0.--7. 1. "TRIMFINE,Trim Fine"
group.long 0x318++0x3
line.long 0x0 "FIRCSTAT,FIRC Auto-trimming Status Register"
hexmask.long.byte 0x0 8.--13. 1. "TRIMCOAR,Trim Coarse"
newline
hexmask.long.byte 0x0 0.--7. 1. "TRIMFINE,Trim Fine"
group.long 0x400++0x3
line.long 0x0 "ROSCCSR,ROSC Control Status Register"
eventfld.long 0x0 26. "ROSCERR,ROSC Clock Error" "0: ROSC Clock has not detected an error,1: ROSC Clock has detected an error"
newline
rbitfld.long 0x0 25. "ROSCSEL,ROSC Selected" "0: ROSC is not the system clock source,1: ROSC is the system clock source"
newline
rbitfld.long 0x0 24. "ROSCVLD,ROSC Valid" "0: ROSC is not enabled or clock is not valid,1: ROSC is enabled and output clock is valid"
newline
bitfld.long 0x0 23. "LK,Lock Register" "0: Control Status Register can be written,1: Control Status Register cannot be written"
tree.end
tree "SPC (System Power Control)"
base ad:0x40090000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
newline
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x10++0x3
line.long 0x0 "SC,Status Control"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
rbitfld.long 0x0 31. "SWITCH_STATE,Power Switch State" "0: Off,1: On"
newline
endif
sif (cpuis("MC?A152*"))
rbitfld.long 0x0 31. "SWITCH_STATE,Power Switch State" "0: Off,1: On"
newline
endif
sif (cpuis("MC?A153*"))
rbitfld.long 0x0 31. "SWITCH_STATE,Power Switch State" "0: Off,1: On"
newline
endif
eventfld.long 0x0 16. "ISO_CLR,Isolation Clear Flags" "0,1"
newline
hexmask.long.byte 0x0 4.--7. 1. "SPC_LP_MODE,Power Domain Low-Power Mode Request"
newline
eventfld.long 0x0 1. "SPC_LP_REQ,SPC Power Mode Configuration Status Flag" "0: SPC is in Active mode; the ACTIVE_CFG register..,1: All power domains requested low-power mode; SPC.."
newline
rbitfld.long 0x0 0. "BUSY,SPC Busy Status Flag" "0: Not busy,1: Busy"
group.long 0x1C++0x3
line.long 0x0 "LPREQ_CFG,Low-Power Request Configuration"
bitfld.long 0x0 2.--3. "LPREQOV,Low-Power Request Output Override" "0: Not forced,?,2: Forced low (ignore LPREQPOL settings),3: Forced high (ignore LPREQPOL settings)"
newline
bitfld.long 0x0 1. "LPREQPOL,Low-Power Request Output Pin Polarity Control" "0: High,1: Low"
newline
bitfld.long 0x0 0. "LPREQOE,Low-Power Request Output Enable" "0: Disable,1: Enable"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
group.long 0x20++0x3
line.long 0x0 "CFG,SPC Configuration"
bitfld.long 0x0 3. "INTG_PWSWTCH_WKUP_ACTIVE_EN,Integrated Power Switch Wake-up Enable" "0: Disable,1: Enable"
bitfld.long 0x0 2. "INTG_PWSWTCH_SLEEP_ACTIVE_EN,Integrated Power Switch Active Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x0 1. "INTG_PWSWTCH_WKUP_EN,Integrated Power Switch Wake-up Enable" "0: Disable,1: Enable"
bitfld.long 0x0 0. "INTG_PWSWTCH_SLEEP_EN,Integrated Power Switch Sleep Enable" "0: Disable,1: Enable"
endif
sif (cpuis("MC?A152*"))
group.long 0x20++0x3
line.long 0x0 "CFG,SPC Configuration"
bitfld.long 0x0 3. "INTG_PWSWTCH_WKUP_ACTIVE_EN,Integrated Power Switch Wake-up Enable" "0: Disable,1: Enable"
bitfld.long 0x0 2. "INTG_PWSWTCH_SLEEP_ACTIVE_EN,Integrated Power Switch Active Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x0 1. "INTG_PWSWTCH_WKUP_EN,Integrated Power Switch Wake-up Enable" "0: Disable,1: Enable"
bitfld.long 0x0 0. "INTG_PWSWTCH_SLEEP_EN,Integrated Power Switch Sleep Enable" "0: Disable,1: Enable"
endif
sif (cpuis("MC?A153*"))
group.long 0x20++0x3
line.long 0x0 "CFG,SPC Configuration"
bitfld.long 0x0 3. "INTG_PWSWTCH_WKUP_ACTIVE_EN,Integrated Power Switch Wake-up Enable" "0: Disable,1: Enable"
bitfld.long 0x0 2. "INTG_PWSWTCH_SLEEP_ACTIVE_EN,Integrated Power Switch Active Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x0 1. "INTG_PWSWTCH_WKUP_EN,Integrated Power Switch Wake-up Enable" "0: Disable,1: Enable"
bitfld.long 0x0 0. "INTG_PWSWTCH_SLEEP_EN,Integrated Power Switch Sleep Enable" "0: Disable,1: Enable"
endif
group.long 0x30++0x3
line.long 0x0 "PD_STATUS0,SPC Power Domain Mode Status"
hexmask.long.byte 0x0 8.--11. 1. "LP_MODE,Power Domain Low Power Mode Request"
newline
eventfld.long 0x0 4. "PD_LP_REQ,Power Domain Low Power Request Flag" "0: Did not request,1: Requested"
newline
rbitfld.long 0x0 0. "PWR_REQ_STATUS,Power Request Status Flag" "0: Did not request,1: Requested"
group.long 0x40++0x3
line.long 0x0 "SRAMCTL,SRAM Control"
rbitfld.long 0x0 31. "ACK,SRAM Voltage Update Request Acknowledge" "0: Not acknowledged,1: Acknowledged"
newline
bitfld.long 0x0 30. "REQ,SRAM Voltage Update Request" "0: Do not request,1: Request"
newline
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
bitfld.long 0x0 0.--1. "VSM,Voltage Select Margin" "?,1: 1.0 V,2: 1.1 V,3: SRAM configured for 1.2 V operation"
newline
endif
sif (cpuis("MC?A145*"))
bitfld.long 0x0 0.--1. "VSM,Voltage Select Margin" "?,1: 1.0 V,2: 1.1 V,?"
newline
endif
sif (cpuis("MC?A146*"))
bitfld.long 0x0 0.--1. "VSM,Voltage Select Margin" "?,1: 1.0 V,2: 1.1 V,?"
newline
endif
sif (cpuis("MC?A152*"))
bitfld.long 0x0 0.--1. "VSM,Voltage Select Margin" "?,1: 1.0 V,2: 1.1 V,3: SRAM configured for 1.2 V operation"
newline
endif
sif (cpuis("MC?A153*"))
bitfld.long 0x0 0.--1. "VSM,Voltage Select Margin" "?,1: 1.0 V,2: 1.1 V,3: SRAM configured for 1.2 V operation"
newline
endif
sif (cpuis("MC?A154*"))
bitfld.long 0x0 0.--1. "VSM,Voltage Select Margin" "?,1: 1.0 V,2: 1.1 V,?"
newline
endif
sif (cpuis("MC?A155*"))
bitfld.long 0x0 0.--1. "VSM,Voltage Select Margin" "?,1: 1.0 V,2: 1.1 V,?"
newline
endif
sif (cpuis("MC?A156*"))
bitfld.long 0x0 0.--1. "VSM,Voltage Select Margin" "?,1: 1.0 V,2: 1.1 V,?"
endif
group.long 0x54++0x7
line.long 0x0 "SRAMRETLDO_REFTRIM,SRAM Retention Reference Trim"
hexmask.long.byte 0x0 0.--4. 1. "REFTRIM,Reference Trim. Voltage range is around 0.48V - 0.85V. Trim step is 12 mV."
line.long 0x4 "SRAMRETLDO_CNTRL,SRAM Retention LDO Control"
hexmask.long.byte 0x4 8.--11. 1. "SRAM_RET_EN,SRAM Retention"
newline
bitfld.long 0x4 0. "SRAMLDO_ON,SRAM LDO Regulator Enable" "0: Disable,1: Enable"
group.long 0x100++0xF
line.long 0x0 "ACTIVE_CFG,Active Power Mode Configuration"
bitfld.long 0x0 28. "SYS_HVDE,System High-Voltage Detection Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x0 25. "SYS_LVDE,System Low-Voltage Detection Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x0 24. "CORE_LVDE,Core Low-Voltage Detection Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x0 23. "VDD_VD_DISABLE,VDD Voltage Detect Disable" "0: Enable,1: Disable"
newline
bitfld.long 0x0 20.--21. "BGMODE,Bandgap Mode" "0: Bandgap disabled,1: Bandgap enabled buffer disabled,2: Bandgap enabled buffer enabled,?"
newline
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
bitfld.long 0x0 2.--3. "CORELDO_VDD_LVL,LDO_CORE VDD Regulator Voltage Level" "?,1: Regulate to mid voltage (1.0 V),2: Regulate to normal voltage (1.1 V),3: Regulate to overdrive voltage (1.15 V)"
newline
endif
sif (cpuis("MC?A144*"))
bitfld.long 0x0 2.--3. "CORELDO_VDD_LVL,LDO_CORE VDD Regulator Voltage Level" "?,1: Regulate to mid voltage (1.0 V),2: Regulate to normal voltage (1.1 V),?"
newline
endif
sif (cpuis("MC?A145*"))
bitfld.long 0x0 2.--3. "CORELDO_VDD_LVL,LDO_CORE VDD Regulator Voltage Level" "?,1: Regulate to mid voltage (1.0 V),2: Regulate to normal voltage (1.1 V),?"
newline
endif
sif (cpuis("MC?A146*"))
bitfld.long 0x0 2.--3. "CORELDO_VDD_LVL,LDO_CORE VDD Regulator Voltage Level" "?,1: Regulate to mid voltage (1.0 V),2: Regulate to normal voltage (1.1 V),?"
newline
endif
sif (cpuis("MC?A152*"))
bitfld.long 0x0 2.--3. "CORELDO_VDD_LVL,LDO_CORE VDD Regulator Voltage Level" "?,1: Regulate to mid voltage (1.0 V),2: Regulate to normal voltage (1.1 V),3: Regulate to overdrive voltage (1.15 V)"
newline
endif
sif (cpuis("MC?A153*"))
bitfld.long 0x0 2.--3. "CORELDO_VDD_LVL,LDO_CORE VDD Regulator Voltage Level" "?,1: Regulate to mid voltage (1.0 V),2: Regulate to normal voltage (1.1 V),3: Regulate to overdrive voltage (1.15 V)"
newline
endif
sif (cpuis("MC?A154*"))
bitfld.long 0x0 2.--3. "CORELDO_VDD_LVL,LDO_CORE VDD Regulator Voltage Level" "?,1: Regulate to mid voltage (1.0 V),2: Regulate to normal voltage (1.1 V),?"
newline
endif
sif (cpuis("MC?A155*"))
bitfld.long 0x0 2.--3. "CORELDO_VDD_LVL,LDO_CORE VDD Regulator Voltage Level" "?,1: Regulate to mid voltage (1.0 V),2: Regulate to normal voltage (1.1 V),?"
newline
endif
sif (cpuis("MC?A156*"))
bitfld.long 0x0 2.--3. "CORELDO_VDD_LVL,LDO_CORE VDD Regulator Voltage Level" "?,1: Regulate to mid voltage (1.0 V),2: Regulate to normal voltage (1.1 V),?"
newline
endif
bitfld.long 0x0 0. "CORELDO_VDD_DS,LDO_CORE VDD Drive Strength" "0: Low,1: Normal"
line.long 0x4 "ACTIVE_CFG1,Active Power Mode Configuration 1"
hexmask.long 0x4 0.--31. 1. "SOC_CNTRL,Active Config Chip Control"
line.long 0x8 "LP_CFG,Low-Power Mode Configuration"
bitfld.long 0x8 28. "SYS_HVDE,System High Voltage Detect Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 25. "SYS_LVDE,System Low Voltage Detect Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 24. "CORE_LVDE,Core Low Voltage Detect Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 23. "LP_IREFEN,Low-Power IREF Enable" "0: Disable for power saving in Deep Power Down mode,1: Enable"
newline
bitfld.long 0x8 20.--21. "BGMODE,Bandgap Mode" "0: Bandgap disabled,1: Bandgap enabled buffer disabled,2: Bandgap enabled buffer enabled,?"
newline
bitfld.long 0x8 19. "SRAMLDO_DPD_ON,SRAM_LDO Deep Power Low Power IREF Enable" "0: Low Power IREF is disabled for power saving in..,1: Low Power IREF is enabled"
newline
bitfld.long 0x8 2.--3. "CORELDO_VDD_LVL,LDO_CORE VDD Regulator Voltage Level" "?,1: Mid voltage (1.0 V),2: Normal voltage (1.1 V),3: Overdrive voltage (1.15 V)"
newline
bitfld.long 0x8 0. "CORELDO_VDD_DS,LDO_CORE VDD Drive Strength" "0: Low,1: Normal"
line.long 0xC "LP_CFG1,Low Power Mode Configuration 1"
hexmask.long 0xC 0.--31. 1. "SOC_CNTRL,Low-Power Configuration Chip Control"
group.long 0x120++0x7
line.long 0x0 "LPWKUP_DELAY,Low Power Wake-Up Delay"
hexmask.long.word 0x0 0.--15. 1. "LPWKUP_DELAY,Low-Power Wake-Up Delay"
line.long 0x4 "ACTIVE_VDELAY,Active Voltage Trim Delay"
hexmask.long.word 0x4 0.--15. 1. "ACTIVE_VDELAY,Active Voltage Delay"
group.long 0x130++0xB
line.long 0x0 "VD_STAT,Voltage Detect Status"
eventfld.long 0x0 5. "SYSVDD_HVDF,System HVD Flag" "0: Event not detected,1: Event detected"
newline
eventfld.long 0x0 1. "SYSVDD_LVDF,System Low-Voltage Detect Flag" "0: Event not detected,1: Event detected"
newline
eventfld.long 0x0 0. "COREVDD_LVDF,Core Low-Voltage Detect Flag" "0: Event not detected,1: Event detected"
line.long 0x4 "VD_CORE_CFG,Core Voltage Detect Configuration"
bitfld.long 0x4 16. "LOCK,Core Voltage Detect Reset Enable Lock" "0: Allow,1: Deny"
newline
bitfld.long 0x4 1. "LVDIE,Core LVD Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x4 0. "LVDRE,Core LVD Reset Enable" "0: Disable,1: Enable"
line.long 0x8 "VD_SYS_CFG,System Voltage Detect Configuration"
bitfld.long 0x8 16. "LOCK,System Voltage Detect Reset Enable Lock" "0: Allow,1: Deny"
newline
bitfld.long 0x8 8. "LVSEL,System Low-Voltage Level Select" "0: Normal,1: Safe"
newline
bitfld.long 0x8 3. "HVDIE,System HVD Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 2. "HVDRE,System HVD Reset Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "LVDIE,System LVD Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.long 0x8 0. "LVDRE,System LVD Reset Enable" "0: Disable,1: Enable"
group.long 0x140++0x3
line.long 0x0 "EVD_CFG,External Voltage Domain Configuration"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
rbitfld.long 0x0 16.--18. "EVDSTAT,External Voltage Domain Status" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 8.--10. "EVDLPISO,External Voltage Domain Low-Power Isolation" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0.--2. "EVDISO,External Voltage Domain Isolation" "0,1,2,3,4,5,6,7"
newline
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x0 16.--19. 1. "EVDSTAT,External Voltage Domain Status"
newline
endif
sif (cpuis("MC?A145*"))
hexmask.long.byte 0x0 16.--19. 1. "EVDSTAT,External Voltage Domain Status"
newline
endif
sif (cpuis("MC?A146*"))
hexmask.long.byte 0x0 16.--19. 1. "EVDSTAT,External Voltage Domain Status"
newline
endif
sif (cpuis("MC?A152*"))
rbitfld.long 0x0 16.--18. "EVDSTAT,External Voltage Domain Status" "0,1,2,3,4,5,6,7"
newline
endif
sif (cpuis("MC?A153*"))
rbitfld.long 0x0 16.--18. "EVDSTAT,External Voltage Domain Status" "0,1,2,3,4,5,6,7"
newline
endif
sif (cpuis("MC?A154*"))
hexmask.long.byte 0x0 16.--19. 1. "EVDSTAT,External Voltage Domain Status"
newline
endif
sif (cpuis("MC?A155*"))
hexmask.long.byte 0x0 16.--19. 1. "EVDSTAT,External Voltage Domain Status"
newline
endif
sif (cpuis("MC?A156*"))
hexmask.long.byte 0x0 16.--19. 1. "EVDSTAT,External Voltage Domain Status"
newline
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x0 8.--11. 1. "EVDLPISO,External Voltage Domain Low-Power Isolation"
newline
endif
sif (cpuis("MC?A145*"))
hexmask.long.byte 0x0 8.--11. 1. "EVDLPISO,External Voltage Domain Low-Power Isolation"
newline
endif
sif (cpuis("MC?A146*"))
hexmask.long.byte 0x0 8.--11. 1. "EVDLPISO,External Voltage Domain Low-Power Isolation"
newline
endif
sif (cpuis("MC?A152*"))
bitfld.long 0x0 8.--10. "EVDLPISO,External Voltage Domain Low-Power Isolation" "0,1,2,3,4,5,6,7"
newline
endif
sif (cpuis("MC?A153*"))
bitfld.long 0x0 8.--10. "EVDLPISO,External Voltage Domain Low-Power Isolation" "0,1,2,3,4,5,6,7"
newline
endif
sif (cpuis("MC?A154*"))
hexmask.long.byte 0x0 8.--11. 1. "EVDLPISO,External Voltage Domain Low-Power Isolation"
newline
endif
sif (cpuis("MC?A155*"))
hexmask.long.byte 0x0 8.--11. 1. "EVDLPISO,External Voltage Domain Low-Power Isolation"
newline
endif
sif (cpuis("MC?A156*"))
hexmask.long.byte 0x0 8.--11. 1. "EVDLPISO,External Voltage Domain Low-Power Isolation"
newline
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x0 0.--3. 1. "EVDISO,External Voltage Domain Isolation"
newline
endif
sif (cpuis("MC?A145*"))
hexmask.long.byte 0x0 0.--3. 1. "EVDISO,External Voltage Domain Isolation"
newline
endif
sif (cpuis("MC?A146*"))
hexmask.long.byte 0x0 0.--3. 1. "EVDISO,External Voltage Domain Isolation"
newline
endif
sif (cpuis("MC?A152*"))
bitfld.long 0x0 0.--2. "EVDISO,External Voltage Domain Isolation" "0,1,2,3,4,5,6,7"
newline
endif
sif (cpuis("MC?A153*"))
bitfld.long 0x0 0.--2. "EVDISO,External Voltage Domain Isolation" "0,1,2,3,4,5,6,7"
newline
endif
sif (cpuis("MC?A154*"))
hexmask.long.byte 0x0 0.--3. 1. "EVDISO,External Voltage Domain Isolation"
newline
endif
sif (cpuis("MC?A155*"))
hexmask.long.byte 0x0 0.--3. 1. "EVDISO,External Voltage Domain Isolation"
newline
endif
sif (cpuis("MC?A156*"))
hexmask.long.byte 0x0 0.--3. 1. "EVDISO,External Voltage Domain Isolation"
endif
rgroup.long 0x300++0x3
line.long 0x0 "CORELDO_CFG,LDO_CORE Configuration"
tree.end
tree "SYSCON (System Controller)"
base ad:0x40091000
group.long 0x200++0x3
line.long 0x0 "REMAP,AHB Matrix Remap Control"
bitfld.long 0x0 31. "LOCK,This 1-bit field provides a mechanism to limit writes to the this register to protect its contents. Once set this bit remains asserted until the next reset." "0: This register is not locked and can be altered.,1: This register is locked and cannot be altered."
newline
bitfld.long 0x0 4.--5. "USB0,RAMX0 address remap for USB0" "0: RAMX0: 0x04000000 - 0x04001fff,1: RAMX0: same alias space as CPU0_SBUS,?,?"
newline
bitfld.long 0x0 2.--3. "DMA0,RAMX0 address remap for DMA0" "0: RAMX0: 0x04000000 - 0x04001fff,1: RAMX0: same alias space as CPU0_SBUS,?,?"
newline
bitfld.long 0x0 0.--1. "CPU0_SBUS,RAMX0 address remap for CPU System bus" "0: RAMX0: 0x04000000 - 0x04001fff,1: RAMX0: 0x20006000 - 0x20007fff,?,?"
group.long 0x210++0x3
line.long 0x0 "AHBMATPRIO,AHB Matrix Priority Control"
bitfld.long 0x0 24.--25. "USB_FS_ENET,USB-FS bus master priority level" "0: level 0,1: level 1,2: level 2,3: level 3"
newline
bitfld.long 0x0 8.--9. "DMA0,DMA0 controller bus master priority level" "0: level 0,1: level 1,2: level 2,3: level 3"
newline
bitfld.long 0x0 2.--3. "CPU0_SBUS,CPU0 S-AHB bus master priority level" "0: level 0,1: level 1,2: level 2,3: level 3"
newline
bitfld.long 0x0 0.--1. "CPU0_CBUS,CPU0 C-AHB bus master priority level" "0: level 0,1: level 1,2: level 2,3: level 3"
group.long 0x23C++0x3
line.long 0x0 "CPU0NSTCKCAL,Non-Secure CPU0 System Tick Calibration"
bitfld.long 0x0 25. "NOREF,Indicates whether the device provides a reference clock to the processor." "0: Reference clock is provided,1: No reference clock is provided"
newline
bitfld.long 0x0 24. "SKEW,Indicates whether the TENMS value is exact." "0: TENMS value is exact,1: TENMS value is not exact or not given"
newline
hexmask.long.tbyte 0x0 0.--23. 1. "TENMS,Reload value for 10 ms (100 Hz) timing subject to system clock skew errors. If the value reads as zero the calibration value is not known."
group.long 0x248++0x3
line.long 0x0 "NMISRC,NMI Source Select"
bitfld.long 0x0 31. "NMIENCPU0,Enables the Non-Maskable Interrupt (NMI) source selected by IRQCPU0." "0: Disable.,1: Enable."
newline
hexmask.long.byte 0x0 0.--7. 1. "IRQCPU0,The IRQ number of the interrupt that acts as the Non-Maskable Interrupt (NMI) for CPU0 if enabled by NMIENCPU0."
group.long 0x378++0x3
line.long 0x0 "SLOWCLKDIV,SLOW_CLK Clock Divider"
rbitfld.long 0x0 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency is not stable"
newline
bitfld.long 0x0 30. "HALT,Halts the divider counter" "0: Divider clock is running,1: Divider clock is stopped"
newline
bitfld.long 0x0 29. "RESET,Resets the divider counter" "0: Divider is not reset,1: Divider is reset"
group.long 0x380++0x3
line.long 0x0 "AHBCLKDIV,System Clock Divider"
rbitfld.long 0x0 31. "UNSTAB,Divider status flag" "0: Divider clock is stable,1: Clock frequency is not stable"
newline
hexmask.long.byte 0x0 0.--7. 1. "DIV,Clock divider value"
group.long 0x3FC++0x7
line.long 0x0 "CLKUNLOCK,Clock Configuration Unlock"
bitfld.long 0x0 0. "UNLOCK,Controls clock configuration registers access (for example MRCC_xxx_CLKDIV MRCC_xxx_CLKSEL MRCC_GLB_xxx)" "0: Updates are allowed to all clock configuration..,1: Freezes all clock configuration registers update."
line.long 0x4 "NVM_CTRL,NVM Control"
bitfld.long 0x4 17. "DIS_MBECC_ERR_DATA,Bus error on data multi-bit ECC error control Set this field to 0 if you want to enable flash speculative" "0: Enables bus error on multi-bit ECC error for data,1: Disables bus error on multi-bit ECC error for data"
newline
bitfld.long 0x4 16. "DIS_MBECC_ERR_INST,Bus error on data multi-bit ECC error control Set this field to 0 if you want to enable flash speculative" "0: Enables bus error on multi-bit ECC error for..,1: Disables bus error on multi-bit ECC error for.."
newline
bitfld.long 0x4 10. "FLASH_STALL_EN,FLASH stall on busy control" "0: No stall on FLASH busy,1: Stall on FLASH busy"
newline
bitfld.long 0x4 1. "DIS_DATA_SPEC,Flash data speculation control" "0: Enables data speculation,1: Disables data speculation"
newline
bitfld.long 0x4 0. "DIS_FLASH_SPEC,Flash speculation control" "0: Enables flash speculation,1: Disables flash speculation"
rgroup.long 0x404++0x3
line.long 0x0 "ROMCR,ROM Wait State"
rgroup.long 0x80C++0x3
line.long 0x0 "CPUSTAT,CPU Status"
bitfld.long 0x0 2. "CPU0LOCKUP,CPU0 lockup state" "0: CPU is not in lockup,1: CPU is in lockup"
newline
bitfld.long 0x0 0. "CPU0SLEEPING,CPU0 sleeping state" "0: CPU is not sleeping,1: CPU is sleeping"
group.long 0x824++0x3
line.long 0x0 "LPCAC_CTRL,LPCAC Control"
bitfld.long 0x0 8. "LPCAC_MEM_REQ,Request LPCAC memories." "0: Configure shared memories RAMX1 as general..,1: Configure shared memories RAMX1 as LPCAC.."
newline
bitfld.long 0x0 7. "LPCAC_XOM,LPCAC XOM(eXecute-Only-Memory) attribute control" "0: Disabled.,1: Enabled."
newline
bitfld.long 0x0 5. "LIM_LPCAC_WTBF,Limit LPCAC Write Through Buffer." "0: Write buffer enabled when transaction is..,1: Write buffer enabled when transaction is.."
newline
bitfld.long 0x0 4. "DIS_LPCAC_WTBF,Disable LPCAC Write Through Buffer." "0: Enables write through buffer,1: Disables write through buffer"
newline
bitfld.long 0x0 2. "FRC_NO_ALLOC,Forces no allocation." "0: Forces allocation,1: Forces no allocation"
newline
bitfld.long 0x0 1. "CLR_LPCAC,Clears the cache function." "0: Unclears the cache,1: Clears the cache"
newline
bitfld.long 0x0 0. "DIS_LPCAC,Disables/enables the cache function." "0: Enabled,1: Disabled"
group.long 0x938++0x3
line.long 0x0 "PWM0SUBCTL,PWM0 Submodule Control"
bitfld.long 0x0 3. "CLK3_EN,Enables PWM0 SUB Clock3" "0: Disable,1: Enable"
newline
bitfld.long 0x0 2. "CLK2_EN,Enables PWM0 SUB Clock2" "0: Disable,1: Enable"
newline
bitfld.long 0x0 1. "CLK1_EN,Enables PWM0 SUB Clock1" "0: Disable,1: Enable"
newline
bitfld.long 0x0 0. "CLK0_EN,Enables PWM0 SUB Clock0" "0: Disable,1: Enable"
sif (cpuis("MC?A144*"))
group.long 0x93C++0x3
line.long 0x0 "PWM1SUBCTL,PWM1 Submodule Control"
bitfld.long 0x0 3. "CLK3_EN,Enables PWM1 SUB Clock3" "0: Disable,1: Enable"
bitfld.long 0x0 2. "CLK2_EN,Enables PWM1 SUB Clock2" "0: Disable,1: Enable"
newline
bitfld.long 0x0 1. "CLK1_EN,Enables PWM1 SUB Clock1" "0: Disable,1: Enable"
bitfld.long 0x0 0. "CLK0_EN,Enables PWM1 SUB Clock0" "0: Disable,1: Enable"
rgroup.long 0xE3C++0x3
line.long 0x0 "ROP_STATE,ROP State Register"
hexmask.long 0x0 0.--31. 1. "ROP_STATE,ROP state"
rgroup.long 0xE4C++0x3
line.long 0x0 "FT_STATE_B,FT_STATE_B"
hexmask.long 0x0 0.--31. 1. "FT_STATE_B,FT_STATE_B"
endif
sif (cpuis("MC?A145*"))
group.long 0x93C++0x3
line.long 0x0 "PWM1SUBCTL,PWM1 Submodule Control"
bitfld.long 0x0 3. "CLK3_EN,Enables PWM1 SUB Clock3" "0: Disable,1: Enable"
bitfld.long 0x0 2. "CLK2_EN,Enables PWM1 SUB Clock2" "0: Disable,1: Enable"
newline
bitfld.long 0x0 1. "CLK1_EN,Enables PWM1 SUB Clock1" "0: Disable,1: Enable"
bitfld.long 0x0 0. "CLK0_EN,Enables PWM1 SUB Clock0" "0: Disable,1: Enable"
rgroup.long 0xE3C++0x3
line.long 0x0 "ROP_STATE,ROP State Register"
hexmask.long 0x0 0.--31. 1. "ROP_STATE,ROP state"
rgroup.long 0xE4C++0x3
line.long 0x0 "FT_STATE_B,FT_STATE_B"
hexmask.long 0x0 0.--31. 1. "FT_STATE_B,FT_STATE_B"
endif
sif (cpuis("MC?A146*"))
group.long 0x93C++0x3
line.long 0x0 "PWM1SUBCTL,PWM1 Submodule Control"
bitfld.long 0x0 3. "CLK3_EN,Enables PWM1 SUB Clock3" "0: Disable,1: Enable"
bitfld.long 0x0 2. "CLK2_EN,Enables PWM1 SUB Clock2" "0: Disable,1: Enable"
newline
bitfld.long 0x0 1. "CLK1_EN,Enables PWM1 SUB Clock1" "0: Disable,1: Enable"
bitfld.long 0x0 0. "CLK0_EN,Enables PWM1 SUB Clock0" "0: Disable,1: Enable"
rgroup.long 0xE3C++0x3
line.long 0x0 "ROP_STATE,ROP State Register"
hexmask.long 0x0 0.--31. 1. "ROP_STATE,ROP state"
rgroup.long 0xE4C++0x3
line.long 0x0 "FT_STATE_B,FT_STATE_B"
hexmask.long 0x0 0.--31. 1. "FT_STATE_B,FT_STATE_B"
endif
sif (cpuis("MC?A154*"))
group.long 0x93C++0x3
line.long 0x0 "PWM1SUBCTL,PWM1 Submodule Control"
bitfld.long 0x0 3. "CLK3_EN,Enables PWM1 SUB Clock3" "0: Disable,1: Enable"
bitfld.long 0x0 2. "CLK2_EN,Enables PWM1 SUB Clock2" "0: Disable,1: Enable"
newline
bitfld.long 0x0 1. "CLK1_EN,Enables PWM1 SUB Clock1" "0: Disable,1: Enable"
bitfld.long 0x0 0. "CLK0_EN,Enables PWM1 SUB Clock0" "0: Disable,1: Enable"
rgroup.long 0xE3C++0x3
line.long 0x0 "ROP_STATE,ROP State Register"
hexmask.long 0x0 0.--31. 1. "ROP_STATE,ROP state"
rgroup.long 0xE4C++0x3
line.long 0x0 "FT_STATE_B,FT_STATE_B"
hexmask.long 0x0 0.--31. 1. "FT_STATE_B,FT_STATE_B"
endif
sif (cpuis("MC?A155*"))
group.long 0x93C++0x3
line.long 0x0 "PWM1SUBCTL,PWM1 Submodule Control"
bitfld.long 0x0 3. "CLK3_EN,Enables PWM1 SUB Clock3" "0: Disable,1: Enable"
bitfld.long 0x0 2. "CLK2_EN,Enables PWM1 SUB Clock2" "0: Disable,1: Enable"
newline
bitfld.long 0x0 1. "CLK1_EN,Enables PWM1 SUB Clock1" "0: Disable,1: Enable"
bitfld.long 0x0 0. "CLK0_EN,Enables PWM1 SUB Clock0" "0: Disable,1: Enable"
rgroup.long 0xE3C++0x3
line.long 0x0 "ROP_STATE,ROP State Register"
hexmask.long 0x0 0.--31. 1. "ROP_STATE,ROP state"
rgroup.long 0xE4C++0x3
line.long 0x0 "FT_STATE_B,FT_STATE_B"
hexmask.long 0x0 0.--31. 1. "FT_STATE_B,FT_STATE_B"
endif
sif (cpuis("MC?A156*"))
group.long 0x93C++0x3
line.long 0x0 "PWM1SUBCTL,PWM1 Submodule Control"
bitfld.long 0x0 3. "CLK3_EN,Enables PWM1 SUB Clock3" "0: Disable,1: Enable"
bitfld.long 0x0 2. "CLK2_EN,Enables PWM1 SUB Clock2" "0: Disable,1: Enable"
newline
bitfld.long 0x0 1. "CLK1_EN,Enables PWM1 SUB Clock1" "0: Disable,1: Enable"
bitfld.long 0x0 0. "CLK0_EN,Enables PWM1 SUB Clock0" "0: Disable,1: Enable"
rgroup.long 0xE3C++0x3
line.long 0x0 "ROP_STATE,ROP State Register"
hexmask.long 0x0 0.--31. 1. "ROP_STATE,ROP state"
rgroup.long 0xE4C++0x3
line.long 0x0 "FT_STATE_B,FT_STATE_B"
hexmask.long 0x0 0.--31. 1. "FT_STATE_B,FT_STATE_B"
endif
group.long 0x940++0x7
line.long 0x0 "CTIMERGLOBALSTARTEN,CTIMER Global Start Enable"
sif (cpuis("MC?A144*"))
bitfld.long 0x0 4. "CTIMER4_CLK_EN,Enables the CTIMER4 function clock" "0: Disable,1: Enable"
newline
bitfld.long 0x0 3. "CTIMER3_CLK_EN,Enables the CTIMER3 function clock" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A145*"))
bitfld.long 0x0 4. "CTIMER4_CLK_EN,Enables the CTIMER4 function clock" "0: Disable,1: Enable"
newline
bitfld.long 0x0 3. "CTIMER3_CLK_EN,Enables the CTIMER3 function clock" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A146*"))
bitfld.long 0x0 4. "CTIMER4_CLK_EN,Enables the CTIMER4 function clock" "0: Disable,1: Enable"
newline
bitfld.long 0x0 3. "CTIMER3_CLK_EN,Enables the CTIMER3 function clock" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A154*"))
bitfld.long 0x0 4. "CTIMER4_CLK_EN,Enables the CTIMER4 function clock" "0: Disable,1: Enable"
newline
bitfld.long 0x0 3. "CTIMER3_CLK_EN,Enables the CTIMER3 function clock" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A155*"))
bitfld.long 0x0 4. "CTIMER4_CLK_EN,Enables the CTIMER4 function clock" "0: Disable,1: Enable"
newline
bitfld.long 0x0 3. "CTIMER3_CLK_EN,Enables the CTIMER3 function clock" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A156*"))
bitfld.long 0x0 4. "CTIMER4_CLK_EN,Enables the CTIMER4 function clock" "0: Disable,1: Enable"
newline
bitfld.long 0x0 3. "CTIMER3_CLK_EN,Enables the CTIMER3 function clock" "0: Disable,1: Enable"
newline
endif
bitfld.long 0x0 2. "CTIMER2_CLK_EN,Enables the CTIMER2 function clock" "0: Disable,1: Enable"
newline
bitfld.long 0x0 1. "CTIMER1_CLK_EN,Enables the CTIMER1 function clock" "0: Disable,1: Enable"
newline
bitfld.long 0x0 0. "CTIMER0_CLK_EN,Enables the CTIMER0 function clock" "0: Disable,1: Enable"
line.long 0x4 "RAM_CTRL,RAM Control"
sif (cpuis("MC?A144*"))
bitfld.long 0x4 18. "RAMB_CG_OVERRIDE,RAMB bank clock gating control" "0: Memory bank clock is gated automatically if no..,1: Auto clock gating feature is disabled"
newline
endif
sif (cpuis("MC?A145*"))
bitfld.long 0x4 18. "RAMB_CG_OVERRIDE,RAMB bank clock gating control" "0: Memory bank clock is gated automatically if no..,1: Auto clock gating feature is disabled"
newline
endif
sif (cpuis("MC?A146*"))
bitfld.long 0x4 18. "RAMB_CG_OVERRIDE,RAMB bank clock gating control" "0: Memory bank clock is gated automatically if no..,1: Auto clock gating feature is disabled"
newline
endif
sif (cpuis("MC?A154*"))
bitfld.long 0x4 18. "RAMB_CG_OVERRIDE,RAMB bank clock gating control" "0: Memory bank clock is gated automatically if no..,1: Auto clock gating feature is disabled"
newline
endif
sif (cpuis("MC?A155*"))
bitfld.long 0x4 18. "RAMB_CG_OVERRIDE,RAMB bank clock gating control" "0: Memory bank clock is gated automatically if no..,1: Auto clock gating feature is disabled"
newline
endif
sif (cpuis("MC?A156*"))
bitfld.long 0x4 18. "RAMB_CG_OVERRIDE,RAMB bank clock gating control" "0: Memory bank clock is gated automatically if no..,1: Auto clock gating feature is disabled"
newline
endif
bitfld.long 0x4 17. "RAMX_CG_OVERRIDE,RAMX bank clock gating control" "0: Memory bank clock is gated automatically if no..,1: Auto clock gating feature is disabled"
newline
bitfld.long 0x4 16. "RAMA_CG_OVERRIDE,RAMA bank clock gating control only avaiable when RAMA_ECC_ENABLE = 0." "0: Memory bank clock is gated automatically if no..,1: Auto clock gating feature is disabled"
newline
bitfld.long 0x4 0. "RAMA_ECC_ENABLE,RAMA ECC enable" "0: ECC is disabled,1: ECC is enabled"
group.long 0xB60++0x7
line.long 0x0 "GRAY_CODE_LSB,Gray to Binary Converter Gray Code [31:0]"
hexmask.long 0x0 0.--31. 1. "code_gray_31_0,Gray code [31:0]"
line.long 0x4 "GRAY_CODE_MSB,Gray to Binary Converter Gray Code [41:32]"
hexmask.long.word 0x4 0.--9. 1. "code_gray_41_32,Gray code [41:32]"
rgroup.long 0xB68++0x7
line.long 0x0 "BINARY_CODE_LSB,Gray to Binary Converter Binary Code [31:0]"
hexmask.long 0x0 0.--31. 1. "code_bin_31_0,Binary code [31:0]"
line.long 0x4 "BINARY_CODE_MSB,Gray to Binary Converter Binary Code [41:32]"
hexmask.long.word 0x4 0.--9. 1. "code_bin_41_32,Binary code [41:32]"
rgroup.long 0xE40++0xB
line.long 0x0 "OVP_PAD_STATE,OVP_PAD_STATE"
hexmask.long 0x0 0.--31. 1. "OVP_PAD_STATE,OVP_PAD_STATE"
line.long 0x4 "PROBE_STATE,PROBE_STATE"
hexmask.long 0x4 0.--31. 1. "PROBE_STATE,PROBE_STATE"
line.long 0x8 "FT_STATE_A,FT_STATE_A"
hexmask.long 0x8 0.--31. 1. "FT_STATE_A,FT_STATE_A"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
rgroup.long 0xE4C++0x3
line.long 0x0 "ROP_STATE,ROP State Register"
hexmask.long 0x0 0.--31. 1. "ROP_STATE,ROP state"
endif
sif (cpuis("MC?A152*"))
rgroup.long 0xE4C++0x3
line.long 0x0 "ROP_STATE,ROP State Register"
hexmask.long 0x0 0.--31. 1. "ROP_STATE,ROP state"
endif
sif (cpuis("MC?A153*"))
rgroup.long 0xE4C++0x3
line.long 0x0 "ROP_STATE,ROP State Register"
hexmask.long 0x0 0.--31. 1. "ROP_STATE,ROP state"
endif
group.long 0xE58++0x7
line.long 0x0 "SRAM_XEN,RAM XEN Control"
bitfld.long 0x0 31. "LOCK,This 1-bit field provides a mechanism to limit writes to the this register (and SRAM_XEN_DP) to protect its contents. Once set this bit remains asserted until the next reset." "0: This register is not locked and can be altered.,1: This register is locked and cannot be altered."
newline
sif (cpuis("MC?A144*"))
bitfld.long 0x0 4. "RAMB_XEN,RAMBx Execute permission control." "0: Execute permission is disabled R/W are enabled.,1: Execute permission is enabled R/W/X are enabled."
newline
endif
sif (cpuis("MC?A145*"))
bitfld.long 0x0 4. "RAMB_XEN,RAMBx Execute permission control." "0: Execute permission is disabled R/W are enabled.,1: Execute permission is enabled R/W/X are enabled."
newline
endif
sif (cpuis("MC?A146*"))
bitfld.long 0x0 4. "RAMB_XEN,RAMBx Execute permission control." "0: Execute permission is disabled R/W are enabled.,1: Execute permission is enabled R/W/X are enabled."
newline
endif
sif (cpuis("MC?A154*"))
bitfld.long 0x0 4. "RAMB_XEN,RAMBx Execute permission control." "0: Execute permission is disabled R/W are enabled.,1: Execute permission is enabled R/W/X are enabled."
newline
endif
sif (cpuis("MC?A155*"))
bitfld.long 0x0 4. "RAMB_XEN,RAMBx Execute permission control." "0: Execute permission is disabled R/W are enabled.,1: Execute permission is enabled R/W/X are enabled."
newline
endif
sif (cpuis("MC?A156*"))
bitfld.long 0x0 4. "RAMB_XEN,RAMBx Execute permission control." "0: Execute permission is disabled R/W are enabled.,1: Execute permission is enabled R/W/X are enabled."
newline
endif
bitfld.long 0x0 3. "RAMA1_XEN,RAMAx (excepts RAMA0) Execute permission control." "0: Execute permission is disabled R/W are enabled.,1: Execute permission is enabled R/W/X are enabled."
newline
bitfld.long 0x0 2. "RAMA0_XEN,RAMA0 Execute permission control." "0: Execute permission is disabled R/W are enabled.,1: Execute permission is enabled R/W/X are enabled."
newline
bitfld.long 0x0 1. "RAMX1_XEN,RAMX1 Execute permission control." "0: Execute permission is disabled R/W are enabled.,1: Execute permission is enabled R/W/X are enabled."
newline
bitfld.long 0x0 0. "RAMX0_XEN,RAMX0 Execute permission control." "0: Execute permission is disabled R/W are enabled.,1: Execute permission is enabled R/W/X are enabled."
line.long 0x4 "SRAM_XEN_DP,RAM XEN Control (Duplicate)"
sif (cpuis("MC?A144*"))
bitfld.long 0x4 4. "RAMB_XEN,Refer to SRAM_XEN for more details." "0,1"
newline
endif
sif (cpuis("MC?A145*"))
bitfld.long 0x4 4. "RAMB_XEN,Refer to SRAM_XEN for more details." "0,1"
newline
endif
sif (cpuis("MC?A146*"))
bitfld.long 0x4 4. "RAMB_XEN,Refer to SRAM_XEN for more details." "0,1"
newline
endif
sif (cpuis("MC?A154*"))
bitfld.long 0x4 4. "RAMB_XEN,Refer to SRAM_XEN for more details." "0,1"
newline
endif
sif (cpuis("MC?A155*"))
bitfld.long 0x4 4. "RAMB_XEN,Refer to SRAM_XEN for more details." "0,1"
newline
endif
sif (cpuis("MC?A156*"))
bitfld.long 0x4 4. "RAMB_XEN,Refer to SRAM_XEN for more details." "0,1"
newline
endif
bitfld.long 0x4 3. "RAMA1_XEN,Refer to SRAM_XEN for more details." "0,1"
newline
bitfld.long 0x4 2. "RAMA0_XEN,Refer to SRAM_XEN for more details." "0,1"
newline
bitfld.long 0x4 1. "RAMX1_XEN,Refer to SRAM_XEN for more details." "0,1"
newline
bitfld.long 0x4 0. "RAMX0_XEN,Refer to SRAM_XEN for more details." "0,1"
rgroup.long 0xE80++0x7
line.long 0x0 "ELS_OTP_LC_STATE,Life Cycle State Register"
hexmask.long.byte 0x0 0.--7. 1. "OTP_LC_STATE,OTP life cycle state"
line.long 0x4 "ELS_OTP_LC_STATE_DP,Life Cycle State Register (Duplicate)"
hexmask.long.byte 0x4 0.--7. 1. "OTP_LC_STATE_DP,OTP life cycle state"
group.long 0xFA0++0xB
line.long 0x0 "DEBUG_LOCK_EN,Control Write Access to Security"
hexmask.long.byte 0x0 0.--3. 1. "LOCK_ALL,Controls write access to the security registers"
line.long 0x4 "DEBUG_FEATURES,Cortex Debug Features Control"
bitfld.long 0x4 2.--3. "CPU0_NIDEN,CPU0 non-invasive debug control" "?,1: Disables debug,2: Enables debug,?"
newline
bitfld.long 0x4 0.--1. "CPU0_DBGEN,CPU0 invasive debug control" "?,1: Disables debug,2: Enables debug,?"
line.long 0x8 "DEBUG_FEATURES_DP,Cortex Debug Features Control (Duplicate)"
bitfld.long 0x8 2.--3. "CPU0_NIDEN,CPU0 non-invasive debug control" "?,1: Disables debug,2: Enables debug,?"
newline
bitfld.long 0x8 0.--1. "CPU0_DBGEN,CPU0 invasive debug control" "?,1: Disables debug,2: Enables debug,?"
group.long 0xFB4++0x3
line.long 0x0 "SWD_ACCESS_CPU0,CPU0 Software Debug Access"
hexmask.long 0x0 0.--31. 1. "SEC_CODE,CPU0 SWD-AP: 0x12345678"
group.long 0xFC0++0x3
line.long 0x0 "DEBUG_AUTH_BEACON,Debug Authentication BEACON"
hexmask.long 0x0 0.--31. 1. "BEACON,Sets by the debug authentication code in ROM to pass the debug beacons (Credential Beacon and Authentication Beacon) to the application code."
rgroup.long 0xFF0++0xF
line.long 0x0 "JTAG_ID,JTAG Chip ID"
hexmask.long 0x0 0.--31. 1. "JTAG_ID,Indicates the device ID"
line.long 0x4 "DEVICE_TYPE,Device Type"
hexmask.long 0x4 0.--31. 1. "DEVICE_TYPE,Indicates DEVICE TYPE."
line.long 0x8 "DEVICE_ID0,Device ID"
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x8 24.--27. 1. "SECURITY,no description available"
newline
endif
sif (cpuis("MC?A145*"))
hexmask.long.byte 0x8 24.--27. 1. "SECURITY,no description available"
newline
endif
sif (cpuis("MC?A146*"))
hexmask.long.byte 0x8 24.--27. 1. "SECURITY,no description available"
newline
endif
sif (cpuis("MC?A154*"))
hexmask.long.byte 0x8 24.--27. 1. "SECURITY,no description available"
newline
endif
sif (cpuis("MC?A155*"))
hexmask.long.byte 0x8 24.--27. 1. "SECURITY,no description available"
newline
endif
sif (cpuis("MC?A156*"))
hexmask.long.byte 0x8 24.--27. 1. "SECURITY,no description available"
newline
endif
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
hexmask.long.byte 0x8 20.--23. 1. "ROM_REV_MINOR,ROM revision."
newline
endif
sif (cpuis("MC?A152*"))
hexmask.long.byte 0x8 20.--23. 1. "ROM_REV_MINOR,ROM revision."
newline
endif
sif (cpuis("MC?A153*"))
hexmask.long.byte 0x8 20.--23. 1. "ROM_REV_MINOR,ROM revision."
newline
endif
sif (cpuis("MC?A144*"))
hexmask.long.byte 0x8 4.--7. 1. "FLASH_SIZE,Chip FLASH Size"
newline
hexmask.long.byte 0x8 0.--3. 1. "RAM_SIZE,Chip RAM Size"
newline
endif
sif (cpuis("MC?A145*"))
hexmask.long.byte 0x8 4.--7. 1. "FLASH_SIZE,Chip FLASH Size"
newline
hexmask.long.byte 0x8 0.--3. 1. "RAM_SIZE,Chip RAM Size"
newline
endif
sif (cpuis("MC?A146*"))
hexmask.long.byte 0x8 4.--7. 1. "FLASH_SIZE,Chip FLASH Size"
newline
hexmask.long.byte 0x8 0.--3. 1. "RAM_SIZE,Chip RAM Size"
newline
endif
sif (cpuis("MC?A154*"))
hexmask.long.byte 0x8 4.--7. 1. "FLASH_SIZE,Chip FLASH Size"
newline
hexmask.long.byte 0x8 0.--3. 1. "RAM_SIZE,Chip RAM Size"
newline
endif
sif (cpuis("MC?A155*"))
hexmask.long.byte 0x8 4.--7. 1. "FLASH_SIZE,Chip FLASH Size"
newline
hexmask.long.byte 0x8 0.--3. 1. "RAM_SIZE,Chip RAM Size"
newline
endif
sif (cpuis("MC?A156*"))
hexmask.long.byte 0x8 4.--7. 1. "FLASH_SIZE,Chip FLASH Size"
newline
hexmask.long.byte 0x8 0.--3. 1. "RAM_SIZE,Chip RAM Size"
endif
line.long 0xC "DIEID,Chip Revision ID and Number"
hexmask.long.tbyte 0xC 8.--27. 1. "MCO_NUM_IN_DIE_ID,Chip number"
newline
hexmask.long.byte 0xC 4.--7. 1. "MAJOR_REVISION,Chip major revision"
newline
hexmask.long.byte 0xC 0.--3. 1. "MINOR_REVISION,Chip minor revision"
tree.end
sif (cpuis("MC?A142*")||cpuis("MC?A143*")||cpuis("MC?A144*")||cpuis("MC?A145*")||cpuis("MC?A146*")||cpuis("MC?A152*")||cpuis("MC?A153*")||cpuis("MC?A154*")||cpuis("MC?A155*")||cpuis("MC?A156*"))
tree "USB (USB Full Speed Host and Device Controller)"
base ad:0x400A4000
rgroup.byte 0x0++0x0
line.byte 0x0 "PERID,Peripheral ID"
hexmask.byte 0x0 0.--5. 1. "ID,Peripheral Identification"
rgroup.byte 0x4++0x0
line.byte 0x0 "IDCOMP,Peripheral ID Complement"
hexmask.byte 0x0 0.--5. 1. "NID,Negative Peripheral ID"
rgroup.byte 0x8++0x0
line.byte 0x0 "REV,Peripheral Revision"
hexmask.byte 0x0 0.--7. 1. "REV,Revision"
group.byte 0x1C++0x0
line.byte 0x0 "OTGCTL,OTG Control"
bitfld.byte 0x0 7. "DPHIGH,D+ Data Line Pullup Resistor Enable" "0: Disable,1: Enable"
group.byte 0x80++0x0
line.byte 0x0 "ISTAT,Interrupt Status"
eventfld.byte 0x0 7. "STALL,Stall Interrupt Flag" "0: Interrupt did not occur,1: Interrupt occurred"
newline
eventfld.byte 0x0 5. "RESUME,Resume Flag" "0: Interrupt did not occur,1: Interrupt occurred"
newline
eventfld.byte 0x0 4. "SLEEP,Sleep Flag" "0: Interrupt did not occur,1: Interrupt occurred"
newline
eventfld.byte 0x0 3. "TOKDNE,Current Token Processing Flag" "0: Not processed,1: Processed"
newline
eventfld.byte 0x0 2. "SOFTOK,Start Of Frame (SOF) Token Flag" "0: Did not receive,1: Received"
newline
eventfld.byte 0x0 1. "ERROR,Error Flag" "0: Error did not occur,1: Error occurred"
newline
eventfld.byte 0x0 0. "USBRST,USB Reset Flag" "0: Not detected,1: Detected"
group.byte 0x84++0x0
line.byte 0x0 "INTEN,Interrupt Enable"
bitfld.byte 0x0 7. "STALLEN,STALL Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.byte 0x0 5. "RESUMEEN,RESUME Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.byte 0x0 4. "SLEEPEN,SLEEP Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.byte 0x0 3. "TOKDNEEN,TOKDNE Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.byte 0x0 2. "SOFTOKEN,SOFTOK Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.byte 0x0 1. "ERROREN,ERROR Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.byte 0x0 0. "USBRSTEN,USBRST Interrupt Enable" "0: Disable,1: Enable"
group.byte 0x88++0x0
line.byte 0x0 "ERRSTAT,Error Interrupt Status"
eventfld.byte 0x0 7. "BTSERR,Bit Stuff Error Flag" "0: Packet not rejected due to the error,1: Packet rejected due to the error"
newline
eventfld.byte 0x0 6. "OWNERR,BD Unavailable Error Flag" "0: Interrupt did not occur,1: Interrupt occurred"
newline
eventfld.byte 0x0 5. "DMAERR,DMA Access Error Flag" "0: Interrupt did not occur,1: Interrupt occurred"
newline
eventfld.byte 0x0 4. "BTOERR,Bus Turnaround Timeout Error Flag" "0: Not timed out,1: Timed out"
newline
eventfld.byte 0x0 3. "DFN8,Data Field Not 8 Bits Flag" "0: Integer number of bytes,1: Not an integer number of bytes"
newline
eventfld.byte 0x0 2. "CRC16,CRC16 Error Flag" "0: Not rejected,1: Rejected"
newline
eventfld.byte 0x0 1. "CRC5EOF,CRC5 Error or End of Frame Error Flag" "0: Interrupt did not occur,1: Interrupt occurred"
newline
eventfld.byte 0x0 0. "PIDERR,PID Error Flag" "0: Did not fail,1: Failed"
group.byte 0x8C++0x0
line.byte 0x0 "ERREN,Error Interrupt Enable"
bitfld.byte 0x0 7. "BTSERREN,BTSERR (Bit Stuff Error) Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.byte 0x0 6. "OWNERREN,OWNERR Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.byte 0x0 5. "DMAERREN,DMAERR Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.byte 0x0 4. "BTOERREN,BTOERR (Bus Timeout Error) Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.byte 0x0 3. "DFN8EN,DFN8 (Data Field Not Integer Number of Bytes) Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.byte 0x0 2. "CRC16EN,CRC16 Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.byte 0x0 1. "CRC5EOFEN,CRC5/EOF Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.byte 0x0 0. "PIDERREN,PIDERR Interrupt Enable" "0: Disable,1: Enable"
rgroup.byte 0x90++0x0
line.byte 0x0 "STAT,Status"
hexmask.byte 0x0 4.--7. 1. "ENDP,Endpoint address"
newline
bitfld.byte 0x0 3. "TX,Transmit Indicator" "0: Receive,1: Transmit"
newline
bitfld.byte 0x0 2. "ODD,Odd Bank" "0: Not in the odd bank,1: In the odd bank"
group.byte 0x94++0x0
line.byte 0x0 "CTL,Control"
bitfld.byte 0x0 6. "SE0,Live USB Single-Ended Zero signal" "0,1"
newline
bitfld.byte 0x0 5. "TXSUSPENDTOKENBUSY,TXD Suspend And Token Busy" "0,1"
newline
bitfld.byte 0x0 2. "RESUME,Resume" "0,1"
newline
bitfld.byte 0x0 1. "ODDRST,Odd Reset" "0,1"
newline
bitfld.byte 0x0 0. "USBENSOFEN,USB Enable" "0: Disable,1: Enable"
group.byte 0x98++0x0
line.byte 0x0 "ADDR,Address"
hexmask.byte 0x0 0.--6. 1. "ADDR,USB Address"
group.byte 0x9C++0x0
line.byte 0x0 "BDTPAGE1,BDT Page 1"
hexmask.byte 0x0 1.--7. 1. "BDTBA,BDT Base Address"
rgroup.byte 0xA0++0x0
line.byte 0x0 "FRMNUML,Frame Number Register Low"
hexmask.byte 0x0 0.--7. 1. "FRM,Frame Number Bits 0-7"
rgroup.byte 0xA4++0x0
line.byte 0x0 "FRMNUMH,Frame Number Register High"
bitfld.byte 0x0 0.--2. "FRM,Frame Number Bits 8-10" "0,1,2,3,4,5,6,7"
group.byte 0xB0++0x0
line.byte 0x0 "BDTPAGE2,BDT Page 2"
hexmask.byte 0x0 0.--7. 1. "BDTBA,BDT Base Address"
group.byte 0xB4++0x0
line.byte 0x0 "BDTPAGE3,BDT Page 3"
hexmask.byte 0x0 0.--7. 1. "BDTBA,BDT Base Address"
repeat 16. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF)(list ad:0x400A40C0 ad:0x400A40C4 ad:0x400A40C8 ad:0x400A40CC ad:0x400A40D0 ad:0x400A40D4 ad:0x400A40D8 ad:0x400A40DC ad:0x400A40E0 ad:0x400A40E4 ad:0x400A40E8 ad:0x400A40EC ad:0x400A40F0 ad:0x400A40F4 ad:0x400A40F8 ad:0x400A40FC)
tree "ENDPOINT[$1]"
base $2
group.byte ($2)++0x0
line.byte 0x0 "ENDPT,Endpoint Control"
bitfld.byte 0x0 4. "EPCTLDIS,Control Transfer Disable" "0: Enable,1: Disable"
bitfld.byte 0x0 3. "EPRXEN,Endpoint for RX transfers enable" "0,1"
bitfld.byte 0x0 2. "EPTXEN,Endpoint for TX transfers enable" "0,1"
bitfld.byte 0x0 1. "EPSTALL,Endpoint Stalled" "0,1"
bitfld.byte 0x0 0. "EPHSHK,Endpoint Handshaking Enable" "0,1"
tree.end
repeat.end
base ad:0x400A4000
newline
group.byte 0x100++0x0
line.byte 0x0 "USBCTRL,USB Control"
bitfld.byte 0x0 7. "SUSP,Suspend" "0: Not in Suspend state,1: In Suspend state"
newline
bitfld.byte 0x0 6. "PDE,Pulldown Enable" "0: Disable on D+ and D-,1: Enable on D+ and D-"
newline
bitfld.byte 0x0 5. "UARTCHLS,UART Signal Channel Select" "0: USB DP and DM signals are used as UART TX/RX.,1: USB DP and DM signals are used as UART RX/TX."
newline
bitfld.byte 0x0 4. "UARTSEL,UART Select" "0: USB DP and DM external package pins are used for..,1: USB DP and DM external package pins are used for.."
newline
bitfld.byte 0x0 2. "DPDM_LANE_REVERSE,DP and DM Lane Reversal Control" "0: Standard USB DP and DM package pin assignment,1: Reverse roles of USB DP and DM package pins"
rgroup.byte 0x104++0x0
line.byte 0x0 "OBSERVE,USB OTG Observe"
bitfld.byte 0x0 7. "DPPU,D+ Pullup" "0: Disabled,1: Enabled"
newline
bitfld.byte 0x0 6. "DPPD,D+ Pulldown" "0: Disabled,1: Enabled"
newline
bitfld.byte 0x0 4. "DMPD,D- Pulldown" "0: Disabled,1: Enabled"
group.byte 0x108++0x0
line.byte 0x0 "CONTROL,USB OTG Control"
bitfld.byte 0x0 4. "DPPULLUPNONOTG,DP Pullup in Non-OTG Device Mode" "0: Disable,1: Enabled"
newline
rbitfld.byte 0x0 1. "SESS_VLD,VBUS Session Valid status" "0: Below,1: Above"
newline
bitfld.byte 0x0 0. "VBUS_SOURCE_SEL,VBUS Monitoring Source Select" "?,1: Resistive divider attached to a GPIO pin"
group.byte 0x10C++0x0
line.byte 0x0 "USBTRC0,USB Transceiver Control 0"
bitfld.byte 0x0 7. "USBRESET,USB Reset" "0: Normal USBFS operation,1: Returns USBFS to its reset state"
newline
rbitfld.byte 0x0 6. "VREGIN_STS,VREGIN Status" "0,1"
newline
bitfld.byte 0x0 5. "USBRESMEN,Asynchronous Resume Interrupt Enable" "0: Disable,1: Enable"
newline
rbitfld.byte 0x0 4. "VFEDG_DET,VREGIN Falling Edge Interrupt Detect" "0: Not detected,1: Detected"
newline
rbitfld.byte 0x0 3. "VREDG_DET,VREGIN Rising Edge Interrupt Detect" "0: Not detected,1: Detected"
newline
rbitfld.byte 0x0 2. "USB_CLK_RECOVERY_INT,Combined USB Clock Recovery interrupt status" "0,1"
newline
rbitfld.byte 0x0 1. "SYNC_DET,Synchronous USB Interrupt Detect" "0: Not detected,1: Detected"
newline
rbitfld.byte 0x0 0. "USB_RESUME_INT,USB Asynchronous Interrupt" "0: Not generated,1: Generated because of the USB asynchronous.."
group.byte 0x124++0x0
line.byte 0x0 "KEEP_ALIVE_CTRL_RSVD,Reserved"
group.byte 0x128++0x0
line.byte 0x0 "KEEP_ALIVE_WKCTRL_RSVD,Reserved"
group.byte 0x12C++0x0
line.byte 0x0 "MISCCTRL,Miscellaneous Control"
bitfld.byte 0x0 7. "STL_ADJ_EN,USB Peripheral Mode Stall Adjust Enable" "0: If ENDPTn[END_STALL] = 1 both IN and OUT..,1: If ENDPTn[END_STALL] = 1 the STALL_xx_DIS.."
newline
bitfld.byte 0x0 4. "VFEDG_EN,VREGIN Falling Edge Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.byte 0x0 3. "VREDG_EN,VREGIN Rising Edge Interrupt Enable" "0: Disable,1: Enable"
newline
bitfld.byte 0x0 2. "OWNERRISODIS,OWN Error Detect for ISO IN and ISO OUT Disable" "0: Enable,1: Disable"
group.byte 0x130++0x0
line.byte 0x0 "STALL_IL_DIS,Peripheral Mode Stall Disable for Endpoints 7 to 0 in IN Direction"
bitfld.byte 0x0 7. "STALL_I_DIS7,Disable Endpoint 7 IN Direction" "0: Enable,1: Disable"
newline
bitfld.byte 0x0 6. "STALL_I_DIS6,Disable Endpoint 6 IN Direction" "0: Enable,1: Disable"
newline
bitfld.byte 0x0 5. "STALL_I_DIS5,Disable Endpoint 5 IN Direction" "0: Enable,1: Disable"
newline
bitfld.byte 0x0 4. "STALL_I_DIS4,Disable Endpoint 4 IN Direction" "0: Enable,1: Disable"
newline
bitfld.byte 0x0 3. "STALL_I_DIS3,Disable Endpoint 3 IN Direction" "0: Enable,1: Disable"
newline
bitfld.byte 0x0 2. "STALL_I_DIS2,Disable Endpoint 2 IN Direction" "0: Enable,1: Disable"
newline
bitfld.byte 0x0 1. "STALL_I_DIS1,Disable Endpoint 1 IN Direction" "0: Enable,1: Disable"
newline
bitfld.byte 0x0 0. "STALL_I_DIS0,Disable Endpoint 0 IN Direction" "0: Enable,1: Disable"
group.byte 0x134++0x0
line.byte 0x0 "STALL_IH_DIS,Peripheral Mode Stall Disable for Endpoints 15 to 8 in IN Direction"
bitfld.byte 0x0 7. "STALL_I_DIS15,Disable Endpoint 15 IN Direction" "0: Enable,1: Disable"
newline
bitfld.byte 0x0 6. "STALL_I_DIS14,Disable Endpoint 14 IN Direction" "0: Enable,1: Disable"
newline
bitfld.byte 0x0 5. "STALL_I_DIS13,Disable Endpoint 13 IN Direction" "0: Enable,1: Disable"
newline
bitfld.byte 0x0 4. "STALL_I_DIS12,Disable Endpoint 12 IN Direction" "0: Enable,1: Disable"
newline
bitfld.byte 0x0 3. "STALL_I_DIS11,Disable Endpoint 11 IN Direction" "0: Enable,1: Disable"
newline
bitfld.byte 0x0 2. "STALL_I_DIS10,Disable Endpoint 10 IN Direction" "0: Enable,1: Disable"
newline
bitfld.byte 0x0 1. "STALL_I_DIS9,Disable Endpoint 9 IN Direction" "0: Enable,1: Disable"
newline
bitfld.byte 0x0 0. "STALL_I_DIS8,Disable Endpoint 8 IN Direction" "0: Enable,1: Disable"
group.byte 0x138++0x0
line.byte 0x0 "STALL_OL_DIS,Peripheral Mode Stall Disable for Endpoints 7 to 0 in OUT Direction"
bitfld.byte 0x0 7. "STALL_O_DIS7,Disable Endpoint 7 OUT Direction" "0: Enable,1: Disable"
newline
bitfld.byte 0x0 6. "STALL_O_DIS6,Disable Endpoint 6 OUT Direction" "0: Enable,1: Disable"
newline
bitfld.byte 0x0 5. "STALL_O_DIS5,Disable Endpoint 5 OUT Direction" "0: Enable,1: Disable"
newline
bitfld.byte 0x0 4. "STALL_O_DIS4,Disable Endpoint 4 OUT Direction" "0: Enable,1: Disable"
newline
bitfld.byte 0x0 3. "STALL_O_DIS3,Disable Endpoint 3 OUT Direction" "0: Enable,1: Disable"
newline
bitfld.byte 0x0 2. "STALL_O_DIS2,Disable Endpoint 2 OUT Direction" "0: Enable,1: Disable"
newline
bitfld.byte 0x0 1. "STALL_O_DIS1,Disable Endpoint 1 OUT Direction" "0: Enable,1: Disable"
newline
bitfld.byte 0x0 0. "STALL_O_DIS0,Disable Endpoint 0 OUT Direction" "0: Enable,1: Disable"
group.byte 0x13C++0x0
line.byte 0x0 "STALL_OH_DIS,Peripheral Mode Stall Disable for Endpoints 15 to 8 in OUT Direction"
bitfld.byte 0x0 7. "STALL_O_DIS15,Disable Endpoint 15 OUT Direction" "0: Enable,1: Disable"
newline
bitfld.byte 0x0 6. "STALL_O_DIS14,Disable Endpoint 14 OUT Direction" "0: Enable,1: Disable"
newline
bitfld.byte 0x0 5. "STALL_O_DIS13,Disable Endpoint 13 OUT Direction" "0: Enable,1: Disable"
newline
bitfld.byte 0x0 4. "STALL_O_DIS12,Disable endpoint 12 OUT direction" "0: Enable,1: Disable"
newline
bitfld.byte 0x0 3. "STALL_O_DIS11,Disable Endpoint 11 OUT Direction" "0: Enable,1: Disable"
newline
bitfld.byte 0x0 2. "STALL_O_DIS10,Disable Endpoint 10 OUT Direction" "0: Enable,1: Disable"
newline
bitfld.byte 0x0 1. "STALL_O_DIS9,Disable Endpoint 9 OUT Direction" "0: Enable,1: Disable"
newline
bitfld.byte 0x0 0. "STALL_O_DIS8,Disable Endpoint 8 OUT Direction" "0: Enable,1: Disable"
group.byte 0x140++0x0
line.byte 0x0 "CLK_RECOVER_CTRL,USB Clock Recovery Control"
bitfld.byte 0x0 7. "CLOCK_RECOVER_EN,Crystal-Less USB Enable" "0: Disable,1: Enable"
newline
bitfld.byte 0x0 6. "RESET_RESUME_ROUGH_EN,Reset or Resume to Rough Phase Enable" "0: Always works in tracking phase after the first..,1: Go back to rough stage whenever a bus reset or.."
newline
bitfld.byte 0x0 5. "RESTART_IFRTRIM_EN,Restart from IFR Trim Value" "0: Trim fine adjustment always works based on the..,1: Trim fine restarts from the IFR trim value.."
newline
bitfld.byte 0x0 3. "TRIM_INIT_VAL_SEL,Selects the source for the initial FIRC trim fine value used after a reset." "0: Mid-scale,1: IFR"
group.byte 0x144++0x0
line.byte 0x0 "CLK_RECOVER_IRC_EN,FIRC Oscillator Enable"
bitfld.byte 0x0 1. "IRC_EN,Fast IRC enable" "0: Disable,1: Enable"
group.byte 0x154++0x0
line.byte 0x0 "CLK_RECOVER_INT_EN,Clock Recovery Combined Interrupt Enable"
bitfld.byte 0x0 4. "OVF_ERROR_EN,Overflow error interrupt enable" "0: The interrupt is masked,1: The interrupt is enabled"
group.byte 0x15C++0x0
line.byte 0x0 "CLK_RECOVER_INT_STATUS,Clock Recovery Separated Interrupt Status"
eventfld.byte 0x0 4. "OVF_ERROR,Overflow Error Interrupt Status Flag" "0: Interrupt did not occur,1: Unmasked interrupt occurred"
tree.end
endif
tree "UTICK (Micro-Tick Timer)"
base ad:0x4000B000
group.long 0x0++0xB
line.long 0x0 "CTRL,Control"
bitfld.long 0x0 31. "REPEAT,Repeat Delay" "0: One-time delay,1: Delay repeats continuously"
hexmask.long 0x0 0.--30. 1. "DELAYVAL,Tick Interval"
line.long 0x4 "STAT,Status"
eventfld.long 0x4 1. "ACTIVE,Timer Active Flag" "0: Inactive (stopped),1: Active"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
bitfld.long 0x4 0. "INTR,Interrupt Flag" "0: Not pending,1: Pending"
endif
sif (cpuis("MC?A145*"))
eventfld.long 0x4 0. "INTR,Interrupt Flag" "0: Not pending,1: Pending"
newline
endif
sif (cpuis("MC?A146*"))
eventfld.long 0x4 0. "INTR,Interrupt Flag" "0: Not pending,1: Pending"
endif
sif (cpuis("MC?A152*"))
bitfld.long 0x4 0. "INTR,Interrupt Flag" "0: Not pending,1: Pending"
endif
sif (cpuis("MC?A153*"))
bitfld.long 0x4 0. "INTR,Interrupt Flag" "0: Not pending,1: Pending"
newline
endif
sif (cpuis("MC?A154*"))
eventfld.long 0x4 0. "INTR,Interrupt Flag" "0: Not pending,1: Pending"
endif
sif (cpuis("MC?A155*"))
eventfld.long 0x4 0. "INTR,Interrupt Flag" "0: Not pending,1: Pending"
endif
sif (cpuis("MC?A156*"))
eventfld.long 0x4 0. "INTR,Interrupt Flag" "0: Not pending,1: Pending"
newline
endif
sif (cpuis("MC?A144*"))
eventfld.long 0x4 0. "INTR,Interrupt Flag" "0: Not pending,1: Pending"
endif
line.long 0x8 "CFG,Capture Configuration"
bitfld.long 0x8 11. "CAPPOL3,Capture Polarity 3" "0: Positive,1: Negative"
bitfld.long 0x8 10. "CAPPOL2,Capture Polarity 2" "0: Positive,1: Negative"
bitfld.long 0x8 9. "CAPPOL1,Capture-Polarity 1" "0: Positive,1: Negative"
newline
bitfld.long 0x8 8. "CAPPOL0,Capture Polarity 0" "0: Positive,1: Negative"
bitfld.long 0x8 3. "CAPEN3,Enable Capture 3" "0: Disable,1: Enable"
bitfld.long 0x8 2. "CAPEN2,Enable Capture 2" "0: Disable,1: Enable"
newline
bitfld.long 0x8 1. "CAPEN1,Enable Capture 1" "0: Disable,1: Enable"
bitfld.long 0x8 0. "CAPEN0,Enable Capture 0" "0: Disable,1: Enable"
wgroup.long 0xC++0x3
line.long 0x0 "CAPCLR,Capture Clear"
bitfld.long 0x0 3. "CAPCLR3,Clear Capture 3" "0: Does nothing,1: Clears the CAP3 register value"
bitfld.long 0x0 2. "CAPCLR2,Clear Capture 2" "0: Does nothing,1: Clears the CAP2 register value"
bitfld.long 0x0 1. "CAPCLR1,Clear Capture 1" "0: Does nothing,1: Clears the CAP1 register value"
newline
bitfld.long 0x0 0. "CAPCLR0,Clear Capture 0" "0: Does nothing,1: Clears the CAP0 register value"
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
rgroup.long ($2+0x10)++0x3
line.long 0x0 "CAP[$1],Capture"
bitfld.long 0x0 31. "VALID,Captured Value Valid Flag" "0: Valid value not captured,1: Valid value captured"
hexmask.long 0x0 0.--30. 1. "CAP_VALUE,Captured Value for the Related Capture Event"
repeat.end
tree.end
tree "VBAT"
base ad:0x40093000
rgroup.long 0x0++0x3
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
group.long 0x200++0x3
line.long 0x0 "FROCTLA,FRO16K Control A"
bitfld.long 0x0 0. "FRO_EN,FRO16K Enable" "0: Disable,1: Enable"
group.long 0x218++0x3
line.long 0x0 "FROLCKA,FRO16K Lock A"
bitfld.long 0x0 0. "LOCK,Lock" "0: Do not block,1: Block"
group.long 0x220++0x3
line.long 0x0 "FROCLKE,FRO16K Clock Enable"
bitfld.long 0x0 0.--1. "CLKE,Clock Enable" "0,1,2,3"
repeat 2. (list 0x0 0x1)(list ad:0x40093700 ad:0x40093708)
tree "WAKEUP[$1]"
base $2
group.long ($2)++0x3
line.long 0x0 "WAKEUPA,Wakeup 0 Register A"
hexmask.long 0x0 0.--31. 1. "REG,Register"
tree.end
repeat.end
base ad:0x40093000
newline
group.long 0x7F8++0x3
line.long 0x0 "WAKLCKA,Wakeup Lock A"
bitfld.long 0x0 0. "LOCK,Lock" "0: Lock is disabled,1: Lock is enabled"
tree.end
tree "WAKETIMER"
base ad:0x400AE000
group.long 0x0++0x3
line.long 0x0 "WAKE_TIMER_CTRL,Wake Timer Control"
bitfld.long 0x0 5. "INTR_EN,Enable Interrupt" "0: Disabled,1: Enabled"
bitfld.long 0x0 4. "OSC_DIV_ENA,OSC Divide Enable" "0: Disabled,1: Enabled"
bitfld.long 0x0 2. "CLR_WAKE_TIMER,Clear Wake Timer" "0: No effect.,1: Clears the wake timer counter and halts.."
newline
eventfld.long 0x0 1. "WAKE_FLAG,Wake Timer Status Flag" "0: Wake timer has not timed out.,1: Wake timer has timed out."
group.long 0xC++0x3
line.long 0x0 "WAKE_TIMER_CNT,Wake Timer Counter"
hexmask.long 0x0 0.--31. 1. "WAKE_CNT,Wake Counter"
tree.end
tree "WUU (Wakeup Unit)"
base ad:0x40092000
rgroup.long 0x0++0x7
line.long 0x0 "VERID,Version ID"
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
newline
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
line.long 0x4 "PARAM,Parameter"
hexmask.long.byte 0x4 24.--31. 1. "PINS,Pin Number"
hexmask.long.byte 0x4 16.--23. 1. "MODULES,Module Number"
newline
hexmask.long.byte 0x4 8.--15. 1. "DMAS,DMA Number"
hexmask.long.byte 0x4 0.--7. 1. "FILTERS,Filter Number"
group.long 0x8++0x7
line.long 0x0 "PE1,Pin Enable 1"
bitfld.long 0x0 24.--25. "WUPE12,Wake-up Pin Enable for WUU_Pn" "0: Disable,1: Enable (detect on rising edge or high level),2: Enable (detect on falling edge or low level),3: Enable (detect on any edge)"
bitfld.long 0x0 22.--23. "WUPE11,Wake-up Pin Enable for WUU_Pn" "0: Disable,1: Enable (detect on rising edge or high level),2: Enable (detect on falling edge or low level),3: Enable (detect on any edge)"
newline
bitfld.long 0x0 20.--21. "WUPE10,Wake-up Pin Enable for WUU_Pn" "0: Disable,1: Enable (detect on rising edge or high level),2: Enable (detect on falling edge or low level),3: Enable (detect on any edge)"
bitfld.long 0x0 18.--19. "WUPE9,Wake-up Pin Enable for WUU_Pn" "0: Disable,1: Enable (detect on rising edge or high level),2: Enable (detect on falling edge or low level),3: Enable (detect on any edge)"
newline
bitfld.long 0x0 16.--17. "WUPE8,Wake-up Pin Enable for WUU_Pn" "0: Disable,1: Enable (detect on rising edge or high level),2: Enable (detect on falling edge or low level),3: Enable (detect on any edge)"
bitfld.long 0x0 14.--15. "WUPE7,Wake-up Pin Enable for WUU_Pn" "0: Disable,1: Enable (detect on rising edge or high level),2: Enable (detect on falling edge or low level),3: Enable (detect on any edge)"
newline
bitfld.long 0x0 12.--13. "WUPE6,Wake-up Pin Enable for WUU_Pn" "0: Disable,1: Enable (detect on rising edge or high level),2: Enable (detect on falling edge or low level),3: Enable (detect on any edge)"
bitfld.long 0x0 4.--5. "WUPE2,Wake-up Pin Enable for WUU_Pn" "0: Disable,1: Enable (detect on rising edge or high level),2: Enable (detect on falling edge or low level),3: Enable (detect on any edge)"
line.long 0x4 "PE2,Pin Enable 2"
bitfld.long 0x4 30.--31. "WUPE31,Wake-up Pin Enable for WUU_Pn" "0: Disable,1: Enable (detect on rising edge or high level),2: Enable (detect on falling edge or low level),3: Enable (detect on any edge)"
sif (cpuis("MC?A144*"))
bitfld.long 0x4 28.--29. "WUPE30,Wake-up Pin Enable for WUU_Pn" "0: Disable,1: Enable (detect on rising edge or high level),2: Enable (detect on falling edge or low level),3: Enable (detect on any edge)"
newline
endif
sif (cpuis("MC?A145*"))
bitfld.long 0x4 28.--29. "WUPE30,Wake-up Pin Enable for WUU_Pn" "0: Disable,1: Enable (detect on rising edge or high level),2: Enable (detect on falling edge or low level),3: Enable (detect on any edge)"
newline
endif
sif (cpuis("MC?A146*"))
bitfld.long 0x4 28.--29. "WUPE30,Wake-up Pin Enable for WUU_Pn" "0: Disable,1: Enable (detect on rising edge or high level),2: Enable (detect on falling edge or low level),3: Enable (detect on any edge)"
newline
endif
sif (cpuis("MC?A154*"))
bitfld.long 0x4 28.--29. "WUPE30,Wake-up Pin Enable for WUU_Pn" "0: Disable,1: Enable (detect on rising edge or high level),2: Enable (detect on falling edge or low level),3: Enable (detect on any edge)"
newline
endif
sif (cpuis("MC?A155*"))
bitfld.long 0x4 28.--29. "WUPE30,Wake-up Pin Enable for WUU_Pn" "0: Disable,1: Enable (detect on rising edge or high level),2: Enable (detect on falling edge or low level),3: Enable (detect on any edge)"
newline
endif
sif (cpuis("MC?A156*"))
bitfld.long 0x4 28.--29. "WUPE30,Wake-up Pin Enable for WUU_Pn" "0: Disable,1: Enable (detect on rising edge or high level),2: Enable (detect on falling edge or low level),3: Enable (detect on any edge)"
newline
endif
bitfld.long 0x4 26.--27. "WUPE29,Wake-up Pin Enable for WUU_Pn" "0: Disable,1: Enable (detect on rising edge or high level),2: Enable (detect on falling edge or low level),3: Enable (detect on any edge)"
newline
bitfld.long 0x4 24.--25. "WUPE28,Wake-up Pin Enable for WUU_Pn" "0: Disable,1: Enable (detect on rising edge or high level),2: Enable (detect on falling edge or low level),3: Enable (detect on any edge)"
bitfld.long 0x4 22.--23. "WUPE27,Wake-up Pin Enable for WUU_Pn" "0: Disable,1: Enable (detect on rising edge or high level),2: Enable (detect on falling edge or low level),3: Enable (detect on any edge)"
newline
bitfld.long 0x4 20.--21. "WUPE26,Wake-up Pin Enable for WUU_Pn" "0: Disable,1: Enable (detect on rising edge or high level),2: Enable (detect on falling edge or low level),3: Enable (detect on any edge)"
bitfld.long 0x4 18.--19. "WUPE25,Wake-up Pin Enable for WUU_Pn" "0: Disable,1: Enable (detect on rising edge or high level),2: Enable (detect on falling edge or low level),3: Enable (detect on any edge)"
newline
bitfld.long 0x4 16.--17. "WUPE24,Wake-up Pin Enable for WUU_Pn" "0: Disable,1: Enable (detect on rising edge or high level),2: Enable (detect on falling edge or low level),3: Enable (detect on any edge)"
bitfld.long 0x4 14.--15. "WUPE23,Wake-up Pin Enable for WUU_Pn" "0: Disable,1: Enable (detect on rising edge or high level),2: Enable (detect on falling edge or low level),3: Enable (detect on any edge)"
newline
bitfld.long 0x4 12.--13. "WUPE22,Wake-up Pin Enable for WUU_Pn" "0: Disable,1: Enable (detect on rising edge or high level),2: Enable (detect on falling edge or low level),3: Enable (detect on any edge)"
bitfld.long 0x4 8.--9. "WUPE20,Wake-up Pin Enable for WUU_Pn" "0: Disable,1: Enable (detect on rising edge or high level),2: Enable (detect on falling edge or low level),3: Enable (detect on any edge)"
newline
bitfld.long 0x4 6.--7. "WUPE19,Wake-up Pin Enable for WUU_Pn" "0: Disable,1: Enable (detect on rising edge or high level),2: Enable (detect on falling edge or low level),3: Enable (detect on any edge)"
bitfld.long 0x4 4.--5. "WUPE18,Wake-up Pin Enable for WUU_Pn" "0: Disable,1: Enable (detect on rising edge or high level),2: Enable (detect on falling edge or low level),3: Enable (detect on any edge)"
newline
sif (cpuis("MC?A144*"))
bitfld.long 0x4 2.--3. "WUPE17,Wake-up Pin Enable for WUU_Pn" "0: Disable,1: Enable (detect on rising edge or high level),2: Enable (detect on falling edge or low level),3: Enable (detect on any edge)"
bitfld.long 0x4 0.--1. "WUPE16,Wake-up Pin Enable for WUU_Pn" "0: Disable,1: Enable (detect on rising edge or high level),2: Enable (detect on falling edge or low level),3: Enable (detect on any edge)"
newline
endif
sif (cpuis("MC?A145*"))
bitfld.long 0x4 2.--3. "WUPE17,Wake-up Pin Enable for WUU_Pn" "0: Disable,1: Enable (detect on rising edge or high level),2: Enable (detect on falling edge or low level),3: Enable (detect on any edge)"
bitfld.long 0x4 0.--1. "WUPE16,Wake-up Pin Enable for WUU_Pn" "0: Disable,1: Enable (detect on rising edge or high level),2: Enable (detect on falling edge or low level),3: Enable (detect on any edge)"
newline
endif
sif (cpuis("MC?A146*"))
bitfld.long 0x4 2.--3. "WUPE17,Wake-up Pin Enable for WUU_Pn" "0: Disable,1: Enable (detect on rising edge or high level),2: Enable (detect on falling edge or low level),3: Enable (detect on any edge)"
bitfld.long 0x4 0.--1. "WUPE16,Wake-up Pin Enable for WUU_Pn" "0: Disable,1: Enable (detect on rising edge or high level),2: Enable (detect on falling edge or low level),3: Enable (detect on any edge)"
newline
endif
sif (cpuis("MC?A154*"))
bitfld.long 0x4 2.--3. "WUPE17,Wake-up Pin Enable for WUU_Pn" "0: Disable,1: Enable (detect on rising edge or high level),2: Enable (detect on falling edge or low level),3: Enable (detect on any edge)"
bitfld.long 0x4 0.--1. "WUPE16,Wake-up Pin Enable for WUU_Pn" "0: Disable,1: Enable (detect on rising edge or high level),2: Enable (detect on falling edge or low level),3: Enable (detect on any edge)"
newline
endif
sif (cpuis("MC?A155*"))
bitfld.long 0x4 2.--3. "WUPE17,Wake-up Pin Enable for WUU_Pn" "0: Disable,1: Enable (detect on rising edge or high level),2: Enable (detect on falling edge or low level),3: Enable (detect on any edge)"
bitfld.long 0x4 0.--1. "WUPE16,Wake-up Pin Enable for WUU_Pn" "0: Disable,1: Enable (detect on rising edge or high level),2: Enable (detect on falling edge or low level),3: Enable (detect on any edge)"
newline
endif
sif (cpuis("MC?A156*"))
bitfld.long 0x4 2.--3. "WUPE17,Wake-up Pin Enable for WUU_Pn" "0: Disable,1: Enable (detect on rising edge or high level),2: Enable (detect on falling edge or low level),3: Enable (detect on any edge)"
bitfld.long 0x4 0.--1. "WUPE16,Wake-up Pin Enable for WUU_Pn" "0: Disable,1: Enable (detect on rising edge or high level),2: Enable (detect on falling edge or low level),3: Enable (detect on any edge)"
newline
endif
group.long 0x18++0xB
line.long 0x0 "ME,Module Interrupt Enable"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
bitfld.long 0x0 8. "WUME8,Module Interrupt Wake-up Enable for Module 8" "0,1"
bitfld.long 0x0 6. "WUME6,Module Interrupt Wake-up Enable for Module 6" "0,1"
newline
bitfld.long 0x0 2. "WUME2,Module Interrupt Wake-up Enable for Module 2" "0,1"
bitfld.long 0x0 0. "WUME0,Module Interrupt Wake-up Enable for Module 0" "0,1"
newline
endif
sif (cpuis("MC?A144*"))
bitfld.long 0x0 8. "WUME8,Module Interrupt Wake-up Enable for Module 8" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A145*"))
bitfld.long 0x0 8. "WUME8,Module Interrupt Wake-up Enable for Module 8" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A146*"))
bitfld.long 0x0 8. "WUME8,Module Interrupt Wake-up Enable for Module 8" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A152*"))
bitfld.long 0x0 8. "WUME8,Module Interrupt Wake-up Enable for Module 8" "0,1"
newline
endif
sif (cpuis("MC?A153*"))
bitfld.long 0x0 8. "WUME8,Module Interrupt Wake-up Enable for Module 8" "0,1"
newline
endif
sif (cpuis("MC?A154*"))
bitfld.long 0x0 8. "WUME8,Module Interrupt Wake-up Enable for Module 8" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A155*"))
bitfld.long 0x0 8. "WUME8,Module Interrupt Wake-up Enable for Module 8" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A156*"))
bitfld.long 0x0 8. "WUME8,Module Interrupt Wake-up Enable for Module 8" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A144*"))
bitfld.long 0x0 6. "WUME6,Module Interrupt Wake-up Enable for Module 6" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A145*"))
bitfld.long 0x0 6. "WUME6,Module Interrupt Wake-up Enable for Module 6" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A146*"))
bitfld.long 0x0 6. "WUME6,Module Interrupt Wake-up Enable for Module 6" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A152*"))
bitfld.long 0x0 6. "WUME6,Module Interrupt Wake-up Enable for Module 6" "0,1"
newline
endif
sif (cpuis("MC?A153*"))
bitfld.long 0x0 6. "WUME6,Module Interrupt Wake-up Enable for Module 6" "0,1"
newline
endif
sif (cpuis("MC?A154*"))
bitfld.long 0x0 6. "WUME6,Module Interrupt Wake-up Enable for Module 6" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A155*"))
bitfld.long 0x0 6. "WUME6,Module Interrupt Wake-up Enable for Module 6" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A156*"))
bitfld.long 0x0 6. "WUME6,Module Interrupt Wake-up Enable for Module 6" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A144*"))
bitfld.long 0x0 2. "WUME2,Module Interrupt Wake-up Enable for Module 2" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A145*"))
bitfld.long 0x0 2. "WUME2,Module Interrupt Wake-up Enable for Module 2" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A146*"))
bitfld.long 0x0 2. "WUME2,Module Interrupt Wake-up Enable for Module 2" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A152*"))
bitfld.long 0x0 2. "WUME2,Module Interrupt Wake-up Enable for Module 2" "0,1"
newline
endif
sif (cpuis("MC?A153*"))
bitfld.long 0x0 2. "WUME2,Module Interrupt Wake-up Enable for Module 2" "0,1"
newline
endif
sif (cpuis("MC?A154*"))
bitfld.long 0x0 2. "WUME2,Module Interrupt Wake-up Enable for Module 2" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A155*"))
bitfld.long 0x0 2. "WUME2,Module Interrupt Wake-up Enable for Module 2" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A156*"))
bitfld.long 0x0 2. "WUME2,Module Interrupt Wake-up Enable for Module 2" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A145*"))
bitfld.long 0x0 0. "WUME0,Module Interrupt Wake-up Enable for Module 0" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A146*"))
bitfld.long 0x0 0. "WUME0,Module Interrupt Wake-up Enable for Module 0" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A152*"))
bitfld.long 0x0 0. "WUME0,Module Interrupt Wake-up Enable for Module 0" "0,1"
newline
endif
sif (cpuis("MC?A153*"))
bitfld.long 0x0 0. "WUME0,Module Interrupt Wake-up Enable for Module 0" "0,1"
newline
endif
sif (cpuis("MC?A154*"))
bitfld.long 0x0 0. "WUME0,Module Interrupt Wake-up Enable for Module 0" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A155*"))
bitfld.long 0x0 0. "WUME0,Module Interrupt Wake-up Enable for Module 0" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A156*"))
bitfld.long 0x0 0. "WUME0,Module Interrupt Wake-up Enable for Module 0" "0: Disable,1: Enable"
newline
endif
line.long 0x4 "DE,Module DMA/Trigger Enable"
sif (cpuis("MC?A132*")||cpuis("MC?A133*")||cpuis("MC?A142*")||cpuis("MC?A143*"))
bitfld.long 0x4 8. "WUDE8,DMA/Trigger Wake-up Enable for Module 8" "0,1"
bitfld.long 0x4 6. "WUDE6,DMA/Trigger Wake-up Enable for Module 6" "0,1"
newline
bitfld.long 0x4 4. "WUDE4,DMA/Trigger Wake-up Enable for Module 4" "0,1"
newline
endif
sif (cpuis("MC?A144*"))
bitfld.long 0x4 8. "WUDE8,DMA/Trigger Wake-up Enable for Module 8" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A145*"))
bitfld.long 0x4 8. "WUDE8,DMA/Trigger Wake-up Enable for Module 8" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A146*"))
bitfld.long 0x4 8. "WUDE8,DMA/Trigger Wake-up Enable for Module 8" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A152*"))
bitfld.long 0x4 8. "WUDE8,DMA/Trigger Wake-up Enable for Module 8" "0,1"
newline
endif
sif (cpuis("MC?A153*"))
bitfld.long 0x4 8. "WUDE8,DMA/Trigger Wake-up Enable for Module 8" "0,1"
newline
endif
sif (cpuis("MC?A154*"))
bitfld.long 0x4 8. "WUDE8,DMA/Trigger Wake-up Enable for Module 8" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A155*"))
bitfld.long 0x4 8. "WUDE8,DMA/Trigger Wake-up Enable for Module 8" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A156*"))
bitfld.long 0x4 8. "WUDE8,DMA/Trigger Wake-up Enable for Module 8" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A144*"))
bitfld.long 0x4 6. "WUDE6,DMA/Trigger Wake-up Enable for Module 6" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A145*"))
bitfld.long 0x4 6. "WUDE6,DMA/Trigger Wake-up Enable for Module 6" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A146*"))
bitfld.long 0x4 6. "WUDE6,DMA/Trigger Wake-up Enable for Module 6" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A152*"))
bitfld.long 0x4 6. "WUDE6,DMA/Trigger Wake-up Enable for Module 6" "0,1"
newline
endif
sif (cpuis("MC?A153*"))
bitfld.long 0x4 6. "WUDE6,DMA/Trigger Wake-up Enable for Module 6" "0,1"
newline
endif
sif (cpuis("MC?A154*"))
bitfld.long 0x4 6. "WUDE6,DMA/Trigger Wake-up Enable for Module 6" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A155*"))
bitfld.long 0x4 6. "WUDE6,DMA/Trigger Wake-up Enable for Module 6" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A156*"))
bitfld.long 0x4 6. "WUDE6,DMA/Trigger Wake-up Enable for Module 6" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A145*"))
bitfld.long 0x4 4. "WUDE4,DMA/Trigger Wake-up Enable for Module 4" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A146*"))
bitfld.long 0x4 4. "WUDE4,DMA/Trigger Wake-up Enable for Module 4" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A152*"))
bitfld.long 0x4 4. "WUDE4,DMA/Trigger Wake-up Enable for Module 4" "0,1"
newline
endif
sif (cpuis("MC?A153*"))
bitfld.long 0x4 4. "WUDE4,DMA/Trigger Wake-up Enable for Module 4" "0,1"
newline
endif
sif (cpuis("MC?A154*"))
bitfld.long 0x4 4. "WUDE4,DMA/Trigger Wake-up Enable for Module 4" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A155*"))
bitfld.long 0x4 4. "WUDE4,DMA/Trigger Wake-up Enable for Module 4" "0: Disable,1: Enable"
newline
endif
sif (cpuis("MC?A156*"))
bitfld.long 0x4 4. "WUDE4,DMA/Trigger Wake-up Enable for Module 4" "0: Disable,1: Enable"
newline
endif
line.long 0x8 "PF,Pin Flag"
eventfld.long 0x8 31. "WUF31,Wake-up Flag for WUU_Pn" "0: No,1: Yes"
sif (cpuis("MC?A144*"))
eventfld.long 0x8 30. "WUF30,Wake-up Flag for WUU_Pn" "0: No,1: Yes"
newline
endif
sif (cpuis("MC?A145*"))
eventfld.long 0x8 30. "WUF30,Wake-up Flag for WUU_Pn" "0: No,1: Yes"
newline
endif
sif (cpuis("MC?A146*"))
eventfld.long 0x8 30. "WUF30,Wake-up Flag for WUU_Pn" "0: No,1: Yes"
newline
endif
sif (cpuis("MC?A154*"))
eventfld.long 0x8 30. "WUF30,Wake-up Flag for WUU_Pn" "0: No,1: Yes"
newline
endif
sif (cpuis("MC?A155*"))
eventfld.long 0x8 30. "WUF30,Wake-up Flag for WUU_Pn" "0: No,1: Yes"
newline
endif
sif (cpuis("MC?A156*"))
eventfld.long 0x8 30. "WUF30,Wake-up Flag for WUU_Pn" "0: No,1: Yes"
newline
endif
eventfld.long 0x8 29. "WUF29,Wake-up Flag for WUU_Pn" "0: No,1: Yes"
newline
eventfld.long 0x8 28. "WUF28,Wake-up Flag for WUU_Pn" "0: No,1: Yes"
eventfld.long 0x8 27. "WUF27,Wake-up Flag for WUU_Pn" "0: No,1: Yes"
newline
eventfld.long 0x8 26. "WUF26,Wake-up Flag for WUU_Pn" "0: No,1: Yes"
eventfld.long 0x8 25. "WUF25,Wake-up Flag for WUU_Pn" "0: No,1: Yes"
newline
eventfld.long 0x8 24. "WUF24,Wake-up Flag for WUU_Pn" "0: No,1: Yes"
eventfld.long 0x8 23. "WUF23,Wake-up Flag for WUU_Pn" "0: No,1: Yes"
newline
eventfld.long 0x8 22. "WUF22,Wake-up Flag for WUU_Pn" "0: No,1: Yes"
eventfld.long 0x8 20. "WUF20,Wake-up Flag for WUU_Pn" "0: No,1: Yes"
newline
eventfld.long 0x8 19. "WUF19,Wake-up Flag for WUU_Pn" "0: No,1: Yes"
eventfld.long 0x8 18. "WUF18,Wake-up Flag for WUU_Pn" "0: No,1: Yes"
newline
sif (cpuis("MC?A144*"))
eventfld.long 0x8 17. "WUF17,Wake-up Flag for WUU_Pn" "0: No,1: Yes"
eventfld.long 0x8 16. "WUF16,Wake-up Flag for WUU_Pn" "0: No,1: Yes"
newline
endif
sif (cpuis("MC?A145*"))
eventfld.long 0x8 17. "WUF17,Wake-up Flag for WUU_Pn" "0: No,1: Yes"
eventfld.long 0x8 16. "WUF16,Wake-up Flag for WUU_Pn" "0: No,1: Yes"
newline
endif
sif (cpuis("MC?A146*"))
eventfld.long 0x8 17. "WUF17,Wake-up Flag for WUU_Pn" "0: No,1: Yes"
eventfld.long 0x8 16. "WUF16,Wake-up Flag for WUU_Pn" "0: No,1: Yes"
newline
endif
sif (cpuis("MC?A154*"))
eventfld.long 0x8 17. "WUF17,Wake-up Flag for WUU_Pn" "0: No,1: Yes"
eventfld.long 0x8 16. "WUF16,Wake-up Flag for WUU_Pn" "0: No,1: Yes"
newline
endif
sif (cpuis("MC?A155*"))
eventfld.long 0x8 17. "WUF17,Wake-up Flag for WUU_Pn" "0: No,1: Yes"
eventfld.long 0x8 16. "WUF16,Wake-up Flag for WUU_Pn" "0: No,1: Yes"
newline
endif
sif (cpuis("MC?A156*"))
eventfld.long 0x8 17. "WUF17,Wake-up Flag for WUU_Pn" "0: No,1: Yes"
eventfld.long 0x8 16. "WUF16,Wake-up Flag for WUU_Pn" "0: No,1: Yes"
newline
endif
eventfld.long 0x8 12. "WUF12,Wake-up Flag for WUU_Pn" "0: No,1: Yes"
eventfld.long 0x8 11. "WUF11,Wake-up Flag for WUU_Pn" "0: No,1: Yes"
newline
eventfld.long 0x8 10. "WUF10,Wake-up Flag for WUU_Pn" "0: No,1: Yes"
eventfld.long 0x8 9. "WUF9,Wake-up Flag for WUU_Pn" "0: No,1: Yes"
newline
eventfld.long 0x8 8. "WUF8,Wake-up Flag for WUU_Pn" "0: No,1: Yes"
eventfld.long 0x8 7. "WUF7,Wake-up Flag for WUU_Pn" "0: No,1: Yes"
newline
eventfld.long 0x8 6. "WUF6,Wake-up Flag for WUU_Pn" "0: No,1: Yes"
eventfld.long 0x8 2. "WUF2,Wake-up Flag for WUU_Pn" "0: No,1: Yes"
group.long 0x30++0x3
line.long 0x0 "FILT,Pin Filter"
eventfld.long 0x0 15. "FILTF2,Filter 2 Flag" "0: No,1: Yes"
bitfld.long 0x0 13.--14. "FILTE2,Filter 2 Enable" "0: Disable,1: Enable (Detect on rising edge or high level),2: Enable (Detect on falling edge or low level),3: Enable (Detect on any edge)"
newline
hexmask.long.byte 0x0 8.--12. 1. "FILTSEL2,Filter 2 Pin Select"
eventfld.long 0x0 7. "FILTF1,Filter 1 Flag" "0: No,1: Yes"
newline
bitfld.long 0x0 5.--6. "FILTE1,Filter 1 Enable" "0: Disable,1: Enable (Detect on rising edge or high level),2: Enable (Detect on falling edge or low level),3: Enable (Detect on any edge)"
hexmask.long.byte 0x0 0.--4. 1. "FILTSEL1,Filter 1 Pin Select"
group.long 0x38++0x7
line.long 0x0 "PDC1,Pin DMA/Trigger Configuration 1"
bitfld.long 0x0 24.--25. "WUPDC12,Wake-up Pin Configuration for WUU_Pn" "0: Interrupt,1: DMA request,2: Trigger event,3: Reserved"
bitfld.long 0x0 22.--23. "WUPDC11,Wake-up Pin Configuration for WUU_Pn" "0: Interrupt,1: DMA request,2: Trigger event,3: Reserved"
newline
bitfld.long 0x0 20.--21. "WUPDC10,Wake-up Pin Configuration for WUU_Pn" "0: Interrupt,1: DMA request,2: Trigger event,3: Reserved"
bitfld.long 0x0 18.--19. "WUPDC9,Wake-up Pin Configuration for WUU_Pn" "0: Interrupt,1: DMA request,2: Trigger event,3: Reserved"
newline
bitfld.long 0x0 16.--17. "WUPDC8,Wake-up Pin Configuration for WUU_Pn" "0: Interrupt,1: DMA request,2: Trigger event,3: Reserved"
bitfld.long 0x0 14.--15. "WUPDC7,Wake-up Pin Configuration for WUU_Pn" "0: Interrupt,1: DMA request,2: Trigger event,3: Reserved"
newline
bitfld.long 0x0 12.--13. "WUPDC6,Wake-up Pin Configuration for WUU_Pn" "0: Interrupt,1: DMA request,2: Trigger event,3: Reserved"
bitfld.long 0x0 4.--5. "WUPDC2,Wake-up Pin Configuration for WUU_Pn" "0: Interrupt,1: DMA request,2: Trigger event,3: Reserved"
line.long 0x4 "PDC2,Pin DMA/Trigger Configuration 2"
bitfld.long 0x4 30.--31. "WUPDC31,Wake-up Pin Configuration for WUU_Pn" "0: Interrupt,1: DMA request,2: Trigger event,3: Reserved"
sif (cpuis("MC?A144*"))
bitfld.long 0x4 28.--29. "WUPDC30,Wake-up Pin Configuration for WUU_Pn" "0: Interrupt,1: DMA request,2: Trigger event,3: Reserved"
newline
endif
sif (cpuis("MC?A145*"))
bitfld.long 0x4 28.--29. "WUPDC30,Wake-up Pin Configuration for WUU_Pn" "0: Interrupt,1: DMA request,2: Trigger event,3: Reserved"
newline
endif
sif (cpuis("MC?A146*"))
bitfld.long 0x4 28.--29. "WUPDC30,Wake-up Pin Configuration for WUU_Pn" "0: Interrupt,1: DMA request,2: Trigger event,3: Reserved"
newline
endif
sif (cpuis("MC?A154*"))
bitfld.long 0x4 28.--29. "WUPDC30,Wake-up Pin Configuration for WUU_Pn" "0: Interrupt,1: DMA request,2: Trigger event,3: Reserved"
newline
endif
sif (cpuis("MC?A155*"))
bitfld.long 0x4 28.--29. "WUPDC30,Wake-up Pin Configuration for WUU_Pn" "0: Interrupt,1: DMA request,2: Trigger event,3: Reserved"
newline
endif
sif (cpuis("MC?A156*"))
bitfld.long 0x4 28.--29. "WUPDC30,Wake-up Pin Configuration for WUU_Pn" "0: Interrupt,1: DMA request,2: Trigger event,3: Reserved"
newline
endif
bitfld.long 0x4 26.--27. "WUPDC29,Wake-up Pin Configuration for WUU_Pn" "0: Interrupt,1: DMA request,2: Trigger event,3: Reserved"
newline
bitfld.long 0x4 24.--25. "WUPDC28,Wake-up Pin Configuration for WUU_Pn" "0: Interrupt,1: DMA request,2: Trigger event,3: Reserved"
bitfld.long 0x4 22.--23. "WUPDC27,Wake-up Pin Configuration for WUU_Pn" "0: Interrupt,1: DMA request,2: Trigger event,3: Reserved"
newline
bitfld.long 0x4 20.--21. "WUPDC26,Wake-up Pin Configuration for WUU_Pn" "0: Interrupt,1: DMA request,2: Trigger event,3: Reserved"
bitfld.long 0x4 18.--19. "WUPDC25,Wake-up Pin Configuration for WUU_Pn" "0: Interrupt,1: DMA request,2: Trigger event,3: Reserved"
newline
bitfld.long 0x4 16.--17. "WUPDC24,Wake-up Pin Configuration for WUU_Pn" "0: Interrupt,1: DMA request,2: Trigger event,3: Reserved"
bitfld.long 0x4 14.--15. "WUPDC23,Wake-up Pin Configuration for WUU_Pn" "0: Interrupt,1: DMA request,2: Trigger event,3: Reserved"
newline
bitfld.long 0x4 12.--13. "WUPDC22,Wake-up Pin Configuration for WUU_Pn" "0: Interrupt,1: DMA request,2: Trigger event,3: Reserved"
bitfld.long 0x4 8.--9. "WUPDC20,Wake-up Pin Configuration for WUU_Pn" "0: Interrupt,1: DMA request,2: Trigger event,3: Reserved"
newline
bitfld.long 0x4 6.--7. "WUPDC19,Wake-up Pin Configuration for WUU_Pn" "0: Interrupt,1: DMA request,2: Trigger event,3: Reserved"
bitfld.long 0x4 4.--5. "WUPDC18,Wake-up Pin Configuration for WUU_Pn" "0: Interrupt,1: DMA request,2: Trigger event,3: Reserved"
newline
sif (cpuis("MC?A144*"))
bitfld.long 0x4 2.--3. "WUPDC17,Wake-up Pin Configuration for WUU_Pn" "0: Interrupt,1: DMA request,2: Trigger event,3: Reserved"
bitfld.long 0x4 0.--1. "WUPDC16,Wake-up Pin Configuration for WUU_Pn" "0: Interrupt,1: DMA request,2: Trigger event,3: Reserved"
newline
endif
sif (cpuis("MC?A145*"))
bitfld.long 0x4 2.--3. "WUPDC17,Wake-up Pin Configuration for WUU_Pn" "0: Interrupt,1: DMA request,2: Trigger event,3: Reserved"
bitfld.long 0x4 0.--1. "WUPDC16,Wake-up Pin Configuration for WUU_Pn" "0: Interrupt,1: DMA request,2: Trigger event,3: Reserved"
newline
endif
sif (cpuis("MC?A146*"))
bitfld.long 0x4 2.--3. "WUPDC17,Wake-up Pin Configuration for WUU_Pn" "0: Interrupt,1: DMA request,2: Trigger event,3: Reserved"
bitfld.long 0x4 0.--1. "WUPDC16,Wake-up Pin Configuration for WUU_Pn" "0: Interrupt,1: DMA request,2: Trigger event,3: Reserved"
newline
endif
sif (cpuis("MC?A154*"))
bitfld.long 0x4 2.--3. "WUPDC17,Wake-up Pin Configuration for WUU_Pn" "0: Interrupt,1: DMA request,2: Trigger event,3: Reserved"
bitfld.long 0x4 0.--1. "WUPDC16,Wake-up Pin Configuration for WUU_Pn" "0: Interrupt,1: DMA request,2: Trigger event,3: Reserved"
newline
endif
sif (cpuis("MC?A155*"))
bitfld.long 0x4 2.--3. "WUPDC17,Wake-up Pin Configuration for WUU_Pn" "0: Interrupt,1: DMA request,2: Trigger event,3: Reserved"
bitfld.long 0x4 0.--1. "WUPDC16,Wake-up Pin Configuration for WUU_Pn" "0: Interrupt,1: DMA request,2: Trigger event,3: Reserved"
newline
endif
sif (cpuis("MC?A156*"))
bitfld.long 0x4 2.--3. "WUPDC17,Wake-up Pin Configuration for WUU_Pn" "0: Interrupt,1: DMA request,2: Trigger event,3: Reserved"
bitfld.long 0x4 0.--1. "WUPDC16,Wake-up Pin Configuration for WUU_Pn" "0: Interrupt,1: DMA request,2: Trigger event,3: Reserved"
newline
endif
group.long 0x48++0x3
line.long 0x0 "FDC,Pin Filter DMA/Trigger Configuration"
bitfld.long 0x0 2.--3. "FILTC2,Filter Configuration for FILTn" "0: Interrupt,1: DMA request,2: Trigger event,?"
bitfld.long 0x0 0.--1. "FILTC1,Filter Configuration for FILTn" "0: Interrupt,1: DMA request,2: Trigger event,?"
group.long 0x50++0x3
line.long 0x0 "PMC,Pin Mode Configuration"
bitfld.long 0x0 31. "WUPMC31,Wake-up Pin Mode Configuration for WUU_Pn" "0: Active only during a low-leakage mode. You can..,1: Active during all power modes. Do not modify the.."
sif (cpuis("MC?A144*"))
bitfld.long 0x0 30. "WUPMC30,Wake-up Pin Mode Configuration for WUU_Pn" "0: Active only during a low-leakage mode. You can..,1: Active during all power modes. Do not modify the.."
newline
endif
sif (cpuis("MC?A145*"))
bitfld.long 0x0 30. "WUPMC30,Wake-up Pin Mode Configuration for WUU_Pn" "0: Active only during a low-leakage mode. You can..,1: Active during all power modes. Do not modify the.."
newline
endif
sif (cpuis("MC?A146*"))
bitfld.long 0x0 30. "WUPMC30,Wake-up Pin Mode Configuration for WUU_Pn" "0: Active only during a low-leakage mode. You can..,1: Active during all power modes. Do not modify the.."
newline
endif
sif (cpuis("MC?A154*"))
bitfld.long 0x0 30. "WUPMC30,Wake-up Pin Mode Configuration for WUU_Pn" "0: Active only during a low-leakage mode. You can..,1: Active during all power modes. Do not modify the.."
newline
endif
sif (cpuis("MC?A155*"))
bitfld.long 0x0 30. "WUPMC30,Wake-up Pin Mode Configuration for WUU_Pn" "0: Active only during a low-leakage mode. You can..,1: Active during all power modes. Do not modify the.."
newline
endif
sif (cpuis("MC?A156*"))
bitfld.long 0x0 30. "WUPMC30,Wake-up Pin Mode Configuration for WUU_Pn" "0: Active only during a low-leakage mode. You can..,1: Active during all power modes. Do not modify the.."
newline
endif
bitfld.long 0x0 29. "WUPMC29,Wake-up Pin Mode Configuration for WUU_Pn" "0: Active only during a low-leakage mode. You can..,1: Active during all power modes. Do not modify the.."
newline
bitfld.long 0x0 28. "WUPMC28,Wake-up Pin Mode Configuration for WUU_Pn" "0: Active only during a low-leakage mode. You can..,1: Active during all power modes. Do not modify the.."
bitfld.long 0x0 27. "WUPMC27,Wake-up Pin Mode Configuration for WUU_Pn" "0: Active only during a low-leakage mode. You can..,1: Active during all power modes. Do not modify the.."
newline
bitfld.long 0x0 26. "WUPMC26,Wake-up Pin Mode Configuration for WUU_Pn" "0: Active only during a low-leakage mode. You can..,1: Active during all power modes. Do not modify the.."
bitfld.long 0x0 25. "WUPMC25,Wake-up Pin Mode Configuration for WUU_Pn" "0: Active only during a low-leakage mode. You can..,1: Active during all power modes. Do not modify the.."
newline
bitfld.long 0x0 24. "WUPMC24,Wake-up Pin Mode Configuration for WUU_Pn" "0: Active only during a low-leakage mode. You can..,1: Active during all power modes. Do not modify the.."
bitfld.long 0x0 23. "WUPMC23,Wake-up Pin Mode Configuration for WUU_Pn" "0: Active only during a low-leakage mode. You can..,1: Active during all power modes. Do not modify the.."
newline
bitfld.long 0x0 22. "WUPMC22,Wake-up Pin Mode Configuration for WUU_Pn" "0: Active only during a low-leakage mode. You can..,1: Active during all power modes. Do not modify the.."
bitfld.long 0x0 20. "WUPMC20,Wake-up Pin Mode Configuration for WUU_Pn" "0: Active only during a low-leakage mode. You can..,1: Active during all power modes. Do not modify the.."
newline
bitfld.long 0x0 19. "WUPMC19,Wake-up Pin Mode Configuration for WUU_Pn" "0: Active only during a low-leakage mode. You can..,1: Active during all power modes. Do not modify the.."
bitfld.long 0x0 18. "WUPMC18,Wake-up Pin Mode Configuration for WUU_Pn" "0: Active only during a low-leakage mode. You can..,1: Active during all power modes. Do not modify the.."
newline
sif (cpuis("MC?A144*"))
bitfld.long 0x0 17. "WUPMC17,Wake-up Pin Mode Configuration for WUU_Pn" "0: Active only during a low-leakage mode. You can..,1: Active during all power modes. Do not modify the.."
bitfld.long 0x0 16. "WUPMC16,Wake-up Pin Mode Configuration for WUU_Pn" "0: Active only during a low-leakage mode. You can..,1: Active during all power modes. Do not modify the.."
newline
endif
sif (cpuis("MC?A145*"))
bitfld.long 0x0 17. "WUPMC17,Wake-up Pin Mode Configuration for WUU_Pn" "0: Active only during a low-leakage mode. You can..,1: Active during all power modes. Do not modify the.."
bitfld.long 0x0 16. "WUPMC16,Wake-up Pin Mode Configuration for WUU_Pn" "0: Active only during a low-leakage mode. You can..,1: Active during all power modes. Do not modify the.."
newline
endif
sif (cpuis("MC?A146*"))
bitfld.long 0x0 17. "WUPMC17,Wake-up Pin Mode Configuration for WUU_Pn" "0: Active only during a low-leakage mode. You can..,1: Active during all power modes. Do not modify the.."
bitfld.long 0x0 16. "WUPMC16,Wake-up Pin Mode Configuration for WUU_Pn" "0: Active only during a low-leakage mode. You can..,1: Active during all power modes. Do not modify the.."
newline
endif
sif (cpuis("MC?A154*"))
bitfld.long 0x0 17. "WUPMC17,Wake-up Pin Mode Configuration for WUU_Pn" "0: Active only during a low-leakage mode. You can..,1: Active during all power modes. Do not modify the.."
bitfld.long 0x0 16. "WUPMC16,Wake-up Pin Mode Configuration for WUU_Pn" "0: Active only during a low-leakage mode. You can..,1: Active during all power modes. Do not modify the.."
newline
endif
sif (cpuis("MC?A155*"))
bitfld.long 0x0 17. "WUPMC17,Wake-up Pin Mode Configuration for WUU_Pn" "0: Active only during a low-leakage mode. You can..,1: Active during all power modes. Do not modify the.."
bitfld.long 0x0 16. "WUPMC16,Wake-up Pin Mode Configuration for WUU_Pn" "0: Active only during a low-leakage mode. You can..,1: Active during all power modes. Do not modify the.."
newline
endif
sif (cpuis("MC?A156*"))
bitfld.long 0x0 17. "WUPMC17,Wake-up Pin Mode Configuration for WUU_Pn" "0: Active only during a low-leakage mode. You can..,1: Active during all power modes. Do not modify the.."
bitfld.long 0x0 16. "WUPMC16,Wake-up Pin Mode Configuration for WUU_Pn" "0: Active only during a low-leakage mode. You can..,1: Active during all power modes. Do not modify the.."
newline
endif
bitfld.long 0x0 12. "WUPMC12,Wake-up Pin Mode Configuration for WUU_Pn" "0: Active only during a low-leakage mode. You can..,1: Active during all power modes. Do not modify the.."
bitfld.long 0x0 11. "WUPMC11,Wake-up Pin Mode Configuration for WUU_Pn" "0: Active only during a low-leakage mode. You can..,1: Active during all power modes. Do not modify the.."
newline
bitfld.long 0x0 10. "WUPMC10,Wake-up Pin Mode Configuration for WUU_Pn" "0: Active only during a low-leakage mode. You can..,1: Active during all power modes. Do not modify the.."
bitfld.long 0x0 9. "WUPMC9,Wake-up Pin Mode Configuration for WUU_Pn" "0: Active only during a low-leakage mode. You can..,1: Active during all power modes. Do not modify the.."
newline
bitfld.long 0x0 8. "WUPMC8,Wake-up Pin Mode Configuration for WUU_Pn" "0: Active only during a low-leakage mode. You can..,1: Active during all power modes. Do not modify the.."
bitfld.long 0x0 7. "WUPMC7,Wake-up Pin Mode Configuration for WUU_Pn" "0: Active only during a low-leakage mode. You can..,1: Active during all power modes. Do not modify the.."
newline
bitfld.long 0x0 6. "WUPMC6,Wake-up Pin Mode Configuration for WUU_Pn" "0: Active only during a low-leakage mode. You can..,1: Active during all power modes. Do not modify the.."
bitfld.long 0x0 2. "WUPMC2,Wake-up Pin Mode Configuration for WUU_Pn" "0: Active only during a low-leakage mode. You can..,1: Active during all power modes. Do not modify the.."
group.long 0x58++0x3
line.long 0x0 "FMC,Pin Filter Mode Configuration"
bitfld.long 0x0 1. "FILTM2,Filter Mode for FILTn" "0: Active only during Power Down/Deep Power Down mode,1: Active during all power modes"
bitfld.long 0x0 0. "FILTM1,Filter Mode for FILTn" "0: Active only during Power Down/Deep Power Down mode,1: Active during all power modes"
tree.end
tree "WWDT (Windowed Watchdog Timer)"
base ad:0x4000C000
group.long 0x0++0x7
line.long 0x0 "MOD,Mode"
bitfld.long 0x0 6. "DEBUG_EN,Debug Enable" "0: Disabled,1: Enabled"
bitfld.long 0x0 5. "LOCK,Lock" "0: No Lock,1: Lock"
bitfld.long 0x0 4. "WDPROTECT,Watchdog Update Mode" "0: Flexible,1: Threshold"
eventfld.long 0x0 3. "WDINT,Warning Interrupt Flag" "0: No flag,1: Flag"
newline
bitfld.long 0x0 2. "WDTOF,Watchdog Timeout Flag" "0: Watchdog event has not occurred.,1: Watchdog event has occurred (causes a chip reset.."
bitfld.long 0x0 1. "WDRESET,Watchdog Reset Enable" "0: Interrupt,1: Reset"
bitfld.long 0x0 0. "WDEN,Watchdog Enable" "0: Timer stopped,1: Timer running"
line.long 0x4 "TC,Timer Constant"
hexmask.long.tbyte 0x4 0.--23. 1. "COUNT,Watchdog Timeout Value"
wgroup.long 0x8++0x3
line.long 0x0 "FEED,Feed Sequence"
hexmask.long.byte 0x0 0.--7. 1. "FEED,Feed Value"
rgroup.long 0xC++0x3
line.long 0x0 "TV,Timer Value"
hexmask.long.tbyte 0x0 0.--23. 1. "COUNT,Counter Timer Value"
group.long 0x14++0x7
line.long 0x0 "WARNINT,Warning Interrupt Compare Value"
hexmask.long.word 0x0 0.--9. 1. "WARNINT,Watchdog Warning Interrupt Compare Value"
line.long 0x4 "WINDOW,Window Compare Value"
hexmask.long.tbyte 0x4 0.--23. 1. "WINDOW,Watchdog Window Value"
tree.end
newline
AUTOINDENT.OFF