3186 lines
139 KiB
Plaintext
3186 lines
139 KiB
Plaintext
; --------------------------------------------------------------------------------
|
|
; @Title: HT32F504xx On-Chip Peripherals
|
|
; @Props: Released
|
|
; @Author: KRZ
|
|
; @Changelog: 2025-04-03 KRZ
|
|
; @Manufacturer: HOLTEK - HOLTEK Semiconductor Inc.
|
|
; @Doc: Generated (TRACE32, build: 178749.), based on:
|
|
; HT32F50442_52.svd (Ver. 1.0)
|
|
; @Core: Cortex-M0+
|
|
; @Chip: HT32F50431, HT32F50441, HT32F50442, HT32F50452
|
|
; @Copyright: (C) 1989-2025 Lauterbach GmbH, licensed for use with TRACE32(R) only
|
|
; --------------------------------------------------------------------------------
|
|
; $Id: perht32f504xx.per 19339 2025-04-03 13:59:18Z kwisniewski $
|
|
|
|
AUTOINDENT.ON CENTER TREE
|
|
ENUMDELIMITER ","
|
|
base ad:0x0
|
|
tree.close "Core Registers (Cortex-M0+)"
|
|
AUTOINDENT.PUSH
|
|
AUTOINDENT.OFF
|
|
tree "System Control"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 0x8
|
|
if (CORENAME()=="CORTEXM1")
|
|
group.long 0x10++0x0b
|
|
line.long 0x00 "STCSR,SysTick Control and Status Register"
|
|
bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1"
|
|
bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "No effect,Processor clock"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TICKINT ,Counting down to 0 " "No SysTick,SysTick"
|
|
bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled"
|
|
line.long 0x04 "STRVR,SysTick Reload Value Register"
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0"
|
|
line.long 0x08 "STCVR,SysTick Current Value Register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter"
|
|
else
|
|
group.long 0x10++0x0b
|
|
line.long 0x00 "STCSR,SysTick Control and Status Register"
|
|
bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1"
|
|
bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "External clock,Processor clock"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TICKINT ,Counting down to 0 " "No SysTick,SysTick"
|
|
bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled"
|
|
line.long 0x04 "STRVR,SysTick Reload Value Register"
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0"
|
|
line.long 0x08 "STCVR,SysTick Current Value Register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter"
|
|
endif
|
|
if (CORENAME()=="CORTEXM1")
|
|
rgroup.long 0x1c++0x03
|
|
line.long 0x00 "STCR,SysTick Calibration Value Register"
|
|
bitfld.long 0x00 31. " NOREF ,Reads as one" "0,1"
|
|
bitfld.long 0x00 30. " SKEW ,Reads as zero" "0,1"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Indicates calibration value is not known"
|
|
else
|
|
rgroup.long 0x1c++0x03
|
|
line.long 0x00 "STCR,SysTick Calibration Value Register"
|
|
bitfld.long 0x00 31. " NOREF ,Indicates whether the IMPL_DEF reference clock is provided" "Implemented,Not implemented"
|
|
bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing subject to system clock skew errors"
|
|
endif
|
|
if (CORENAME()=="CORTEXM1")
|
|
rgroup.long 0xd00++0x03
|
|
line.long 0x00 "CPUID,CPU ID Base Register"
|
|
abitfld.long 0x00 24.--31. " IMPLEMENTER ,Implementer code that Arm has assigned" "0x41=Arm Limited"
|
|
bitfld.long 0x00 20.--23. " VARIANT ,Variant number to distinguish between different product variants or major revisions of the product" "r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,r13,r14,r15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " ARCHITECTURE ,Indicates the architecture version" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,ARMv6-M,0xD,0xE,0xF"
|
|
textline " "
|
|
abitfld.long 0x00 4.--15. " PARTNO ,Indicates part number" "0xC21=Cortex-M1"
|
|
bitfld.long 0x00 0.--3. " REVISION ,Revision number to distinguish between different patches of the product" "p0,p1,p2,p3,p4,p5,p6,p7,p8,p9,p10,p11,p12,p13,p14,p15"
|
|
elif (CORENAME()=="CORTEXM0+")
|
|
rgroup.long 0xd00++0x03
|
|
line.long 0x00 "CPUID,CPU ID Base Register"
|
|
abitfld.long 0x00 24.--31. " IMPLEMENTER ,Implementer code that Arm has assigned" "0x41=Arm Limited"
|
|
bitfld.long 0x00 20.--23. " VARIANT ,Variant number to distinguish between different product variants or major revisions of the product" "r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,r13,r14,r15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " ARCHITECTURE ,Indicates the architecture version" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,ARMv6-M,0xD,0xE,0xF"
|
|
textline " "
|
|
abitfld.long 0x00 4.--15. " PARTNO ,Indicates part number" "0xC60=Cortex-M0+"
|
|
bitfld.long 0x00 0.--3. " REVISION ,Revision number to distinguish between different patches of the product" "p0,p1,p2,p3,p4,p5,p6,p7,p8,p9,p10,p11,p12,p13,p14,p15"
|
|
else
|
|
rgroup.long 0xd00++0x03
|
|
line.long 0x00 "CPUID,CPU ID Base Register"
|
|
abitfld.long 0x00 24.--31. " IMPLEMENTER ,Implementer code that Arm has assigned" "0x41=Arm Limited"
|
|
bitfld.long 0x00 20.--23. " VARIANT ,Variant number to distinguish between different product variants or major revisions of the product" "r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,r13,r14,r15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " ARCHITECTURE ,Indicates the architecture version" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,ARMv6-M,0xD,0xE,0xF"
|
|
textline " "
|
|
abitfld.long 0x00 4.--15. " PARTNO ,Indicates part number" "0xC20=Cortex-M0"
|
|
bitfld.long 0x00 0.--3. " REVISION ,Revision number to distinguish between different patches of the product" "p0,p1,p2,p3,p4,p5,p6,p7,p8,p9,p10,p11,p12,p13,p14,p15"
|
|
endif
|
|
group.long 0xd04++0x03
|
|
line.long 0x00 "ICSR,Interrupt Control State Register"
|
|
bitfld.long 0x00 31. " NMIPENDSET ,Setting this bit will activate an NMI" "No effect,Set pending"
|
|
bitfld.long 0x00 28. " PENDSVSET ,Set a pending PendSV interrupt" "No effect,Set pending"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PENDSVCLR ,Clear a pending PendSV interrupt" "No effect,Clear pending"
|
|
bitfld.long 0x00 26. " PENDSTSET ,Set a pending SysTick" "No effect,Set pending"
|
|
textline " "
|
|
bitfld.long 0x00 25. " PENDSVCLR ,Clear a pending SysTick" "No effect,Clear pending"
|
|
bitfld.long 0x00 23. " ISRPREEMPT ,Pending exception service" "No service,Service"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ISRPENDING ,External interrupt pending flag" "No interrupt,Interrupt"
|
|
hexmask.long.byte 0x00 12.--17. 1. " VECTPENDING ,Active exception number field"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--5. 1. " VECTACTIVET ,Active exception number field"
|
|
if (CORENAME()=="CORTEXM0+")
|
|
group.long 0xd08++0x03
|
|
line.long 0x00 "VTOR,Vector Table Offset Register"
|
|
hexmask.long 0x00 7.--31. 0x80 " TBLOFF ,Vector table address"
|
|
else
|
|
textline " "
|
|
endif
|
|
group.long 0xd0c++0x03
|
|
line.long 0x00 "AIRCR,Application Interrupt and Reset Control Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " VECTKEY ,Vector Key"
|
|
bitfld.long 0x00 15. " ENDIANNESS ,Data endianness bit" "Little-endian,Big-endian"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYSRESETREQ ,System reset setup request" "No effect,Reset"
|
|
bitfld.long 0x00 1. " VECTCLRACTIVE ,Clears all active state information" "No clear,Clear"
|
|
group.long 0xd10++0x03
|
|
line.long 0x00 "SCR,System Control Register"
|
|
bitfld.long 0x00 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
|
|
bitfld.long 0x00 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
|
|
rgroup.long 0xd14++0x03
|
|
line.long 0x00 "CCR,Configuration and Control Register"
|
|
bitfld.long 0x00 9. " STKALIGN ,Indicates whether on exception entry all exceptions are entered with 8-byte stack alignment and the context to restore it is saved" "Reserved,Aligned"
|
|
bitfld.long 0x00 3. " UNALIGN_TRP ,Indicates that all unaligned accesses results in a Hard Fault" "Reserved,Trapped"
|
|
group.long 0xd1c++0x0b
|
|
line.long 0x00 "SHPR2,System Handler Priority Register 2"
|
|
bitfld.long 0x00 30.--31. " PRI_11 ,Priority of system handler 11-SVCall" "00,01,10,11"
|
|
line.long 0x04 "SHPR3,System Handler Priority Register 3"
|
|
bitfld.long 0x04 30.--31. " PRI_15 ,Priority of system handler 15-SysTick" "00,01,10,11"
|
|
bitfld.long 0x04 22.--23. " PRI_14 ,Priority of system handler 14- PendSV" "00,01,10,11"
|
|
line.long 0x08 "SHCSR,System Handler Control and State Register"
|
|
bitfld.long 0x08 15. " SVCALLPENDED ,Reads as 1 if SVCall is pending" "Not pending,Pending"
|
|
if (CORENAME()=="CORTEXM0+")
|
|
hgroup.long 0x08++0x03
|
|
hide.long 0x00 "ACTLR,Auxiliary Control Register"
|
|
else
|
|
textline " "
|
|
endif
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Memory Protection Unit (MPU)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 15.
|
|
rgroup.long 0xD90++0x03
|
|
line.long 0x00 "MPU_TYPE,MPU Type Register"
|
|
bitfld.long 0x00 8.--15. 1. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,?..."
|
|
group.long 0xD94++0x03
|
|
line.long 0x00 "MPU_CTRL,MPU Control Register"
|
|
bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
|
|
group.long 0xD98++0x03
|
|
line.long 0x00 "MPU_RNR,MPU Region Number Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
|
|
tree.close "MPU regions"
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
|
|
group.long 0xD9C++0x03 "Region 0"
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
|
|
group.long 0xD9C++0x03 "Region 1"
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
|
|
group.long 0xD9C++0x03 "Region 2"
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
|
|
group.long 0xD9C++0x03 "Region 3"
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
|
|
group.long 0xD9C++0x03 "Region 4"
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
|
|
group.long 0xD9C++0x03 "Region 5"
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
|
|
group.long 0xD9C++0x03 "Region 6"
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
|
|
group.long 0xD9C++0x03 "Region 7"
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Nested Vectored Interrupt Controller (NVIC)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 12.
|
|
tree "Interrupt Enable Registers"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "SET/CLREN,Interrupt Set/Clear Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Interrupt Pending Registers"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "SET/CLRPEN,Interrupt Set/Clear Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
tree.end
|
|
width 6.
|
|
tree "Interrupt Priority Registers"
|
|
group.long 0x400++0x1F
|
|
line.long 0x00 "INT0,Interrupt Priority Register"
|
|
bitfld.long 0x00 30.--31. " IP_3 ,Priority of interrupt 3" "0,1,2,3"
|
|
bitfld.long 0x00 22.--23. " IP_2 ,Priority of interrupt 2" "0,1,2,3"
|
|
bitfld.long 0x00 14.--15. " IP_1 ,Priority of interrupt 1" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. " IP_0 ,Priority of interrupt 0" "0,1,2,3"
|
|
line.long 0x04 "INT1,Interrupt Priority Register"
|
|
bitfld.long 0x04 30.--31. " IP_7 ,Priority of interrupt 7" "0,1,2,3"
|
|
bitfld.long 0x04 22.--23. " IP_6 ,Priority of interrupt 6" "0,1,2,3"
|
|
bitfld.long 0x04 14.--15. " IP_5 ,Priority of interrupt 5" "0,1,2,3"
|
|
bitfld.long 0x04 6.--7. " IP_4 ,Priority of interrupt 4" "0,1,2,3"
|
|
line.long 0x08 "INT2,Interrupt Priority Register"
|
|
bitfld.long 0x08 30.--31. " IP_11 ,Priority of interrupt 11" "0,1,2,3"
|
|
bitfld.long 0x08 22.--23. " IP_10 ,Priority of interrupt 10" "0,1,2,3"
|
|
bitfld.long 0x08 14.--15. " IP_9 ,Priority of interrupt 9" "0,1,2,3"
|
|
bitfld.long 0x08 6.--7. " IP_8 ,Priority of interrupt 8" "0,1,2,3"
|
|
line.long 0x0C "INT3,Interrupt Priority Register"
|
|
bitfld.long 0x0C 30.--31. " IP_15 ,Priority of interrupt 15" "0,1,2,3"
|
|
bitfld.long 0x0C 22.--23. " IP_14 ,Priority of interrupt 14" "0,1,2,3"
|
|
bitfld.long 0x0C 14.--15. " IP_13 ,Priority of interrupt 13" "0,1,2,3"
|
|
bitfld.long 0x0C 6.--7. " IP_12 ,Priority of interrupt 12" "0,1,2,3"
|
|
line.long 0x10 "INT4,Interrupt Priority Register"
|
|
bitfld.long 0x10 30.--31. " IP_19 ,Priority of interrupt 19" "0,1,2,3"
|
|
bitfld.long 0x10 22.--23. " IP_18 ,Priority of interrupt 18" "0,1,2,3"
|
|
bitfld.long 0x10 14.--15. " IP_17 ,Priority of interrupt 17" "0,1,2,3"
|
|
bitfld.long 0x10 6.--7. " IP_16 ,Priority of interrupt 16" "0,1,2,3"
|
|
line.long 0x14 "INT5,Interrupt Priority Register"
|
|
bitfld.long 0x14 30.--31. " IP_23 ,Priority of interrupt 23" "0,1,2,3"
|
|
bitfld.long 0x14 22.--23. " IP_22 ,Priority of interrupt 22" "0,1,2,3"
|
|
bitfld.long 0x14 14.--15. " IP_21 ,Priority of interrupt 21" "0,1,2,3"
|
|
bitfld.long 0x14 6.--7. " IP_20 ,Priority of interrupt 20" "0,1,2,3"
|
|
line.long 0x18 "INT6,Interrupt Priority Register"
|
|
bitfld.long 0x18 30.--31. " IP_27 ,Priority of interrupt 27" "0,1,2,3"
|
|
bitfld.long 0x18 22.--23. " IP_26 ,Priority of interrupt 26" "0,1,2,3"
|
|
bitfld.long 0x18 14.--15. " IP_25 ,Priority of interrupt 25" "0,1,2,3"
|
|
bitfld.long 0x18 6.--7. " IP_24 ,Priority of interrupt 24" "0,1,2,3"
|
|
line.long 0x1C "INT7,Interrupt Priority Register"
|
|
bitfld.long 0x1C 30.--31. " IP_31 ,Priority of interrupt 31" "0,1,2,3"
|
|
bitfld.long 0x1C 22.--23. " IP_30 ,Priority of interrupt 30" "0,1,2,3"
|
|
bitfld.long 0x1C 14.--15. " IP_29 ,Priority of interrupt 29" "0,1,2,3"
|
|
bitfld.long 0x1C 6.--7. " IP_28 ,Priority of interrupt 28" "0,1,2,3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 0xA
|
|
group.long 0xD30++0x03
|
|
line.long 0x00 "DFSR,Data Fault Status Register"
|
|
eventfld.long 0x00 4. " EXTERNAL ,External debug request flag" "No occurred,Occurred"
|
|
eventfld.long 0x00 3. " VCATCH ,Vector catch flag" "No occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 2. " DWTRAP ,Data Watchpoint flag" "No match,Match"
|
|
textline " "
|
|
eventfld.long 0x00 1. " BKPT ,BKPT flag" "No match,Match"
|
|
eventfld.long 0x00 0. " HALTED ,Halt request flag" "No request,Request"
|
|
if (CORENAME()=="CORTEXM1")
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x01)==0x00)
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
textline " "
|
|
textfld " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x01)==0x00)
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
textline " "
|
|
textfld " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
wgroup.long 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Selector Register"
|
|
bitfld.long 0x00 16. " REGWnR ,Register Read/Write" "Read,Write"
|
|
bitfld.long 0x00 0.--4. " REGSEL ,Register Selection" "R0,R1,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12,Current SP,LR,DebugReturnAddress,xPSR Flags,MSP,PSP,Reserved,CONTROL[1]/PRIMASK[0],?..."
|
|
group.long 0xDF8++0x07
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
hexmask.long 0x00 0.--31. 1. " DATA ,Data for reading and writing registers to and from the processor"
|
|
line.long 0x04 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x04 24. " DWTENA ,Global enable or disable for the DW unit" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " VC_HARDERR ,Debug trap on a Hard Fault" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x04 0. " VC_CORERESET ,Reset Vector Catch" "No reset,Reset"
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Breakpoint Unit (BPU)"
|
|
sif COMPonent.AVAILABLE("BPU")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("BPU",-1))
|
|
width 8.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "BP_CTRL,Breakpoint Control Register"
|
|
bitfld.long 0x00 4.--7. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1. " KEY ,Key field" "No write,Write"
|
|
bitfld.long 0x00 0. " ENABLE ,Breakpoint unit enable bit" "Disabled,Enabled"
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "B_COMP0,Breakpoint Comparator Registers 0"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 0" "Disabled,Enabled"
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "B_COMP1,Breakpoint Comparator Registers 1"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 1" "Disabled,Enabled"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "B_COMP2,Breakpoint Comparator Registers 2"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 2" "Disabled,Enabled"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "B_COMP3,Breakpoint Comparator Registers 3"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 3" "Disabled,Enabled"
|
|
else
|
|
newline
|
|
textline "BPU component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 14.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "DW_CTRL,DW Control Register "
|
|
bitfld.long 0x00 28.--31. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x1c++0x03
|
|
line.long 0x00 "DW_PCSR,DW Program Counter Sample Register"
|
|
hexmask.long 0x00 0.--31. 1. " EIASAMPLE ,Execution instruction address sample or 0xFFFFFFFF"
|
|
group.long 0x20++0x0b
|
|
line.long 0x00 "DW_COMP0,DW Comparator Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " COMP1 ,Compare against PC or the data address"
|
|
line.long 0x04 "DW_MASK0,DW Mask Register 0"
|
|
hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP"
|
|
line.long 0x08 "DW_FUNCTION0,DW Function Register 0"
|
|
bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match"
|
|
bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..."
|
|
group.long 0x30++0x0b
|
|
line.long 0x00 "DW_COMP1,DW Comparator Register 1"
|
|
hexmask.long 0x00 0.--31. 1. " COMP ,Compare against PC or the data address"
|
|
line.long 0x04 "DW_MASK1,DW Mask Register 1 "
|
|
hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP"
|
|
line.long 0x08 "DW_FUNCTION1,DW Function Register 1"
|
|
bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match"
|
|
bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..."
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
tree "ADC (Analog to Digital Converter)"
|
|
base ad:0x40010000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "ADC_CR,ADC_CR"
|
|
bitfld.long 0x0 16.--18. "ADSUBL,ADSUBL" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 8.--10. "ADSEQL,ADSEQL" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 7. "ADCEN,ADCEN" "0,1"
|
|
bitfld.long 0x0 6. "ADCRST,ADCRST" "0,1"
|
|
bitfld.long 0x0 0.--1. "ADMODE,ADMODE" "0,1,2,3"
|
|
line.long 0x4 "ADC_LST0,ADC_LST0"
|
|
hexmask.long.byte 0x4 24.--28. 1. "ADSEQ3,ADSEQ3"
|
|
hexmask.long.byte 0x4 16.--20. 1. "ADSEQ2,ADSEQ2"
|
|
hexmask.long.byte 0x4 8.--12. 1. "ADSEQ1,ADSEQ1"
|
|
hexmask.long.byte 0x4 0.--4. 1. "ADSEQ0,ADSEQ0"
|
|
line.long 0x8 "ADC_LST1,ADC_LST1"
|
|
hexmask.long.byte 0x8 24.--28. 1. "ADSEQ7,ADSEQ7"
|
|
hexmask.long.byte 0x8 16.--20. 1. "ADSEQ6,ADSEQ6"
|
|
hexmask.long.byte 0x8 8.--12. 1. "ADSEQ5,ADSEQ5"
|
|
hexmask.long.byte 0x8 0.--4. 1. "ADSEQ4,ADSEQ4"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "ADC_STR,ADC_STR"
|
|
hexmask.long.byte 0x0 0.--7. 1. "ADST,ADST"
|
|
group.long 0x30++0x1F
|
|
line.long 0x0 "ADC_DR0,ADC_DR0"
|
|
bitfld.long 0x0 31. "ADVLD0,ADVLD0" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "ADD0,ADD0"
|
|
line.long 0x4 "ADC_DR1,ADC_DR1"
|
|
bitfld.long 0x4 31. "ADVLD1,ADVLD1" "0,1"
|
|
hexmask.long.word 0x4 0.--15. 1. "ADD1,ADD1"
|
|
line.long 0x8 "ADC_DR2,ADC_DR2"
|
|
bitfld.long 0x8 31. "ADVLD2,ADVLD2" "0,1"
|
|
hexmask.long.word 0x8 0.--15. 1. "ADD2,ADD2"
|
|
line.long 0xC "ADC_DR3,ADC_DR3"
|
|
bitfld.long 0xC 31. "ADVLD3,ADVLD3" "0,1"
|
|
hexmask.long.word 0xC 0.--15. 1. "ADD3,ADD3"
|
|
line.long 0x10 "ADC_DR4,ADC_DR4"
|
|
bitfld.long 0x10 31. "ADVLD4,ADVLD4" "0,1"
|
|
hexmask.long.word 0x10 0.--15. 1. "ADD4,ADD4"
|
|
line.long 0x14 "ADC_DR5,ADC_DR5"
|
|
bitfld.long 0x14 31. "ADVLD5,ADVLD5" "0,1"
|
|
hexmask.long.word 0x14 0.--15. 1. "ADD5,ADD5"
|
|
line.long 0x18 "ADC_DR6,ADC_DR6"
|
|
bitfld.long 0x18 31. "ADVLD6,ADVLD6" "0,1"
|
|
hexmask.long.word 0x18 0.--15. 1. "ADD6,ADD6"
|
|
line.long 0x1C "ADC_DR7,ADC_DR7"
|
|
bitfld.long 0x1C 31. "ADVLD7,ADVLD7" "0,1"
|
|
hexmask.long.word 0x1C 0.--15. 1. "ADD7,ADD7"
|
|
group.long 0x70++0x23
|
|
line.long 0x0 "ADC_TCR,ADC_TCR"
|
|
bitfld.long 0x0 4. "CMP,CMP" "0,1"
|
|
bitfld.long 0x0 3. "TM1,TM1" "0,1"
|
|
bitfld.long 0x0 2. "TM0,TM0" "0,1"
|
|
bitfld.long 0x0 1. "ADEXTI,ADEXTI" "0,1"
|
|
bitfld.long 0x0 0. "ADSW,ADSW" "0,1"
|
|
line.long 0x4 "ADC_TSR,ADC_TSR"
|
|
bitfld.long 0x4 27.--29. "TM1E,TM1E" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 24.--26. "TM0E,TM0E" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 22.--23. "TM1S,TM1S[2:1]" "0,1,2,3"
|
|
bitfld.long 0x4 20. "CMPS,CMPS" "0,1"
|
|
bitfld.long 0x4 19. "TM1S0,TM1S0" "0,1"
|
|
bitfld.long 0x4 16.--18. "TM0S,TM0S" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x4 8.--11. 1. "ADEXTIS,ADEXTIS"
|
|
bitfld.long 0x4 0. "ADSC,ADSC" "0,1"
|
|
line.long 0x8 "ADC_WCR,ADC_WCR"
|
|
hexmask.long.byte 0x8 24.--27. 1. "ADUCH,ADUCH"
|
|
hexmask.long.byte 0x8 16.--19. 1. "ADLCH,ADLCH"
|
|
hexmask.long.byte 0x8 8.--11. 1. "ADWCH,ADWCH"
|
|
bitfld.long 0x8 2. "ADWALL,ADWALL" "0,1"
|
|
bitfld.long 0x8 1. "ADWUE,ADWUE" "0,1"
|
|
bitfld.long 0x8 0. "ADWLE,ADWLE" "0,1"
|
|
line.long 0xC "ADC_TR,ADC_TR"
|
|
hexmask.long.word 0xC 16.--27. 1. "ADUT,ADUT"
|
|
hexmask.long.word 0xC 0.--11. 1. "ADLT,ADLT"
|
|
line.long 0x10 "ADC_IER,ADC_IER"
|
|
bitfld.long 0x10 24. "ADIEO,ADIEO" "0,1"
|
|
bitfld.long 0x10 17. "ADIEU,ADIEU" "0,1"
|
|
bitfld.long 0x10 16. "ADIEL,ADIEL" "0,1"
|
|
bitfld.long 0x10 2. "ADIEC,ADIEC" "0,1"
|
|
bitfld.long 0x10 1. "ADIEG,ADIEG" "0,1"
|
|
bitfld.long 0x10 0. "ADIES,ADIES" "0,1"
|
|
line.long 0x14 "ADC_IRAW,ADC_IRAW"
|
|
bitfld.long 0x14 24. "ADIRAWO,ADIRAWO" "0,1"
|
|
bitfld.long 0x14 17. "ADIRAWU,ADIRAWU" "0,1"
|
|
bitfld.long 0x14 16. "ADIRAWL,ADIRAWL" "0,1"
|
|
bitfld.long 0x14 2. "ADIRAWC,ADIRAWC" "0,1"
|
|
bitfld.long 0x14 1. "ADIRAWG,ADIRAWG" "0,1"
|
|
bitfld.long 0x14 0. "ADIRAWS,ADIRAWS" "0,1"
|
|
line.long 0x18 "ADC_ISR,ADC_ISR"
|
|
bitfld.long 0x18 24. "ADISRO,ADISRO" "0,1"
|
|
bitfld.long 0x18 17. "ADISRU,ADISRU" "0,1"
|
|
bitfld.long 0x18 16. "ADISRL,ADISRL" "0,1"
|
|
bitfld.long 0x18 2. "ADISRC,ADISRC" "0,1"
|
|
bitfld.long 0x18 1. "ADISRG,ADISRG" "0,1"
|
|
bitfld.long 0x18 0. "ADISRS,ADISRS" "0,1"
|
|
line.long 0x1C "ADC_ICLR,ADC_ICLR"
|
|
bitfld.long 0x1C 24. "ADICLRO,ADICLRO" "0,1"
|
|
bitfld.long 0x1C 17. "ADICLRU,ADICLRU" "0,1"
|
|
bitfld.long 0x1C 16. "ADICLRL,ADICLRL" "0,1"
|
|
bitfld.long 0x1C 2. "ADICLRC,ADICLRC" "0,1"
|
|
bitfld.long 0x1C 1. "ADICLRG,ADICLRG" "0,1"
|
|
bitfld.long 0x1C 0. "ADICLRS,ADICLRS" "0,1"
|
|
line.long 0x20 "ADC_DMAR,ADC_DMAR"
|
|
bitfld.long 0x20 2. "ADDMAC,ADDMAC" "0,1"
|
|
bitfld.long 0x20 1. "ADDMAG,ADDMAG" "0,1"
|
|
bitfld.long 0x20 0. "ADDMAS,ADDMAS" "0,1"
|
|
tree.end
|
|
tree "AFIO (Alternate Function Input/Output Control Unit)"
|
|
base ad:0x40022000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "ESSR0,ESSR0"
|
|
hexmask.long.byte 0x0 28.--31. 1. "EXTI7PIN,EXTI7PIN"
|
|
hexmask.long.byte 0x0 24.--27. 1. "EXTI6PIN,EXTI6PIN"
|
|
hexmask.long.byte 0x0 20.--23. 1. "EXTI5PIN,EXTI5PIN"
|
|
hexmask.long.byte 0x0 16.--19. 1. "EXTI4PIN,EXTI4PIN"
|
|
hexmask.long.byte 0x0 12.--15. 1. "EXTI3PIN,EXTI3PIN"
|
|
hexmask.long.byte 0x0 8.--11. 1. "EXTI2PIN,EXTI2PIN"
|
|
hexmask.long.byte 0x0 4.--7. 1. "EXTI1PIN,EXTI1PIN"
|
|
hexmask.long.byte 0x0 0.--3. 1. "EXTI0PIN,EXTI0PIN"
|
|
line.long 0x4 "ESSR1,ESSR1"
|
|
hexmask.long.byte 0x4 28.--31. 1. "EXTI15PIN,EXTI15PIN"
|
|
hexmask.long.byte 0x4 24.--27. 1. "EXTI14PIN,EXTI14PIN"
|
|
hexmask.long.byte 0x4 20.--23. 1. "EXTI13PIN,EXTI13PIN"
|
|
hexmask.long.byte 0x4 16.--19. 1. "EXTI12PIN,EXTI12PIN"
|
|
hexmask.long.byte 0x4 12.--15. 1. "EXTI11PIN,EXTI11PIN"
|
|
hexmask.long.byte 0x4 8.--11. 1. "EXTI10PIN,EXTI10PIN"
|
|
hexmask.long.byte 0x4 4.--7. 1. "EXTI9PIN,EXTI9PIN"
|
|
hexmask.long.byte 0x4 0.--3. 1. "EXTI8PIN,EXTI8PIN"
|
|
group.long 0x20++0x1F
|
|
line.long 0x0 "GPACFGLR,GPACFGLR"
|
|
hexmask.long.byte 0x0 28.--31. 1. "PACFG7,PACFG7"
|
|
hexmask.long.byte 0x0 24.--27. 1. "PACFG6,PACFG6"
|
|
hexmask.long.byte 0x0 20.--23. 1. "PACFG5,PACFG5"
|
|
hexmask.long.byte 0x0 16.--19. 1. "PACFG4,PACFG4"
|
|
hexmask.long.byte 0x0 12.--15. 1. "PACFG3,PACFG3"
|
|
hexmask.long.byte 0x0 8.--11. 1. "PACFG2,PACFG2"
|
|
hexmask.long.byte 0x0 4.--7. 1. "PACFG1,PACFG1"
|
|
hexmask.long.byte 0x0 0.--3. 1. "PACFG0,PACFG0"
|
|
line.long 0x4 "GPACFGHR,GPACFGHR"
|
|
hexmask.long.byte 0x4 28.--31. 1. "PACFG15,PACFG15"
|
|
hexmask.long.byte 0x4 24.--27. 1. "PACFG14,PACFG14"
|
|
hexmask.long.byte 0x4 20.--23. 1. "PACFG13,PACFG13"
|
|
hexmask.long.byte 0x4 16.--19. 1. "PACFG12,PACFG12"
|
|
hexmask.long.byte 0x4 12.--15. 1. "PACFG11,PACFG11"
|
|
hexmask.long.byte 0x4 8.--11. 1. "PACFG10,PACFG10"
|
|
hexmask.long.byte 0x4 4.--7. 1. "PACFG9,PACFG9"
|
|
hexmask.long.byte 0x4 0.--3. 1. "PACFG8,PACFG8"
|
|
line.long 0x8 "GPBCFGLR,GPBCFGLR"
|
|
hexmask.long.byte 0x8 28.--31. 1. "PBCFG7,PBCFG7"
|
|
hexmask.long.byte 0x8 24.--27. 1. "PBCFG6,PBCFG6"
|
|
hexmask.long.byte 0x8 20.--23. 1. "PBCFG5,PBCFG5"
|
|
hexmask.long.byte 0x8 16.--19. 1. "PBCFG4,PBCFG4"
|
|
hexmask.long.byte 0x8 12.--15. 1. "PBCFG3,PBCFG3"
|
|
hexmask.long.byte 0x8 8.--11. 1. "PBCFG2,PBCFG2"
|
|
hexmask.long.byte 0x8 4.--7. 1. "PBCFG1,PBCFG1"
|
|
hexmask.long.byte 0x8 0.--3. 1. "PBCFG0,PBCFG0"
|
|
line.long 0xC "GPBCFGHR,GPBCFGHR"
|
|
hexmask.long.byte 0xC 28.--31. 1. "PBCFG15,PBCFG15"
|
|
hexmask.long.byte 0xC 24.--27. 1. "PBCFG14,PBCFG14"
|
|
hexmask.long.byte 0xC 20.--23. 1. "PBCFG13,PBCFG13"
|
|
hexmask.long.byte 0xC 16.--19. 1. "PBCFG12,PBCFG12"
|
|
hexmask.long.byte 0xC 12.--15. 1. "PBCFG11,PBCFG11"
|
|
hexmask.long.byte 0xC 8.--11. 1. "PBCFG10,PBCFG10"
|
|
hexmask.long.byte 0xC 4.--7. 1. "PBCFG9,PBCFG9"
|
|
hexmask.long.byte 0xC 0.--3. 1. "PBCFG8,PBCFG8"
|
|
line.long 0x10 "GPCCFGLR,GPCCFGLR"
|
|
hexmask.long.byte 0x10 28.--31. 1. "PCCFG7,PCCFG7"
|
|
hexmask.long.byte 0x10 24.--27. 1. "PCCFG6,PCCFG6"
|
|
hexmask.long.byte 0x10 20.--23. 1. "PCCFG5,PCCFG5"
|
|
hexmask.long.byte 0x10 16.--19. 1. "PCCFG4,PCCFG4"
|
|
hexmask.long.byte 0x10 12.--15. 1. "PCCFG3,PCCFG3"
|
|
hexmask.long.byte 0x10 8.--11. 1. "PCCFG2,PCCFG2"
|
|
hexmask.long.byte 0x10 4.--7. 1. "PCCFG1,PCCFG1"
|
|
hexmask.long.byte 0x10 0.--3. 1. "PCCFG0,PCCFG0"
|
|
line.long 0x14 "GPCCFGHR,GPCCFGHR"
|
|
hexmask.long.byte 0x14 28.--31. 1. "PCCFG15,PCCFG15"
|
|
hexmask.long.byte 0x14 24.--27. 1. "PCCFG14,PCCFG14"
|
|
hexmask.long.byte 0x14 20.--23. 1. "PCCFG13,PCCFG13"
|
|
hexmask.long.byte 0x14 16.--19. 1. "PCCFG12,PCCFG12"
|
|
hexmask.long.byte 0x14 12.--15. 1. "PCCFG11,PCCFG11"
|
|
hexmask.long.byte 0x14 8.--11. 1. "PCCFG10,PCCFG10"
|
|
hexmask.long.byte 0x14 4.--7. 1. "PCCFG9,PCCFG9"
|
|
hexmask.long.byte 0x14 0.--3. 1. "PCCFG8,PCCFG8"
|
|
line.long 0x18 "GPDCFGLR,GPDCFGLR"
|
|
hexmask.long.byte 0x18 28.--31. 1. "PDCFG7,PDCFG7"
|
|
hexmask.long.byte 0x18 24.--27. 1. "PDCFG6,PDCFG6"
|
|
hexmask.long.byte 0x18 20.--23. 1. "PDCFG5,PDCFG5"
|
|
hexmask.long.byte 0x18 16.--19. 1. "PDCFG4,PDCFG4"
|
|
hexmask.long.byte 0x18 12.--15. 1. "PDCFG3,PDCFG3"
|
|
hexmask.long.byte 0x18 8.--11. 1. "PDCFG2,PDCFG2"
|
|
hexmask.long.byte 0x18 4.--7. 1. "PDCFG1,PDCFG1"
|
|
hexmask.long.byte 0x18 0.--3. 1. "PDCFG0,PDCFG0"
|
|
line.long 0x1C "GPDCFGHR,GPDCFGHR"
|
|
hexmask.long.byte 0x1C 28.--31. 1. "PDCFG15,PDCFG15"
|
|
hexmask.long.byte 0x1C 24.--27. 1. "PDCFG14,PDCFG14"
|
|
hexmask.long.byte 0x1C 20.--23. 1. "PDCFG13,PDCFG13"
|
|
hexmask.long.byte 0x1C 16.--19. 1. "PDCFG12,PDCFG12"
|
|
hexmask.long.byte 0x1C 12.--15. 1. "PDCFG11,PDCFG11"
|
|
hexmask.long.byte 0x1C 8.--11. 1. "PDCFG10,PDCFG10"
|
|
hexmask.long.byte 0x1C 4.--7. 1. "PDCFG9,PDCFG9"
|
|
hexmask.long.byte 0x1C 0.--3. 1. "PDCFG8,PDCFG8"
|
|
tree.end
|
|
tree "BFTM (Basic Function Timer Module)"
|
|
base ad:0x0
|
|
tree "BFTM0"
|
|
base ad:0x40076000
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "BFTMCR,BFTMCR"
|
|
bitfld.long 0x0 2. "CEN,CEN" "0,1"
|
|
bitfld.long 0x0 1. "OSM,OSM" "0,1"
|
|
bitfld.long 0x0 0. "MIEN,MIEN" "0,1"
|
|
line.long 0x4 "BFTMSR,BFTMSR"
|
|
bitfld.long 0x4 0. "MIF,MIF" "0,1"
|
|
line.long 0x8 "BFTMCNTR,BFTMCNTR"
|
|
hexmask.long 0x8 0.--31. 1. "CNT,CNT"
|
|
line.long 0xC "BFTMCMPR,BFTMCMPR"
|
|
hexmask.long 0xC 0.--31. 1. "CMP,CMP"
|
|
tree.end
|
|
tree "BFTM1"
|
|
base ad:0x40077000
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "BFTMCR,BFTMCR"
|
|
bitfld.long 0x0 2. "CEN,CEN" "0,1"
|
|
bitfld.long 0x0 1. "OSM,OSM" "0,1"
|
|
bitfld.long 0x0 0. "MIEN,MIEN" "0,1"
|
|
line.long 0x4 "BFTMSR,BFTMSR"
|
|
bitfld.long 0x4 0. "MIF,MIF" "0,1"
|
|
line.long 0x8 "BFTMCNTR,BFTMCNTR"
|
|
hexmask.long 0x8 0.--31. 1. "CNT,CNT"
|
|
line.long 0xC "BFTMCMPR,BFTMCMPR"
|
|
hexmask.long 0xC 0.--31. 1. "CMP,CMP"
|
|
tree.end
|
|
tree.end
|
|
tree "CKCU (Clock Control Unit)"
|
|
base ad:0x40088000
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "GCFGR,GCFGR"
|
|
bitfld.long 0x0 29.--31. "LPMOD,LPMOD" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x0 11.--15. 1. "CKREFPRE,CKREFPRE"
|
|
bitfld.long 0x0 8. "PLLSRC,PLLSRC" "0,1"
|
|
bitfld.long 0x0 0.--2. "CKOUTSRC,CKOUTSRC" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "GCCR,GCCR"
|
|
bitfld.long 0x4 17. "PSRCEN,PSRCEN" "0,1"
|
|
bitfld.long 0x4 16. "CKMEN,CKMEN" "0,1"
|
|
bitfld.long 0x4 11. "HSIEN,HSIEN" "0,1"
|
|
bitfld.long 0x4 10. "HSEEN,HSEEN" "0,1"
|
|
bitfld.long 0x4 9. "PLLEN,PLLEN" "0,1"
|
|
bitfld.long 0x4 8. "HSEGAIN,HSEGAIN" "0,1"
|
|
bitfld.long 0x4 0.--2. "SW,SW" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "GCSR,GCSR"
|
|
bitfld.long 0x8 5. "LSIRDY,LSIRDY" "0,1"
|
|
bitfld.long 0x8 4. "LSERDY,LSERDY" "0,1"
|
|
bitfld.long 0x8 3. "HSIRDY,HSIRDY" "0,1"
|
|
bitfld.long 0x8 2. "HSERDY,HSERDY" "0,1"
|
|
bitfld.long 0x8 1. "PLLRDY,PLLRDY" "0,1"
|
|
line.long 0xC "GCIR,GCIR"
|
|
bitfld.long 0xC 16. "CKSIE,CKSIE" "0,1"
|
|
bitfld.long 0xC 0. "CKSF,CKSF" "0,1"
|
|
group.long 0x18++0x33
|
|
line.long 0x0 "PLLCFGR,PLLCFGR"
|
|
bitfld.long 0x0 28. "REFDIV,REFDIV" "0,1"
|
|
hexmask.long.byte 0x0 23.--26. 1. "PFBD,PFBD"
|
|
bitfld.long 0x0 21.--22. "POTD,POTD" "0,1,2,3"
|
|
line.long 0x4 "PLLCR,PLLCR"
|
|
bitfld.long 0x4 31. "PLLBPS,PLLBPS" "0,1"
|
|
line.long 0x8 "AHBCFGR,AHBCFGR"
|
|
bitfld.long 0x8 0.--2. "AHBPRE,AHBPRE" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "AHBCCR,AHBCCR"
|
|
bitfld.long 0xC 24. "DIVEN,DIVEN" "0,1"
|
|
bitfld.long 0xC 19. "PDEN,PDEN" "0,1"
|
|
bitfld.long 0xC 18. "PCEN,PCEN" "0,1"
|
|
bitfld.long 0xC 17. "PBEN,PBEN" "0,1"
|
|
bitfld.long 0xC 16. "PAEN,PAEN" "0,1"
|
|
bitfld.long 0xC 13. "CRCEN,CRCEN" "0,1"
|
|
bitfld.long 0xC 12. "EBIEN,EBIEN" "0,1"
|
|
bitfld.long 0xC 11. "CKREFEN,CKREFEN" "0,1"
|
|
bitfld.long 0xC 6. "APBEN,APBEN" "0,1"
|
|
bitfld.long 0xC 5. "BMEN,BMEN" "0,1"
|
|
newline
|
|
bitfld.long 0xC 4. "PDMAEN,PDMAEN" "0,1"
|
|
bitfld.long 0xC 2. "SRAMEN,SRAMEN" "0,1"
|
|
bitfld.long 0xC 0. "FMCEN,FMCEN" "0,1"
|
|
line.long 0x10 "APBCFGR,APBCFGR"
|
|
bitfld.long 0x10 16.--18. "ADCDIV,ADCDIV" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "APBCCR0,APBCCR0"
|
|
bitfld.long 0x14 29. "LEDCEN,LEDCEN" "0,1"
|
|
bitfld.long 0x14 15. "EXTIEN,EXTIEN" "0,1"
|
|
bitfld.long 0x14 14. "AFIOEN,AFIOEN" "0,1"
|
|
bitfld.long 0x14 11. "UR1EN,UR1EN" "0,1"
|
|
bitfld.long 0x14 10. "UR0EN,UR0EN" "0,1"
|
|
bitfld.long 0x14 9. "USR1EN,USR1EN" "0,1"
|
|
bitfld.long 0x14 8. "USR0EN,USR0EN" "0,1"
|
|
bitfld.long 0x14 5. "SPI1EN,SPI1EN" "0,1"
|
|
bitfld.long 0x14 4. "SPI0EN,SPI0EN" "0,1"
|
|
bitfld.long 0x14 1. "I2C1EN,I2C1EN" "0,1"
|
|
newline
|
|
bitfld.long 0x14 0. "I2C0EN,I2C0EN" "0,1"
|
|
line.long 0x18 "APBCCR1,APBCCR1"
|
|
bitfld.long 0x18 24. "ADCCEN,ADCCEN" "0,1"
|
|
bitfld.long 0x18 22. "CMPEN,CMPEN" "0,1"
|
|
bitfld.long 0x18 17. "BFTM1EN,BFTM1EN" "0,1"
|
|
bitfld.long 0x18 16. "BFTM0EN,BFTM0EN" "0,1"
|
|
bitfld.long 0x18 13. "PWM1EN,PWM1EN" "0,1"
|
|
bitfld.long 0x18 12. "PWM0EN,PWM0EN" "0,1"
|
|
bitfld.long 0x18 8. "GPTMEN,GPTMEN" "0,1"
|
|
bitfld.long 0x18 6. "VDDREN,VDDREN" "0,1"
|
|
bitfld.long 0x18 4. "WDTREN,WDTREN" "0,1"
|
|
bitfld.long 0x18 0. "MCTMEN,MCTMEN" "0,1"
|
|
line.long 0x1C "CKST,CKST"
|
|
bitfld.long 0x1C 24.--26. "HSIST,HSIST" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x1C 16.--17. "HSEST,HSEST" "0,1,2,3"
|
|
hexmask.long.byte 0x1C 8.--11. 1. "PLLST,PLLST"
|
|
bitfld.long 0x1C 0.--2. "CKSWST,CKSWST" "0,1,2,3,4,5,6,7"
|
|
line.long 0x20 "APBPCSR0,APBPCSR0"
|
|
bitfld.long 0x20 30.--31. "UR1PCLK,UR1PCLK" "0,1,2,3"
|
|
bitfld.long 0x20 28.--29. "UR0PCLK,UR0PCLK" "0,1,2,3"
|
|
bitfld.long 0x20 26.--27. "USR1PCLK,USR1PCLK" "0,1,2,3"
|
|
bitfld.long 0x20 24.--25. "USR0PCLK,USR0PCLK" "0,1,2,3"
|
|
bitfld.long 0x20 20.--21. "GPTMPCLK,GPTMPCLK" "0,1,2,3"
|
|
bitfld.long 0x20 16.--17. "MCTMPCLK,MCTMPCLK" "0,1,2,3"
|
|
bitfld.long 0x20 14.--15. "BFTM1PCLK,BFTM1PCLK" "0,1,2,3"
|
|
bitfld.long 0x20 12.--13. "BFTM0PCLK,BFTM0PCLK" "0,1,2,3"
|
|
bitfld.long 0x20 6.--7. "SPI1PCLK,SPI1PCLK" "0,1,2,3"
|
|
bitfld.long 0x20 4.--5. "SPI0PCLK,SPI0PCLK" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x20 2.--3. "I2C1PCLK,I2CPCLK" "0,1,2,3"
|
|
bitfld.long 0x20 0.--1. "I2C0PCLK,I2C0PCLK" "0,1,2,3"
|
|
line.long 0x24 "APBPCSR1,APBPCSR1"
|
|
bitfld.long 0x24 28.--29. "URPCLK,URPCLK" "0,1,2,3"
|
|
bitfld.long 0x24 24.--25. "USRPCLK,USRPCLK" "0,1,2,3"
|
|
bitfld.long 0x24 20.--21. "GPTMPCLK,GPTMPCLK" "0,1,2,3"
|
|
bitfld.long 0x24 14.--15. "BFTM1PCLK,BFTM1PCLK" "0,1,2,3"
|
|
bitfld.long 0x24 12.--13. "BFTM0PCLK,BFTM0PCLK" "0,1,2,3"
|
|
bitfld.long 0x24 4.--5. "SPIPCLK,SPIPCLK" "0,1,2,3"
|
|
bitfld.long 0x24 0.--1. "I2CPCLK,I2CPCLK" "0,1,2,3"
|
|
line.long 0x28 "HSICR,HSICR"
|
|
hexmask.long.byte 0x28 24.--28. 1. "HSICOARSE,HSICOARSE"
|
|
hexmask.long.byte 0x28 16.--23. 1. "HSIFINE,HSIFINE"
|
|
bitfld.long 0x28 7. "FLOCK,FLOCK" "0,1"
|
|
bitfld.long 0x28 5.--6. "REFCLKSEL,REFCLKSEL" "0,1,2,3"
|
|
bitfld.long 0x28 4. "TMSEL,TMSEL" "0,1"
|
|
bitfld.long 0x28 3. "ATMSEL,ATMSEL" "0,1"
|
|
bitfld.long 0x28 2. "LTRSEL,LTRSEL" "0,1"
|
|
bitfld.long 0x28 1. "ATCEN,ATCEN" "0,1"
|
|
bitfld.long 0x28 0. "TRIMEN,TRIMEN" "0,1"
|
|
line.long 0x2C "HSIATCR,HSIATCR"
|
|
hexmask.long.word 0x2C 0.--13. 1. "ATCNT,ATCNT"
|
|
line.long 0x30 "APBPCSR2,APBPCSR2"
|
|
bitfld.long 0x30 28.--29. "URPCLK,URPCLK" "0,1,2,3"
|
|
bitfld.long 0x30 24.--25. "USRPCLK,USRPCLK" "0,1,2,3"
|
|
bitfld.long 0x30 20.--21. "GPTMPCLK,GPTMPCLK" "0,1,2,3"
|
|
bitfld.long 0x30 14.--15. "BFTM1PCLK,BFTM1PCLK" "0,1,2,3"
|
|
bitfld.long 0x30 12.--13. "BFTM0PCLK,BFTM0PCLK" "0,1,2,3"
|
|
bitfld.long 0x30 4.--5. "SPIPCLK,SPIPCLK" "0,1,2,3"
|
|
bitfld.long 0x30 0.--1. "I2CPCLK,I2CPCLK" "0,1,2,3"
|
|
group.long 0x304++0x3
|
|
line.long 0x0 "MCUDBGCR,MCUDBGCR"
|
|
bitfld.long 0x0 31. "DBPWM1,DBPWM1" "0,1"
|
|
bitfld.long 0x0 30. "DBPWM0,DBPWM0" "0,1"
|
|
bitfld.long 0x0 18. "DBUR,DBUR" "0,1"
|
|
bitfld.long 0x0 17. "DBBFTM1,DBBFTM1" "0,1"
|
|
bitfld.long 0x0 16. "DBBFTM0,DBBFTM0" "0,1"
|
|
bitfld.long 0x0 14. "DBDSLP2,DBDSLP2" "0,1"
|
|
bitfld.long 0x0 12. "DBI2C,DBI2C" "0,1"
|
|
bitfld.long 0x0 10. "DBSPI,DBSPI" "0,1"
|
|
bitfld.long 0x0 8. "DBUSR,DBUSR" "0,1"
|
|
bitfld.long 0x0 6. "DBGPTM,DBGPTM" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "DBWDT,DBWDT" "0,1"
|
|
bitfld.long 0x0 2. "DBPD,DBPD" "0,1"
|
|
bitfld.long 0x0 1. "DBDSLP1,DBDSLP1" "0,1"
|
|
bitfld.long 0x0 0. "DBSLP,DBSLP" "0,1"
|
|
tree.end
|
|
tree "CMP (Comparator)"
|
|
base ad:0x40058000
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "CMPCR0,CMPCR0"
|
|
hexmask.long.word 0x0 16.--31. 1. "PRETECT,PRETECT"
|
|
bitfld.long 0x0 15. "CMPSTS,CMPSTS" "0,1"
|
|
bitfld.long 0x0 14. "CMPWPEN,CMPWPEN" "0,1"
|
|
bitfld.long 0x0 11.--13. "CMPOSEL,CMPOSEL" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 10. "CVRSS,CVRSS" "0,1"
|
|
bitfld.long 0x0 9. "CVROE,CVROE" "0,1"
|
|
bitfld.long 0x0 8. "CVREN,CVREN" "0,1"
|
|
bitfld.long 0x0 7. "SYNCSEL,SYNCSEL" "0,1"
|
|
bitfld.long 0x0 6. "CMPPOL,CMPPOL" "0,1"
|
|
bitfld.long 0x0 4.--5. "CMPINSEL,CMPINSEL" "0,1,2,3"
|
|
bitfld.long 0x0 2.--3. "CMPHM,CMPHM" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 1. "CMPSM,CMPSM" "0,1"
|
|
bitfld.long 0x0 0. "CMPEN,CMPEN" "0,1"
|
|
line.long 0x4 "CMPVALR0,CMPVALR0"
|
|
hexmask.long.byte 0x4 0.--7. 1. "CVRVAL,CVRVAL"
|
|
line.long 0x8 "CMPIER0,CMPIER0"
|
|
bitfld.long 0x8 1. "CMPRIEN,CMPRIEN" "0,1"
|
|
bitfld.long 0x8 0. "CMPFIEN,CMPFIEN" "0,1"
|
|
line.long 0xC "CMPTFR0,CMPTFR0"
|
|
bitfld.long 0xC 9. "CMPRDEN,CMPRDEN" "0,1"
|
|
bitfld.long 0xC 8. "CMPFDEN,CMPFDEN" "0,1"
|
|
bitfld.long 0xC 1. "CMPRF,CMPRF" "0,1"
|
|
bitfld.long 0xC 0. "CMPFF,CMPFF" "0,1"
|
|
group.long 0x100++0xF
|
|
line.long 0x0 "CMPCR1,CMPCR1"
|
|
hexmask.long.word 0x0 16.--31. 1. "PRETECT,PRETECT"
|
|
bitfld.long 0x0 15. "CMPSTS,CMPSTS" "0,1"
|
|
bitfld.long 0x0 14. "CMPWPEN,CMPWPEN" "0,1"
|
|
bitfld.long 0x0 11.--13. "CMPSEL,CMPOSEL" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 10. "CVRSS,CVRSS" "0,1"
|
|
bitfld.long 0x0 9. "CVROE,CVROE" "0,1"
|
|
bitfld.long 0x0 8. "CVREN,CVREN" "0,1"
|
|
bitfld.long 0x0 7. "SYNCSEL,SYNCSEL" "0,1"
|
|
bitfld.long 0x0 6. "CMPPOL,CMPPOL" "0,1"
|
|
bitfld.long 0x0 4.--5. "CMPINSEL,CMPINSEL" "0,1,2,3"
|
|
bitfld.long 0x0 2.--3. "CMPHM,CMPHM" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 1. "CMPSM,CMPSM" "0,1"
|
|
bitfld.long 0x0 0. "CMPEN,CMPEN" "0,1"
|
|
line.long 0x4 "CMPVALR1,CMPVALR1"
|
|
hexmask.long.byte 0x4 0.--7. 1. "CVRVAL,CVRVAL"
|
|
line.long 0x8 "CMPIER1,CMPIER1"
|
|
bitfld.long 0x8 1. "CMPRIEN,CMPRIEN" "0,1"
|
|
bitfld.long 0x8 0. "CMPFIEN,CMPFIEN" "0,1"
|
|
line.long 0xC "CMPTFR1,CMPTFR1"
|
|
bitfld.long 0xC 9. "CMPRDEN,CMPRF" "0,1"
|
|
bitfld.long 0xC 8. "CMPFDEN,CMPFDEN" "0,1"
|
|
bitfld.long 0xC 1. "CMPRF,CMPRF" "0,1"
|
|
bitfld.long 0xC 0. "CMPFF,CMPFF" "0,1"
|
|
tree.end
|
|
tree "CRC (Cyclic Redundancy Check)"
|
|
base ad:0x4008A000
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "CRCCR,CRCCR"
|
|
bitfld.long 0x0 7. "SUMCMPL,SUMCMPL" "0,1"
|
|
bitfld.long 0x0 6. "SUMBYRV,SUMBYRV" "0,1"
|
|
bitfld.long 0x0 5. "SUMBIRV,SUMBIRV" "0,1"
|
|
bitfld.long 0x0 4. "DATCMPL,DATCMPL" "0,1"
|
|
bitfld.long 0x0 3. "DATBYRV,DATBYRV" "0,1"
|
|
bitfld.long 0x0 2. "DATBIRV,DATBIRV" "0,1"
|
|
bitfld.long 0x0 0.--1. "POLY,POLY" "0,1,2,3"
|
|
line.long 0x4 "CRCSDR,CRCSDR"
|
|
hexmask.long 0x4 0.--31. 1. "SEED,SEED"
|
|
line.long 0x8 "CRCCSR,CRCCSR"
|
|
hexmask.long 0x8 0.--31. 1. "CHKSUM,CHKSUM"
|
|
line.long 0xC "CRCDR,CRCDR"
|
|
hexmask.long 0xC 0.--31. 1. "CRCDATA,CRCDATA"
|
|
tree.end
|
|
tree "DIV (Divider)"
|
|
base ad:0x400CA000
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "CR,CR"
|
|
bitfld.long 0x0 3. "COM,COM" "0,1"
|
|
bitfld.long 0x0 2. "ZEF,ZEF" "0,1"
|
|
bitfld.long 0x0 0. "Start,Start" "0,1"
|
|
line.long 0x4 "DDR,DDR"
|
|
hexmask.long 0x4 0.--31. 1. "DDR,DDR"
|
|
line.long 0x8 "DSR,DSR"
|
|
hexmask.long 0x8 0.--31. 1. "DSR,DSR"
|
|
line.long 0xC "QTR,QTR"
|
|
hexmask.long 0xC 0.--31. 1. "QTR,QTR"
|
|
line.long 0x10 "RMR,RMR"
|
|
hexmask.long 0x10 0.--31. 1. "RMR,RMR"
|
|
tree.end
|
|
tree "EBI (External Bus Interface)"
|
|
base ad:0x40098000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "EBICR,EBICR"
|
|
hexmask.long.byte 0x0 28.--31. 1. "IDLET,IDLET"
|
|
bitfld.long 0x0 15. "NOIDLE3,NOIDLE3" "0,1"
|
|
bitfld.long 0x0 14. "NOIDLE2,NOIDLE2" "0,1"
|
|
bitfld.long 0x0 13. "NOIDLE1,NOIDLE1" "0,1"
|
|
bitfld.long 0x0 12. "NOIDLE0,NOIDLE0" "0,1"
|
|
bitfld.long 0x0 11. "BANKEN3,BANKEN3" "0,1"
|
|
bitfld.long 0x0 10. "BANKEN2,BANKEN2" "0,1"
|
|
bitfld.long 0x0 9. "BANKEN1,BANKEN1" "0,1"
|
|
bitfld.long 0x0 8. "BANKEN0,BANKEN0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6.--7. "MODE3,MODE3" "0,1,2,3"
|
|
bitfld.long 0x0 4.--5. "MODE2,MODE2" "0,1,2,3"
|
|
bitfld.long 0x0 2.--3. "MODE1,MODE1" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "MODE0,MODE0" "0,1,2,3"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "EBISR,EBISR"
|
|
bitfld.long 0x0 8. "EBISMRST,EBISMRST" "0,1"
|
|
bitfld.long 0x0 0. "EBIBUSY,EBIBUSY" "0,1"
|
|
group.long 0x10++0xF
|
|
line.long 0x0 "EBIATR,EBIATR"
|
|
bitfld.long 0x0 8.--10. "ADDRHOLD,ADDRHOLD" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 0.--2. "ADDRSETUP,ADDRSETUP" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "EBIRTR,EBIRTR"
|
|
bitfld.long 0x4 16.--18. "RDHOLD,RDHOLD" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x4 8.--12. 1. "RDSTRB,RDSTRB"
|
|
bitfld.long 0x4 0.--2. "RDSETUP,RDSETUP" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "EBIWTR,EBIWTR"
|
|
bitfld.long 0x8 16.--18. "WESWEHOLDRB,WEHOLD" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x8 8.--12. 1. "WESTRB,WESTRB"
|
|
bitfld.long 0x8 0.--2. "WESETUP,WESETUP" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "EBIPR,EBIPR"
|
|
bitfld.long 0xC 3. "ALEPOL,ALEPOL" "0,1"
|
|
bitfld.long 0xC 2. "WEPOL,WEPOL" "0,1"
|
|
bitfld.long 0xC 1. "OEPOL,OEPOL" "0,1"
|
|
bitfld.long 0xC 0. "CSPOL,CSPOL" "0,1"
|
|
tree.end
|
|
tree "EXTI (External Interrupt/Event Controller)"
|
|
base ad:0x40024000
|
|
group.long 0x0++0x5B
|
|
line.long 0x0 "EXTI_CFGR0,EXTI_CFGR0"
|
|
bitfld.long 0x0 31. "DBEN,DBEN" "0,1"
|
|
bitfld.long 0x0 28.--30. "SRCTYPE,SRCTYPE" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x0 0.--15. 1. "DBCNT,DBCNT"
|
|
line.long 0x4 "EXTI_CFGR1,EXTI_CFGR1"
|
|
bitfld.long 0x4 31. "DBEN,DBEN" "0,1"
|
|
bitfld.long 0x4 28.--30. "SRCTYPE,SRCTYPE" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x4 0.--15. 1. "DBCNT,DBCNT"
|
|
line.long 0x8 "EXTI_CFGR2,EXTI_CFGR2"
|
|
bitfld.long 0x8 31. "DBEN,DBEN" "0,1"
|
|
bitfld.long 0x8 28.--30. "SRCTYPE,SRCTYPE" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x8 0.--15. 1. "DBCNT,DBCNT"
|
|
line.long 0xC "EXTI_CFGR3,EXTI_CFGR3"
|
|
bitfld.long 0xC 31. "DBEN,DBEN" "0,1"
|
|
bitfld.long 0xC 28.--30. "SRCTYPE,SRCTYPE" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0xC 0.--15. 1. "DBCNT,DBCNT"
|
|
line.long 0x10 "EXTI_CFGR4,EXTI_CFGR4"
|
|
bitfld.long 0x10 31. "DBEN,DBEN" "0,1"
|
|
bitfld.long 0x10 28.--30. "SRCTYPE,SRCTYPE" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x10 0.--15. 1. "DBCNT,DBCNT"
|
|
line.long 0x14 "EXTI_CFGR5,EXTI_CFGR5"
|
|
bitfld.long 0x14 31. "DBEN,DBEN" "0,1"
|
|
bitfld.long 0x14 28.--30. "SRCTYPE,SRCTYPE" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x14 0.--15. 1. "DBCNT,DBCNT"
|
|
line.long 0x18 "EXTI_CFGR6,EXTI_CFGR6"
|
|
bitfld.long 0x18 31. "DBEN,DBEN" "0,1"
|
|
bitfld.long 0x18 28.--30. "SRCTYPE,SRCTYPE" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x18 0.--15. 1. "DBCNT,DBCNT"
|
|
line.long 0x1C "EXTI_CFGR7,EXTI_CFGR7"
|
|
bitfld.long 0x1C 31. "DBEN,DBEN" "0,1"
|
|
bitfld.long 0x1C 28.--30. "SRCTYPE,SRCTYPE" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x1C 0.--15. 1. "DBCNT,DBCNT"
|
|
line.long 0x20 "EXTI_CFGR8,EXTI_CFGR8"
|
|
bitfld.long 0x20 31. "DBEN,DBEN" "0,1"
|
|
bitfld.long 0x20 28.--30. "SRCTYPE,SRCTYPE" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x20 0.--15. 1. "DBCNT,DBCNT"
|
|
line.long 0x24 "EXTI_CFGR9,EXTI_CFGR9"
|
|
bitfld.long 0x24 31. "DBEN,DBEN" "0,1"
|
|
bitfld.long 0x24 28.--30. "SRCTYPE,SRCTYPE" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x24 0.--15. 1. "DBCNT,DBCNT"
|
|
line.long 0x28 "EXTI_CFGR10,EXTI_CFGR10"
|
|
bitfld.long 0x28 31. "DBEN,DBEN" "0,1"
|
|
bitfld.long 0x28 28.--30. "SRCTYPE,SRCTYPE" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x28 0.--15. 1. "DBCNT,DBCNT"
|
|
line.long 0x2C "EXTI_CFGR11,EXTI_CFGR11"
|
|
bitfld.long 0x2C 31. "DBEN,DBEN" "0,1"
|
|
bitfld.long 0x2C 28.--30. "SRCTYPE,SRCTYPE" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x2C 0.--15. 1. "DBCNT,DBCNT"
|
|
line.long 0x30 "EXTI_CFGR12,EXTI_CFGR12"
|
|
bitfld.long 0x30 31. "DBEN,DBEN" "0,1"
|
|
bitfld.long 0x30 28.--30. "SRCTYPE,SRCTYPE" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x30 0.--15. 1. "DBCNT,DBCNT"
|
|
line.long 0x34 "EXTI_CFGR13,EXTI_CFGR13"
|
|
bitfld.long 0x34 31. "DBEN,DBEN" "0,1"
|
|
bitfld.long 0x34 28.--30. "SRCTYPE,SRCTYPE" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x34 0.--15. 1. "DBCNT,DBCNT"
|
|
line.long 0x38 "EXTI_CFGR14,EXTI_CFGR14"
|
|
bitfld.long 0x38 31. "DBEN,DBEN" "0,1"
|
|
bitfld.long 0x38 28.--30. "SRCTYPE,SRCTYPE" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x38 0.--15. 1. "DBCNT,DBCNT"
|
|
line.long 0x3C "EXTI_CFGR15,EXTI_CFGR15"
|
|
bitfld.long 0x3C 31. "DBEN,DBEN" "0,1"
|
|
bitfld.long 0x3C 28.--30. "SRCTYPE,SRCTYPE" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x3C 0.--15. 1. "DBCNT,DBCNT"
|
|
line.long 0x40 "EXTI_CR,EXTI_CR"
|
|
bitfld.long 0x40 15. "EXTI15EN,EXTI15EN" "0,1"
|
|
bitfld.long 0x40 14. "EXTI14EN,EXTI14EN" "0,1"
|
|
bitfld.long 0x40 13. "EXTI13EN,EXTI13EN" "0,1"
|
|
bitfld.long 0x40 12. "EXTI12EN,EXTI12EN" "0,1"
|
|
bitfld.long 0x40 11. "EXTI11EN,EXTI11EN" "0,1"
|
|
bitfld.long 0x40 10. "EXTI10EN,EXTI10EN" "0,1"
|
|
bitfld.long 0x40 9. "EXTI9EN,EXTI9EN" "0,1"
|
|
bitfld.long 0x40 8. "EXTI8EN,EXTI8EN" "0,1"
|
|
bitfld.long 0x40 7. "EXTI7EN,EXTI7EN" "0,1"
|
|
newline
|
|
bitfld.long 0x40 6. "EXTI6EN,EXTI6EN" "0,1"
|
|
bitfld.long 0x40 5. "EXTI5EN,EXTI5EN" "0,1"
|
|
bitfld.long 0x40 4. "EXTI4EN,EXTI4EN" "0,1"
|
|
bitfld.long 0x40 3. "EXTI3EN,EXTI3EN" "0,1"
|
|
bitfld.long 0x40 2. "EXTI2EN,EXTI2EN" "0,1"
|
|
bitfld.long 0x40 1. "EXTI1EN,EXTI1EN" "0,1"
|
|
bitfld.long 0x40 0. "EXTI0EN,EXTI0EN" "0,1"
|
|
line.long 0x44 "EXTI_EDGEFLGR,EXTI_EDGEFLGR"
|
|
bitfld.long 0x44 15. "EXTI15EDF,EXTI15EDF" "0,1"
|
|
bitfld.long 0x44 14. "EXTI14EDF,EXTI14EDF" "0,1"
|
|
bitfld.long 0x44 13. "EXTI13EDF,EXTI13EDF" "0,1"
|
|
bitfld.long 0x44 12. "EXTI12EDF,EXTI12EDF" "0,1"
|
|
bitfld.long 0x44 11. "EXTI11EDF,EXTI11EDF" "0,1"
|
|
bitfld.long 0x44 10. "EXTI10EDF,EXTI10EDF" "0,1"
|
|
bitfld.long 0x44 9. "EXTI9EDF,EXTI9EDF" "0,1"
|
|
bitfld.long 0x44 8. "EXTI8EDF,EXTI8EDF" "0,1"
|
|
bitfld.long 0x44 7. "EXTI7EDF,EXTI7EDF" "0,1"
|
|
newline
|
|
bitfld.long 0x44 6. "EXTI6EDF,EXTI6EDF" "0,1"
|
|
bitfld.long 0x44 5. "EXTI5EDF,EXTI5EDF" "0,1"
|
|
bitfld.long 0x44 4. "EXTI4EDF,EXTI4EDF" "0,1"
|
|
bitfld.long 0x44 3. "EXTI3EDF,EXTI3EDF" "0,1"
|
|
bitfld.long 0x44 2. "EXTI2EDF,EXTI2EDF" "0,1"
|
|
bitfld.long 0x44 1. "EXTI1EDF,EXTI1EDF" "0,1"
|
|
bitfld.long 0x44 0. "EXTI0EDF,EXTI0EDF" "0,1"
|
|
line.long 0x48 "EXTI_EDGESR,EXTI_EDGESR"
|
|
bitfld.long 0x48 15. "EXTI15EDS,EXTI15EDS" "0,1"
|
|
bitfld.long 0x48 14. "EXTI14EDS,EXTI14EDS" "0,1"
|
|
bitfld.long 0x48 13. "EXTI13EDS,EXTI13EDS" "0,1"
|
|
bitfld.long 0x48 12. "EXTI12EDS,EXTI12EDS" "0,1"
|
|
bitfld.long 0x48 11. "EXTI11EDS,EXTI11EDS" "0,1"
|
|
bitfld.long 0x48 10. "EXTI10EDS,EXTI10EDS" "0,1"
|
|
bitfld.long 0x48 9. "EXTI9EDS,EXTI9EDS" "0,1"
|
|
bitfld.long 0x48 8. "EXTI8EDS,EXTI8EDS" "0,1"
|
|
bitfld.long 0x48 7. "EXTI7EDS,EXTI7EDS" "0,1"
|
|
newline
|
|
bitfld.long 0x48 6. "EXTI6EDS,EXTI6EDS" "0,1"
|
|
bitfld.long 0x48 5. "EXTI5EDS,EXTI5EDS" "0,1"
|
|
bitfld.long 0x48 4. "EXTI4EDS,EXTI4EDS" "0,1"
|
|
bitfld.long 0x48 3. "EXTI3EDS,EXTI3EDS" "0,1"
|
|
bitfld.long 0x48 2. "EXTI2EDS,EXTI2EDS" "0,1"
|
|
bitfld.long 0x48 1. "EXTI1EDS,EXTI1EDS" "0,1"
|
|
bitfld.long 0x48 0. "EXTI0EDS,EXTI0EDS" "0,1"
|
|
line.long 0x4C "EXTI_SSCR,EXTI_SSCR"
|
|
bitfld.long 0x4C 15. "EXTI15SC,EXTI15SC" "0,1"
|
|
bitfld.long 0x4C 14. "EXTI14SC,EXTI14SC" "0,1"
|
|
bitfld.long 0x4C 13. "EXTI13SC,EXTI13SC" "0,1"
|
|
bitfld.long 0x4C 12. "EXTI12SC,EXTI12SC" "0,1"
|
|
bitfld.long 0x4C 11. "EXTI11SC,EXTI11SC" "0,1"
|
|
bitfld.long 0x4C 10. "EXTI10SC,EXTI10SC" "0,1"
|
|
bitfld.long 0x4C 9. "EXTI9SC,EXTI9SC" "0,1"
|
|
bitfld.long 0x4C 8. "EXTI8SC,EXTI8SC" "0,1"
|
|
bitfld.long 0x4C 7. "EXTI7SC,EXTI7SC" "0,1"
|
|
newline
|
|
bitfld.long 0x4C 6. "EXTI6SC,EXTI6SC" "0,1"
|
|
bitfld.long 0x4C 5. "EXTI5SC,EXTI5SC" "0,1"
|
|
bitfld.long 0x4C 4. "EXTI4SC,EXTI4SC" "0,1"
|
|
bitfld.long 0x4C 3. "EXTI3SC,EXTI3SC" "0,1"
|
|
bitfld.long 0x4C 2. "EXTI2SC,EXTI2SC" "0,1"
|
|
bitfld.long 0x4C 1. "EXTI1SC,EXTI1SC" "0,1"
|
|
bitfld.long 0x4C 0. "EXTI0SC,EXTI0SC" "0,1"
|
|
line.long 0x50 "EXTI_WAKUPCR,EXTI_WAKUPCR"
|
|
bitfld.long 0x50 31. "EVWUPIEN,EVWUPIEN" "0,1"
|
|
bitfld.long 0x50 15. "EXTI15WEN,EXTI15WEN" "0,1"
|
|
bitfld.long 0x50 14. "EXTI14WEN,EXTI14WEN" "0,1"
|
|
bitfld.long 0x50 13. "EXTI13WEN,EXTI13WEN" "0,1"
|
|
bitfld.long 0x50 12. "EXTI12WEN,EXTI12WEN" "0,1"
|
|
bitfld.long 0x50 11. "EXTI11WEN,EXTI11WEN" "0,1"
|
|
bitfld.long 0x50 10. "EXTI10WEN,EXTI10WEN" "0,1"
|
|
bitfld.long 0x50 9. "EXTI9WEN,EXTI9WEN" "0,1"
|
|
bitfld.long 0x50 8. "EXTI8WEN,EXTI8WEN" "0,1"
|
|
newline
|
|
bitfld.long 0x50 7. "EXTI7WEN,EXTI7WEN" "0,1"
|
|
bitfld.long 0x50 6. "EXTI6WEN,EXTI6WEN" "0,1"
|
|
bitfld.long 0x50 5. "EXTI5WEN,EXTI5WEN" "0,1"
|
|
bitfld.long 0x50 4. "EXTI4WEN,EXTI4WEN" "0,1"
|
|
bitfld.long 0x50 3. "EXTI3WEN,EXTI3WEN" "0,1"
|
|
bitfld.long 0x50 2. "EXTI2WEN,EXTI2WEN" "0,1"
|
|
bitfld.long 0x50 1. "EXTI1WEN,EXTI1WEN" "0,1"
|
|
bitfld.long 0x50 0. "EXTI0WEN,EXTI0WEN" "0,1"
|
|
line.long 0x54 "EXTI_WAKUPPOLR,EXTI_WAKUPPOLR"
|
|
bitfld.long 0x54 15. "EXTI15WPOL,EXTI15WPOL" "0,1"
|
|
bitfld.long 0x54 14. "EXTI14WPOL,EXTI14WPOL" "0,1"
|
|
bitfld.long 0x54 13. "EXTI13WPOL,EXTI13WPOL" "0,1"
|
|
bitfld.long 0x54 12. "EXTI12WPOL,EXTI12WPOL" "0,1"
|
|
bitfld.long 0x54 11. "EXTI11WPOL,EXTI11WPOL" "0,1"
|
|
bitfld.long 0x54 10. "EXTI10WPOL,EXTI10WPOL" "0,1"
|
|
bitfld.long 0x54 9. "EXTI9WPOL,EXTI9WPOL" "0,1"
|
|
bitfld.long 0x54 8. "EXTI8WPOL,EXTI8WPOL" "0,1"
|
|
bitfld.long 0x54 7. "EXTI7WPOL,EXTI7WPOL" "0,1"
|
|
newline
|
|
bitfld.long 0x54 6. "EXTI6WPOL,EXTI6WPOL" "0,1"
|
|
bitfld.long 0x54 5. "EXTI5WPOL,EXTI5WPOL" "0,1"
|
|
bitfld.long 0x54 4. "EXTI4WPOL,EXTI4WPOL" "0,1"
|
|
bitfld.long 0x54 3. "EXTI3WPOL,EXTI3WPOL" "0,1"
|
|
bitfld.long 0x54 2. "EXTI2WPOL,EXTI2WPOL" "0,1"
|
|
bitfld.long 0x54 1. "EXTI1WPOL,EXTI1WPOL" "0,1"
|
|
bitfld.long 0x54 0. "EXTI0WPOL,EXTI0WPOL" "0,1"
|
|
line.long 0x58 "EXTI_WAKUPFLG,EXTI_WAKUPFLG"
|
|
bitfld.long 0x58 15. "EXTI15WFL,EXTI15WFL" "0,1"
|
|
bitfld.long 0x58 14. "EXTI14WFL,EXTI14WFL" "0,1"
|
|
bitfld.long 0x58 13. "EXTI13WFL,EXTI13WFL" "0,1"
|
|
bitfld.long 0x58 12. "EXTI12WFL,EXTI12WFL" "0,1"
|
|
bitfld.long 0x58 11. "EXTI11WFL,EXTI11WFL" "0,1"
|
|
bitfld.long 0x58 10. "EXTI10WFL,EXTI10WFL" "0,1"
|
|
bitfld.long 0x58 9. "EXTI9WFL,EXTI9WFL" "0,1"
|
|
bitfld.long 0x58 8. "EXTI8WFL,EXTI8WFL" "0,1"
|
|
bitfld.long 0x58 7. "EXTI7WFL,EXTI7WFL" "0,1"
|
|
newline
|
|
bitfld.long 0x58 6. "EXTI6WFL,EXTI6WFL" "0,1"
|
|
bitfld.long 0x58 5. "EXTI5WFL,EXTI5WFL" "0,1"
|
|
bitfld.long 0x58 4. "EXTI4WFL,EXTI4WFL" "0,1"
|
|
bitfld.long 0x58 3. "EXTI3WFL,EXTI3WFL" "0,1"
|
|
bitfld.long 0x58 2. "EXTI2WFL,EXTI2WFL" "0,1"
|
|
bitfld.long 0x58 1. "EXTI1WFL,EXTI1WFL" "0,1"
|
|
bitfld.long 0x58 0. "EXTI0WFL,EXTI0WFL" "0,1"
|
|
tree.end
|
|
tree "FMC (Flash Memory Controller)"
|
|
base ad:0x40080000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "TADR,TADR"
|
|
hexmask.long 0x0 0.--31. 1. "TADB,TADB"
|
|
line.long 0x4 "WRDR,WRDR"
|
|
hexmask.long 0x4 0.--31. 1. "WRDB,WRDB"
|
|
group.long 0xC++0xF
|
|
line.long 0x0 "OCMR,OCMR"
|
|
hexmask.long.byte 0x0 0.--3. 1. "CMD,CMD"
|
|
line.long 0x4 "OPCR,OPCR"
|
|
hexmask.long.byte 0x4 1.--4. 1. "OPM,OPM"
|
|
line.long 0x8 "OIER,OIER"
|
|
bitfld.long 0x8 4. "OREIEN,OREIEN" "0,1"
|
|
bitfld.long 0x8 3. "IOCMIEN,IOCMIEN" "0,1"
|
|
bitfld.long 0x8 2. "OBEIEN,OBEIEN" "0,1"
|
|
bitfld.long 0x8 1. "ITADIEN,ITADIEN" "0,1"
|
|
bitfld.long 0x8 0. "ORFIEN,ORFIEN" "0,1"
|
|
line.long 0xC "OISR,OISR"
|
|
bitfld.long 0xC 17. "PPEF,PPEF" "0,1"
|
|
bitfld.long 0xC 16. "RORFF,RORFF" "0,1"
|
|
bitfld.long 0xC 4. "OREF,OREF" "0,1"
|
|
bitfld.long 0xC 3. "IOCMF,IOCMF" "0,1"
|
|
bitfld.long 0xC 2. "OBEF,OBEF" "0,1"
|
|
bitfld.long 0xC 1. "ITADF,ITADF" "0,1"
|
|
bitfld.long 0xC 0. "ORFF,ORFF" "0,1"
|
|
group.long 0x20++0x13
|
|
line.long 0x0 "PPSR0,PPSR0"
|
|
hexmask.long 0x0 0.--31. 1. "PPSB,PPSB"
|
|
line.long 0x4 "PPSR1,PPSR1"
|
|
hexmask.long 0x4 0.--31. 1. "PPSB,PPSB"
|
|
line.long 0x8 "PPSR2,PPSR2"
|
|
hexmask.long 0x8 0.--31. 1. "PPSB,PPSB"
|
|
line.long 0xC "PPSR3,PPSR3"
|
|
hexmask.long 0xC 0.--31. 1. "PPSB,PPSB"
|
|
line.long 0x10 "CPSR,CPSR"
|
|
bitfld.long 0x10 1. "OBPSB,OBPSB" "0,1"
|
|
bitfld.long 0x10 0. "CPSB,CPSB" "0,1"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "VMCR,VMCR"
|
|
bitfld.long 0x0 1. "VMCB,VMCB" "0,1"
|
|
group.long 0x180++0xF
|
|
line.long 0x0 "MDID,MDID"
|
|
hexmask.long.word 0x0 16.--31. 1. "MFID,MFID"
|
|
hexmask.long.word 0x0 0.--15. 1. "ChipID,ChipID"
|
|
line.long 0x4 "PNSR,PNSR"
|
|
hexmask.long 0x4 0.--31. 1. "PNSB,PNSB"
|
|
line.long 0x8 "PSSR,PSSR"
|
|
hexmask.long 0x8 0.--31. 1. "PSSB,PSSB"
|
|
line.long 0xC "DIDR,DIDR"
|
|
hexmask.long.tbyte 0xC 0.--19. 1. "ChipID,ChipID"
|
|
group.long 0x200++0x3
|
|
line.long 0x0 "CFCR,CFCR"
|
|
bitfld.long 0x0 4. "PFBE,PFBE" "0,1"
|
|
bitfld.long 0x0 0.--2. "WAIT,WAIT" "0,1,2,3,4,5,6,7"
|
|
group.long 0x310++0xF
|
|
line.long 0x0 "CIDR0,CIDR0"
|
|
hexmask.long 0x0 0.--31. 1. "UID,CIUIDD"
|
|
line.long 0x4 "CIDR1,CIDR1"
|
|
hexmask.long 0x4 0.--31. 1. "UID,UID"
|
|
line.long 0x8 "CIDR2,CIDR2"
|
|
hexmask.long 0x8 0.--31. 1. "UID,UID"
|
|
line.long 0xC "CIDR,CIDR"
|
|
hexmask.long 0xC 0.--31. 1. "CID,CID"
|
|
tree.end
|
|
tree "GPIO (General Purpose I/O)"
|
|
base ad:0x0
|
|
tree "GPIOA"
|
|
base ad:0x400B0000
|
|
group.long 0x0++0x2B
|
|
line.long 0x0 "PADIRCR,PADIRCR"
|
|
hexmask.long.word 0x0 0.--15. 1. "PADIR,PADIR"
|
|
line.long 0x4 "PAINER,PAINER"
|
|
hexmask.long.word 0x4 0.--15. 1. "PAINEN,PAINEN"
|
|
line.long 0x8 "PAPUR,PAPUR"
|
|
hexmask.long.word 0x8 0.--15. 1. "PAPU,PAPU"
|
|
line.long 0xC "PAPDR,PAPDR"
|
|
hexmask.long.word 0xC 0.--15. 1. "PAPD,PAPD"
|
|
line.long 0x10 "PAODR,PAODR"
|
|
hexmask.long.word 0x10 0.--15. 1. "PAOD,PAOD"
|
|
line.long 0x14 "PADRVR,PADRVR"
|
|
bitfld.long 0x14 30.--31. "PADV15,PADV15" "0,1,2,3"
|
|
bitfld.long 0x14 28.--29. "PADV14,PADV14" "0,1,2,3"
|
|
bitfld.long 0x14 26.--27. "PADV13,PADV13" "0,1,2,3"
|
|
bitfld.long 0x14 24.--25. "PADV12,PADV12" "0,1,2,3"
|
|
bitfld.long 0x14 22.--23. "PADV11,PADV11" "0,1,2,3"
|
|
bitfld.long 0x14 20.--21. "PADV10,PADV10" "0,1,2,3"
|
|
bitfld.long 0x14 18.--19. "PADV9,PADV9" "0,1,2,3"
|
|
bitfld.long 0x14 16.--17. "PADV8,PADV8" "0,1,2,3"
|
|
bitfld.long 0x14 14.--15. "PADV7,PADV7" "0,1,2,3"
|
|
bitfld.long 0x14 12.--13. "PADV6,PADV6" "0,1,2,3"
|
|
bitfld.long 0x14 10.--11. "PADV5,PADV5" "0,1,2,3"
|
|
bitfld.long 0x14 8.--9. "PADV4,PADV4" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x14 6.--7. "PADV3,PADV3" "0,1,2,3"
|
|
bitfld.long 0x14 4.--5. "PADV2,PADV2" "0,1,2,3"
|
|
bitfld.long 0x14 2.--3. "PADV1,PADV1" "0,1,2,3"
|
|
bitfld.long 0x14 0.--1. "PADV0,PADV0" "0,1,2,3"
|
|
line.long 0x18 "PALOCKR,PALOCKR"
|
|
hexmask.long.word 0x18 16.--31. 1. "PALKEY,PALKEY"
|
|
hexmask.long.word 0x18 0.--15. 1. "PALOCK,PALOCK"
|
|
line.long 0x1C "PADINR,PADINR"
|
|
hexmask.long.word 0x1C 0.--15. 1. "PADIN,PADIN"
|
|
line.long 0x20 "PADOUTR,PADOUTR"
|
|
hexmask.long.word 0x20 0.--15. 1. "PADOUT,PADOUT"
|
|
line.long 0x24 "PASRR,PASRR"
|
|
hexmask.long.word 0x24 16.--31. 1. "PARST,PARST"
|
|
hexmask.long.word 0x24 0.--15. 1. "PASET,PASET"
|
|
line.long 0x28 "PARR,PARR"
|
|
hexmask.long.word 0x28 0.--15. 1. "PARST,PARST"
|
|
tree.end
|
|
tree "GPIOB"
|
|
base ad:0x400B2000
|
|
group.long 0x0++0x2B
|
|
line.long 0x0 "PBDIRCR,PBDIRCR"
|
|
hexmask.long.word 0x0 0.--15. 1. "PBDIR,PBDIR"
|
|
line.long 0x4 "PBINER,PBINER"
|
|
hexmask.long.word 0x4 0.--15. 1. "PBINEN,PBINEN"
|
|
line.long 0x8 "PBPUR,PBPUR"
|
|
hexmask.long.word 0x8 0.--15. 1. "PBPU,PBPU"
|
|
line.long 0xC "PBPDR,PBPDR"
|
|
hexmask.long.word 0xC 0.--15. 1. "PBPD,PBPD"
|
|
line.long 0x10 "PBODR,PBODR"
|
|
hexmask.long.word 0x10 0.--15. 1. "PBOD,PBOD"
|
|
line.long 0x14 "PBDRVR,PBDRVR"
|
|
bitfld.long 0x14 30.--31. "PBDV15,PBDV15" "0,1,2,3"
|
|
bitfld.long 0x14 28.--29. "PBDV14,PBDV14" "0,1,2,3"
|
|
bitfld.long 0x14 26.--27. "PBDV13,PBDV13" "0,1,2,3"
|
|
bitfld.long 0x14 24.--25. "PBDV12,PBDV12" "0,1,2,3"
|
|
bitfld.long 0x14 22.--23. "PBDV11,PBDV11" "0,1,2,3"
|
|
bitfld.long 0x14 20.--21. "PBDV10,PBDV10" "0,1,2,3"
|
|
bitfld.long 0x14 18.--19. "PBDV9,PBDV9" "0,1,2,3"
|
|
bitfld.long 0x14 16.--17. "PBDV8,PBDV8" "0,1,2,3"
|
|
bitfld.long 0x14 14.--15. "PBDV7,PBDV7" "0,1,2,3"
|
|
bitfld.long 0x14 12.--13. "PBDV6,PBDV6" "0,1,2,3"
|
|
bitfld.long 0x14 10.--11. "PBDV5,PBDV5" "0,1,2,3"
|
|
bitfld.long 0x14 8.--9. "PBDV4,PBDV4" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x14 6.--7. "PBDV3,PBDV3" "0,1,2,3"
|
|
bitfld.long 0x14 4.--5. "PBDV2,PBDV2" "0,1,2,3"
|
|
bitfld.long 0x14 2.--3. "PBDV1,PBDV1" "0,1,2,3"
|
|
bitfld.long 0x14 0.--1. "PBDV0,PBDV0" "0,1,2,3"
|
|
line.long 0x18 "PBLOCKR,PBLOCKR"
|
|
hexmask.long.word 0x18 16.--31. 1. "PBLKEY,PBLKEY"
|
|
hexmask.long.word 0x18 0.--15. 1. "PBLOCK,PBLOCK"
|
|
line.long 0x1C "PBDINR,PBDINR"
|
|
hexmask.long.word 0x1C 0.--15. 1. "PBDIN,PBDIN"
|
|
line.long 0x20 "PBDOUTR,PBDOUTR"
|
|
hexmask.long.word 0x20 0.--15. 1. "PBDOUT,PBDOUT"
|
|
line.long 0x24 "PBSRR,PBSRR"
|
|
hexmask.long.word 0x24 16.--31. 1. "PBRST,PBRST"
|
|
hexmask.long.word 0x24 0.--15. 1. "PBSET,PBSET"
|
|
line.long 0x28 "PBRR,PBRR"
|
|
hexmask.long.word 0x28 0.--15. 1. "PBRST,PBRST"
|
|
tree.end
|
|
tree "GPIOC"
|
|
base ad:0x400B4000
|
|
group.long 0x0++0x2B
|
|
line.long 0x0 "PCDIRCR,PCDIRCR"
|
|
hexmask.long.word 0x0 0.--15. 1. "PCDIR,PCDIR"
|
|
line.long 0x4 "PCINER,PCINER"
|
|
hexmask.long.word 0x4 0.--15. 1. "PCINEN,PCINEN"
|
|
line.long 0x8 "PCPUR,PCPUR"
|
|
hexmask.long.word 0x8 0.--15. 1. "PCPU,PCPU"
|
|
line.long 0xC "PCPDR,PCPDR"
|
|
hexmask.long.word 0xC 0.--15. 1. "PCPD,PCPD"
|
|
line.long 0x10 "PCODR,PCODR"
|
|
hexmask.long.word 0x10 0.--15. 1. "PCOD,PCOD"
|
|
line.long 0x14 "PCDRVR,PCDRVR"
|
|
bitfld.long 0x14 30.--31. "PCDV15,PCDV15" "0,1,2,3"
|
|
bitfld.long 0x14 28.--29. "PCDV14,PCDV14" "0,1,2,3"
|
|
bitfld.long 0x14 26.--27. "PCDV13,PCDV13" "0,1,2,3"
|
|
bitfld.long 0x14 24.--25. "PCDV12,PCDV12" "0,1,2,3"
|
|
bitfld.long 0x14 22.--23. "PCDV11,PCDV11" "0,1,2,3"
|
|
bitfld.long 0x14 20.--21. "PCDV10,PCDV10" "0,1,2,3"
|
|
bitfld.long 0x14 18.--19. "PCDV9,PCDV9" "0,1,2,3"
|
|
bitfld.long 0x14 16.--17. "PCDV8,PCDV8" "0,1,2,3"
|
|
bitfld.long 0x14 14.--15. "PCDV7,PCDV7" "0,1,2,3"
|
|
bitfld.long 0x14 12.--13. "PCDV6,PCDV6" "0,1,2,3"
|
|
bitfld.long 0x14 10.--11. "PCDV5,PCDV5" "0,1,2,3"
|
|
bitfld.long 0x14 8.--9. "PCDV4,PCDV4" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x14 6.--7. "PCDV3,PCDV3" "0,1,2,3"
|
|
bitfld.long 0x14 4.--5. "PCDV2,PCDV2" "0,1,2,3"
|
|
bitfld.long 0x14 2.--3. "PCDV1,PCDV1" "0,1,2,3"
|
|
bitfld.long 0x14 0.--1. "PCDV0,PCDV0" "0,1,2,3"
|
|
line.long 0x18 "PCLOCKR,PCLOCKR"
|
|
hexmask.long.word 0x18 16.--31. 1. "PCLKEY,PCLKEY"
|
|
hexmask.long.word 0x18 0.--15. 1. "PCLOCK,PCLOCK"
|
|
line.long 0x1C "PCDINR,PCDINR"
|
|
hexmask.long.word 0x1C 0.--15. 1. "PCDIN,PCDIN"
|
|
line.long 0x20 "PCDOUTR,PCDOUTR"
|
|
hexmask.long.word 0x20 0.--15. 1. "PCDOUT,PCDOUT"
|
|
line.long 0x24 "PCSRR,PCSRR"
|
|
hexmask.long.word 0x24 16.--31. 1. "PCRST,PCRST"
|
|
hexmask.long.word 0x24 0.--15. 1. "PCSET,PCSET"
|
|
line.long 0x28 "PCRR,PCRR"
|
|
hexmask.long.word 0x28 0.--15. 1. "PCRST,PCRST"
|
|
tree.end
|
|
tree "GPIOD"
|
|
base ad:0x400B6000
|
|
group.long 0x0++0x2B
|
|
line.long 0x0 "PDDIRCR,PDDIRCR"
|
|
hexmask.long.byte 0x0 0.--5. 1. "PDDIR,PDDIR"
|
|
line.long 0x4 "PDINER,PDINER"
|
|
hexmask.long.byte 0x4 0.--5. 1. "PDINEN,PDINEN"
|
|
line.long 0x8 "PDPUR,PDPUR"
|
|
hexmask.long.byte 0x8 0.--5. 1. "PDPU,PDPU"
|
|
line.long 0xC "PDPDR,PDPDR"
|
|
hexmask.long.byte 0xC 0.--5. 1. "PDPD,PDPD"
|
|
line.long 0x10 "PDODR,PDODR"
|
|
hexmask.long.byte 0x10 0.--5. 1. "PDOD,PDOD"
|
|
line.long 0x14 "PDDRVR,PDDRVR"
|
|
bitfld.long 0x14 10.--11. "PDDV5,PDDV5" "0,1,2,3"
|
|
bitfld.long 0x14 8.--9. "PDDV4,PDDV4" "0,1,2,3"
|
|
bitfld.long 0x14 6.--7. "PDDV3,PDDV3" "0,1,2,3"
|
|
bitfld.long 0x14 4.--5. "PDDV2,PDDV2" "0,1,2,3"
|
|
bitfld.long 0x14 2.--3. "PDDV1,PDDV1" "0,1,2,3"
|
|
bitfld.long 0x14 0.--1. "PDDV0,PDDV0" "0,1,2,3"
|
|
line.long 0x18 "PDLOCKR,PDLOCKR"
|
|
hexmask.long.word 0x18 16.--31. 1. "PDLKEY,PDLKEY"
|
|
hexmask.long.byte 0x18 0.--5. 1. "PDLOCK,PDLOCK"
|
|
line.long 0x1C "PDDINR,PDDINR"
|
|
hexmask.long.byte 0x1C 0.--5. 1. "PDDIN,PDDIN"
|
|
line.long 0x20 "PDDOUTR,PDDOUTR"
|
|
hexmask.long.byte 0x20 0.--5. 1. "PDDOUT,PDDOUT"
|
|
line.long 0x24 "PDSRR,PDSRR"
|
|
hexmask.long.byte 0x24 16.--21. 1. "PDRST,PDRST"
|
|
hexmask.long.byte 0x24 0.--5. 1. "PDSET,PDSET"
|
|
line.long 0x28 "PDRR,PDRR"
|
|
hexmask.long.byte 0x28 0.--5. 1. "PDRST,PDRST"
|
|
tree.end
|
|
tree.end
|
|
tree "GPTM (General Purpose Timer)"
|
|
base ad:0x4006E000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CNTCFR,CNTCFR"
|
|
bitfld.long 0x0 24. "DIR,DIR" "0,1"
|
|
bitfld.long 0x0 16.--17. "CMSEL,CMSEL" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "CKDIV,CKDIV" "0,1,2,3"
|
|
bitfld.long 0x0 1. "UGDIS,UGDIS" "0,1"
|
|
bitfld.long 0x0 0. "UEVDIS,UEVDIS" "0,1"
|
|
line.long 0x4 "MDCFR,MDCFR"
|
|
bitfld.long 0x4 24. "SPMSET,SPMSET" "0,1"
|
|
bitfld.long 0x4 16.--18. "MMSEL,MMSEL" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 8.--10. "SMSEL,SMSEL" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 0. "TSE,TSE" "0,1"
|
|
line.long 0x8 "TRCFR,TRCFR"
|
|
hexmask.long.byte 0x8 0.--3. 1. "TRSEL,TRSEL"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "CTR,CTR"
|
|
bitfld.long 0x0 16. "CHCCDS,CHCCDS" "0,1"
|
|
bitfld.long 0x0 1. "CRBE,CRBE" "0,1"
|
|
bitfld.long 0x0 0. "TME,TME" "0,1"
|
|
group.long 0x20++0xF
|
|
line.long 0x0 "CH0ICFR,CH0ICFR"
|
|
bitfld.long 0x0 31. "TI0SRC,TI0SRC" "0,1"
|
|
bitfld.long 0x0 18.--19. "CH0PSC,CH0PSC" "0,1,2,3"
|
|
bitfld.long 0x0 16.--17. "CH0CCS,CH0CCS" "0,1,2,3"
|
|
hexmask.long.byte 0x0 0.--3. 1. "TI0F,TI0F"
|
|
line.long 0x4 "CH1ICFR,CH1ICFR"
|
|
bitfld.long 0x4 18.--19. "CH1PSC,CH1PSC" "0,1,2,3"
|
|
bitfld.long 0x4 16.--17. "CH1CCS,CH1CCS" "0,1,2,3"
|
|
hexmask.long.byte 0x4 0.--3. 1. "TI1F,TI1F"
|
|
line.long 0x8 "CH2ICFR,CH2ICFR"
|
|
bitfld.long 0x8 18.--19. "CH2PSC,CH2PSC" "0,1,2,3"
|
|
bitfld.long 0x8 16.--17. "CH2CCS,CH2CCS" "0,1,2,3"
|
|
hexmask.long.byte 0x8 0.--3. 1. "TI2F,TI2F"
|
|
line.long 0xC "CH3ICFR,CH3ICFR"
|
|
bitfld.long 0xC 18.--19. "CH3PSC,CH3PSC" "0,1,2,3"
|
|
bitfld.long 0xC 16.--17. "CH3CCS,CH3CCS" "0,1,2,3"
|
|
hexmask.long.byte 0xC 0.--3. 1. "TI3F,TI3F"
|
|
group.long 0x40++0x17
|
|
line.long 0x0 "CH0OCFR,CH0OCFR"
|
|
bitfld.long 0x0 8. "CH0OM3,CH0OM3" "0,1"
|
|
bitfld.long 0x0 5. "CH0IMAE,CH0IMAE" "0,1"
|
|
bitfld.long 0x0 4. "CH0PRE,CH0PRE" "0,1"
|
|
bitfld.long 0x0 0.--2. "CH0OM20,CH0OM20" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "CH1OCFR,CH1OCFR"
|
|
bitfld.long 0x4 8. "CH1OM3,CH1OM3" "0,1"
|
|
bitfld.long 0x4 5. "CH1IMAE,CH1IMAE" "0,1"
|
|
bitfld.long 0x4 4. "CH1PRE,CH1PRE" "0,1"
|
|
bitfld.long 0x4 0.--2. "CH1OM20,CH1OM20" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "CH2OCFR,CH2OCFR"
|
|
bitfld.long 0x8 8. "CH2OM3,CH2OM3" "0,1"
|
|
bitfld.long 0x8 5. "CH2IMAE,CH2IMAE" "0,1"
|
|
bitfld.long 0x8 4. "CH2PRE,CH2PRE" "0,1"
|
|
bitfld.long 0x8 0.--2. "CH2OM20,CH2OM20" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "CH3OCFR,CH3OCFR"
|
|
bitfld.long 0xC 8. "CH3OM3,CH3OM3" "0,1"
|
|
bitfld.long 0xC 5. "CH3IMAE,CH3IMAE" "0,1"
|
|
bitfld.long 0xC 4. "CH3PRE,CH3PRE" "0,1"
|
|
bitfld.long 0xC 0.--2. "CH3OM20,CH3OM20" "0,1,2,3,4,5,6,7"
|
|
line.long 0x10 "CHCTR,CHCTR"
|
|
bitfld.long 0x10 6. "CH3E,CH3E" "0,1"
|
|
bitfld.long 0x10 4. "CH2E,CH2E" "0,1"
|
|
bitfld.long 0x10 2. "CH1E,CH1E" "0,1"
|
|
bitfld.long 0x10 0. "CH0E,CH0E" "0,1"
|
|
line.long 0x14 "CHPOLR,CHPOLR"
|
|
bitfld.long 0x14 6. "CH3P,CH3P" "0,1"
|
|
bitfld.long 0x14 4. "CH2P,CH2P" "0,1"
|
|
bitfld.long 0x14 2. "CH1P,CH1P" "0,1"
|
|
bitfld.long 0x14 0. "CH0P,CH0P" "0,1"
|
|
group.long 0x74++0x17
|
|
line.long 0x0 "DICTR,DICTR"
|
|
bitfld.long 0x0 26. "TEVDE,TEVDE" "0,1"
|
|
bitfld.long 0x0 24. "UEVDE,UEVDE" "0,1"
|
|
bitfld.long 0x0 19. "CH3CCDE,CH3CCDE" "0,1"
|
|
bitfld.long 0x0 18. "CH2CCDE,CH2CCDE" "0,1"
|
|
bitfld.long 0x0 17. "CH1CCDE,CH1CCDE" "0,1"
|
|
bitfld.long 0x0 16. "CH0CCDE,CH0CCDE" "0,1"
|
|
bitfld.long 0x0 10. "TEVIE,TEVIE" "0,1"
|
|
bitfld.long 0x0 8. "UEVIE,UEVIE" "0,1"
|
|
bitfld.long 0x0 3. "CH3CCIE,CH3CCIE" "0,1"
|
|
bitfld.long 0x0 2. "CH2CCIE,CH2CCIE" "0,1"
|
|
bitfld.long 0x0 1. "CH1CCIE,CH1CCIE" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "CH0CCIE,CH0CCIE" "0,1"
|
|
line.long 0x4 "EVGR,EVGR"
|
|
bitfld.long 0x4 10. "TEVG,TEVG" "0,1"
|
|
bitfld.long 0x4 8. "UEVG,UEVG" "0,1"
|
|
bitfld.long 0x4 3. "CH3CCG,CH3CCG" "0,1"
|
|
bitfld.long 0x4 2. "CH2CCG,CH2CCG" "0,1"
|
|
bitfld.long 0x4 1. "CH1CCG,CH1CCG" "0,1"
|
|
bitfld.long 0x4 0. "CH0CCG,CH0CCG" "0,1"
|
|
line.long 0x8 "INTSR,INTSR"
|
|
bitfld.long 0x8 10. "TEVIF,TEVIF" "0,1"
|
|
bitfld.long 0x8 8. "UEVIF,UEVIF" "0,1"
|
|
bitfld.long 0x8 7. "CH3OCF,CH3OCF" "0,1"
|
|
bitfld.long 0x8 6. "CH2OCF,CH2OCF" "0,1"
|
|
bitfld.long 0x8 5. "CH1OCF,CH1OCF" "0,1"
|
|
bitfld.long 0x8 4. "CH0OCF,CH0OCF" "0,1"
|
|
bitfld.long 0x8 3. "CH3CCIF,CH3CCIF" "0,1"
|
|
bitfld.long 0x8 2. "CH2CCIF,CH2CCIF" "0,1"
|
|
bitfld.long 0x8 1. "CH1CCIF,CH1CCIF" "0,1"
|
|
bitfld.long 0x8 0. "CH0CCIF,CH0CCIF" "0,1"
|
|
line.long 0xC "CNTR,CNTR"
|
|
hexmask.long.word 0xC 0.--15. 1. "CNTV,CNTV"
|
|
line.long 0x10 "PSCR,PSCR"
|
|
hexmask.long.word 0x10 0.--15. 1. "PSCV,PSCV"
|
|
line.long 0x14 "CRR,CRR"
|
|
hexmask.long.word 0x14 0.--15. 1. "CRV,CRV"
|
|
group.long 0x90++0x1F
|
|
line.long 0x0 "CH0CCR,CH0CCR"
|
|
hexmask.long.word 0x0 0.--15. 1. "CH0CCV,CH0CCV"
|
|
line.long 0x4 "CH1CCR,CH1CCR"
|
|
hexmask.long.word 0x4 0.--15. 1. "CH1CCV,CH1CCV"
|
|
line.long 0x8 "CH2CCR,CH2CCR"
|
|
hexmask.long.word 0x8 0.--15. 1. "CH2CCV,CH2CCV"
|
|
line.long 0xC "CH3CCR,CH3CCR"
|
|
hexmask.long.word 0xC 0.--15. 1. "CH3CCV,CH3CCV"
|
|
line.long 0x10 "CH0ACR,CH0ACR"
|
|
hexmask.long.word 0x10 0.--15. 1. "CH0ACV,CH0ACV"
|
|
line.long 0x14 "CH1ACR,CH1ACR"
|
|
hexmask.long.word 0x14 0.--15. 1. "CH1ACV,CH1ACV"
|
|
line.long 0x18 "CH2ACR,CH2ACR"
|
|
hexmask.long.word 0x18 0.--15. 1. "CH2ACV,CH2ACV"
|
|
line.long 0x1C "CH3ACR,CH3ACR"
|
|
hexmask.long.word 0x1C 0.--15. 1. "CH3ACV,CH3ACV"
|
|
tree.end
|
|
tree "I2C (Inter Integrated Circuit)"
|
|
base ad:0x0
|
|
tree "I2C0"
|
|
base ad:0x40048000
|
|
group.long 0x0++0x2B
|
|
line.long 0x0 "I2CCR,I2CCR"
|
|
bitfld.long 0x0 14.--15. "SEQFILTER,SEQFILTER" "0,1,2,3"
|
|
bitfld.long 0x0 13. "COMBFILTEREN,COMBFILTEREN" "0,1"
|
|
bitfld.long 0x0 12. "ENTOUT,ENTOUT" "0,1"
|
|
bitfld.long 0x0 10. "DMANACK,DMANACK" "0,1"
|
|
bitfld.long 0x0 9. "RXDMAE,RXDMAE" "0,1"
|
|
bitfld.long 0x0 8. "TXDMAE,TXDMAE" "0,1"
|
|
bitfld.long 0x0 7. "ADRM,ADRM" "0,1"
|
|
bitfld.long 0x0 3. "I2CEN,I2CEN" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "GCEN,GCEN" "0,1"
|
|
bitfld.long 0x0 1. "STOP,STOP" "0,1"
|
|
bitfld.long 0x0 0. "AA,AA" "0,1"
|
|
line.long 0x4 "I2CIER,I2CIER"
|
|
bitfld.long 0x4 18. "RXBFIE,RXBFIE" "0,1"
|
|
bitfld.long 0x4 17. "TXDEIE,TXDEIE" "0,1"
|
|
bitfld.long 0x4 16. "RXDNEIE,RXDNEIE" "0,1"
|
|
bitfld.long 0x4 11. "TOUTIE,TOUTIE" "0,1"
|
|
bitfld.long 0x4 10. "BUSERRIE,BUSERRIE" "0,1"
|
|
bitfld.long 0x4 9. "RXNACKIE,RXNACKIE" "0,1"
|
|
bitfld.long 0x4 8. "ARBLOSIE,ARBLOSIE" "0,1"
|
|
bitfld.long 0x4 3. "GCSIE,GCSIE" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "ADRSIE,ADRSIE" "0,1"
|
|
bitfld.long 0x4 1. "STOIE,STOIE" "0,1"
|
|
bitfld.long 0x4 0. "STAIE,STAIE" "0,1"
|
|
line.long 0x8 "I2CADDR,I2CADDR"
|
|
hexmask.long.word 0x8 0.--9. 1. "ADDR,ADDR"
|
|
line.long 0xC "I2CSR,I2CSR"
|
|
bitfld.long 0xC 21. "TXNRX,TXNRX" "0,1"
|
|
bitfld.long 0xC 20. "MASTER,MASTER" "0,1"
|
|
bitfld.long 0xC 19. "BUSBUSY,BUSBUSY" "0,1"
|
|
bitfld.long 0xC 18. "RXBF,RXBF" "0,1"
|
|
bitfld.long 0xC 17. "TXDE,TXDE" "0,1"
|
|
bitfld.long 0xC 16. "RXDNE,RXDNE" "0,1"
|
|
bitfld.long 0xC 11. "TOUTF,TOUTF" "0,1"
|
|
bitfld.long 0xC 10. "BUSERR,BUSERR" "0,1"
|
|
newline
|
|
bitfld.long 0xC 9. "RXNACK,RXNACK" "0,1"
|
|
bitfld.long 0xC 8. "ARBLOS,ARBLOS" "0,1"
|
|
bitfld.long 0xC 3. "GCS,GCS" "0,1"
|
|
bitfld.long 0xC 2. "ADRS,ADRS" "0,1"
|
|
bitfld.long 0xC 1. "STO,STO" "0,1"
|
|
bitfld.long 0xC 0. "STA,STA" "0,1"
|
|
line.long 0x10 "I2CSHPGR,I2CSHPGR"
|
|
hexmask.long.word 0x10 0.--15. 1. "SHPG,SHPG"
|
|
line.long 0x14 "I2CSLPGR,I2CSLPGR"
|
|
hexmask.long.word 0x14 0.--15. 1. "SLPG,SLPG"
|
|
line.long 0x18 "I2CDR,I2CDR"
|
|
hexmask.long.byte 0x18 0.--7. 1. "DATA,DATA"
|
|
line.long 0x1C "I2CTAR,I2CTAR"
|
|
bitfld.long 0x1C 10. "RWD,RWD" "0,1"
|
|
hexmask.long.word 0x1C 0.--9. 1. "TAR,TAR"
|
|
line.long 0x20 "I2CADDMR,I2CADDMR"
|
|
hexmask.long.word 0x20 0.--9. 1. "ADDMR,ADDMR"
|
|
line.long 0x24 "I2CADDSR,I2CADDSR"
|
|
hexmask.long.word 0x24 0.--9. 1. "ADDSR,ADDSR"
|
|
line.long 0x28 "I2CTOUT,I2CTOUT"
|
|
bitfld.long 0x28 16.--18. "PSC,PSC" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x28 0.--15. 1. "TOUT,TOUT"
|
|
tree.end
|
|
tree "I2C1"
|
|
base ad:0x40049000
|
|
group.long 0x0++0x2B
|
|
line.long 0x0 "I2CCR,I2CCR"
|
|
bitfld.long 0x0 14.--15. "SEQFILTER,SEQFILTER" "0,1,2,3"
|
|
bitfld.long 0x0 13. "COMBFILTEREN,COMBFILTEREN" "0,1"
|
|
bitfld.long 0x0 12. "ENTOUT,ENTOUT" "0,1"
|
|
bitfld.long 0x0 10. "DMANACK,DMANACK" "0,1"
|
|
bitfld.long 0x0 9. "RXDMAE,RXDMAE" "0,1"
|
|
bitfld.long 0x0 8. "TXDMAE,TXDMAE" "0,1"
|
|
bitfld.long 0x0 7. "ADRM,ADRM" "0,1"
|
|
bitfld.long 0x0 3. "I2CEN,I2CEN" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "GCEN,GCEN" "0,1"
|
|
bitfld.long 0x0 1. "STOP,STOP" "0,1"
|
|
bitfld.long 0x0 0. "AA,AA" "0,1"
|
|
line.long 0x4 "I2CIER,I2CIER"
|
|
bitfld.long 0x4 18. "RXBFIE,RXBFIE" "0,1"
|
|
bitfld.long 0x4 17. "TXDEIE,TXDEIE" "0,1"
|
|
bitfld.long 0x4 16. "RXDNEIE,RXDNEIE" "0,1"
|
|
bitfld.long 0x4 11. "TOUTIE,TOUTIE" "0,1"
|
|
bitfld.long 0x4 10. "BUSERRIE,BUSERRIE" "0,1"
|
|
bitfld.long 0x4 9. "RXNACKIE,RXNACKIE" "0,1"
|
|
bitfld.long 0x4 8. "ARBLOSIE,ARBLOSIE" "0,1"
|
|
bitfld.long 0x4 3. "GCSIE,GCSIE" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "ADRSIE,ADRSIE" "0,1"
|
|
bitfld.long 0x4 1. "STOIE,STOIE" "0,1"
|
|
bitfld.long 0x4 0. "STAIE,STAIE" "0,1"
|
|
line.long 0x8 "I2CADDR,I2CADDR"
|
|
hexmask.long.word 0x8 0.--9. 1. "ADDR,ADDR"
|
|
line.long 0xC "I2CSR,I2CSR"
|
|
bitfld.long 0xC 21. "TXNRX,TXNRX" "0,1"
|
|
bitfld.long 0xC 20. "MASTER,MASTER" "0,1"
|
|
bitfld.long 0xC 19. "BUSBUSY,BUSBUSY" "0,1"
|
|
bitfld.long 0xC 18. "RXBF,RXBF" "0,1"
|
|
bitfld.long 0xC 17. "TXDE,TXDE" "0,1"
|
|
bitfld.long 0xC 16. "RXDNE,RXDNE" "0,1"
|
|
bitfld.long 0xC 11. "TOUTF,TOUTF" "0,1"
|
|
bitfld.long 0xC 10. "BUSERR,BUSERR" "0,1"
|
|
newline
|
|
bitfld.long 0xC 9. "RXNACK,RXNACK" "0,1"
|
|
bitfld.long 0xC 8. "ARBLOS,ARBLOS" "0,1"
|
|
bitfld.long 0xC 3. "GCS,GCS" "0,1"
|
|
bitfld.long 0xC 2. "ADRS,ADRS" "0,1"
|
|
bitfld.long 0xC 1. "STO,STO" "0,1"
|
|
bitfld.long 0xC 0. "STA,STA" "0,1"
|
|
line.long 0x10 "I2CSHPGR,I2CSHPGR"
|
|
hexmask.long.word 0x10 0.--15. 1. "SHPG,SHPG"
|
|
line.long 0x14 "I2CSLPGR,I2CSLPGR"
|
|
hexmask.long.word 0x14 0.--15. 1. "SLPG,SLPG"
|
|
line.long 0x18 "I2CDR,I2CDR"
|
|
hexmask.long.byte 0x18 0.--7. 1. "DATA,DATA"
|
|
line.long 0x1C "I2CTAR,I2CTAR"
|
|
bitfld.long 0x1C 10. "RWD,RWD" "0,1"
|
|
hexmask.long.word 0x1C 0.--9. 1. "TAR,TAR"
|
|
line.long 0x20 "I2CADDMR,I2CADDMR"
|
|
hexmask.long.word 0x20 0.--9. 1. "ADDMR,ADDMR"
|
|
line.long 0x24 "I2CADDSR,I2CADDSR"
|
|
hexmask.long.word 0x24 0.--9. 1. "ADDSR,ADDSR"
|
|
line.long 0x28 "I2CTOUT,I2CTOUT"
|
|
bitfld.long 0x28 16.--18. "PSC,PSC" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x28 0.--15. 1. "TOUT,TOUT"
|
|
tree.end
|
|
tree.end
|
|
tree "LEDC (LED Controller)"
|
|
base ad:0x4005A000
|
|
group.long 0x0++0x47
|
|
line.long 0x0 "LEDCR,LEDCR"
|
|
hexmask.long.word 0x0 16.--27. 1. "LEDPS,LEDPS"
|
|
bitfld.long 0x0 12.--13. "DTYNUM,DTYNUM" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "LEDSRC,LEDSRC" "0,1,2,3"
|
|
bitfld.long 0x0 0. "LEDEN,LEDEN" "0,1"
|
|
line.long 0x4 "LEDCER,LEDCER"
|
|
hexmask.long.word 0x4 0.--11. 1. "COMyEN,COMyEN"
|
|
line.long 0x8 "LEDPCR,LEDPCR"
|
|
hexmask.long.byte 0x8 16.--23. 1. "SEGxPOL,SEGxPOL"
|
|
hexmask.long.word 0x8 0.--11. 1. "COMyPOL,COMyPOL"
|
|
line.long 0xC "LEDIER,LEDIER"
|
|
bitfld.long 0xC 0. "FIEN,FIEN" "0,1"
|
|
line.long 0x10 "LEDSR,LEDSR"
|
|
bitfld.long 0x10 0. "FIF,FIF" "0,1"
|
|
line.long 0x14 "LEDDTCR,LEDDTCR"
|
|
hexmask.long.byte 0x14 0.--5. 1. "DEADNUM,DEADNUM"
|
|
line.long 0x18 "LEDDR0,LEDDR0"
|
|
hexmask.long.byte 0x18 0.--7. 1. "CnS,CnS"
|
|
line.long 0x1C "LEDDR1,LEDDR1"
|
|
hexmask.long.byte 0x1C 0.--7. 1. "CnS,CnS"
|
|
line.long 0x20 "LEDDR2,LEDDR2"
|
|
hexmask.long.byte 0x20 0.--7. 1. "CnS,CnS"
|
|
line.long 0x24 "LEDDR3,LEDDR3"
|
|
hexmask.long.byte 0x24 0.--7. 1. "CnS,CnS"
|
|
line.long 0x28 "LEDDR4,LEDDR4"
|
|
hexmask.long.byte 0x28 0.--7. 1. "CnS,CnS"
|
|
line.long 0x2C "LEDDR5,LEDDR5"
|
|
hexmask.long.byte 0x2C 0.--7. 1. "CnS,CnS"
|
|
line.long 0x30 "LEDDR6,LEDDR6"
|
|
hexmask.long.byte 0x30 0.--7. 1. "CnS,CnS"
|
|
line.long 0x34 "LEDDR7,LEDDR7"
|
|
hexmask.long.byte 0x34 0.--7. 1. "CnS,CnS"
|
|
line.long 0x38 "LEDDR8,LEDDR8"
|
|
hexmask.long.byte 0x38 0.--7. 1. "CnS,CnS"
|
|
line.long 0x3C "LEDDR9,LEDDR9"
|
|
hexmask.long.byte 0x3C 0.--7. 1. "CnS,CnS"
|
|
line.long 0x40 "LEDDR10,LEDDR10"
|
|
hexmask.long.byte 0x40 0.--7. 1. "CnS,CnS"
|
|
line.long 0x44 "LEDDR11,LEDDR11"
|
|
hexmask.long.byte 0x44 0.--7. 1. "CnS,CnS"
|
|
tree.end
|
|
tree "MCTM (Motor Control Timer)"
|
|
base ad:0x4002C000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CNTCFR,CNTCFR"
|
|
bitfld.long 0x0 24. "DIR,DIR" "0,1"
|
|
bitfld.long 0x0 16.--17. "CMSEL,CMSEL" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "CKDIV,CKDIV" "0,1,2,3"
|
|
bitfld.long 0x0 1. "UGDIS,UGDIS" "0,1"
|
|
bitfld.long 0x0 0. "UEV1DIS,UEV1DIS" "0,1"
|
|
line.long 0x4 "MDCFR,MDCFR"
|
|
bitfld.long 0x4 24. "SPMSET,SPMSET" "0,1"
|
|
bitfld.long 0x4 16.--18. "MMSEL,MMSEL" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 8.--10. "SMSEL,SMSEL" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 0. "TSE,TSE" "0,1"
|
|
line.long 0x8 "TRCFR,TRCFR"
|
|
hexmask.long.byte 0x8 0.--3. 1. "TRSEL,TRSEL"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "CTR,CTR"
|
|
bitfld.long 0x0 16. "CHCCDS,CHCCDS" "0,1"
|
|
bitfld.long 0x0 9. "COMUS,COMUS" "0,1"
|
|
bitfld.long 0x0 8. "COMPRE,COMPRE" "0,1"
|
|
bitfld.long 0x0 1. "CRBE,CRBE" "0,1"
|
|
bitfld.long 0x0 0. "TME,TME" "0,1"
|
|
group.long 0x20++0xF
|
|
line.long 0x0 "CH0ICFR,CH0ICFR"
|
|
bitfld.long 0x0 31. "TI0SRC,TI0SRC" "0,1"
|
|
bitfld.long 0x0 18.--19. "CH0PSC,CH0PSC" "0,1,2,3"
|
|
bitfld.long 0x0 16.--17. "CH0CCS,CH0CCS" "0,1,2,3"
|
|
hexmask.long.byte 0x0 0.--3. 1. "TI0F,TI0F"
|
|
line.long 0x4 "CH1ICFR,CH1ICFR"
|
|
bitfld.long 0x4 18.--19. "CH1PSC,CH1PSC" "0,1,2,3"
|
|
bitfld.long 0x4 16.--17. "CH1CCS,CH1CCS" "0,1,2,3"
|
|
hexmask.long.byte 0x4 0.--3. 1. "TI1F,TI1F"
|
|
line.long 0x8 "CH2ICFR,CH2ICFR"
|
|
bitfld.long 0x8 18.--19. "CH2PSC,CH2PSC" "0,1,2,3"
|
|
bitfld.long 0x8 16.--17. "CH2CCS,CH2CCS" "0,1,2,3"
|
|
hexmask.long.byte 0x8 0.--3. 1. "TI2F,TI2F"
|
|
line.long 0xC "CH3ICFR,CH3ICFR"
|
|
bitfld.long 0xC 18.--19. "CH3PSC,CH3PSC" "0,1,2,3"
|
|
bitfld.long 0xC 16.--17. "CH3CCS,CH3CCS" "0,1,2,3"
|
|
hexmask.long.byte 0xC 0.--3. 1. "TI3F,TI3F"
|
|
group.long 0x40++0x17
|
|
line.long 0x0 "CH0OCFR,CH0OCFR"
|
|
bitfld.long 0x0 8. "CH0OM3,CH0OM3" "0,1"
|
|
bitfld.long 0x0 5. "CH0IMAE,CH0IMAE" "0,1"
|
|
bitfld.long 0x0 4. "CH0PRE,CH0PRE" "0,1"
|
|
bitfld.long 0x0 0.--2. "CH0OM20,CH0OM20" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "CH1OCFR,CH1OCFR"
|
|
bitfld.long 0x4 8. "CH1OM3,CH1OM3" "0,1"
|
|
bitfld.long 0x4 5. "CH1IMAE,CH1IMAE" "0,1"
|
|
bitfld.long 0x4 4. "CH1PRE,CH1PRE" "0,1"
|
|
bitfld.long 0x4 0.--2. "CH1OM20,CH1OM20" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "CH2OCFR,CH2OCFR"
|
|
bitfld.long 0x8 8. "CH2OM3,CH2OM3" "0,1"
|
|
bitfld.long 0x8 5. "CH2IMAE,CH2IMAE" "0,1"
|
|
bitfld.long 0x8 4. "CH2PRE,CH2PRE" "0,1"
|
|
bitfld.long 0x8 0.--2. "CH2OM20,CH2OM20" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "CH3OCFR,CH3OCFR"
|
|
bitfld.long 0xC 8. "CH3OM3,CH3OM3" "0,1"
|
|
bitfld.long 0xC 5. "CH3IMAE,CH3IMAE" "0,1"
|
|
bitfld.long 0xC 4. "CH3PRE,CH3PRE" "0,1"
|
|
bitfld.long 0xC 0.--2. "CH3OM20,CH3OM20" "0,1,2,3,4,5,6,7"
|
|
line.long 0x10 "CHCTR,CHCTR"
|
|
bitfld.long 0x10 6. "CH3E,CH3E" "0,1"
|
|
bitfld.long 0x10 5. "CH2NE,CH2NE" "0,1"
|
|
bitfld.long 0x10 4. "CH2E,CH2E" "0,1"
|
|
bitfld.long 0x10 3. "CH1NE,CH1NE" "0,1"
|
|
bitfld.long 0x10 2. "CH1E,CH1E" "0,1"
|
|
bitfld.long 0x10 1. "CH0NE,CH0NE" "0,1"
|
|
bitfld.long 0x10 0. "CH0E,CH0E" "0,1"
|
|
line.long 0x14 "CHPOLR,CHPOLR"
|
|
bitfld.long 0x14 6. "CH3P,CH3P" "0,1"
|
|
bitfld.long 0x14 5. "CH2NP,CH2NP" "0,1"
|
|
bitfld.long 0x14 4. "CH2P,CH2P" "0,1"
|
|
bitfld.long 0x14 3. "CH1NP,CH1NP" "0,1"
|
|
bitfld.long 0x14 2. "CH1P,CH1P" "0,1"
|
|
bitfld.long 0x14 1. "CH0NP,CH0NP" "0,1"
|
|
bitfld.long 0x14 0. "CH0P,CH0P" "0,1"
|
|
group.long 0x6C++0x43
|
|
line.long 0x0 "CHBRKCFR,CHBRKCFR"
|
|
bitfld.long 0x0 6. "CH3OIS,CH3OIS" "0,1"
|
|
bitfld.long 0x0 5. "CH2OISN,CH2OISN" "0,1"
|
|
bitfld.long 0x0 4. "CH2OIS,CH2OIS" "0,1"
|
|
bitfld.long 0x0 3. "CH1OISN,CH1OISN" "0,1"
|
|
bitfld.long 0x0 2. "CH1OIS,CH1OIS" "0,1"
|
|
bitfld.long 0x0 1. "CH0OISN,CH0OISN" "0,1"
|
|
bitfld.long 0x0 0. "CH0OIS,CH0OIS" "0,1"
|
|
line.long 0x4 "CHBRKCTR,CHBRKCTR"
|
|
hexmask.long.byte 0x4 24.--31. 1. "CHDTG,CHDTG"
|
|
bitfld.long 0x4 21. "CHOSSR,CHOSSR" "0,1"
|
|
bitfld.long 0x4 20. "CHOSSI,CHOSSI" "0,1"
|
|
bitfld.long 0x4 18. "GFSEL,GFSEL" "0,1"
|
|
bitfld.long 0x4 16.--17. "LOCKLV,LOCKLV" "0,1,2,3"
|
|
hexmask.long.byte 0x4 8.--11. 1. "BKF,BKF"
|
|
bitfld.long 0x4 5. "CHAOE,CHAOE" "0,1"
|
|
bitfld.long 0x4 4. "CHMOE,CHMOE" "0,1"
|
|
bitfld.long 0x4 1. "BKP,BKP" "0,1"
|
|
bitfld.long 0x4 0. "BKE,BKE" "0,1"
|
|
line.long 0x8 "DICTR,DICTR"
|
|
bitfld.long 0x8 26. "TEVDE,TEVDE" "0,1"
|
|
bitfld.long 0x8 25. "UEV2DE,UEV2DE" "0,1"
|
|
bitfld.long 0x8 24. "UEV1DE,UEV1DE" "0,1"
|
|
bitfld.long 0x8 19. "CH3CCDE,CH3CCDE" "0,1"
|
|
bitfld.long 0x8 18. "CH2CCDE,CH2CCDE" "0,1"
|
|
bitfld.long 0x8 17. "CH1CCDE,CH1CCDE" "0,1"
|
|
bitfld.long 0x8 16. "CH0CCDE,CH0CCDE" "0,1"
|
|
bitfld.long 0x8 11. "BRKIE,BRKIE" "0,1"
|
|
bitfld.long 0x8 10. "TEVIE,TEVIE" "0,1"
|
|
bitfld.long 0x8 9. "UEV2IE,UEV2IE" "0,1"
|
|
bitfld.long 0x8 8. "UEV1IE,UEV1IE" "0,1"
|
|
newline
|
|
bitfld.long 0x8 3. "CH3CCIE,CH3CCIE" "0,1"
|
|
bitfld.long 0x8 2. "CH2CCIE,CH2CCIE" "0,1"
|
|
bitfld.long 0x8 1. "CH1CCIE,CH1CCIE" "0,1"
|
|
bitfld.long 0x8 0. "CH0CCIE,CH0CCIE" "0,1"
|
|
line.long 0xC "EVGR,EVGR"
|
|
bitfld.long 0xC 11. "BRKG,BRKG" "0,1"
|
|
bitfld.long 0xC 10. "TEVG,TEVG" "0,1"
|
|
bitfld.long 0xC 9. "UEV2G,UEV2G" "0,1"
|
|
bitfld.long 0xC 8. "UEV1G,UEV1G" "0,1"
|
|
bitfld.long 0xC 3. "CH3CCG,CH3CCG" "0,1"
|
|
bitfld.long 0xC 2. "CH2CCG,CH2CCG" "0,1"
|
|
bitfld.long 0xC 1. "CH1CCG,CH1CCG" "0,1"
|
|
bitfld.long 0xC 0. "CH0CCG,CH0CCG" "0,1"
|
|
line.long 0x10 "INTSR,INTSR"
|
|
bitfld.long 0x10 11. "BRKIF,BRKIF" "0,1"
|
|
bitfld.long 0x10 10. "TEVIF,TEVIF" "0,1"
|
|
bitfld.long 0x10 9. "UEV2IF,UEV2IF" "0,1"
|
|
bitfld.long 0x10 8. "UEV1IF,UEV1IF" "0,1"
|
|
bitfld.long 0x10 7. "CH3OCF,CH3OCF" "0,1"
|
|
bitfld.long 0x10 6. "CH2OCF,CH2OCF" "0,1"
|
|
bitfld.long 0x10 5. "CH1OCF,CH1OCF" "0,1"
|
|
bitfld.long 0x10 4. "CH0OCF,CH0OCF" "0,1"
|
|
bitfld.long 0x10 3. "CH3CCIF,CH3CCIF" "0,1"
|
|
bitfld.long 0x10 2. "CH2CCIF,CH2CCIF" "0,1"
|
|
bitfld.long 0x10 1. "CH1CCIF,CH1CCIF" "0,1"
|
|
newline
|
|
bitfld.long 0x10 0. "CH0CCIF,CH0CCIF" "0,1"
|
|
line.long 0x14 "CNTR,CNTR"
|
|
hexmask.long.word 0x14 0.--15. 1. "CNTV,CNTV"
|
|
line.long 0x18 "PSCR,PSCR"
|
|
hexmask.long.word 0x18 0.--15. 1. "PSCV,PSCV"
|
|
line.long 0x1C "CRR,CRR"
|
|
hexmask.long.word 0x1C 0.--15. 1. "CRV,CRV"
|
|
line.long 0x20 "REPR,REPR"
|
|
hexmask.long.byte 0x20 0.--7. 1. "REPV,REPV"
|
|
line.long 0x24 "CH0CCR,CH0CCR"
|
|
hexmask.long.word 0x24 0.--15. 1. "CH0CCV,CH0CCV"
|
|
line.long 0x28 "CH1CCR,CH1CCR"
|
|
hexmask.long.word 0x28 0.--15. 1. "CH1CCV,CH1CCV"
|
|
line.long 0x2C "CH2CCR,CH2CCR"
|
|
hexmask.long.word 0x2C 0.--15. 1. "CH2CCV,CH2CCV"
|
|
line.long 0x30 "CH3CCR,CH3CCR"
|
|
hexmask.long.word 0x30 0.--15. 1. "CH3CCV,CH3CCV"
|
|
line.long 0x34 "CH0ACR,CH0ACR"
|
|
hexmask.long.word 0x34 0.--15. 1. "CH0ACV,CH0ACV"
|
|
line.long 0x38 "CH1ACR,CH1ACR"
|
|
hexmask.long.word 0x38 0.--15. 1. "CH1ACV,CH1ACV"
|
|
line.long 0x3C "CH2ACR,CH2ACR"
|
|
hexmask.long.word 0x3C 0.--15. 1. "CH2ACV,CH2ACV"
|
|
line.long 0x40 "CH3ACR,CH3ACR"
|
|
hexmask.long.word 0x40 0.--15. 1. "CH3ACV,CH3ACV"
|
|
tree.end
|
|
tree "PDMA (Peripheral Direct Memory Access)"
|
|
base ad:0x40090000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "PDMACH0CR,PDMACH0CR"
|
|
bitfld.long 0x0 11. "AUTORL,AUTORL" "0,1"
|
|
bitfld.long 0x0 10. "FIXAEN,FIXAEN" "0,1"
|
|
bitfld.long 0x0 8.--9. "CHPRI,CHPRI" "0,1,2,3"
|
|
bitfld.long 0x0 7. "SRCAMOD,SRCAMOD" "0,1"
|
|
bitfld.long 0x0 6. "SRCAINC,SRCAINC" "0,1"
|
|
bitfld.long 0x0 5. "DSTAMOD,DSTAMOD" "0,1"
|
|
bitfld.long 0x0 4. "DSTAINC,DSTAINC" "0,1"
|
|
bitfld.long 0x0 2.--3. "DWIDTH,DWIDTH" "0,1,2,3"
|
|
bitfld.long 0x0 1. "SWTRIG,SWTRIG" "0,1"
|
|
bitfld.long 0x0 0. "CHEN,CHEN" "0,1"
|
|
line.long 0x4 "PDMACH0SADR,PDMACH0SADR"
|
|
hexmask.long 0x4 0.--31. 1. "SADR,SADR"
|
|
line.long 0x8 "PDMACH0DADR,PDMACH0DADR"
|
|
hexmask.long 0x8 0.--31. 1. "DADR,DADR"
|
|
group.long 0x10++0x13
|
|
line.long 0x0 "PDMACH0TSR,PDMACH0TSR"
|
|
hexmask.long.word 0x0 16.--31. 1. "BLKCNT,BLKCNT"
|
|
hexmask.long.byte 0x0 0.--7. 1. "BLKLEN,BLKLEN"
|
|
line.long 0x4 "PDMACH0CTSR,PDMACH0CTSR"
|
|
hexmask.long.word 0x4 16.--31. 1. "CBLKCNT,CBLKCNT"
|
|
line.long 0x8 "PDMACH1CR,PDMACH1CR"
|
|
bitfld.long 0x8 11. "AUTORL,AUTORL" "0,1"
|
|
bitfld.long 0x8 10. "FIXAEN,FIXAEN" "0,1"
|
|
bitfld.long 0x8 8.--9. "CHPRI,CHPRI" "0,1,2,3"
|
|
bitfld.long 0x8 7. "SRCAMOD,SRCAMOD" "0,1"
|
|
bitfld.long 0x8 6. "SRCAINC,SRCAINC" "0,1"
|
|
bitfld.long 0x8 5. "DSTAMOD,DSTAMOD" "0,1"
|
|
bitfld.long 0x8 4. "DSTAINC,DSTAINC" "0,1"
|
|
bitfld.long 0x8 2.--3. "DWIDTH,DWIDTH" "0,1,2,3"
|
|
bitfld.long 0x8 1. "SWTRIG,SWTRIG" "0,1"
|
|
bitfld.long 0x8 0. "CHEN,CHEN" "0,1"
|
|
line.long 0xC "PDMACH1SADR,PDMACH1SADR"
|
|
hexmask.long 0xC 0.--31. 1. "SADR,SADR"
|
|
line.long 0x10 "PDMACH1DADR,PDMACH1DADR"
|
|
hexmask.long 0x10 0.--31. 1. "DADR,DADR"
|
|
group.long 0x28++0x13
|
|
line.long 0x0 "PDMACH1TSR,PDMACH1TSR"
|
|
hexmask.long.word 0x0 16.--31. 1. "BLKCNT,BLKCNT"
|
|
hexmask.long.byte 0x0 0.--7. 1. "BLKLEN,BLKLEN"
|
|
line.long 0x4 "PDMACH1CTSR,PDMACH1CTSR"
|
|
hexmask.long.word 0x4 16.--31. 1. "CBLKCNT,CBLKCNT"
|
|
line.long 0x8 "PDMACH2CR,PDMACH2CR"
|
|
bitfld.long 0x8 11. "AUTORL,AUTORL" "0,1"
|
|
bitfld.long 0x8 10. "FIXAEN,FIXAEN" "0,1"
|
|
bitfld.long 0x8 8.--9. "CHPRI,CHPRI" "0,1,2,3"
|
|
bitfld.long 0x8 7. "SRCAMOD,SRCAMOD" "0,1"
|
|
bitfld.long 0x8 6. "SRCAINC,SRCAINC" "0,1"
|
|
bitfld.long 0x8 5. "DSTAMOD,DSTAMOD" "0,1"
|
|
bitfld.long 0x8 4. "DSTAINC,DSTAINC" "0,1"
|
|
bitfld.long 0x8 2.--3. "DWIDTH,DWIDTH" "0,1,2,3"
|
|
bitfld.long 0x8 1. "SWTRIG,SWTRIG" "0,1"
|
|
bitfld.long 0x8 0. "CHEN,CHEN" "0,1"
|
|
line.long 0xC "PDMACH2SADR,PDMACH2SADR"
|
|
hexmask.long 0xC 0.--31. 1. "SADR,SADR"
|
|
line.long 0x10 "PDMACH2DADR,PDMACH2DADR"
|
|
hexmask.long 0x10 0.--31. 1. "DADR,DADR"
|
|
group.long 0x40++0x13
|
|
line.long 0x0 "PDMACH2TSR,PDMACH2TSR"
|
|
hexmask.long.word 0x0 16.--31. 1. "BLKCNT,BLKCNT"
|
|
hexmask.long.byte 0x0 0.--7. 1. "BLKLEN,BLKLEN"
|
|
line.long 0x4 "PDMACH2CTSR,PDMACH2CTSR"
|
|
hexmask.long.word 0x4 16.--31. 1. "CBLKCNT,CBLKCNT"
|
|
line.long 0x8 "PDMACH3CR,PDMACH3CR"
|
|
bitfld.long 0x8 11. "AUTORL,AUTORL" "0,1"
|
|
bitfld.long 0x8 10. "FIXAEN,FIXAEN" "0,1"
|
|
bitfld.long 0x8 8.--9. "CHPRI,CHPRI" "0,1,2,3"
|
|
bitfld.long 0x8 7. "SRCAMOD,SRCAMOD" "0,1"
|
|
bitfld.long 0x8 6. "SRCAINC,SRCAINC" "0,1"
|
|
bitfld.long 0x8 5. "DSTAMOD,DSTAMOD" "0,1"
|
|
bitfld.long 0x8 4. "DSTAINC,DSTAINC" "0,1"
|
|
bitfld.long 0x8 2.--3. "DWIDTH,DWIDTH" "0,1,2,3"
|
|
bitfld.long 0x8 1. "SWTRIG,SWTRIG" "0,1"
|
|
bitfld.long 0x8 0. "CHEN,CHEN" "0,1"
|
|
line.long 0xC "PDMACH3SADR,PDMACH3SADR"
|
|
hexmask.long 0xC 0.--31. 1. "SADR,SADR"
|
|
line.long 0x10 "PDMACH3DADR,PDMACH3DADR"
|
|
hexmask.long 0x10 0.--31. 1. "DADR,DADR"
|
|
group.long 0x58++0x13
|
|
line.long 0x0 "PDMACH3TSR,PDMACH3TSR"
|
|
hexmask.long.word 0x0 16.--31. 1. "BLKCNT,BLKCNT"
|
|
hexmask.long.byte 0x0 0.--7. 1. "BLKLEN,BLKLEN"
|
|
line.long 0x4 "PDMACH3CTSR,PDMACH3CTSR"
|
|
hexmask.long.word 0x4 16.--31. 1. "CBLKCNT,CBLKCNT"
|
|
line.long 0x8 "PDMACH4CR,PDMACH4CR"
|
|
bitfld.long 0x8 11. "AUTORL,AUTORL" "0,1"
|
|
bitfld.long 0x8 10. "FIXAEN,FIXAEN" "0,1"
|
|
bitfld.long 0x8 8.--9. "CHPRI,CHPRI" "0,1,2,3"
|
|
bitfld.long 0x8 7. "SRCAMOD,SRCAMOD" "0,1"
|
|
bitfld.long 0x8 6. "SRCAINC,SRCAINC" "0,1"
|
|
bitfld.long 0x8 5. "DSTAMOD,DSTAMOD" "0,1"
|
|
bitfld.long 0x8 4. "DSTAINC,DSTAINC" "0,1"
|
|
bitfld.long 0x8 2.--3. "DWIDTH,DWIDTH" "0,1,2,3"
|
|
bitfld.long 0x8 1. "SWTRIG,SWTRIG" "0,1"
|
|
bitfld.long 0x8 0. "CHEN,CHEN" "0,1"
|
|
line.long 0xC "PDMACH4SADR,PDMACH4SADR"
|
|
hexmask.long 0xC 0.--31. 1. "SADR,SADR"
|
|
line.long 0x10 "PDMACH4DADR,PDMACH4DADR"
|
|
hexmask.long 0x10 0.--31. 1. "DADR,DADR"
|
|
group.long 0x70++0x13
|
|
line.long 0x0 "PDMACH4TSR,PDMACH4TSR"
|
|
hexmask.long.word 0x0 16.--31. 1. "BLKCNT,BLKCNT"
|
|
hexmask.long.byte 0x0 0.--7. 1. "BLKLEN,BLKLEN"
|
|
line.long 0x4 "PDMACH4CTSR,PDMACH4CTSR"
|
|
hexmask.long.word 0x4 16.--31. 1. "CBLKCNT,CBLKCNT"
|
|
line.long 0x8 "PDMACH5CR,PDMACH5CR"
|
|
bitfld.long 0x8 11. "AUTORL,AUTORL" "0,1"
|
|
bitfld.long 0x8 10. "FIXAEN,FIXAEN" "0,1"
|
|
bitfld.long 0x8 8.--9. "CHPRI,CHPRI" "0,1,2,3"
|
|
bitfld.long 0x8 7. "SRCAMOD,SRCAMOD" "0,1"
|
|
bitfld.long 0x8 6. "SRCAINC,SRCAINC" "0,1"
|
|
bitfld.long 0x8 5. "DSTAMOD,DSTAMOD" "0,1"
|
|
bitfld.long 0x8 4. "DSTAINC,DSTAINC" "0,1"
|
|
bitfld.long 0x8 2.--3. "DWIDTH,DWIDTH" "0,1,2,3"
|
|
bitfld.long 0x8 1. "SWTRIG,SWTRIG" "0,1"
|
|
bitfld.long 0x8 0. "CHEN,CHEN" "0,1"
|
|
line.long 0xC "PDMACH5SADR,PDMACH5SADR"
|
|
hexmask.long 0xC 0.--31. 1. "SADR,SADR"
|
|
line.long 0x10 "PDMACH5DADR,PDMACH5DADR"
|
|
hexmask.long 0x10 0.--31. 1. "DADR,DADR"
|
|
group.long 0x88++0x7
|
|
line.long 0x0 "PDMACH5TSR,PDMACH5TSR"
|
|
hexmask.long.word 0x0 16.--31. 1. "BLKCNT,BLKCNT"
|
|
hexmask.long.byte 0x0 0.--7. 1. "BLKLEN,BLKLEN"
|
|
line.long 0x4 "PDMACH5CTSR,PDMACH5CTSR"
|
|
hexmask.long.word 0x4 16.--31. 1. "CBLKCNT,CBLKCNT"
|
|
group.long 0x120++0x3
|
|
line.long 0x0 "PDMA_ISR,PDMA_ISR"
|
|
bitfld.long 0x0 29. "TEISTA5,TEISTA5" "0,1"
|
|
bitfld.long 0x0 28. "TCISTA5,TCISTA5" "0,1"
|
|
bitfld.long 0x0 27. "HTISTA5,HTISTA5" "0,1"
|
|
bitfld.long 0x0 26. "BEISTA5,BEISTA5" "0,1"
|
|
bitfld.long 0x0 25. "GEISTA5,GEISTA5" "0,1"
|
|
bitfld.long 0x0 24. "TEISTA4,TEISTA4" "0,1"
|
|
bitfld.long 0x0 23. "TCISTA4,TCISTA4" "0,1"
|
|
bitfld.long 0x0 22. "HTISTA4,HTISTA4" "0,1"
|
|
bitfld.long 0x0 21. "BEISTA4,BEISTA4" "0,1"
|
|
bitfld.long 0x0 20. "GEISTA4,GEISTA4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "TEISTA3,TEISTA3" "0,1"
|
|
bitfld.long 0x0 18. "TCISTA3,TCISTA3" "0,1"
|
|
bitfld.long 0x0 17. "HTISTA3,HTISTA3" "0,1"
|
|
bitfld.long 0x0 16. "BEISTA3,BEISTA3" "0,1"
|
|
bitfld.long 0x0 15. "GEISTA3,GEISTA3" "0,1"
|
|
bitfld.long 0x0 14. "TEISTA2,TEISTA2" "0,1"
|
|
bitfld.long 0x0 13. "TCISTA2,TCISTA2" "0,1"
|
|
bitfld.long 0x0 12. "HTISTA2,HTISTA2" "0,1"
|
|
bitfld.long 0x0 11. "BEISTA2,BEISTA2" "0,1"
|
|
bitfld.long 0x0 10. "GEISTA2,GEISTA2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TEISTA1,TEISTA1" "0,1"
|
|
bitfld.long 0x0 8. "TCISTA1,TCISTA1" "0,1"
|
|
bitfld.long 0x0 7. "HTISTA1,HTISTA1" "0,1"
|
|
bitfld.long 0x0 6. "BEISTA1,BEISTA1" "0,1"
|
|
bitfld.long 0x0 5. "GEISTA1,GEISTA1" "0,1"
|
|
bitfld.long 0x0 4. "TEISTA0,TEISTA0" "0,1"
|
|
bitfld.long 0x0 3. "TCISTA0,TCISTA0" "0,1"
|
|
bitfld.long 0x0 2. "HTISTA0,HTISTA0" "0,1"
|
|
bitfld.long 0x0 1. "BEISTA0,BEISTA0" "0,1"
|
|
bitfld.long 0x0 0. "GEISTA0,GEISTA0" "0,1"
|
|
group.long 0x128++0x3
|
|
line.long 0x0 "PDMA_ISCR,PDMA_ISCR"
|
|
bitfld.long 0x0 29. "TEICLR5,TEICLR5" "0,1"
|
|
bitfld.long 0x0 28. "TCICLR5,TCICLR5" "0,1"
|
|
bitfld.long 0x0 27. "HTICLR5,HTICLR5" "0,1"
|
|
bitfld.long 0x0 26. "BEICLR5,BEICLR5" "0,1"
|
|
bitfld.long 0x0 25. "GEICLR5,GEICLR5" "0,1"
|
|
bitfld.long 0x0 24. "TEICLR4,TEICLR4" "0,1"
|
|
bitfld.long 0x0 23. "TCICLR4,TCICLR4" "0,1"
|
|
bitfld.long 0x0 22. "HTICLR4,HTICLR4" "0,1"
|
|
bitfld.long 0x0 21. "BEICLR4,BEICLR4" "0,1"
|
|
bitfld.long 0x0 20. "GEICLR4,GEICLR4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "TEICLR3,TEICLR3" "0,1"
|
|
bitfld.long 0x0 18. "TCICLR3,TCICLR3" "0,1"
|
|
bitfld.long 0x0 17. "HTICLR3,HTICLR3" "0,1"
|
|
bitfld.long 0x0 16. "BEICLR3,BEICLR3" "0,1"
|
|
bitfld.long 0x0 15. "GEICLR3,GEICLR3" "0,1"
|
|
bitfld.long 0x0 14. "TEICLR2,TEICLR2" "0,1"
|
|
bitfld.long 0x0 13. "TCICLR2,TCICLR2" "0,1"
|
|
bitfld.long 0x0 12. "HTICLR2,HTICLR2" "0,1"
|
|
bitfld.long 0x0 11. "BEICLR2,BEICLR2" "0,1"
|
|
bitfld.long 0x0 10. "GEICLR2,GEICLR2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TEICLR1,TEICLR1" "0,1"
|
|
bitfld.long 0x0 8. "TCICLR1,TCICLR1" "0,1"
|
|
bitfld.long 0x0 7. "HTICLR1,HTICLR1" "0,1"
|
|
bitfld.long 0x0 6. "BEICLR1,BEICLR1" "0,1"
|
|
bitfld.long 0x0 5. "GEICLR1,GEICLR1" "0,1"
|
|
bitfld.long 0x0 4. "TEICLR0,TEICLR0" "0,1"
|
|
bitfld.long 0x0 3. "TCICLR0,TCICLR0" "0,1"
|
|
bitfld.long 0x0 2. "HTICLR0,HTICLR0" "0,1"
|
|
bitfld.long 0x0 1. "BEICLR0,BEICLR0" "0,1"
|
|
bitfld.long 0x0 0. "GEICLR0,GEICLR0" "0,1"
|
|
group.long 0x130++0x3
|
|
line.long 0x0 "PDMAIER,PDMAIER"
|
|
bitfld.long 0x0 29. "TEIE5,TEIE5" "0,1"
|
|
bitfld.long 0x0 28. "TCIE5,TCIE5" "0,1"
|
|
bitfld.long 0x0 27. "HTIE5,HTIE5" "0,1"
|
|
bitfld.long 0x0 26. "BEIE5,BEIE5" "0,1"
|
|
bitfld.long 0x0 25. "GEIE5,GEIE5" "0,1"
|
|
bitfld.long 0x0 24. "TEIE4,TEIE4" "0,1"
|
|
bitfld.long 0x0 23. "TCIE4,TCIE4" "0,1"
|
|
bitfld.long 0x0 22. "HTIE4,HTIE4" "0,1"
|
|
bitfld.long 0x0 21. "BEIE4,BEIE4" "0,1"
|
|
bitfld.long 0x0 20. "GEIE4,GEIE4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "TEIE3,TEIE3" "0,1"
|
|
bitfld.long 0x0 18. "TCIE3,TCIE3" "0,1"
|
|
bitfld.long 0x0 17. "HTIE3,HTIE3" "0,1"
|
|
bitfld.long 0x0 16. "BEIE3,BEIE3" "0,1"
|
|
bitfld.long 0x0 15. "GEIE3,GEIE3" "0,1"
|
|
bitfld.long 0x0 14. "TEIE2,TEIE2" "0,1"
|
|
bitfld.long 0x0 13. "TCIE2,TCIE2" "0,1"
|
|
bitfld.long 0x0 12. "HTIE2,HTIE2" "0,1"
|
|
bitfld.long 0x0 11. "BEIE2,BEIE2" "0,1"
|
|
bitfld.long 0x0 10. "GEIE2,GEIE2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TEIE1,TEIE1" "0,1"
|
|
bitfld.long 0x0 8. "TCIE1,TCIE1" "0,1"
|
|
bitfld.long 0x0 7. "HTIE1,HTIE1" "0,1"
|
|
bitfld.long 0x0 6. "BEIE1,BEIE1" "0,1"
|
|
bitfld.long 0x0 5. "GEIE1,GEIE1" "0,1"
|
|
bitfld.long 0x0 4. "TEIE0,TEIE0" "0,1"
|
|
bitfld.long 0x0 3. "TCIE0,TCIE0" "0,1"
|
|
bitfld.long 0x0 2. "HTIE0,HTIE0" "0,1"
|
|
bitfld.long 0x0 1. "BEIE0,BEIE0" "0,1"
|
|
bitfld.long 0x0 0. "GEIE0,GEIE0" "0,1"
|
|
tree.end
|
|
tree "PWM (Pulse-Width-Modulation Timer)"
|
|
base ad:0x0
|
|
tree "PWM0"
|
|
base ad:0x40031000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CNTCFR,CNTCFR"
|
|
bitfld.long 0x0 24. "DIR,DIR" "0,1"
|
|
bitfld.long 0x0 16.--17. "CMSEL,CMSEL" "0,1,2,3"
|
|
bitfld.long 0x0 1. "UGDIS,UGDIS" "0,1"
|
|
bitfld.long 0x0 0. "UEVDIS,UEVDIS" "0,1"
|
|
line.long 0x4 "MDCFR,MDCFR"
|
|
bitfld.long 0x4 24. "SPMSET,SPMSET" "0,1"
|
|
bitfld.long 0x4 16.--18. "MMSEL,MMSEL" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 8.--10. "SMSEL,SMSEL" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 0. "TSE,TSE" "0,1"
|
|
line.long 0x8 "TRCFR,TRCFR"
|
|
hexmask.long.byte 0x8 0.--3. 1. "TRSEL,TRSEL"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "CTR,CTR"
|
|
bitfld.long 0x0 16. "CHCCDS,CHCCDS" "0,1"
|
|
bitfld.long 0x0 1. "CRBE,CRBE" "0,1"
|
|
bitfld.long 0x0 0. "TME,TME" "0,1"
|
|
group.long 0x40++0x17
|
|
line.long 0x0 "CH0OCFR,CH0OCFR"
|
|
bitfld.long 0x0 8. "CH0OM3,CH0OM3" "0,1"
|
|
bitfld.long 0x0 5. "CH0IMAE,CH0IMAE" "0,1"
|
|
bitfld.long 0x0 4. "CH0PRE,CH0PRE" "0,1"
|
|
bitfld.long 0x0 0.--2. "CH0OM20,CH0OM[2:0]" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "CH1OCFR,CH1OCFR"
|
|
bitfld.long 0x4 8. "CH1OM3,CH1OM3" "0,1"
|
|
bitfld.long 0x4 5. "CH1IMAE,CH1IMAE" "0,1"
|
|
bitfld.long 0x4 4. "CH1PRE,CH1PRE" "0,1"
|
|
bitfld.long 0x4 0.--2. "CH1OM20,CH1OM[2:0]" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "CH2OCFR,CH2OCFR"
|
|
bitfld.long 0x8 8. "CH2OM3,CH2OM3" "0,1"
|
|
bitfld.long 0x8 5. "CH2IMAE,CH2IMAE" "0,1"
|
|
bitfld.long 0x8 4. "CH2PRE,CH2PRE" "0,1"
|
|
bitfld.long 0x8 0.--2. "CH2OM20,CH2OM[2:0]" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "CH3OCFR,CH3OCFR"
|
|
bitfld.long 0xC 8. "CH3OM3,CH3OM3" "0,1"
|
|
bitfld.long 0xC 5. "CH3IMAE,CH3IMAE" "0,1"
|
|
bitfld.long 0xC 4. "CH3PRE,CH3PRE" "0,1"
|
|
bitfld.long 0xC 0.--2. "CH3OM20,CH3OM[2:0]" "0,1,2,3,4,5,6,7"
|
|
line.long 0x10 "CHCTR,CHCTR"
|
|
bitfld.long 0x10 6. "CH3E,CH3E" "0,1"
|
|
bitfld.long 0x10 4. "CH2E,CH2E" "0,1"
|
|
bitfld.long 0x10 2. "CH1E,CH1E" "0,1"
|
|
bitfld.long 0x10 0. "CH0E,CH0E" "0,1"
|
|
line.long 0x14 "CHPOLR,CHPOLR"
|
|
bitfld.long 0x14 6. "CH3P,CH3P" "0,1"
|
|
bitfld.long 0x14 4. "CH2P,CH2P" "0,1"
|
|
bitfld.long 0x14 2. "CH1P,CH1P" "0,1"
|
|
bitfld.long 0x14 0. "CH0P,CH0P" "0,1"
|
|
group.long 0x74++0x17
|
|
line.long 0x0 "DICTR,DICTR"
|
|
bitfld.long 0x0 26. "TEVDE,TEVDE" "0,1"
|
|
bitfld.long 0x0 24. "UEVDE,UEVDE" "0,1"
|
|
bitfld.long 0x0 19. "CH3CDE,CH3CDE" "0,1"
|
|
bitfld.long 0x0 18. "CH2CDE,CH2CDE" "0,1"
|
|
bitfld.long 0x0 17. "CH1CDE,CH1CDE" "0,1"
|
|
bitfld.long 0x0 16. "CH0CDE,CH0CDE" "0,1"
|
|
bitfld.long 0x0 10. "TEVIE,TEVIE" "0,1"
|
|
bitfld.long 0x0 8. "UEVIE,UEVIE" "0,1"
|
|
bitfld.long 0x0 3. "CH3CIE,CH3CIE" "0,1"
|
|
bitfld.long 0x0 2. "CH2CIE,CH2CIE" "0,1"
|
|
bitfld.long 0x0 1. "CH1CIE,CH1CIE" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "CH0CIE,CH0CIE" "0,1"
|
|
line.long 0x4 "PWM_EVGR,PWM_EVGR"
|
|
bitfld.long 0x4 10. "TEVG,TEVG" "0,1"
|
|
bitfld.long 0x4 8. "UEVG,UEVG" "0,1"
|
|
bitfld.long 0x4 3. "CH3CG,CH3CG" "0,1"
|
|
bitfld.long 0x4 2. "CH2CG,CH2CG" "0,1"
|
|
bitfld.long 0x4 1. "CH1CG,CH1CG" "0,1"
|
|
bitfld.long 0x4 0. "CH0CG,CH0CG" "0,1"
|
|
line.long 0x8 "INTSR,INTSR"
|
|
bitfld.long 0x8 10. "TEVIF,TEVIF" "0,1"
|
|
bitfld.long 0x8 8. "UEVIF,UEVIF" "0,1"
|
|
bitfld.long 0x8 3. "CH3CIF,CH3CIF" "0,1"
|
|
bitfld.long 0x8 2. "CH2CIF,CH2CIF" "0,1"
|
|
bitfld.long 0x8 1. "CH1CIF,CH1CIF" "0,1"
|
|
bitfld.long 0x8 0. "CH0CIF,CH0CIF" "0,1"
|
|
line.long 0xC "CNTR,CNTR"
|
|
hexmask.long.word 0xC 0.--15. 1. "CNTV,CNTV"
|
|
line.long 0x10 "PWM_PSCR,PWM_PSCR"
|
|
hexmask.long.word 0x10 0.--15. 1. "PSCV,PSCV"
|
|
line.long 0x14 "CRR,CRR"
|
|
hexmask.long.word 0x14 0.--15. 1. "CRV,CRV"
|
|
group.long 0x90++0x1F
|
|
line.long 0x0 "CH0CR,CH0CR"
|
|
hexmask.long.word 0x0 0.--15. 1. "CH0CV,CH0CV"
|
|
line.long 0x4 "CH1CR,CH1CR"
|
|
hexmask.long.word 0x4 0.--15. 1. "CH1CV,CH1CV"
|
|
line.long 0x8 "CH2CR,CH2CR"
|
|
hexmask.long.word 0x8 0.--15. 1. "CH2CV,CH2CV"
|
|
line.long 0xC "CH3CR,CH3CR"
|
|
hexmask.long.word 0xC 0.--15. 1. "CH3CV,CH3CV"
|
|
line.long 0x10 "CH0ACR,CH0ACR"
|
|
hexmask.long.word 0x10 0.--15. 1. "CH0ACV,CH0ACV"
|
|
line.long 0x14 "CH1ACR,CH1ACR"
|
|
hexmask.long.word 0x14 0.--15. 1. "CH1ACV,CH1ACV"
|
|
line.long 0x18 "CH2ACR,CH2ACR"
|
|
hexmask.long.word 0x18 0.--15. 1. "CH2ACV,CH2ACV"
|
|
line.long 0x1C "CH3ACR,CH3ACR"
|
|
hexmask.long.word 0x1C 0.--15. 1. "CH3ACV,CH3ACV"
|
|
tree.end
|
|
tree "PWM1"
|
|
base ad:0x40071000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CNTCFR,CNTCFR"
|
|
bitfld.long 0x0 24. "DIR,DIR" "0,1"
|
|
bitfld.long 0x0 16.--17. "CMSEL,CMSEL" "0,1,2,3"
|
|
bitfld.long 0x0 1. "UGDIS,UGDIS" "0,1"
|
|
bitfld.long 0x0 0. "UEVDIS,UEVDIS" "0,1"
|
|
line.long 0x4 "MDCFR,MDCFR"
|
|
bitfld.long 0x4 24. "SPMSET,SPMSET" "0,1"
|
|
bitfld.long 0x4 16.--18. "MMSEL,MMSEL" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 8.--10. "SMSEL,SMSEL" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 0. "TSE,TSE" "0,1"
|
|
line.long 0x8 "TRCFR,TRCFR"
|
|
hexmask.long.byte 0x8 0.--3. 1. "TRSEL,TRSEL"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "CTR,CTR"
|
|
bitfld.long 0x0 16. "CHCDS,CHCDS" "0,1"
|
|
bitfld.long 0x0 1. "CRBE,CRBE" "0,1"
|
|
bitfld.long 0x0 0. "TME,TME" "0,1"
|
|
group.long 0x40++0x17
|
|
line.long 0x0 "CH0OCFR,CH0OCFR"
|
|
bitfld.long 0x0 8. "CH0OM3,CH0OM3" "0,1"
|
|
bitfld.long 0x0 5. "CH0IMAE,CH0IMAE" "0,1"
|
|
bitfld.long 0x0 4. "CH0PRE,CH0PRE" "0,1"
|
|
bitfld.long 0x0 0.--2. "CH0OM20,CH0OM20" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "CH1OCFR,CH1OCFR"
|
|
bitfld.long 0x4 8. "CH1OM3,CH1OM3" "0,1"
|
|
bitfld.long 0x4 5. "CH1IMAE,CH1IMAE" "0,1"
|
|
bitfld.long 0x4 4. "CH1PRE,CH1PRE" "0,1"
|
|
bitfld.long 0x4 0.--2. "CH1OM20,CH1OM20" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "CH2OCFR,CH2OCFR"
|
|
bitfld.long 0x8 8. "CH2OM3,CH2OM3" "0,1"
|
|
bitfld.long 0x8 5. "CH2IMAE,CH2IMAE" "0,1"
|
|
bitfld.long 0x8 4. "CH2PRE,CH2PRE" "0,1"
|
|
bitfld.long 0x8 0.--2. "CH2OM20,CH2OM20" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "CH3OCFR,CH3OCFR"
|
|
bitfld.long 0xC 8. "CH3OM3,CH3OM3" "0,1"
|
|
bitfld.long 0xC 5. "CH3IMAE,CH3IMAE" "0,1"
|
|
bitfld.long 0xC 4. "CH3PRE,CH3PRE" "0,1"
|
|
bitfld.long 0xC 0.--2. "CH3OM20,CH3OM20" "0,1,2,3,4,5,6,7"
|
|
line.long 0x10 "CHCTR,CHCTR"
|
|
bitfld.long 0x10 6. "CH3E,CH3E" "0,1"
|
|
bitfld.long 0x10 4. "CH2E,CH2E" "0,1"
|
|
bitfld.long 0x10 2. "CH1E,CH1E" "0,1"
|
|
bitfld.long 0x10 0. "CH0E,CH0E" "0,1"
|
|
line.long 0x14 "CHPOLR,CHPOLR"
|
|
bitfld.long 0x14 6. "CH3P,CH3P" "0,1"
|
|
bitfld.long 0x14 4. "CH2P,CH2P" "0,1"
|
|
bitfld.long 0x14 2. "CH1P,CH1P" "0,1"
|
|
bitfld.long 0x14 0. "CH0P,CH0P" "0,1"
|
|
group.long 0x74++0x17
|
|
line.long 0x0 "DICTR,DICTR"
|
|
bitfld.long 0x0 26. "TEVDE,TEVDE" "0,1"
|
|
bitfld.long 0x0 24. "UEVDE,UEVDE" "0,1"
|
|
bitfld.long 0x0 19. "CH3CDE,CH3CDE" "0,1"
|
|
bitfld.long 0x0 18. "CH2CDE,CH2CDE" "0,1"
|
|
bitfld.long 0x0 17. "CH1CDE,CH1CDE" "0,1"
|
|
bitfld.long 0x0 16. "CH0CDE,CH0CDE" "0,1"
|
|
bitfld.long 0x0 10. "TEVIE,TEVIE" "0,1"
|
|
bitfld.long 0x0 8. "UEVIE,UEVIE" "0,1"
|
|
bitfld.long 0x0 3. "CH3CIE,CH3CIE" "0,1"
|
|
bitfld.long 0x0 2. "CH2CIE,CH2CIE" "0,1"
|
|
bitfld.long 0x0 1. "CH1CIE,CH1CIE" "0,1"
|
|
bitfld.long 0x0 0. "CH0CIE,CH0CIE" "0,1"
|
|
line.long 0x4 "EVGR,EVGR"
|
|
bitfld.long 0x4 10. "TEVG,TEVG" "0,1"
|
|
bitfld.long 0x4 8. "UEVG,UEVG" "0,1"
|
|
bitfld.long 0x4 3. "CH3CG,CH3CG" "0,1"
|
|
bitfld.long 0x4 2. "CH2CG,CH2CG" "0,1"
|
|
bitfld.long 0x4 1. "CH1CG,CH1CG" "0,1"
|
|
bitfld.long 0x4 0. "CH0CG,CH0CG" "0,1"
|
|
line.long 0x8 "INTSR,INTSR"
|
|
bitfld.long 0x8 10. "TEVIF,TEVIF" "0,1"
|
|
bitfld.long 0x8 8. "UEVIF,UEVIF" "0,1"
|
|
bitfld.long 0x8 3. "CH3CIF,CH3CIF" "0,1"
|
|
bitfld.long 0x8 2. "CH2CIF,CH2CIF" "0,1"
|
|
bitfld.long 0x8 1. "CH1CIF,CH1CIF" "0,1"
|
|
bitfld.long 0x8 0. "CH0CIF,CH0CIF" "0,1"
|
|
line.long 0xC "CNTR,CNTR"
|
|
hexmask.long.word 0xC 0.--15. 1. "CNTV,CNTV"
|
|
line.long 0x10 "PSCR,PSCR"
|
|
hexmask.long.word 0x10 0.--15. 1. "PSCV,PSCV"
|
|
line.long 0x14 "CRR,CRR"
|
|
hexmask.long.word 0x14 0.--15. 1. "CRV,CRV"
|
|
group.long 0x90++0x1F
|
|
line.long 0x0 "CH0CR,CH0CR"
|
|
hexmask.long.word 0x0 0.--15. 1. "CH0CV,CH0CV"
|
|
line.long 0x4 "CH1CR,CH1CR"
|
|
hexmask.long.word 0x4 0.--15. 1. "CH1CV,CH1CV"
|
|
line.long 0x8 "CH2CR,CH2CR"
|
|
hexmask.long.word 0x8 0.--15. 1. "CH2CV,CH2CV"
|
|
line.long 0xC "CH3CR,CH3CR"
|
|
hexmask.long.word 0xC 0.--15. 1. "CH3CV,CH3CV"
|
|
line.long 0x10 "CH0ACR,CH0ACR"
|
|
hexmask.long.word 0x10 0.--15. 1. "CH0ACV,CH0ACV"
|
|
line.long 0x14 "CH1ACR,CH1ACR"
|
|
hexmask.long.word 0x14 0.--15. 1. "CH1ACV,CH1ACV"
|
|
line.long 0x18 "CH2ACR,CH2ACR"
|
|
hexmask.long.word 0x18 0.--15. 1. "CH2ACV,CH2ACV"
|
|
line.long 0x1C "CH3ACR,CH3ACR"
|
|
hexmask.long.word 0x1C 0.--15. 1. "CH3ACV,CH3ACV"
|
|
tree.end
|
|
tree.end
|
|
tree "PWRCU (Power Control Unit)"
|
|
base ad:0x4006A100
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "PWRSR,PWRSR"
|
|
bitfld.long 0x0 9. "WUPF1,WUPF1" "0,1"
|
|
bitfld.long 0x0 8. "WUPF0,WUPF0" "0,1"
|
|
bitfld.long 0x0 4. "PORF,PORF" "0,1"
|
|
line.long 0x4 "PWRCR,PWRCR"
|
|
bitfld.long 0x4 18.--19. "WUP1TYPE,WUP1TYPE" "0,1,2,3"
|
|
bitfld.long 0x4 16.--17. "WUP0TYPE,WUP0TYPE" "0,1,2,3"
|
|
bitfld.long 0x4 15. "DMOSSTS,DMOSSTS" "0,1"
|
|
bitfld.long 0x4 10. "WUP1EN,WUP1EN" "0,1"
|
|
bitfld.long 0x4 8. "WUP0EN,WUP0EN" "0,1"
|
|
bitfld.long 0x4 7. "DMOSON,DMOSON" "0,1"
|
|
bitfld.long 0x4 3. "LDOOFF,LDOOFF" "0,1"
|
|
bitfld.long 0x4 2. "LDOLCM,LDOLCM" "0,1"
|
|
bitfld.long 0x4 0. "PWCURST,PWRST" "0,1"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "LVDCSR,LVDCSR"
|
|
bitfld.long 0x0 22. "LVDS2,LVDS2" "0,1"
|
|
bitfld.long 0x0 21. "LVDEWEN,LVDEWEN" "0,1"
|
|
bitfld.long 0x0 20. "LVDIWEN,LVDIWEN" "0,1"
|
|
bitfld.long 0x0 19. "LVDF,LVDF" "0,1"
|
|
bitfld.long 0x0 17.--18. "LVDS10,LVDS10" "0,1,2,3"
|
|
bitfld.long 0x0 16. "LVDEN,LVDEN" "0,1"
|
|
bitfld.long 0x0 3. "BODF,BODF" "0,1"
|
|
bitfld.long 0x0 1. "BODRIS,BODRIS" "0,1"
|
|
bitfld.long 0x0 0. "BODEN,BODEN" "0,1"
|
|
tree.end
|
|
tree "RSTCU (Reset Control Unit)"
|
|
base ad:0x40088100
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "GRSR,GRSR"
|
|
bitfld.long 0x0 5. "USBRST,USBRST" "0,1"
|
|
bitfld.long 0x0 3. "PORSTF,PORSTF" "0,1"
|
|
bitfld.long 0x0 2. "WDTRSTF,WDTRSTF" "0,1"
|
|
bitfld.long 0x0 1. "EXTRSTF,EXTRSTF" "0,1"
|
|
bitfld.long 0x0 0. "NVICRSTF,NVICRSTF" "0,1"
|
|
line.long 0x4 "AHBPRSTR,AHBPRSTR"
|
|
bitfld.long 0x4 24. "DIVRST,DIVRST" "0,1"
|
|
bitfld.long 0x4 11. "PDRST,PDRST" "0,1"
|
|
bitfld.long 0x4 10. "PCRST,PCRST" "0,1"
|
|
bitfld.long 0x4 9. "PBRST,PBRST" "0,1"
|
|
bitfld.long 0x4 8. "PARST,PARST" "0,1"
|
|
bitfld.long 0x4 7. "CRCRST,CRCRST" "0,1"
|
|
bitfld.long 0x4 6. "EBIRST,EBIRST" "0,1"
|
|
bitfld.long 0x4 0. "DMARST,DMARST" "0,1"
|
|
line.long 0x8 "APBPRSTR0,APBPRSTR0"
|
|
bitfld.long 0x8 15. "EXTIRST,EXTIRST" "0,1"
|
|
bitfld.long 0x8 14. "AFIORST,AFIORST" "0,1"
|
|
bitfld.long 0x8 11. "UR0RST,UR0RST" "0,1"
|
|
bitfld.long 0x8 10. "UR0RST,UR0RST" "0,1"
|
|
bitfld.long 0x8 9. "USR1RST,USR1RST" "0,1"
|
|
bitfld.long 0x8 8. "USR0RST,USR0RST" "0,1"
|
|
bitfld.long 0x8 5. "SPI1RST,SPI1RST" "0,1"
|
|
bitfld.long 0x8 4. "SPI0RST,SPI0RST" "0,1"
|
|
bitfld.long 0x8 1. "I2C1RST,I2C1RST" "0,1"
|
|
bitfld.long 0x8 0. "I2C0RST,I2C0RST" "0,1"
|
|
line.long 0xC "APBPRSTR1,APBPRSTR1"
|
|
bitfld.long 0xC 24. "ADCRST,ADCRST" "0,1"
|
|
bitfld.long 0xC 22. "CMPRST,CMPRST" "0,1"
|
|
bitfld.long 0xC 17. "BFTM1RST,BFTM1RST" "0,1"
|
|
bitfld.long 0xC 16. "BFTM0RST,BFTM0RST" "0,1"
|
|
bitfld.long 0xC 13. "PWM1RST,PWM1RST" "0,1"
|
|
bitfld.long 0xC 12. "PWM0RST,PWM0RST" "0,1"
|
|
bitfld.long 0xC 8. "GPTMRST,GPTMRST" "0,1"
|
|
bitfld.long 0xC 4. "WDTRST,WDTRST" "0,1"
|
|
bitfld.long 0xC 0. "MCTMRST,MCTMRST" "0,1"
|
|
tree.end
|
|
tree "RTC (Real Time Clock)"
|
|
base ad:0x4006A000
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "RTCCNT,RTCCNT"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "RTCCNTV,RTCCNTV"
|
|
line.long 0x4 "RTCCMP,RTCCMP"
|
|
hexmask.long.tbyte 0x4 0.--23. 1. "RTCCMPV,RTCCMPV"
|
|
line.long 0x8 "RTCCR,RTCCR"
|
|
bitfld.long 0x8 20. "ROLF,ROLF" "0,1"
|
|
bitfld.long 0x8 19. "ROAP,ROAP" "0,1"
|
|
bitfld.long 0x8 18. "ROWM,ROWM" "0,1"
|
|
bitfld.long 0x8 17. "ROES,ROES" "0,1"
|
|
bitfld.long 0x8 16. "ROEN,ROEN" "0,1"
|
|
hexmask.long.byte 0x8 8.--11. 1. "RPRE,RPRE"
|
|
bitfld.long 0x8 5. "LSESM,LSESM" "0,1"
|
|
bitfld.long 0x8 4. "CMPCLR,CMPCLR" "0,1"
|
|
bitfld.long 0x8 3. "LSEEN,LSEEN" "0,1"
|
|
bitfld.long 0x8 1. "RTCSRC,RTCSRC" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0. "RTCEN,RTCEN" "0,1"
|
|
line.long 0xC "RTCSR,RTCSR"
|
|
bitfld.long 0xC 2. "OVFLAG,OVFLAG" "0,1"
|
|
bitfld.long 0xC 1. "CMFLAG,CMFLAG" "0,1"
|
|
bitfld.long 0xC 0. "CSECFLAG,CSECFLAG" "0,1"
|
|
line.long 0x10 "RTCIWEN,RTCIWEN"
|
|
bitfld.long 0x10 10. "OVWEN,OVWEN" "0,1"
|
|
bitfld.long 0x10 9. "CMWEN,CMWEN" "0,1"
|
|
bitfld.long 0x10 8. "CSECWEN,CSECWEN" "0,1"
|
|
bitfld.long 0x10 2. "OVIEN,OVIEN" "0,1"
|
|
bitfld.long 0x10 1. "CMIEN,CMIEN" "0,1"
|
|
bitfld.long 0x10 0. "CSECIEN,CSECIEN" "0,1"
|
|
tree.end
|
|
tree "SPI (Serial Peripheral Interface)"
|
|
base ad:0x0
|
|
tree "SPI0"
|
|
base ad:0x40004000
|
|
group.long 0x0++0x23
|
|
line.long 0x0 "SPICR0,SPICR0"
|
|
hexmask.long.byte 0x0 12.--15. 1. "SELHT,SELHT"
|
|
hexmask.long.byte 0x0 8.--11. 1. "GUADT,GUADT"
|
|
bitfld.long 0x0 7. "GUADTEN,GUADTEN" "0,1"
|
|
bitfld.long 0x0 6. "DUALEN,DUALEN" "0,1"
|
|
bitfld.long 0x0 4. "SSELC,SSELC" "0,1"
|
|
bitfld.long 0x0 3. "SELOEN,SELOEN" "0,1"
|
|
bitfld.long 0x0 2. "RXDMAE,RXDMAE" "0,1"
|
|
bitfld.long 0x0 1. "TXDMAE,TXDMAE" "0,1"
|
|
bitfld.long 0x0 0. "SPIEN,SPIEN" "0,1"
|
|
line.long 0x4 "SPICR1,SPICR1"
|
|
bitfld.long 0x4 14. "MODE,MODE" "0,1"
|
|
bitfld.long 0x4 13. "SELM,SELM" "0,1"
|
|
bitfld.long 0x4 12. "FIRSTBIT,FIRSTBIT" "0,1"
|
|
bitfld.long 0x4 11. "SELAP,SELAP" "0,1"
|
|
bitfld.long 0x4 8.--10. "FORMAT,FORMAT" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x4 0.--3. 1. "DFL,DFL"
|
|
line.long 0x8 "SPIIER,SPIIER"
|
|
bitfld.long 0x8 7. "TOIEN,TOIEN" "0,1"
|
|
bitfld.long 0x8 6. "SAIEN,SAIEN" "0,1"
|
|
bitfld.long 0x8 5. "MFIEN,MFIEN" "0,1"
|
|
bitfld.long 0x8 4. "ROIEN,ROIEN" "0,1"
|
|
bitfld.long 0x8 3. "WCIEN,WCIEN" "0,1"
|
|
bitfld.long 0x8 2. "RXBNEIEN,RXBNEIEN" "0,1"
|
|
bitfld.long 0x8 1. "TXEIEN,TXEIEN" "0,1"
|
|
bitfld.long 0x8 0. "TXBEIEN,TXBEIEN" "0,1"
|
|
line.long 0xC "SPICPR,SPICPR"
|
|
hexmask.long.word 0xC 0.--15. 1. "CP,CP"
|
|
line.long 0x10 "SPIDR,SPIDR"
|
|
hexmask.long.word 0x10 0.--15. 1. "DR,DR"
|
|
line.long 0x14 "SPISR,SPISR"
|
|
bitfld.long 0x14 8. "BUSY,BUSY" "0,1"
|
|
bitfld.long 0x14 7. "TO,TO" "0,1"
|
|
bitfld.long 0x14 6. "SA,SA" "0,1"
|
|
bitfld.long 0x14 5. "MF,MF" "0,1"
|
|
bitfld.long 0x14 4. "RO,RO" "0,1"
|
|
bitfld.long 0x14 3. "WC,WC" "0,1"
|
|
bitfld.long 0x14 2. "RXBNE,RXBNE" "0,1"
|
|
bitfld.long 0x14 1. "TXE,TXE" "0,1"
|
|
bitfld.long 0x14 0. "TXBE,TXBE" "0,1"
|
|
line.long 0x18 "SPIFCR,SPIFCR"
|
|
bitfld.long 0x18 10. "FIFOEN,FIFOEN" "0,1"
|
|
hexmask.long.byte 0x18 4.--7. 1. "RXFTLS,RXFTLS"
|
|
hexmask.long.byte 0x18 0.--3. 1. "TXFTLS,TXFTLS"
|
|
line.long 0x1C "SPIFSR,SPIFSR"
|
|
hexmask.long.byte 0x1C 4.--7. 1. "RXFS,RXFS"
|
|
hexmask.long.byte 0x1C 0.--3. 1. "TXFS,TXFS"
|
|
line.long 0x20 "SPIFTOCR,SPIFTOCR"
|
|
hexmask.long.word 0x20 0.--15. 1. "TOC,TOC"
|
|
tree.end
|
|
tree "SPI1"
|
|
base ad:0x40044000
|
|
group.long 0x0++0x23
|
|
line.long 0x0 "SPICR0,SPICR0"
|
|
hexmask.long.byte 0x0 12.--15. 1. "SELHT,SELHT"
|
|
hexmask.long.byte 0x0 8.--11. 1. "GUADT,GUADT"
|
|
bitfld.long 0x0 7. "GUADTEN,GUADTEN" "0,1"
|
|
bitfld.long 0x0 6. "DUALEN,DUALEN" "0,1"
|
|
bitfld.long 0x0 4. "SSELC,SSELC" "0,1"
|
|
bitfld.long 0x0 3. "SELOEN,SELOEN" "0,1"
|
|
bitfld.long 0x0 2. "RXDMAE,RXDMAE" "0,1"
|
|
bitfld.long 0x0 1. "TXDMAE,TXDMAE" "0,1"
|
|
bitfld.long 0x0 0. "SPIEN,SPIEN" "0,1"
|
|
line.long 0x4 "SPICR1,SPICR1"
|
|
bitfld.long 0x4 14. "MODE,MODE" "0,1"
|
|
bitfld.long 0x4 13. "SELM,SELM" "0,1"
|
|
bitfld.long 0x4 12. "FIRSTBIT,FIRSTBIT" "0,1"
|
|
bitfld.long 0x4 11. "SELAP,SELAP" "0,1"
|
|
bitfld.long 0x4 8.--10. "FORMAT,FORMAT" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x4 0.--3. 1. "DFL,DFL"
|
|
line.long 0x8 "SPIIER,SPIIER"
|
|
bitfld.long 0x8 7. "TOIEN,TOIEN" "0,1"
|
|
bitfld.long 0x8 6. "SAIEN,SAIEN" "0,1"
|
|
bitfld.long 0x8 5. "MFIEN,MFIEN" "0,1"
|
|
bitfld.long 0x8 4. "ROIEN,ROIEN" "0,1"
|
|
bitfld.long 0x8 3. "WCIEN,WCIEN" "0,1"
|
|
bitfld.long 0x8 2. "RXBNEIEN,RXBNEIEN" "0,1"
|
|
bitfld.long 0x8 1. "TXEIEN,TXEIEN" "0,1"
|
|
bitfld.long 0x8 0. "TXBEIEN,TXBEIEN" "0,1"
|
|
line.long 0xC "SPICPR,SPICPR"
|
|
hexmask.long.word 0xC 0.--15. 1. "CP,CP"
|
|
line.long 0x10 "SPIDR,SPIDR"
|
|
hexmask.long.word 0x10 0.--15. 1. "DR,DR"
|
|
line.long 0x14 "SPISR,SPISR"
|
|
bitfld.long 0x14 8. "BUSY,BUSY" "0,1"
|
|
bitfld.long 0x14 7. "TO,TO" "0,1"
|
|
bitfld.long 0x14 6. "SA,SA" "0,1"
|
|
bitfld.long 0x14 5. "MF,MF" "0,1"
|
|
bitfld.long 0x14 4. "RO,RO" "0,1"
|
|
bitfld.long 0x14 3. "WC,WC" "0,1"
|
|
bitfld.long 0x14 2. "RXBNE,RXBNE" "0,1"
|
|
bitfld.long 0x14 1. "TXE,TXE" "0,1"
|
|
bitfld.long 0x14 0. "TXBE,TXBE" "0,1"
|
|
line.long 0x18 "SPIFCR,SPIFCR"
|
|
bitfld.long 0x18 10. "FIFOEN,FIFOEN" "0,1"
|
|
hexmask.long.byte 0x18 4.--7. 1. "RXFTLS,RXFTLS"
|
|
hexmask.long.byte 0x18 0.--3. 1. "TXFTLS,TXFTLS"
|
|
line.long 0x1C "SPIFSR,SPIFSR"
|
|
hexmask.long.byte 0x1C 4.--7. 1. "RXFS,RXFS"
|
|
hexmask.long.byte 0x1C 0.--3. 1. "TXFS,TXFS"
|
|
line.long 0x20 "SPIFTOCR,SPIFTOCR"
|
|
hexmask.long.word 0x20 0.--15. 1. "TOC,TOC"
|
|
tree.end
|
|
tree.end
|
|
tree "UART (Universal Asynchronous Receiver Transmitter)"
|
|
base ad:0x0
|
|
tree "UART0"
|
|
base ad:0x40001000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "URDR,URDR"
|
|
hexmask.long.word 0x0 0.--8. 1. "DB,DB"
|
|
line.long 0x4 "URCR,URCR"
|
|
bitfld.long 0x4 18. "LBDLS,LBDLS" "0,1"
|
|
bitfld.long 0x4 17. "LSBF,LSBF" "0,1"
|
|
bitfld.long 0x4 16. "MODE2,MODE2" "0,1"
|
|
bitfld.long 0x4 14. "BCB,BCB" "0,1"
|
|
bitfld.long 0x4 13. "SPE,SPE" "0,1"
|
|
bitfld.long 0x4 12. "EPE,EPE" "0,1"
|
|
bitfld.long 0x4 11. "PBE,PBE" "0,1"
|
|
bitfld.long 0x4 10. "NSB,NSB" "0,1"
|
|
bitfld.long 0x4 8.--9. "WLS,WLS" "0,1,2,3"
|
|
bitfld.long 0x4 7. "RXDMAEN,RXDMAEN" "0,1"
|
|
bitfld.long 0x4 6. "TXDMAEN,TXDMAEN" "0,1"
|
|
bitfld.long 0x4 5. "URRXEN,URRXEN" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "URTXEN,URTXEN" "0,1"
|
|
bitfld.long 0x4 2. "TRSM,TRSM" "0,1"
|
|
bitfld.long 0x4 0.--1. "MODE,MODE" "0,1,2,3"
|
|
group.long 0xC++0x7
|
|
line.long 0x0 "URIER,URIER"
|
|
bitfld.long 0x0 10. "LINBDIE,LINBDIE" "0,1"
|
|
bitfld.long 0x0 6. "BIE,BIE" "0,1"
|
|
bitfld.long 0x0 5. "FEIE,FEIE" "0,1"
|
|
bitfld.long 0x0 4. "PEIE,PEIE" "0,1"
|
|
bitfld.long 0x0 3. "OEIE,OEIE" "0,1"
|
|
bitfld.long 0x0 2. "TXCIE,TXCIE" "0,1"
|
|
bitfld.long 0x0 1. "TXDEIE,TXDEIE" "0,1"
|
|
bitfld.long 0x0 0. "RXDRIE,RXDRIE" "0,1"
|
|
line.long 0x4 "URSIFR,URSIFR"
|
|
bitfld.long 0x4 8. "TXC,TXC" "0,1"
|
|
bitfld.long 0x4 7. "TXDE,TXDE" "0,1"
|
|
bitfld.long 0x4 5. "RXDR,RXDR" "0,1"
|
|
bitfld.long 0x4 4. "BII,BII" "0,1"
|
|
bitfld.long 0x4 3. "FEI,FEI" "0,1"
|
|
bitfld.long 0x4 2. "PEI,PEI" "0,1"
|
|
bitfld.long 0x4 1. "OEI,OEI" "0,1"
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "URDLR,URDLR"
|
|
hexmask.long.word 0x0 0.--15. 1. "BRD,BRD"
|
|
line.long 0x4 "URTSTR,URTSTR"
|
|
bitfld.long 0x4 0.--1. "LBM,LBM" "0,1,2,3"
|
|
tree.end
|
|
tree "UART1"
|
|
base ad:0x40041000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "URDR,URDR"
|
|
hexmask.long.word 0x0 0.--8. 1. "DB,DB"
|
|
line.long 0x4 "URCR,URCR"
|
|
bitfld.long 0x4 18. "LBDLS,LBDLS" "0,1"
|
|
bitfld.long 0x4 17. "LSBF,LSBF" "0,1"
|
|
bitfld.long 0x4 16. "MODE2,MODE2" "0,1"
|
|
bitfld.long 0x4 14. "BCB,BCB" "0,1"
|
|
bitfld.long 0x4 13. "SPE,SPE" "0,1"
|
|
bitfld.long 0x4 12. "EPE,EPE" "0,1"
|
|
bitfld.long 0x4 11. "PBE,PBE" "0,1"
|
|
bitfld.long 0x4 10. "NSB,NSB" "0,1"
|
|
bitfld.long 0x4 8.--9. "WLS,WLS" "0,1,2,3"
|
|
bitfld.long 0x4 7. "RXDMAEN,RXDMAEN" "0,1"
|
|
bitfld.long 0x4 6. "TXDMAEN,TXDMAEN" "0,1"
|
|
bitfld.long 0x4 5. "URRXEN,URRXEN" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "URTXEN,URTXEN" "0,1"
|
|
bitfld.long 0x4 2. "TRSM,TRSM" "0,1"
|
|
bitfld.long 0x4 0.--1. "MODE,MODE" "0,1,2,3"
|
|
group.long 0xC++0x7
|
|
line.long 0x0 "URIER,URIER"
|
|
bitfld.long 0x0 10. "LINBDIE,LINBDIE" "0,1"
|
|
bitfld.long 0x0 6. "BIE,BIE" "0,1"
|
|
bitfld.long 0x0 5. "FEIE,FEIE" "0,1"
|
|
bitfld.long 0x0 4. "PEIE,PEIE" "0,1"
|
|
bitfld.long 0x0 3. "OEIE,OEIE" "0,1"
|
|
bitfld.long 0x0 2. "TXCIE,TXCIE" "0,1"
|
|
bitfld.long 0x0 1. "TXDEIE,TXDEIE" "0,1"
|
|
bitfld.long 0x0 0. "RXDRIE,RXDRIE" "0,1"
|
|
line.long 0x4 "URSIFR,URSIFR"
|
|
bitfld.long 0x4 8. "TXC,TXC" "0,1"
|
|
bitfld.long 0x4 7. "TXDE,TXDE" "0,1"
|
|
bitfld.long 0x4 5. "RXDR,RXDR" "0,1"
|
|
bitfld.long 0x4 4. "BII,BII" "0,1"
|
|
bitfld.long 0x4 3. "FEI,FEI" "0,1"
|
|
bitfld.long 0x4 2. "PEI,PEI" "0,1"
|
|
bitfld.long 0x4 1. "OEI,OEI" "0,1"
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "URDLR,URDLR"
|
|
hexmask.long.word 0x0 0.--15. 1. "BRD,BRD"
|
|
line.long 0x4 "URTSTR,URTSTR"
|
|
bitfld.long 0x4 0.--1. "LBM,LBM" "0,1,2,3"
|
|
tree.end
|
|
tree.end
|
|
tree "USART (Universal Synchronous Asynchronous Receiver Transmitter)"
|
|
base ad:0x0
|
|
tree "USART0"
|
|
base ad:0x40000000
|
|
group.long 0x0++0x2B
|
|
line.long 0x0 "USRDR,USRDR"
|
|
hexmask.long.word 0x0 0.--8. 1. "DB,DB"
|
|
line.long 0x4 "USRCR,USRCR"
|
|
bitfld.long 0x4 18. "LBDLS,LBDLS" "0,1"
|
|
bitfld.long 0x4 17. "LSBF,LSBF" "0,1"
|
|
bitfld.long 0x4 16. "MODE2,MODE2" "0,1"
|
|
bitfld.long 0x4 15. "RTS,RTS" "0,1"
|
|
bitfld.long 0x4 14. "BCB,BCB" "0,1"
|
|
bitfld.long 0x4 13. "SPE,SPE" "0,1"
|
|
bitfld.long 0x4 12. "EPE,EPE" "0,1"
|
|
bitfld.long 0x4 11. "PBE,PBE" "0,1"
|
|
bitfld.long 0x4 10. "NSB,NSB" "0,1"
|
|
bitfld.long 0x4 8.--9. "WLS,WLS" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 7. "RXDMAEN,RXDMAEN" "0,1"
|
|
bitfld.long 0x4 6. "TXDMAEN,TXDMAEN" "0,1"
|
|
bitfld.long 0x4 5. "URRXEN,URRXEN" "0,1"
|
|
bitfld.long 0x4 4. "URTXEN,URTXEN" "0,1"
|
|
bitfld.long 0x4 3. "HFCEN,HFCEN" "0,1"
|
|
bitfld.long 0x4 2. "TRSM,TRSM" "0,1"
|
|
bitfld.long 0x4 0.--1. "MODE,MODE" "0,1,2,3"
|
|
line.long 0x8 "USRFCR,USRFCR"
|
|
hexmask.long.byte 0x8 24.--27. 1. "RXFS,RXFS"
|
|
hexmask.long.byte 0x8 16.--19. 1. "TXFS,TXFS"
|
|
bitfld.long 0x8 6.--7. "RXTL,RXTL" "0,1,2,3"
|
|
bitfld.long 0x8 4.--5. "TXTL,TXTL" "0,1,2,3"
|
|
bitfld.long 0x8 1. "RXR,RXR" "0,1"
|
|
bitfld.long 0x8 0. "TXR,TXR" "0,1"
|
|
line.long 0xC "USRIER,USRIER"
|
|
bitfld.long 0xC 10. "LINBDIE,LINBDIE" "0,1"
|
|
bitfld.long 0xC 9. "CTSIE,CTSIE" "0,1"
|
|
bitfld.long 0xC 8. "RXTOIE,RXTOIE" "0,1"
|
|
bitfld.long 0xC 7. "RSADDIE,RSADDIE" "0,1"
|
|
bitfld.long 0xC 6. "BIE,BIE" "0,1"
|
|
bitfld.long 0xC 5. "FEIE,FEIE" "0,1"
|
|
bitfld.long 0xC 4. "PEIE,PEIE" "0,1"
|
|
bitfld.long 0xC 3. "OEIE,OEIE" "0,1"
|
|
bitfld.long 0xC 2. "TXCIE,TXCIE" "0,1"
|
|
bitfld.long 0xC 1. "TXDEIE,TXDEIE" "0,1"
|
|
newline
|
|
bitfld.long 0xC 0. "RXDRIE,RXDRIE" "0,1"
|
|
line.long 0x10 "USRSIFR,USRSIFR"
|
|
bitfld.long 0x10 12. "LBDF,LBDF" "0,1"
|
|
bitfld.long 0x10 11. "CTSS,CTSS" "0,1"
|
|
bitfld.long 0x10 10. "CTSC,CTSC" "0,1"
|
|
bitfld.long 0x10 9. "RSADD,RSADD" "0,1"
|
|
bitfld.long 0x10 8. "TXC,TXC" "0,1"
|
|
bitfld.long 0x10 7. "TXDE,TXDE" "0,1"
|
|
bitfld.long 0x10 6. "RXTOF,RXTOF" "0,1"
|
|
bitfld.long 0x10 5. "RXDR,RXDR" "0,1"
|
|
bitfld.long 0x10 4. "BII,BII" "0,1"
|
|
bitfld.long 0x10 3. "FEI,FEI" "0,1"
|
|
newline
|
|
bitfld.long 0x10 2. "PEI,PEI" "0,1"
|
|
bitfld.long 0x10 1. "OEI,OEI" "0,1"
|
|
bitfld.long 0x10 0. "RXDNE,RXDNE" "0,1"
|
|
line.long 0x14 "USRTPR,USRTPR"
|
|
hexmask.long.byte 0x14 8.--15. 1. "TG,TG"
|
|
bitfld.long 0x14 7. "RXTOEN,RXTOEN" "0,1"
|
|
hexmask.long.byte 0x14 0.--6. 1. "RXTOC,RXTOC"
|
|
line.long 0x18 "IrDACR,IrDACR"
|
|
hexmask.long.byte 0x18 8.--15. 1. "IrDAPSC,IrDAPSC"
|
|
bitfld.long 0x18 5. "RXINV,RXINV" "0,1"
|
|
bitfld.long 0x18 4. "TXINV,TXINV" "0,1"
|
|
bitfld.long 0x18 3. "LB,LB" "0,1"
|
|
bitfld.long 0x18 2. "TXSEL,TXSEL" "0,1"
|
|
bitfld.long 0x18 1. "IrDALP,IrDALP" "0,1"
|
|
bitfld.long 0x18 0. "IrDAEN,IrDAEN" "0,1"
|
|
line.long 0x1C "RS485CR,RS485CR"
|
|
hexmask.long.byte 0x1C 8.--15. 1. "ADDMATCH,ADDMATCH"
|
|
bitfld.long 0x1C 2. "RSAAD,RSAAD" "0,1"
|
|
bitfld.long 0x1C 1. "RSNMM,RSNMM" "0,1"
|
|
bitfld.long 0x1C 0. "TXENP,TXENP" "0,1"
|
|
line.long 0x20 "SYNCR,SYNCR"
|
|
bitfld.long 0x20 3. "CPO,CPO" "0,1"
|
|
bitfld.long 0x20 2. "CPS,CPS" "0,1"
|
|
bitfld.long 0x20 0. "CLKEN,CLKEN" "0,1"
|
|
line.long 0x24 "USRDLR,USRDLR"
|
|
hexmask.long.word 0x24 0.--15. 1. "BRD,BRD"
|
|
line.long 0x28 "USRTSTR,USRTSTR"
|
|
bitfld.long 0x28 0.--1. "LBM,LBM" "0,1,2,3"
|
|
tree.end
|
|
tree "USART1"
|
|
base ad:0x40040000
|
|
group.long 0x0++0x2B
|
|
line.long 0x0 "USRDR,USRDR"
|
|
hexmask.long.word 0x0 0.--8. 1. "DB,DB"
|
|
line.long 0x4 "USRCR,USRCR"
|
|
bitfld.long 0x4 18. "LBDLS,LBDLS" "0,1"
|
|
bitfld.long 0x4 17. "LSBF,LSBF" "0,1"
|
|
bitfld.long 0x4 16. "MODE2,MODE2" "0,1"
|
|
bitfld.long 0x4 15. "RTS,RTS" "0,1"
|
|
bitfld.long 0x4 14. "BCB,BCB" "0,1"
|
|
bitfld.long 0x4 13. "SPE,SPE" "0,1"
|
|
bitfld.long 0x4 12. "EPE,EPE" "0,1"
|
|
bitfld.long 0x4 11. "PBE,PBE" "0,1"
|
|
bitfld.long 0x4 10. "NSB,NSB" "0,1"
|
|
bitfld.long 0x4 8.--9. "WLS,WLS" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 7. "RXDMAEN,RXDMAEN" "0,1"
|
|
bitfld.long 0x4 6. "TXDMAEN,TXDMAEN" "0,1"
|
|
bitfld.long 0x4 5. "URRXEN,URRXEN" "0,1"
|
|
bitfld.long 0x4 4. "URTXEN,URTXEN" "0,1"
|
|
bitfld.long 0x4 3. "HFCEN,HFCEN" "0,1"
|
|
bitfld.long 0x4 2. "TRSM,TRSM" "0,1"
|
|
bitfld.long 0x4 0.--1. "MODE,MODE" "0,1,2,3"
|
|
line.long 0x8 "USRFCR,USRFCR"
|
|
hexmask.long.byte 0x8 24.--27. 1. "RXFS,RXFS"
|
|
hexmask.long.byte 0x8 16.--19. 1. "TXFS,TXFS"
|
|
bitfld.long 0x8 6.--7. "RXTL,RXTL" "0,1,2,3"
|
|
bitfld.long 0x8 4.--5. "TXTL,TXTL" "0,1,2,3"
|
|
bitfld.long 0x8 1. "RXR,RXR" "0,1"
|
|
bitfld.long 0x8 0. "TXR,TXR" "0,1"
|
|
line.long 0xC "USRIER,USRIER"
|
|
bitfld.long 0xC 10. "LINBDIE,LINBDIE" "0,1"
|
|
bitfld.long 0xC 9. "CTSIE,CTSIE" "0,1"
|
|
bitfld.long 0xC 8. "RXTOIE,RXTOIE" "0,1"
|
|
bitfld.long 0xC 7. "RSADDIE,RSADDIE" "0,1"
|
|
bitfld.long 0xC 6. "BIE,BIE" "0,1"
|
|
bitfld.long 0xC 5. "FEIE,FEIE" "0,1"
|
|
bitfld.long 0xC 4. "PEIE,PEIE" "0,1"
|
|
bitfld.long 0xC 3. "OEIE,OEIE" "0,1"
|
|
bitfld.long 0xC 2. "TXCIE,TXCIE" "0,1"
|
|
bitfld.long 0xC 1. "TXDEIE,TXDEIE" "0,1"
|
|
newline
|
|
bitfld.long 0xC 0. "RXDRIE,RXDRIE" "0,1"
|
|
line.long 0x10 "USRSIFR,USRSIFR"
|
|
bitfld.long 0x10 12. "LBDF,LBDF" "0,1"
|
|
bitfld.long 0x10 11. "CTSS,CTSS" "0,1"
|
|
bitfld.long 0x10 10. "CTSC,CTSC" "0,1"
|
|
bitfld.long 0x10 9. "RSADD,RSADD" "0,1"
|
|
bitfld.long 0x10 8. "TXC,TXC" "0,1"
|
|
bitfld.long 0x10 7. "TXDE,TXDE" "0,1"
|
|
bitfld.long 0x10 6. "RXTOF,RXTOF" "0,1"
|
|
bitfld.long 0x10 5. "RXDR,RXDR" "0,1"
|
|
bitfld.long 0x10 4. "BII,BII" "0,1"
|
|
bitfld.long 0x10 3. "FEI,FEI" "0,1"
|
|
newline
|
|
bitfld.long 0x10 2. "PEI,PEI" "0,1"
|
|
bitfld.long 0x10 1. "OEI,OEI" "0,1"
|
|
bitfld.long 0x10 0. "RXDNE,RXDNE" "0,1"
|
|
line.long 0x14 "USRTPR,USRTPR"
|
|
hexmask.long.byte 0x14 8.--15. 1. "TG,TG"
|
|
bitfld.long 0x14 7. "RXTOEN,RXTOEN" "0,1"
|
|
hexmask.long.byte 0x14 0.--6. 1. "RXTOC,RXTOC"
|
|
line.long 0x18 "IrDACR,IrDACR"
|
|
hexmask.long.byte 0x18 8.--15. 1. "IrDAPSC,IrDAPSC"
|
|
bitfld.long 0x18 5. "RXINV,RXINV" "0,1"
|
|
bitfld.long 0x18 4. "TXINV,TXINV" "0,1"
|
|
bitfld.long 0x18 3. "LB,LB" "0,1"
|
|
bitfld.long 0x18 2. "TXSEL,TXSEL" "0,1"
|
|
bitfld.long 0x18 1. "IrDALP,IrDALP" "0,1"
|
|
bitfld.long 0x18 0. "IrDAEN,IrDAEN" "0,1"
|
|
line.long 0x1C "RS485CR,RS485CR"
|
|
hexmask.long.byte 0x1C 8.--15. 1. "ADDMATCH,ADDMATCH"
|
|
bitfld.long 0x1C 2. "RSAAD,RSAAD" "0,1"
|
|
bitfld.long 0x1C 1. "RSNMM,RSNMM" "0,1"
|
|
bitfld.long 0x1C 0. "TXENP,TXENP" "0,1"
|
|
line.long 0x20 "SYNCR,SYNCR"
|
|
bitfld.long 0x20 3. "CPO,CPO" "0,1"
|
|
bitfld.long 0x20 2. "CPS,CPS" "0,1"
|
|
bitfld.long 0x20 0. "CLKEN,CLKEN" "0,1"
|
|
line.long 0x24 "USRDLR,USRDLR"
|
|
hexmask.long.word 0x24 0.--15. 1. "BRD,BRD"
|
|
line.long 0x28 "USRTSTR,USRTSTR"
|
|
bitfld.long 0x28 0.--1. "LBM,LBM" "0,1,2,3"
|
|
tree.end
|
|
tree.end
|
|
tree "WDT (Watchdog Timer)"
|
|
base ad:0x40068000
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "WDTCR,WDTCR"
|
|
hexmask.long.word 0x0 16.--31. 1. "RSKEY,RSKEY"
|
|
bitfld.long 0x0 0. "WDTRS,WDTRS" "0,1"
|
|
line.long 0x4 "WDTMR0,WDTMR0"
|
|
bitfld.long 0x4 16. "WDTEN,WDTEN" "0,1"
|
|
bitfld.long 0x4 14.--15. "WDTSHLT,WDTSHLT" "0,1,2,3"
|
|
bitfld.long 0x4 13. "WDTRSTEN,WDTRSTEN" "0,1"
|
|
hexmask.long.word 0x4 0.--11. 1. "WDTV,WDTV"
|
|
line.long 0x8 "WDTMR1,WDTMR1"
|
|
bitfld.long 0x8 12.--14. "WPSC,WPSC" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x8 0.--11. 1. "WDTD,WDTD"
|
|
line.long 0xC "WDTSR,WDTSR"
|
|
bitfld.long 0xC 1. "WDTERR,WDTERR" "0,1"
|
|
bitfld.long 0xC 0. "WDTUF,WDTUF" "0,1"
|
|
line.long 0x10 "WDTPR,WDTPR"
|
|
hexmask.long.word 0x10 0.--15. 1. "PROTECT,PROTECT"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "WDTCSR,WDTCSR"
|
|
bitfld.long 0x0 4. "WDTLOCK,WDTLOCK" "0,1"
|
|
bitfld.long 0x0 0. "WDTSRC,WDTSRC" "0,1"
|
|
tree.end
|
|
newline
|
|
AUTOINDENT.OFF
|